Marc St-Jean | 35832e2 | 2007-06-14 15:54:47 -0600 | [diff] [blame] | 1 | /* |
| 2 | * The generic setup file for PMC-Sierra MSP processors |
| 3 | * |
| 4 | * Copyright 2005-2007 PMC-Sierra, Inc, |
| 5 | * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net |
| 6 | * |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 7 | * This program is free software; you can redistribute it and/or modify it |
| 8 | * under the terms of the GNU General Public License as published by the |
Marc St-Jean | 35832e2 | 2007-06-14 15:54:47 -0600 | [diff] [blame] | 9 | * Free Software Foundation; either version 2 of the License, or (at your |
| 10 | * option) any later version. |
| 11 | */ |
| 12 | |
Ralf Baechle | c861519 | 2015-11-27 19:17:01 +0100 | [diff] [blame] | 13 | #include <linux/delay.h> |
| 14 | |
Marc St-Jean | 35832e2 | 2007-06-14 15:54:47 -0600 | [diff] [blame] | 15 | #include <asm/bootinfo.h> |
| 16 | #include <asm/cacheflush.h> |
Ralf Baechle | bdc92d74 | 2013-05-21 16:59:19 +0200 | [diff] [blame] | 17 | #include <asm/idle.h> |
Marc St-Jean | 35832e2 | 2007-06-14 15:54:47 -0600 | [diff] [blame] | 18 | #include <asm/r4kcache.h> |
| 19 | #include <asm/reboot.h> |
Ralf Baechle | 2fd4310 | 2011-06-22 11:14:58 +0100 | [diff] [blame] | 20 | #include <asm/smp-ops.h> |
Marc St-Jean | 35832e2 | 2007-06-14 15:54:47 -0600 | [diff] [blame] | 21 | #include <asm/time.h> |
| 22 | |
| 23 | #include <msp_prom.h> |
| 24 | #include <msp_regs.h> |
| 25 | |
| 26 | #if defined(CONFIG_PMC_MSP7120_GW) |
| 27 | #include <msp_regops.h> |
Marc St-Jean | 35832e2 | 2007-06-14 15:54:47 -0600 | [diff] [blame] | 28 | #define MSP_BOARD_RESET_GPIO 9 |
| 29 | #endif |
| 30 | |
Marc St-Jean | 35832e2 | 2007-06-14 15:54:47 -0600 | [diff] [blame] | 31 | extern void msp_serial_setup(void); |
Marc St-Jean | 35832e2 | 2007-06-14 15:54:47 -0600 | [diff] [blame] | 32 | |
| 33 | #if defined(CONFIG_PMC_MSP7120_EVAL) || \ |
| 34 | defined(CONFIG_PMC_MSP7120_GW) || \ |
| 35 | defined(CONFIG_PMC_MSP7120_FPGA) |
| 36 | /* |
| 37 | * Performs the reset for MSP7120-based boards |
| 38 | */ |
| 39 | void msp7120_reset(void) |
| 40 | { |
| 41 | void *start, *end, *iptr; |
| 42 | register int i; |
| 43 | |
| 44 | /* Diasble all interrupts */ |
| 45 | local_irq_disable(); |
| 46 | #ifdef CONFIG_SYS_SUPPORTS_MULTITHREADING |
| 47 | dvpe(); |
| 48 | #endif |
| 49 | |
| 50 | /* Cache the reset code of this function */ |
| 51 | __asm__ __volatile__ ( |
| 52 | " .set push \n" |
Ralf Baechle | a809d46 | 2014-03-30 13:20:10 +0200 | [diff] [blame] | 53 | " .set arch=r4000 \n" |
Marc St-Jean | 35832e2 | 2007-06-14 15:54:47 -0600 | [diff] [blame] | 54 | " la %0,startpoint \n" |
| 55 | " la %1,endpoint \n" |
| 56 | " .set pop \n" |
| 57 | : "=r" (start), "=r" (end) |
| 58 | : |
| 59 | ); |
| 60 | |
| 61 | for (iptr = (void *)((unsigned int)start & ~(L1_CACHE_BYTES - 1)); |
| 62 | iptr < end; iptr += L1_CACHE_BYTES) |
| 63 | cache_op(Fill, iptr); |
| 64 | |
| 65 | __asm__ __volatile__ ( |
| 66 | "startpoint: \n" |
| 67 | ); |
| 68 | |
| 69 | /* Put the DDRC into self-refresh mode */ |
| 70 | DDRC_INDIRECT_WRITE(DDRC_CTL(10), 0xb, 1 << 16); |
| 71 | |
| 72 | /* |
| 73 | * IMPORTANT! |
| 74 | * DO NOT do anything from here on out that might even |
| 75 | * think about fetching from RAM - i.e., don't call any |
| 76 | * non-inlined functions, and be VERY sure that any inline |
| 77 | * functions you do call do NOT access any sort of RAM |
| 78 | * anywhere! |
| 79 | */ |
| 80 | |
| 81 | /* Wait a bit for the DDRC to settle */ |
Ralf Baechle | c861519 | 2015-11-27 19:17:01 +0100 | [diff] [blame] | 82 | mdelay(125); |
Marc St-Jean | 35832e2 | 2007-06-14 15:54:47 -0600 | [diff] [blame] | 83 | |
| 84 | #if defined(CONFIG_PMC_MSP7120_GW) |
| 85 | /* |
| 86 | * Set GPIO 9 HI, (tied to board reset logic) |
| 87 | * GPIO 9 is the 4th GPIO of register 3 |
| 88 | * |
| 89 | * NOTE: We cannot use the higher-level msp_gpio_mode()/out() |
| 90 | * as GPIO char driver may not be enabled and it would look up |
| 91 | * data inRAM! |
| 92 | */ |
Shane McDonald | 005076a | 2009-04-27 23:52:25 -0600 | [diff] [blame] | 93 | set_value_reg32(GPIO_CFG3_REG, 0xf000, 0x8000); |
| 94 | set_reg32(GPIO_DATA3_REG, 8); |
Marc St-Jean | 35832e2 | 2007-06-14 15:54:47 -0600 | [diff] [blame] | 95 | |
| 96 | /* |
| 97 | * In case GPIO9 doesn't reset the board (jumper configurable!) |
| 98 | * fallback to device reset below. |
| 99 | */ |
| 100 | #endif |
| 101 | /* Set bit 1 of the MSP7120 reset register */ |
| 102 | *RST_SET_REG = 0x00000001; |
| 103 | |
| 104 | __asm__ __volatile__ ( |
| 105 | "endpoint: \n" |
| 106 | ); |
| 107 | } |
| 108 | #endif |
| 109 | |
| 110 | void msp_restart(char *command) |
| 111 | { |
| 112 | printk(KERN_WARNING "Now rebooting .......\n"); |
| 113 | |
| 114 | #if defined(CONFIG_PMC_MSP7120_EVAL) || \ |
| 115 | defined(CONFIG_PMC_MSP7120_GW) || \ |
| 116 | defined(CONFIG_PMC_MSP7120_FPGA) |
| 117 | msp7120_reset(); |
| 118 | #else |
| 119 | /* No chip-specific reset code, just jump to the ROM reset vector */ |
| 120 | set_c0_status(ST0_BEV | ST0_ERL); |
| 121 | change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED); |
| 122 | flush_cache_all(); |
| 123 | write_c0_wired(0); |
| 124 | |
| 125 | __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000)); |
| 126 | #endif |
| 127 | } |
| 128 | |
| 129 | void msp_halt(void) |
| 130 | { |
| 131 | printk(KERN_WARNING "\n** You can safely turn off the power\n"); |
| 132 | while (1) |
| 133 | /* If possible call official function to get CPU WARs */ |
| 134 | if (cpu_wait) |
| 135 | (*cpu_wait)(); |
| 136 | else |
| 137 | __asm__(".set\tmips3\n\t" "wait\n\t" ".set\tmips0"); |
| 138 | } |
| 139 | |
| 140 | void msp_power_off(void) |
| 141 | { |
| 142 | msp_halt(); |
| 143 | } |
| 144 | |
| 145 | void __init plat_mem_setup(void) |
| 146 | { |
| 147 | _machine_restart = msp_restart; |
| 148 | _machine_halt = msp_halt; |
| 149 | pm_power_off = msp_power_off; |
Marc St-Jean | 35832e2 | 2007-06-14 15:54:47 -0600 | [diff] [blame] | 150 | } |
| 151 | |
| 152 | void __init prom_init(void) |
| 153 | { |
| 154 | unsigned long family; |
| 155 | unsigned long revision; |
| 156 | |
| 157 | prom_argc = fw_arg0; |
| 158 | prom_argv = (char **)fw_arg1; |
| 159 | prom_envp = (char **)fw_arg2; |
| 160 | |
| 161 | /* |
| 162 | * Someday we can use this with PMON2000 to get a |
| 163 | * platform call prom routines for output etc. without |
| 164 | * having to use grody hacks. For now it's unused. |
| 165 | * |
| 166 | * struct callvectors *cv = (struct callvectors *) fw_arg3; |
| 167 | */ |
| 168 | family = identify_family(); |
| 169 | revision = identify_revision(); |
| 170 | |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 171 | switch (family) { |
Marc St-Jean | 35832e2 | 2007-06-14 15:54:47 -0600 | [diff] [blame] | 172 | case FAMILY_FPGA: |
| 173 | if (FPGA_IS_MSP4200(revision)) { |
| 174 | /* Old-style revision ID */ |
Marc St-Jean | 35832e2 | 2007-06-14 15:54:47 -0600 | [diff] [blame] | 175 | mips_machtype = MACH_MSP4200_FPGA; |
| 176 | } else { |
Marc St-Jean | 35832e2 | 2007-06-14 15:54:47 -0600 | [diff] [blame] | 177 | mips_machtype = MACH_MSP_OTHER; |
| 178 | } |
| 179 | break; |
| 180 | |
| 181 | case FAMILY_MSP4200: |
Marc St-Jean | 35832e2 | 2007-06-14 15:54:47 -0600 | [diff] [blame] | 182 | #if defined(CONFIG_PMC_MSP4200_EVAL) |
| 183 | mips_machtype = MACH_MSP4200_EVAL; |
| 184 | #elif defined(CONFIG_PMC_MSP4200_GW) |
| 185 | mips_machtype = MACH_MSP4200_GW; |
| 186 | #else |
| 187 | mips_machtype = MACH_MSP_OTHER; |
| 188 | #endif |
| 189 | break; |
| 190 | |
| 191 | case FAMILY_MSP4200_FPGA: |
Marc St-Jean | 35832e2 | 2007-06-14 15:54:47 -0600 | [diff] [blame] | 192 | mips_machtype = MACH_MSP4200_FPGA; |
| 193 | break; |
| 194 | |
| 195 | case FAMILY_MSP7100: |
Marc St-Jean | 35832e2 | 2007-06-14 15:54:47 -0600 | [diff] [blame] | 196 | #if defined(CONFIG_PMC_MSP7120_EVAL) |
| 197 | mips_machtype = MACH_MSP7120_EVAL; |
| 198 | #elif defined(CONFIG_PMC_MSP7120_GW) |
| 199 | mips_machtype = MACH_MSP7120_GW; |
| 200 | #else |
| 201 | mips_machtype = MACH_MSP_OTHER; |
| 202 | #endif |
| 203 | break; |
| 204 | |
| 205 | case FAMILY_MSP7100_FPGA: |
Marc St-Jean | 35832e2 | 2007-06-14 15:54:47 -0600 | [diff] [blame] | 206 | mips_machtype = MACH_MSP7120_FPGA; |
| 207 | break; |
| 208 | |
| 209 | default: |
| 210 | /* we don't recognize the machine */ |
Marc St-Jean | 35832e2 | 2007-06-14 15:54:47 -0600 | [diff] [blame] | 211 | mips_machtype = MACH_UNKNOWN; |
Ralf Baechle | ab75dc0 | 2011-11-17 15:07:31 +0000 | [diff] [blame] | 212 | panic("***Bogosity factor five***, exiting"); |
Ralf Baechle | 05dc8c0 | 2007-10-11 23:46:08 +0100 | [diff] [blame] | 213 | break; |
Marc St-Jean | 35832e2 | 2007-06-14 15:54:47 -0600 | [diff] [blame] | 214 | } |
| 215 | |
| 216 | prom_init_cmdline(); |
| 217 | |
| 218 | prom_meminit(); |
| 219 | |
| 220 | /* |
| 221 | * Sub-system setup follows. |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 222 | * Setup functions can either be called here or using the |
Marc St-Jean | 35832e2 | 2007-06-14 15:54:47 -0600 | [diff] [blame] | 223 | * subsys_initcall mechanism (i.e. see msp_pci_setup). The |
| 224 | * order in which they are called can be changed by using the |
| 225 | * link order in arch/mips/pmc-sierra/msp71xx/Makefile. |
| 226 | * |
| 227 | * NOTE: Please keep sub-system specific initialization code |
| 228 | * in separate specific files. |
| 229 | */ |
| 230 | msp_serial_setup(); |
| 231 | |
Ralf Baechle | b633648c5 | 2014-05-23 16:29:44 +0200 | [diff] [blame] | 232 | register_vsmp_smp_ops(); |
Marc St-Jean | 35832e2 | 2007-06-14 15:54:47 -0600 | [diff] [blame] | 233 | } |