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Russell Kinga09e64f2008-08-05 16:14:15 +01001/*
2 * arch/arm/mach-at91/include/mach/at91x40.h
3 *
4 * (C) Copyright 2007, Greg Ungerer <gerg@snapgear.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#ifndef AT91X40_H
13#define AT91X40_H
14
15/*
16 * IRQ list.
17 */
Russell Kinga09e64f2008-08-05 16:14:15 +010018#define AT91X40_ID_USART0 2 /* USART port 0 */
19#define AT91X40_ID_USART1 3 /* USART port 1 */
20#define AT91X40_ID_TC0 4 /* Timer/Counter 0 */
21#define AT91X40_ID_TC1 5 /* Timer/Counter 1*/
22#define AT91X40_ID_TC2 6 /* Timer/Counter 2*/
23#define AT91X40_ID_WD 7 /* Watchdog? */
24#define AT91X40_ID_PIOA 8 /* Parallel IO Controller A */
25
26#define AT91X40_ID_IRQ0 16 /* External IRQ 0 */
27#define AT91X40_ID_IRQ1 17 /* External IRQ 1 */
28#define AT91X40_ID_IRQ2 18 /* External IRQ 2 */
29
30/*
Jean-Christophe PLAGNIOL-VILLARDfac36a52012-02-05 20:35:39 +080031 * System Peripherals
Russell Kinga09e64f2008-08-05 16:14:15 +010032 */
33#define AT91_BASE_SYS 0xffc00000
34
Jean-Christophe PLAGNIOL-VILLARDfac36a52012-02-05 20:35:39 +080035#define AT91_EBI 0xffe00000 /* External Bus Interface */
36#define AT91_SF 0xfff00000 /* Special Function */
37#define AT91_USART1 0xfffcc000 /* USART 1 */
38#define AT91_USART0 0xfffd0000 /* USART 0 */
39#define AT91_TC 0xfffe0000 /* Timer Counter */
40#define AT91_PIOA 0xffff0000 /* PIO Controller A */
41#define AT91_PS 0xffff4000 /* Power Save */
42#define AT91_WD 0xffff8000 /* Watchdog Timer */
Russell Kinga09e64f2008-08-05 16:14:15 +010043
44/*
45 * The AT91x40 series doesn't have a debug unit like the other AT91 parts.
46 * But it does have a chip identify register and extension ID, so define at
47 * least these here.
48 */
49#define AT91_DBGU_CIDR (AT91_SF + 0) /* CIDR in PS segment */
50#define AT91_DBGU_EXID (AT91_SF + 4) /* EXID in PS segment */
51
Greg Ungerercb809b12010-09-21 20:39:40 +100052/*
53 * Support defines for the simple Power Controller module.
54 */
55#define AT91_PS_CR (AT91_PS + 0) /* PS Control register */
56#define AT91_PS_CR_CPU (1 << 0) /* CPU clock disable bit */
57
Russell Kinga09e64f2008-08-05 16:14:15 +010058#endif /* AT91X40_H */