Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 1 | /* |
| 2 | * arch/arm/mach-at91/include/mach/cpu.h |
| 3 | * |
Jean-Christophe PLAGNIOL-VILLARD | 8c3583b | 2011-04-23 22:12:57 +0800 | [diff] [blame] | 4 | * Copyright (C) 2006 SAN People |
| 5 | * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | */ |
| 13 | |
Jean-Christophe PLAGNIOL-VILLARD | 8c3583b | 2011-04-23 22:12:57 +0800 | [diff] [blame] | 14 | #ifndef __MACH_CPU_H__ |
| 15 | #define __MACH_CPU_H__ |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 16 | |
| 17 | #define ARCH_ID_AT91RM9200 0x09290780 |
| 18 | #define ARCH_ID_AT91SAM9260 0x019803a0 |
| 19 | #define ARCH_ID_AT91SAM9261 0x019703a0 |
| 20 | #define ARCH_ID_AT91SAM9263 0x019607a0 |
Nicolas Ferre | e294105 | 2010-04-14 17:54:04 +0100 | [diff] [blame] | 21 | #define ARCH_ID_AT91SAM9G10 0x019903a0 |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 22 | #define ARCH_ID_AT91SAM9G20 0x019905a0 |
| 23 | #define ARCH_ID_AT91SAM9RL64 0x019b03a0 |
Nicolas Ferre | fddcc0a | 2009-06-26 15:36:56 +0100 | [diff] [blame] | 24 | #define ARCH_ID_AT91SAM9G45 0x819b05a0 |
Nicolas Ferre | d8951ad | 2009-09-21 12:03:56 +0200 | [diff] [blame] | 25 | #define ARCH_ID_AT91SAM9G45MRL 0x819b05a2 /* aka 9G45-ES2 & non ES lots */ |
| 26 | #define ARCH_ID_AT91SAM9G45ES 0x819b05a1 /* 9G45-ES (Engineering Sample) */ |
Jean-Christophe PLAGNIOL-VILLARD | 9baeb7e | 2011-04-23 10:52:16 +0800 | [diff] [blame] | 27 | #define ARCH_ID_AT91SAM9X5 0x819a05a0 |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 28 | |
| 29 | #define ARCH_ID_AT91SAM9XE128 0x329973a0 |
| 30 | #define ARCH_ID_AT91SAM9XE256 0x329a93a0 |
| 31 | #define ARCH_ID_AT91SAM9XE512 0x329aa3a0 |
| 32 | |
| 33 | #define ARCH_ID_AT91M40800 0x14080044 |
| 34 | #define ARCH_ID_AT91R40807 0x44080746 |
| 35 | #define ARCH_ID_AT91M40807 0x14080745 |
| 36 | #define ARCH_ID_AT91R40008 0x44000840 |
| 37 | |
Nicolas Ferre | fddcc0a | 2009-06-26 15:36:56 +0100 | [diff] [blame] | 38 | #define ARCH_EXID_AT91SAM9M11 0x00000001 |
| 39 | #define ARCH_EXID_AT91SAM9M10 0x00000002 |
Nicolas Ferre | 5f9f0a4 | 2010-06-11 12:53:14 +0100 | [diff] [blame] | 40 | #define ARCH_EXID_AT91SAM9G46 0x00000003 |
Nicolas Ferre | fddcc0a | 2009-06-26 15:36:56 +0100 | [diff] [blame] | 41 | #define ARCH_EXID_AT91SAM9G45 0x00000004 |
| 42 | |
Jean-Christophe PLAGNIOL-VILLARD | 9baeb7e | 2011-04-23 10:52:16 +0800 | [diff] [blame] | 43 | #define ARCH_EXID_AT91SAM9G15 0x00000000 |
| 44 | #define ARCH_EXID_AT91SAM9G35 0x00000001 |
| 45 | #define ARCH_EXID_AT91SAM9X35 0x00000002 |
| 46 | #define ARCH_EXID_AT91SAM9G25 0x00000003 |
| 47 | #define ARCH_EXID_AT91SAM9X25 0x00000004 |
| 48 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 49 | #define ARCH_FAMILY_AT91X92 0x09200000 |
| 50 | #define ARCH_FAMILY_AT91SAM9 0x01900000 |
| 51 | #define ARCH_FAMILY_AT91SAM9XE 0x02900000 |
| 52 | |
Jean-Christophe PLAGNIOL-VILLARD | 8c3583b | 2011-04-23 22:12:57 +0800 | [diff] [blame] | 53 | /* RM9200 type */ |
Jean-Christophe PLAGNIOL-VILLARD | e57556e3 | 2011-04-24 11:40:22 +0800 | [diff] [blame] | 54 | #define ARCH_REVISON_9200_BGA (0 << 0) |
| 55 | #define ARCH_REVISON_9200_PQFP (1 << 0) |
Jean-Christophe PLAGNIOL-VILLARD | 8c3583b | 2011-04-23 22:12:57 +0800 | [diff] [blame] | 56 | |
| 57 | enum at91_soc_type { |
| 58 | /* 920T */ |
| 59 | AT91_SOC_RM9200, |
| 60 | |
Jean-Christophe PLAGNIOL-VILLARD | 8c3583b | 2011-04-23 22:12:57 +0800 | [diff] [blame] | 61 | /* SAM92xx */ |
| 62 | AT91_SOC_SAM9260, AT91_SOC_SAM9261, AT91_SOC_SAM9263, |
| 63 | |
| 64 | /* SAM9Gxx */ |
| 65 | AT91_SOC_SAM9G10, AT91_SOC_SAM9G20, AT91_SOC_SAM9G45, |
| 66 | |
| 67 | /* SAM9RL */ |
| 68 | AT91_SOC_SAM9RL, |
| 69 | |
| 70 | /* SAM9X5 */ |
| 71 | AT91_SOC_SAM9X5, |
| 72 | |
| 73 | /* Unknown type */ |
| 74 | AT91_SOC_NONE |
| 75 | }; |
| 76 | |
| 77 | enum at91_soc_subtype { |
| 78 | /* RM9200 */ |
| 79 | AT91_SOC_RM9200_BGA, AT91_SOC_RM9200_PQFP, |
| 80 | |
Jean-Christophe PLAGNIOL-VILLARD | 8c3583b | 2011-04-23 22:12:57 +0800 | [diff] [blame] | 81 | /* SAM9260 */ |
| 82 | AT91_SOC_SAM9XE, |
| 83 | |
| 84 | /* SAM9G45 */ |
| 85 | AT91_SOC_SAM9G45ES, AT91_SOC_SAM9M10, AT91_SOC_SAM9G46, AT91_SOC_SAM9M11, |
| 86 | |
| 87 | /* SAM9X5 */ |
| 88 | AT91_SOC_SAM9G15, AT91_SOC_SAM9G35, AT91_SOC_SAM9X35, |
| 89 | AT91_SOC_SAM9G25, AT91_SOC_SAM9X25, |
| 90 | |
| 91 | /* Unknown subtype */ |
| 92 | AT91_SOC_SUBTYPE_NONE |
| 93 | }; |
| 94 | |
| 95 | struct at91_socinfo { |
| 96 | unsigned int type, subtype; |
| 97 | unsigned int cidr, exid; |
| 98 | }; |
| 99 | |
| 100 | extern struct at91_socinfo at91_soc_initdata; |
| 101 | const char *at91_get_soc_type(struct at91_socinfo *c); |
| 102 | const char *at91_get_soc_subtype(struct at91_socinfo *c); |
| 103 | |
| 104 | static inline int at91_soc_is_detected(void) |
| 105 | { |
| 106 | return at91_soc_initdata.type != AT91_SOC_NONE; |
| 107 | } |
| 108 | |
| 109 | #ifdef CONFIG_ARCH_AT91RM9200 |
| 110 | #define cpu_is_at91rm9200() (at91_soc_initdata.type == AT91_SOC_RM9200) |
| 111 | #define cpu_is_at91rm9200_bga() (at91_soc_initdata.subtype == AT91_SOC_RM9200_BGA) |
| 112 | #define cpu_is_at91rm9200_pqfp() (at91_soc_initdata.subtype == AT91_SOC_RM9200_PQFP) |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 113 | #else |
| 114 | #define cpu_is_at91rm9200() (0) |
Jean-Christophe PLAGNIOL-VILLARD | e57556e3 | 2011-04-24 11:40:22 +0800 | [diff] [blame] | 115 | #define cpu_is_at91rm9200_bga() (0) |
| 116 | #define cpu_is_at91rm9200_pqfp() (0) |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 117 | #endif |
| 118 | |
| 119 | #ifdef CONFIG_ARCH_AT91SAM9260 |
Jean-Christophe PLAGNIOL-VILLARD | 8c3583b | 2011-04-23 22:12:57 +0800 | [diff] [blame] | 120 | #define cpu_is_at91sam9xe() (at91_soc_initdata.subtype == AT91_SOC_SAM9XE) |
| 121 | #define cpu_is_at91sam9260() (at91_soc_initdata.type == AT91_SOC_SAM9260) |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 122 | #else |
| 123 | #define cpu_is_at91sam9xe() (0) |
| 124 | #define cpu_is_at91sam9260() (0) |
| 125 | #endif |
| 126 | |
| 127 | #ifdef CONFIG_ARCH_AT91SAM9G20 |
Jean-Christophe PLAGNIOL-VILLARD | 8c3583b | 2011-04-23 22:12:57 +0800 | [diff] [blame] | 128 | #define cpu_is_at91sam9g20() (at91_soc_initdata.type == AT91_SOC_SAM9G20) |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 129 | #else |
| 130 | #define cpu_is_at91sam9g20() (0) |
| 131 | #endif |
| 132 | |
| 133 | #ifdef CONFIG_ARCH_AT91SAM9261 |
Jean-Christophe PLAGNIOL-VILLARD | 8c3583b | 2011-04-23 22:12:57 +0800 | [diff] [blame] | 134 | #define cpu_is_at91sam9261() (at91_soc_initdata.type == AT91_SOC_SAM9261) |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 135 | #else |
| 136 | #define cpu_is_at91sam9261() (0) |
| 137 | #endif |
| 138 | |
Nicolas Ferre | b784b7c | 2009-06-26 15:36:59 +0100 | [diff] [blame] | 139 | #ifdef CONFIG_ARCH_AT91SAM9G10 |
Jean-Christophe PLAGNIOL-VILLARD | 8c3583b | 2011-04-23 22:12:57 +0800 | [diff] [blame] | 140 | #define cpu_is_at91sam9g10() (at91_soc_initdata.type == AT91_SOC_SAM9G10) |
Nicolas Ferre | b784b7c | 2009-06-26 15:36:59 +0100 | [diff] [blame] | 141 | #else |
| 142 | #define cpu_is_at91sam9g10() (0) |
| 143 | #endif |
| 144 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 145 | #ifdef CONFIG_ARCH_AT91SAM9263 |
Jean-Christophe PLAGNIOL-VILLARD | 8c3583b | 2011-04-23 22:12:57 +0800 | [diff] [blame] | 146 | #define cpu_is_at91sam9263() (at91_soc_initdata.type == AT91_SOC_SAM9263) |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 147 | #else |
| 148 | #define cpu_is_at91sam9263() (0) |
| 149 | #endif |
| 150 | |
| 151 | #ifdef CONFIG_ARCH_AT91SAM9RL |
Jean-Christophe PLAGNIOL-VILLARD | 8c3583b | 2011-04-23 22:12:57 +0800 | [diff] [blame] | 152 | #define cpu_is_at91sam9rl() (at91_soc_initdata.type == AT91_SOC_SAM9RL) |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 153 | #else |
| 154 | #define cpu_is_at91sam9rl() (0) |
| 155 | #endif |
| 156 | |
Nicolas Ferre | fddcc0a | 2009-06-26 15:36:56 +0100 | [diff] [blame] | 157 | #ifdef CONFIG_ARCH_AT91SAM9G45 |
Jean-Christophe PLAGNIOL-VILLARD | 8c3583b | 2011-04-23 22:12:57 +0800 | [diff] [blame] | 158 | #define cpu_is_at91sam9g45() (at91_soc_initdata.type == AT91_SOC_SAM9G45) |
| 159 | #define cpu_is_at91sam9g45es() (at91_soc_initdata.subtype == AT91_SOC_SAM9G45ES) |
| 160 | #define cpu_is_at91sam9m10() (at91_soc_initdata.subtype == AT91_SOC_SAM9M10) |
| 161 | #define cpu_is_at91sam9g46() (at91_soc_initdata.subtype == AT91_SOC_SAM9G46) |
| 162 | #define cpu_is_at91sam9m11() (at91_soc_initdata.subtype == AT91_SOC_SAM9M11) |
Nicolas Ferre | fddcc0a | 2009-06-26 15:36:56 +0100 | [diff] [blame] | 163 | #else |
| 164 | #define cpu_is_at91sam9g45() (0) |
Nicolas Ferre | d8951ad | 2009-09-21 12:03:56 +0200 | [diff] [blame] | 165 | #define cpu_is_at91sam9g45es() (0) |
Nicolas Ferre | 5f9f0a4 | 2010-06-11 12:53:14 +0100 | [diff] [blame] | 166 | #define cpu_is_at91sam9m10() (0) |
| 167 | #define cpu_is_at91sam9g46() (0) |
| 168 | #define cpu_is_at91sam9m11() (0) |
Nicolas Ferre | fddcc0a | 2009-06-26 15:36:56 +0100 | [diff] [blame] | 169 | #endif |
| 170 | |
Jean-Christophe PLAGNIOL-VILLARD | 9baeb7e | 2011-04-23 10:52:16 +0800 | [diff] [blame] | 171 | #ifdef CONFIG_ARCH_AT91SAM9X5 |
Jean-Christophe PLAGNIOL-VILLARD | 8c3583b | 2011-04-23 22:12:57 +0800 | [diff] [blame] | 172 | #define cpu_is_at91sam9x5() (at91_soc_initdata.type == AT91_SOC_SAM9X5) |
| 173 | #define cpu_is_at91sam9g15() (at91_soc_initdata.subtype == AT91_SOC_SAM9G15) |
| 174 | #define cpu_is_at91sam9g35() (at91_soc_initdata.subtype == AT91_SOC_SAM9G35) |
| 175 | #define cpu_is_at91sam9x35() (at91_soc_initdata.subtype == AT91_SOC_SAM9X35) |
| 176 | #define cpu_is_at91sam9g25() (at91_soc_initdata.subtype == AT91_SOC_SAM9G25) |
| 177 | #define cpu_is_at91sam9x25() (at91_soc_initdata.subtype == AT91_SOC_SAM9X25) |
Jean-Christophe PLAGNIOL-VILLARD | 9baeb7e | 2011-04-23 10:52:16 +0800 | [diff] [blame] | 178 | #else |
| 179 | #define cpu_is_at91sam9x5() (0) |
| 180 | #define cpu_is_at91sam9g15() (0) |
| 181 | #define cpu_is_at91sam9g35() (0) |
| 182 | #define cpu_is_at91sam9x35() (0) |
| 183 | #define cpu_is_at91sam9g25() (0) |
| 184 | #define cpu_is_at91sam9x25() (0) |
| 185 | #endif |
| 186 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 187 | /* |
| 188 | * Since this is ARM, we will never run on any AVR32 CPU. But these |
| 189 | * definitions may reduce clutter in common drivers. |
| 190 | */ |
| 191 | #define cpu_is_at32ap7000() (0) |
| 192 | |
Jean-Christophe PLAGNIOL-VILLARD | 8c3583b | 2011-04-23 22:12:57 +0800 | [diff] [blame] | 193 | #endif /* __MACH_CPU_H__ */ |