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Russell Kinga09e64f2008-08-05 16:14:15 +01001/*
2 * TI DaVinci GPIO Support
3 *
4 * Copyright (c) 2006 David Brownell
5 * Copyright (c) 2007, MontaVista Software, Inc. <source@mvista.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12
13#ifndef __DAVINCI_GPIO_H
14#define __DAVINCI_GPIO_H
15
16#include <linux/io.h>
Cyril Chemparathyb27b6d02010-05-01 18:37:55 -040017#include <linux/spinlock.h>
18
David Brownelldce11152008-09-07 23:41:04 -070019#include <asm-generic/gpio.h>
Kevin Hilmanf5c122d2009-04-14 07:04:16 -050020
Russell King80b02c12009-01-08 10:01:47 +000021#include <mach/irqs.h>
Mark A. Greera9949552009-04-15 12:40:35 -070022#include <mach/common.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010023
Kevin Hilmanf5c122d2009-04-14 07:04:16 -050024#define DAVINCI_GPIO_BASE 0x01C67000
25
Cyril Chemparathy686b6342010-05-01 18:37:54 -040026enum davinci_gpio_type {
27 GPIO_TYPE_DAVINCI = 0,
Cyril Chemparathyd92c7962010-05-18 12:51:20 -040028 GPIO_TYPE_TNETV107X,
Cyril Chemparathy686b6342010-05-01 18:37:54 -040029};
30
Russell Kinga09e64f2008-08-05 16:14:15 +010031/*
32 * basic gpio routines
33 *
34 * board-specific init should be done by arch/.../.../board-XXX.c (maybe
35 * initializing banks together) rather than boot loaders; kexec() won't
36 * go through boot loaders.
37 *
38 * the gpio clock will be turned on when gpios are used, and you may also
David Brownell474dad52008-12-07 11:46:23 -080039 * need to pay attention to PINMUX registers to be sure those pins are
Russell Kinga09e64f2008-08-05 16:14:15 +010040 * used as gpios, not with other peripherals.
41 *
David Brownelldce11152008-09-07 23:41:04 -070042 * On-chip GPIOs are numbered 0..(DAVINCI_N_GPIO-1). For documentation,
David Brownell474dad52008-12-07 11:46:23 -080043 * and maybe for later updates, code may write GPIO(N). These may be
44 * all 1.8V signals, all 3.3V ones, or a mix of the two. A given chip
45 * may not support all the GPIOs in that range.
David Brownelldce11152008-09-07 23:41:04 -070046 *
47 * GPIOs can also be on external chips, numbered after the ones built-in
48 * to the DaVinci chip. For now, they won't be usable as IRQ sources.
Russell Kinga09e64f2008-08-05 16:14:15 +010049 */
David Brownell474dad52008-12-07 11:46:23 -080050#define GPIO(X) (X) /* 0 <= X <= (DAVINCI_N_GPIO - 1) */
Russell Kinga09e64f2008-08-05 16:14:15 +010051
Sudhakar Rajashekharab1466372009-08-13 12:11:56 -040052/* Convert GPIO signal to GPIO pin number */
53#define GPIO_TO_PIN(bank, gpio) (16 * (bank) + (gpio))
54
Cyril Chemparathy99e9e522010-05-01 18:37:52 -040055struct davinci_gpio_controller {
Cyril Chemparathy99e9e522010-05-01 18:37:52 -040056 struct gpio_chip chip;
57 int irq_base;
Cyril Chemparathyb27b6d02010-05-01 18:37:55 -040058 spinlock_t lock;
Cyril Chemparathyc12f4152010-05-01 18:37:53 -040059 void __iomem *regs;
60 void __iomem *set_data;
61 void __iomem *clr_data;
62 void __iomem *in_data;
Cyril Chemparathy99e9e522010-05-01 18:37:52 -040063};
64
Russell Kinga09e64f2008-08-05 16:14:15 +010065/* The __gpio_to_controller() and __gpio_mask() functions inline to constants
66 * with constant parameters; or in outlined code they execute at runtime.
67 *
68 * You'd access the controller directly when reading or writing more than
69 * one gpio value at a time, and to support wired logic where the value
70 * being driven by the cpu need not match the value read back.
71 *
72 * These are NOT part of the cross-platform GPIO interface
73 */
Cyril Chemparathyc12f4152010-05-01 18:37:53 -040074static inline struct davinci_gpio_controller *
Russell Kinga09e64f2008-08-05 16:14:15 +010075__gpio_to_controller(unsigned gpio)
76{
Cyril Chemparathyc12f4152010-05-01 18:37:53 -040077 struct davinci_gpio_controller *ctlrs = davinci_soc_info.gpio_ctlrs;
78 int index = gpio / 32;
Russell Kinga09e64f2008-08-05 16:14:15 +010079
Cyril Chemparathyc12f4152010-05-01 18:37:53 -040080 if (!ctlrs || index >= davinci_soc_info.gpio_ctlrs_num)
81 return NULL;
82
83 return ctlrs + index;
Russell Kinga09e64f2008-08-05 16:14:15 +010084}
85
86static inline u32 __gpio_mask(unsigned gpio)
87{
88 return 1 << (gpio % 32);
89}
90
Cyril Chemparathyd92c7962010-05-18 12:51:20 -040091/*
92 * The get/set/clear functions will inline when called with constant
David Brownelldce11152008-09-07 23:41:04 -070093 * parameters referencing built-in GPIOs, for low-overhead bitbanging.
Russell Kinga09e64f2008-08-05 16:14:15 +010094 *
Cyril Chemparathyd92c7962010-05-18 12:51:20 -040095 * gpio_set_value() will inline only on traditional Davinci style controllers
96 * with distinct set/clear registers.
97 *
David Brownelldce11152008-09-07 23:41:04 -070098 * Otherwise, calls with variable parameters or referencing external
99 * GPIOs (e.g. on GPIO expander chips) use outlined functions.
Russell Kinga09e64f2008-08-05 16:14:15 +0100100 */
Russell Kinga09e64f2008-08-05 16:14:15 +0100101static inline void gpio_set_value(unsigned gpio, int value)
102{
Cyril Chemparathyc12f4152010-05-01 18:37:53 -0400103 if (__builtin_constant_p(value) && gpio < davinci_soc_info.gpio_num) {
104 struct davinci_gpio_controller *ctlr;
105 u32 mask;
Russell Kinga09e64f2008-08-05 16:14:15 +0100106
Cyril Chemparathyc12f4152010-05-01 18:37:53 -0400107 ctlr = __gpio_to_controller(gpio);
Cyril Chemparathyd92c7962010-05-18 12:51:20 -0400108
109 if (ctlr->set_data != ctlr->clr_data) {
110 mask = __gpio_mask(gpio);
111 if (value)
112 __raw_writel(mask, ctlr->set_data);
113 else
114 __raw_writel(mask, ctlr->clr_data);
115 return;
116 }
Russell Kinga09e64f2008-08-05 16:14:15 +0100117 }
118
David Brownelldce11152008-09-07 23:41:04 -0700119 __gpio_set_value(gpio, value);
Russell Kinga09e64f2008-08-05 16:14:15 +0100120}
121
122/* Returns zero or nonzero; works for gpios configured as inputs OR
David Brownelldce11152008-09-07 23:41:04 -0700123 * as outputs, at least for built-in GPIOs.
Russell Kinga09e64f2008-08-05 16:14:15 +0100124 *
David Brownelldce11152008-09-07 23:41:04 -0700125 * NOTE: for built-in GPIOs, changes in reported values are synchronized
126 * to the GPIO clock. This is easily seen after calling gpio_set_value()
127 * and then immediately gpio_get_value(), where the gpio_get_value() will
128 * return the old value until the GPIO clock ticks and the new value gets
129 * latched.
Russell Kinga09e64f2008-08-05 16:14:15 +0100130 */
Russell Kinga09e64f2008-08-05 16:14:15 +0100131static inline int gpio_get_value(unsigned gpio)
132{
Cyril Chemparathyc12f4152010-05-01 18:37:53 -0400133 struct davinci_gpio_controller *ctlr;
Russell Kinga09e64f2008-08-05 16:14:15 +0100134
Cyril Chemparathyc12f4152010-05-01 18:37:53 -0400135 if (!__builtin_constant_p(gpio) || gpio >= davinci_soc_info.gpio_num)
David Brownelldce11152008-09-07 23:41:04 -0700136 return __gpio_get_value(gpio);
Russell Kinga09e64f2008-08-05 16:14:15 +0100137
Cyril Chemparathyc12f4152010-05-01 18:37:53 -0400138 ctlr = __gpio_to_controller(gpio);
139 return __gpio_mask(gpio) & __raw_readl(ctlr->in_data);
Russell Kinga09e64f2008-08-05 16:14:15 +0100140}
141
David Brownelldce11152008-09-07 23:41:04 -0700142static inline int gpio_cansleep(unsigned gpio)
143{
Cyril Chemparathyc12f4152010-05-01 18:37:53 -0400144 if (__builtin_constant_p(gpio) && gpio < davinci_soc_info.gpio_num)
David Brownelldce11152008-09-07 23:41:04 -0700145 return 0;
146 else
147 return __gpio_cansleep(gpio);
148}
Russell Kinga09e64f2008-08-05 16:14:15 +0100149
150static inline int gpio_to_irq(unsigned gpio)
151{
David Brownell7a360712009-06-25 17:01:31 -0700152 return __gpio_to_irq(gpio);
Russell Kinga09e64f2008-08-05 16:14:15 +0100153}
154
155static inline int irq_to_gpio(unsigned irq)
156{
David Brownell7a360712009-06-25 17:01:31 -0700157 /* don't support the reverse mapping */
158 return -ENOSYS;
Russell Kinga09e64f2008-08-05 16:14:15 +0100159}
160
161#endif /* __DAVINCI_GPIO_H */