blob: 49596a18f9530d202c290378b4ffce903960e616 [file] [log] [blame]
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -08001/*
2 * Driver for Atmel AT32 and AT91 SPI Controllers
3 *
4 * Copyright (C) 2006 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/clk.h>
14#include <linux/module.h>
15#include <linux/platform_device.h>
16#include <linux/delay.h>
17#include <linux/dma-mapping.h>
18#include <linux/err.h>
19#include <linux/interrupt.h>
20#include <linux/spi/spi.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090021#include <linux/slab.h>
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -080022
23#include <asm/io.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010024#include <mach/board.h>
25#include <mach/gpio.h>
26#include <mach/cpu.h>
David Brownellbb2d1c32007-02-20 13:58:19 -080027
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -080028#include "atmel_spi.h"
29
30/*
31 * The core SPI transfer engine just talks to a register bank to set up
32 * DMA transfers; transfer queue progress is driven by IRQs. The clock
33 * framework provides the base clock, subdivided for each spi_device.
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -080034 */
35struct atmel_spi {
36 spinlock_t lock;
37
38 void __iomem *regs;
39 int irq;
40 struct clk *clk;
41 struct platform_device *pdev;
David Brownelldefbd3b2007-07-17 04:04:08 -070042 struct spi_device *stay;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -080043
44 u8 stopping;
45 struct list_head queue;
46 struct spi_transfer *current_transfer;
Silvester Erdeg154443c2008-02-06 01:38:12 -080047 unsigned long current_remaining_bytes;
48 struct spi_transfer *next_transfer;
49 unsigned long next_remaining_bytes;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -080050
51 void *buffer;
52 dma_addr_t buffer_dma;
53};
54
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -080055/* Controller-specific per-slave state */
56struct atmel_spi_device {
57 unsigned int npcs_pin;
58 u32 csr;
59};
60
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -080061#define BUFFER_SIZE PAGE_SIZE
62#define INVALID_DMA_ADDRESS 0xffffffff
63
64/*
Haavard Skinnemoen5bfa26c2009-01-06 14:41:42 -080065 * Version 2 of the SPI controller has
66 * - CR.LASTXFER
67 * - SPI_MR.DIV32 may become FDIV or must-be-zero (here: always zero)
68 * - SPI_SR.TXEMPTY, SPI_SR.NSSR (and corresponding irqs)
69 * - SPI_CSRx.CSAAT
70 * - SPI_CSRx.SBCR allows faster clocking
71 *
72 * We can determine the controller version by reading the VERSION
73 * register, but I haven't checked that it exists on all chips, and
74 * this is cheaper anyway.
75 */
76static bool atmel_spi_is_v2(void)
77{
78 return !cpu_is_at91rm9200();
79}
80
81/*
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -080082 * Earlier SPI controllers (e.g. on at91rm9200) have a design bug whereby
83 * they assume that spi slave device state will not change on deselect, so
David Brownelldefbd3b2007-07-17 04:04:08 -070084 * that automagic deselection is OK. ("NPCSx rises if no data is to be
85 * transmitted") Not so! Workaround uses nCSx pins as GPIOs; or newer
86 * controllers have CSAAT and friends.
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -080087 *
David Brownelldefbd3b2007-07-17 04:04:08 -070088 * Since the CSAAT functionality is a bit weird on newer controllers as
89 * well, we use GPIO to control nCSx pins on all controllers, updating
90 * MR.PCS to avoid confusing the controller. Using GPIOs also lets us
91 * support active-high chipselects despite the controller's belief that
92 * only active-low devices/systems exists.
93 *
94 * However, at91rm9200 has a second erratum whereby nCS0 doesn't work
95 * right when driven with GPIO. ("Mode Fault does not allow more than one
96 * Master on Chip Select 0.") No workaround exists for that ... so for
97 * nCS0 on that chip, we (a) don't use the GPIO, (b) can't support CS_HIGH,
98 * and (c) will trigger that first erratum in some cases.
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -080099 *
100 * TODO: Test if the atmel_spi_is_v2() branch below works on
101 * AT91RM9200 if we use some other register than CSR0. However, don't
102 * do this unconditionally since AP7000 has an errata where the BITS
103 * field in CSR0 overrides all other CSRs.
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800104 */
105
David Brownelldefbd3b2007-07-17 04:04:08 -0700106static void cs_activate(struct atmel_spi *as, struct spi_device *spi)
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800107{
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -0800108 struct atmel_spi_device *asd = spi->controller_state;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800109 unsigned active = spi->mode & SPI_CS_HIGH;
David Brownelldefbd3b2007-07-17 04:04:08 -0700110 u32 mr;
Atsushi Nemotof6febcc2008-02-23 15:23:39 -0800111
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -0800112 if (atmel_spi_is_v2()) {
113 /*
114 * Always use CSR0. This ensures that the clock
115 * switches to the correct idle polarity before we
116 * toggle the CS.
117 */
118 spi_writel(as, CSR0, asd->csr);
119 spi_writel(as, MR, SPI_BF(PCS, 0x0e) | SPI_BIT(MODFDIS)
120 | SPI_BIT(MSTR));
121 mr = spi_readl(as, MR);
122 gpio_set_value(asd->npcs_pin, active);
123 } else {
124 u32 cpol = (spi->mode & SPI_CPOL) ? SPI_BIT(CPOL) : 0;
125 int i;
126 u32 csr;
127
128 /* Make sure clock polarity is correct */
129 for (i = 0; i < spi->master->num_chipselect; i++) {
130 csr = spi_readl(as, CSR0 + 4 * i);
131 if ((csr ^ cpol) & SPI_BIT(CPOL))
132 spi_writel(as, CSR0 + 4 * i,
133 csr ^ SPI_BIT(CPOL));
134 }
135
136 mr = spi_readl(as, MR);
137 mr = SPI_BFINS(PCS, ~(1 << spi->chip_select), mr);
138 if (spi->chip_select != 0)
139 gpio_set_value(asd->npcs_pin, active);
140 spi_writel(as, MR, mr);
Atsushi Nemotof6febcc2008-02-23 15:23:39 -0800141 }
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800142
David Brownelldefbd3b2007-07-17 04:04:08 -0700143 dev_dbg(&spi->dev, "activate %u%s, mr %08x\n",
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -0800144 asd->npcs_pin, active ? " (high)" : "",
David Brownelldefbd3b2007-07-17 04:04:08 -0700145 mr);
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800146}
147
David Brownelldefbd3b2007-07-17 04:04:08 -0700148static void cs_deactivate(struct atmel_spi *as, struct spi_device *spi)
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800149{
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -0800150 struct atmel_spi_device *asd = spi->controller_state;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800151 unsigned active = spi->mode & SPI_CS_HIGH;
David Brownelldefbd3b2007-07-17 04:04:08 -0700152 u32 mr;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800153
David Brownelldefbd3b2007-07-17 04:04:08 -0700154 /* only deactivate *this* device; sometimes transfers to
155 * another device may be active when this routine is called.
156 */
157 mr = spi_readl(as, MR);
158 if (~SPI_BFEXT(PCS, mr) & (1 << spi->chip_select)) {
159 mr = SPI_BFINS(PCS, 0xf, mr);
160 spi_writel(as, MR, mr);
161 }
162
163 dev_dbg(&spi->dev, "DEactivate %u%s, mr %08x\n",
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -0800164 asd->npcs_pin, active ? " (low)" : "",
David Brownelldefbd3b2007-07-17 04:04:08 -0700165 mr);
166
Haavard Skinnemoen5bfa26c2009-01-06 14:41:42 -0800167 if (atmel_spi_is_v2() || spi->chip_select != 0)
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -0800168 gpio_set_value(asd->npcs_pin, !active);
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800169}
170
Silvester Erdeg154443c2008-02-06 01:38:12 -0800171static inline int atmel_spi_xfer_is_last(struct spi_message *msg,
172 struct spi_transfer *xfer)
173{
174 return msg->transfers.prev == &xfer->transfer_list;
175}
176
177static inline int atmel_spi_xfer_can_be_chained(struct spi_transfer *xfer)
178{
179 return xfer->delay_usecs == 0 && !xfer->cs_change;
180}
181
182static void atmel_spi_next_xfer_data(struct spi_master *master,
183 struct spi_transfer *xfer,
184 dma_addr_t *tx_dma,
185 dma_addr_t *rx_dma,
186 u32 *plen)
187{
188 struct atmel_spi *as = spi_master_get_devdata(master);
189 u32 len = *plen;
190
191 /* use scratch buffer only when rx or tx data is unspecified */
192 if (xfer->rx_buf)
Ben Nizette6aed4ee2009-12-14 22:20:20 -0800193 *rx_dma = xfer->rx_dma + xfer->len - *plen;
Silvester Erdeg154443c2008-02-06 01:38:12 -0800194 else {
195 *rx_dma = as->buffer_dma;
196 if (len > BUFFER_SIZE)
197 len = BUFFER_SIZE;
198 }
199 if (xfer->tx_buf)
Ben Nizette6aed4ee2009-12-14 22:20:20 -0800200 *tx_dma = xfer->tx_dma + xfer->len - *plen;
Silvester Erdeg154443c2008-02-06 01:38:12 -0800201 else {
202 *tx_dma = as->buffer_dma;
203 if (len > BUFFER_SIZE)
204 len = BUFFER_SIZE;
205 memset(as->buffer, 0, len);
206 dma_sync_single_for_device(&as->pdev->dev,
207 as->buffer_dma, len, DMA_TO_DEVICE);
208 }
209
210 *plen = len;
211}
212
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800213/*
214 * Submit next transfer for DMA.
215 * lock is held, spi irq is blocked
216 */
217static void atmel_spi_next_xfer(struct spi_master *master,
218 struct spi_message *msg)
219{
220 struct atmel_spi *as = spi_master_get_devdata(master);
221 struct spi_transfer *xfer;
Gerard Kamdc329442008-08-04 13:41:12 -0700222 u32 len, remaining;
223 u32 ieval;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800224 dma_addr_t tx_dma, rx_dma;
225
Silvester Erdeg154443c2008-02-06 01:38:12 -0800226 if (!as->current_transfer)
227 xfer = list_entry(msg->transfers.next,
228 struct spi_transfer, transfer_list);
229 else if (!as->next_transfer)
230 xfer = list_entry(as->current_transfer->transfer_list.next,
231 struct spi_transfer, transfer_list);
232 else
233 xfer = NULL;
234
235 if (xfer) {
Gerard Kamdc329442008-08-04 13:41:12 -0700236 spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS));
237
Silvester Erdeg154443c2008-02-06 01:38:12 -0800238 len = xfer->len;
239 atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len);
240 remaining = xfer->len - len;
241
242 spi_writel(as, RPR, rx_dma);
243 spi_writel(as, TPR, tx_dma);
244
245 if (msg->spi->bits_per_word > 8)
246 len >>= 1;
247 spi_writel(as, RCR, len);
248 spi_writel(as, TCR, len);
Haavard Skinnemoen8bacb212008-02-06 01:38:13 -0800249
250 dev_dbg(&msg->spi->dev,
251 " start xfer %p: len %u tx %p/%08x rx %p/%08x\n",
252 xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
253 xfer->rx_buf, xfer->rx_dma);
Silvester Erdeg154443c2008-02-06 01:38:12 -0800254 } else {
255 xfer = as->next_transfer;
256 remaining = as->next_remaining_bytes;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800257 }
258
Silvester Erdeg154443c2008-02-06 01:38:12 -0800259 as->current_transfer = xfer;
260 as->current_remaining_bytes = remaining;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800261
Silvester Erdeg154443c2008-02-06 01:38:12 -0800262 if (remaining > 0)
263 len = remaining;
Haavard Skinnemoen8bacb212008-02-06 01:38:13 -0800264 else if (!atmel_spi_xfer_is_last(msg, xfer)
265 && atmel_spi_xfer_can_be_chained(xfer)) {
Silvester Erdeg154443c2008-02-06 01:38:12 -0800266 xfer = list_entry(xfer->transfer_list.next,
267 struct spi_transfer, transfer_list);
268 len = xfer->len;
269 } else
270 xfer = NULL;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800271
Silvester Erdeg154443c2008-02-06 01:38:12 -0800272 as->next_transfer = xfer;
273
274 if (xfer) {
Gerard Kamdc329442008-08-04 13:41:12 -0700275 u32 total;
276
Silvester Erdeg154443c2008-02-06 01:38:12 -0800277 total = len;
278 atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len);
279 as->next_remaining_bytes = total - len;
280
281 spi_writel(as, RNPR, rx_dma);
282 spi_writel(as, TNPR, tx_dma);
283
284 if (msg->spi->bits_per_word > 8)
285 len >>= 1;
286 spi_writel(as, RNCR, len);
287 spi_writel(as, TNCR, len);
Haavard Skinnemoen8bacb212008-02-06 01:38:13 -0800288
289 dev_dbg(&msg->spi->dev,
290 " next xfer %p: len %u tx %p/%08x rx %p/%08x\n",
291 xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
292 xfer->rx_buf, xfer->rx_dma);
Gerard Kamdc329442008-08-04 13:41:12 -0700293 ieval = SPI_BIT(ENDRX) | SPI_BIT(OVRES);
Silvester Erdeg154443c2008-02-06 01:38:12 -0800294 } else {
295 spi_writel(as, RNCR, 0);
296 spi_writel(as, TNCR, 0);
Gerard Kamdc329442008-08-04 13:41:12 -0700297 ieval = SPI_BIT(RXBUFF) | SPI_BIT(ENDRX) | SPI_BIT(OVRES);
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800298 }
299
Silvester Erdeg154443c2008-02-06 01:38:12 -0800300 /* REVISIT: We're waiting for ENDRX before we start the next
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800301 * transfer because we need to handle some difficult timing
302 * issues otherwise. If we wait for ENDTX in one transfer and
303 * then starts waiting for ENDRX in the next, it's difficult
304 * to tell the difference between the ENDRX interrupt we're
305 * actually waiting for and the ENDRX interrupt of the
306 * previous transfer.
307 *
308 * It should be doable, though. Just not now...
309 */
Gerard Kamdc329442008-08-04 13:41:12 -0700310 spi_writel(as, IER, ieval);
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800311 spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN));
312}
313
314static void atmel_spi_next_message(struct spi_master *master)
315{
316 struct atmel_spi *as = spi_master_get_devdata(master);
317 struct spi_message *msg;
David Brownelldefbd3b2007-07-17 04:04:08 -0700318 struct spi_device *spi;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800319
320 BUG_ON(as->current_transfer);
321
322 msg = list_entry(as->queue.next, struct spi_message, queue);
David Brownelldefbd3b2007-07-17 04:04:08 -0700323 spi = msg->spi;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800324
Tony Jones49dce682007-10-16 01:27:48 -0700325 dev_dbg(master->dev.parent, "start message %p for %s\n",
Kay Sievers6c7377a2009-03-24 16:38:21 -0700326 msg, dev_name(&spi->dev));
David Brownelldefbd3b2007-07-17 04:04:08 -0700327
328 /* select chip if it's not still active */
329 if (as->stay) {
330 if (as->stay != spi) {
331 cs_deactivate(as, as->stay);
332 cs_activate(as, spi);
333 }
334 as->stay = NULL;
335 } else
336 cs_activate(as, spi);
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800337
338 atmel_spi_next_xfer(master, msg);
339}
340
David Brownell8da08592007-07-17 04:04:07 -0700341/*
342 * For DMA, tx_buf/tx_dma have the same relationship as rx_buf/rx_dma:
343 * - The buffer is either valid for CPU access, else NULL
Uwe Kleine-Königb5950762010-11-01 15:38:34 -0400344 * - If the buffer is valid, so is its DMA address
David Brownell8da08592007-07-17 04:04:07 -0700345 *
Uwe Kleine-Königb5950762010-11-01 15:38:34 -0400346 * This driver manages the dma address unless message->is_dma_mapped.
David Brownell8da08592007-07-17 04:04:07 -0700347 */
348static int
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800349atmel_spi_dma_map_xfer(struct atmel_spi *as, struct spi_transfer *xfer)
350{
David Brownell8da08592007-07-17 04:04:07 -0700351 struct device *dev = &as->pdev->dev;
352
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800353 xfer->tx_dma = xfer->rx_dma = INVALID_DMA_ADDRESS;
David Brownell8da08592007-07-17 04:04:07 -0700354 if (xfer->tx_buf) {
355 xfer->tx_dma = dma_map_single(dev,
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800356 (void *) xfer->tx_buf, xfer->len,
357 DMA_TO_DEVICE);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -0700358 if (dma_mapping_error(dev, xfer->tx_dma))
David Brownell8da08592007-07-17 04:04:07 -0700359 return -ENOMEM;
360 }
361 if (xfer->rx_buf) {
362 xfer->rx_dma = dma_map_single(dev,
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800363 xfer->rx_buf, xfer->len,
364 DMA_FROM_DEVICE);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -0700365 if (dma_mapping_error(dev, xfer->rx_dma)) {
David Brownell8da08592007-07-17 04:04:07 -0700366 if (xfer->tx_buf)
367 dma_unmap_single(dev,
368 xfer->tx_dma, xfer->len,
369 DMA_TO_DEVICE);
370 return -ENOMEM;
371 }
372 }
373 return 0;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800374}
375
376static void atmel_spi_dma_unmap_xfer(struct spi_master *master,
377 struct spi_transfer *xfer)
378{
379 if (xfer->tx_dma != INVALID_DMA_ADDRESS)
Tony Jones49dce682007-10-16 01:27:48 -0700380 dma_unmap_single(master->dev.parent, xfer->tx_dma,
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800381 xfer->len, DMA_TO_DEVICE);
382 if (xfer->rx_dma != INVALID_DMA_ADDRESS)
Tony Jones49dce682007-10-16 01:27:48 -0700383 dma_unmap_single(master->dev.parent, xfer->rx_dma,
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800384 xfer->len, DMA_FROM_DEVICE);
385}
386
387static void
388atmel_spi_msg_done(struct spi_master *master, struct atmel_spi *as,
David Brownelldefbd3b2007-07-17 04:04:08 -0700389 struct spi_message *msg, int status, int stay)
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800390{
David Brownelldefbd3b2007-07-17 04:04:08 -0700391 if (!stay || status < 0)
392 cs_deactivate(as, msg->spi);
393 else
394 as->stay = msg->spi;
395
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800396 list_del(&msg->queue);
397 msg->status = status;
398
Tony Jones49dce682007-10-16 01:27:48 -0700399 dev_dbg(master->dev.parent,
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800400 "xfer complete: %u bytes transferred\n",
401 msg->actual_length);
402
403 spin_unlock(&as->lock);
404 msg->complete(msg->context);
405 spin_lock(&as->lock);
406
407 as->current_transfer = NULL;
Silvester Erdeg154443c2008-02-06 01:38:12 -0800408 as->next_transfer = NULL;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800409
410 /* continue if needed */
411 if (list_empty(&as->queue) || as->stopping)
412 spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS));
413 else
414 atmel_spi_next_message(master);
415}
416
417static irqreturn_t
418atmel_spi_interrupt(int irq, void *dev_id)
419{
420 struct spi_master *master = dev_id;
421 struct atmel_spi *as = spi_master_get_devdata(master);
422 struct spi_message *msg;
423 struct spi_transfer *xfer;
424 u32 status, pending, imr;
425 int ret = IRQ_NONE;
426
427 spin_lock(&as->lock);
428
429 xfer = as->current_transfer;
430 msg = list_entry(as->queue.next, struct spi_message, queue);
431
432 imr = spi_readl(as, IMR);
433 status = spi_readl(as, SR);
434 pending = status & imr;
435
436 if (pending & SPI_BIT(OVRES)) {
437 int timeout;
438
439 ret = IRQ_HANDLED;
440
Gerard Kamdc329442008-08-04 13:41:12 -0700441 spi_writel(as, IDR, (SPI_BIT(RXBUFF) | SPI_BIT(ENDRX)
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800442 | SPI_BIT(OVRES)));
443
444 /*
445 * When we get an overrun, we disregard the current
446 * transfer. Data will not be copied back from any
447 * bounce buffer and msg->actual_len will not be
448 * updated with the last xfer.
449 *
450 * We will also not process any remaning transfers in
451 * the message.
452 *
453 * First, stop the transfer and unmap the DMA buffers.
454 */
455 spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS));
456 if (!msg->is_dma_mapped)
457 atmel_spi_dma_unmap_xfer(master, xfer);
458
459 /* REVISIT: udelay in irq is unfriendly */
460 if (xfer->delay_usecs)
461 udelay(xfer->delay_usecs);
462
Gerard Kamdc329442008-08-04 13:41:12 -0700463 dev_warn(master->dev.parent, "overrun (%u/%u remaining)\n",
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800464 spi_readl(as, TCR), spi_readl(as, RCR));
465
466 /*
467 * Clean up DMA registers and make sure the data
468 * registers are empty.
469 */
470 spi_writel(as, RNCR, 0);
471 spi_writel(as, TNCR, 0);
472 spi_writel(as, RCR, 0);
473 spi_writel(as, TCR, 0);
474 for (timeout = 1000; timeout; timeout--)
475 if (spi_readl(as, SR) & SPI_BIT(TXEMPTY))
476 break;
477 if (!timeout)
Tony Jones49dce682007-10-16 01:27:48 -0700478 dev_warn(master->dev.parent,
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800479 "timeout waiting for TXEMPTY");
480 while (spi_readl(as, SR) & SPI_BIT(RDRF))
481 spi_readl(as, RDR);
482
483 /* Clear any overrun happening while cleaning up */
484 spi_readl(as, SR);
485
David Brownelldefbd3b2007-07-17 04:04:08 -0700486 atmel_spi_msg_done(master, as, msg, -EIO, 0);
Gerard Kamdc329442008-08-04 13:41:12 -0700487 } else if (pending & (SPI_BIT(RXBUFF) | SPI_BIT(ENDRX))) {
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800488 ret = IRQ_HANDLED;
489
490 spi_writel(as, IDR, pending);
491
Silvester Erdeg154443c2008-02-06 01:38:12 -0800492 if (as->current_remaining_bytes == 0) {
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800493 msg->actual_length += xfer->len;
494
495 if (!msg->is_dma_mapped)
496 atmel_spi_dma_unmap_xfer(master, xfer);
497
498 /* REVISIT: udelay in irq is unfriendly */
499 if (xfer->delay_usecs)
500 udelay(xfer->delay_usecs);
501
Silvester Erdeg154443c2008-02-06 01:38:12 -0800502 if (atmel_spi_xfer_is_last(msg, xfer)) {
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800503 /* report completed message */
David Brownelldefbd3b2007-07-17 04:04:08 -0700504 atmel_spi_msg_done(master, as, msg, 0,
505 xfer->cs_change);
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800506 } else {
507 if (xfer->cs_change) {
David Brownelldefbd3b2007-07-17 04:04:08 -0700508 cs_deactivate(as, msg->spi);
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800509 udelay(1);
David Brownelldefbd3b2007-07-17 04:04:08 -0700510 cs_activate(as, msg->spi);
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800511 }
512
513 /*
514 * Not done yet. Submit the next transfer.
515 *
516 * FIXME handle protocol options for xfer
517 */
518 atmel_spi_next_xfer(master, msg);
519 }
520 } else {
521 /*
522 * Keep going, we still have data to send in
523 * the current transfer.
524 */
525 atmel_spi_next_xfer(master, msg);
526 }
527 }
528
529 spin_unlock(&as->lock);
530
531 return ret;
532}
533
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800534static int atmel_spi_setup(struct spi_device *spi)
535{
536 struct atmel_spi *as;
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -0800537 struct atmel_spi_device *asd;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800538 u32 scbr, csr;
539 unsigned int bits = spi->bits_per_word;
Haavard Skinnemoen592e7bf2008-04-30 00:52:17 -0700540 unsigned long bus_hz;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800541 unsigned int npcs_pin;
542 int ret;
543
544 as = spi_master_get_devdata(spi->master);
545
546 if (as->stopping)
547 return -ESHUTDOWN;
548
549 if (spi->chip_select > spi->master->num_chipselect) {
550 dev_dbg(&spi->dev,
551 "setup: invalid chipselect %u (%u defined)\n",
552 spi->chip_select, spi->master->num_chipselect);
553 return -EINVAL;
554 }
555
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800556 if (bits < 8 || bits > 16) {
557 dev_dbg(&spi->dev,
558 "setup: invalid bits_per_word %u (8 to 16)\n",
559 bits);
560 return -EINVAL;
561 }
562
David Brownelldefbd3b2007-07-17 04:04:08 -0700563 /* see notes above re chipselect */
Haavard Skinnemoen5bfa26c2009-01-06 14:41:42 -0800564 if (!atmel_spi_is_v2()
David Brownelldefbd3b2007-07-17 04:04:08 -0700565 && spi->chip_select == 0
566 && (spi->mode & SPI_CS_HIGH)) {
567 dev_dbg(&spi->dev, "setup: can't be active-high\n");
568 return -EINVAL;
569 }
570
Haavard Skinnemoen5bfa26c2009-01-06 14:41:42 -0800571 /* v1 chips start out at half the peripheral bus speed. */
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800572 bus_hz = clk_get_rate(as->clk);
Haavard Skinnemoen5bfa26c2009-01-06 14:41:42 -0800573 if (!atmel_spi_is_v2())
Haavard Skinnemoen592e7bf2008-04-30 00:52:17 -0700574 bus_hz /= 2;
575
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800576 if (spi->max_speed_hz) {
Haavard Skinnemoen592e7bf2008-04-30 00:52:17 -0700577 /*
578 * Calculate the lowest divider that satisfies the
579 * constraint, assuming div32/fdiv/mbz == 0.
580 */
581 scbr = DIV_ROUND_UP(bus_hz, spi->max_speed_hz);
582
583 /*
584 * If the resulting divider doesn't fit into the
585 * register bitfield, we can't satisfy the constraint.
586 */
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800587 if (scbr >= (1 << SPI_SCBR_SIZE)) {
David Brownell8da08592007-07-17 04:04:07 -0700588 dev_dbg(&spi->dev,
589 "setup: %d Hz too slow, scbr %u; min %ld Hz\n",
590 spi->max_speed_hz, scbr, bus_hz/255);
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800591 return -EINVAL;
592 }
593 } else
Haavard Skinnemoen592e7bf2008-04-30 00:52:17 -0700594 /* speed zero means "as slow as possible" */
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800595 scbr = 0xff;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800596
597 csr = SPI_BF(SCBR, scbr) | SPI_BF(BITS, bits - 8);
598 if (spi->mode & SPI_CPOL)
599 csr |= SPI_BIT(CPOL);
600 if (!(spi->mode & SPI_CPHA))
601 csr |= SPI_BIT(NCPHA);
602
Haavard Skinnemoen1eed29d2008-02-06 01:38:11 -0800603 /* DLYBS is mostly irrelevant since we manage chipselect using GPIOs.
604 *
605 * DLYBCT would add delays between words, slowing down transfers.
606 * It could potentially be useful to cope with DMA bottlenecks, but
607 * in those cases it's probably best to just use a lower bitrate.
608 */
609 csr |= SPI_BF(DLYBS, 0);
610 csr |= SPI_BF(DLYBCT, 0);
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800611
612 /* chipselect must have been muxed as GPIO (e.g. in board setup) */
613 npcs_pin = (unsigned int)spi->controller_data;
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -0800614 asd = spi->controller_state;
615 if (!asd) {
616 asd = kzalloc(sizeof(struct atmel_spi_device), GFP_KERNEL);
617 if (!asd)
618 return -ENOMEM;
619
Kay Sievers6c7377a2009-03-24 16:38:21 -0700620 ret = gpio_request(npcs_pin, dev_name(&spi->dev));
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -0800621 if (ret) {
622 kfree(asd);
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800623 return ret;
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -0800624 }
625
626 asd->npcs_pin = npcs_pin;
627 spi->controller_state = asd;
David Brownell28735a72007-03-16 13:38:14 -0800628 gpio_direction_output(npcs_pin, !(spi->mode & SPI_CS_HIGH));
David Brownelldefbd3b2007-07-17 04:04:08 -0700629 } else {
630 unsigned long flags;
631
632 spin_lock_irqsave(&as->lock, flags);
633 if (as->stay == spi)
634 as->stay = NULL;
635 cs_deactivate(as, spi);
636 spin_unlock_irqrestore(&as->lock, flags);
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800637 }
638
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -0800639 asd->csr = csr;
640
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800641 dev_dbg(&spi->dev,
642 "setup: %lu Hz bpw %u mode 0x%x -> csr%d %08x\n",
Haavard Skinnemoen592e7bf2008-04-30 00:52:17 -0700643 bus_hz / scbr, bits, spi->mode, spi->chip_select, csr);
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800644
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -0800645 if (!atmel_spi_is_v2())
646 spi_writel(as, CSR0 + 4 * spi->chip_select, csr);
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800647
648 return 0;
649}
650
651static int atmel_spi_transfer(struct spi_device *spi, struct spi_message *msg)
652{
653 struct atmel_spi *as;
654 struct spi_transfer *xfer;
655 unsigned long flags;
Tony Jones49dce682007-10-16 01:27:48 -0700656 struct device *controller = spi->master->dev.parent;
Matthias Bruggerb9d228f2010-10-13 17:51:02 +0200657 u8 bits;
658 struct atmel_spi_device *asd;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800659
660 as = spi_master_get_devdata(spi->master);
661
662 dev_dbg(controller, "new message %p submitted for %s\n",
Kay Sievers6c7377a2009-03-24 16:38:21 -0700663 msg, dev_name(&spi->dev));
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800664
Stanislaw Gruszka5b96f172009-01-15 13:50:44 -0800665 if (unlikely(list_empty(&msg->transfers)))
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800666 return -EINVAL;
667
668 if (as->stopping)
669 return -ESHUTDOWN;
670
671 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
Atsushi Nemoto06719812008-04-28 02:14:19 -0700672 if (!(xfer->tx_buf || xfer->rx_buf) && xfer->len) {
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800673 dev_dbg(&spi->dev, "missing rx or tx buf\n");
674 return -EINVAL;
675 }
676
Matthias Bruggerb9d228f2010-10-13 17:51:02 +0200677 if (xfer->bits_per_word) {
678 asd = spi->controller_state;
679 bits = (asd->csr >> 4) & 0xf;
680 if (bits != xfer->bits_per_word - 8) {
681 dev_dbg(&spi->dev, "you can't yet change "
Matthias Bruggeree2007d2010-10-16 01:39:49 +0200682 "bits_per_word in transfers\n");
Matthias Bruggerb9d228f2010-10-13 17:51:02 +0200683 return -ENOPROTOOPT;
684 }
685 }
686
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800687 /* FIXME implement these protocol options!! */
Matthias Bruggerb9d228f2010-10-13 17:51:02 +0200688 if (xfer->speed_hz) {
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800689 dev_dbg(&spi->dev, "no protocol options yet\n");
690 return -ENOPROTOOPT;
691 }
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800692
David Brownell8da08592007-07-17 04:04:07 -0700693 /*
694 * DMA map early, for performance (empties dcache ASAP) and
695 * better fault reporting. This is a DMA-only driver.
696 *
697 * NOTE that if dma_unmap_single() ever starts to do work on
698 * platforms supported by this driver, we would need to clean
699 * up mappings for previously-mapped transfers.
700 */
701 if (!msg->is_dma_mapped) {
702 if (atmel_spi_dma_map_xfer(as, xfer) < 0)
703 return -ENOMEM;
704 }
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800705 }
706
David Brownelldefbd3b2007-07-17 04:04:08 -0700707#ifdef VERBOSE
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800708 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
709 dev_dbg(controller,
710 " xfer %p: len %u tx %p/%08x rx %p/%08x\n",
711 xfer, xfer->len,
712 xfer->tx_buf, xfer->tx_dma,
713 xfer->rx_buf, xfer->rx_dma);
714 }
David Brownelldefbd3b2007-07-17 04:04:08 -0700715#endif
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800716
717 msg->status = -EINPROGRESS;
718 msg->actual_length = 0;
719
720 spin_lock_irqsave(&as->lock, flags);
721 list_add_tail(&msg->queue, &as->queue);
722 if (!as->current_transfer)
723 atmel_spi_next_message(spi->master);
724 spin_unlock_irqrestore(&as->lock, flags);
725
726 return 0;
727}
728
David Brownellbb2d1c32007-02-20 13:58:19 -0800729static void atmel_spi_cleanup(struct spi_device *spi)
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800730{
David Brownelldefbd3b2007-07-17 04:04:08 -0700731 struct atmel_spi *as = spi_master_get_devdata(spi->master);
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -0800732 struct atmel_spi_device *asd = spi->controller_state;
David Brownelldefbd3b2007-07-17 04:04:08 -0700733 unsigned gpio = (unsigned) spi->controller_data;
734 unsigned long flags;
735
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -0800736 if (!asd)
David Brownelldefbd3b2007-07-17 04:04:08 -0700737 return;
738
739 spin_lock_irqsave(&as->lock, flags);
740 if (as->stay == spi) {
741 as->stay = NULL;
742 cs_deactivate(as, spi);
743 }
744 spin_unlock_irqrestore(&as->lock, flags);
745
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -0800746 spi->controller_state = NULL;
David Brownelldefbd3b2007-07-17 04:04:08 -0700747 gpio_free(gpio);
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -0800748 kfree(asd);
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800749}
750
751/*-------------------------------------------------------------------------*/
752
753static int __init atmel_spi_probe(struct platform_device *pdev)
754{
755 struct resource *regs;
756 int irq;
757 struct clk *clk;
758 int ret;
759 struct spi_master *master;
760 struct atmel_spi *as;
761
762 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
763 if (!regs)
764 return -ENXIO;
765
766 irq = platform_get_irq(pdev, 0);
767 if (irq < 0)
768 return irq;
769
770 clk = clk_get(&pdev->dev, "spi_clk");
771 if (IS_ERR(clk))
772 return PTR_ERR(clk);
773
774 /* setup spi core then atmel-specific driver state */
775 ret = -ENOMEM;
776 master = spi_alloc_master(&pdev->dev, sizeof *as);
777 if (!master)
778 goto out_free;
779
David Brownelle7db06b2009-06-17 16:26:04 -0700780 /* the spi->mode bits understood by this driver: */
781 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
782
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800783 master->bus_num = pdev->id;
784 master->num_chipselect = 4;
785 master->setup = atmel_spi_setup;
786 master->transfer = atmel_spi_transfer;
787 master->cleanup = atmel_spi_cleanup;
788 platform_set_drvdata(pdev, master);
789
790 as = spi_master_get_devdata(master);
791
David Brownell8da08592007-07-17 04:04:07 -0700792 /*
793 * Scratch buffer is used for throwaway rx and tx data.
794 * It's coherent to minimize dcache pollution.
795 */
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800796 as->buffer = dma_alloc_coherent(&pdev->dev, BUFFER_SIZE,
797 &as->buffer_dma, GFP_KERNEL);
798 if (!as->buffer)
799 goto out_free;
800
801 spin_lock_init(&as->lock);
802 INIT_LIST_HEAD(&as->queue);
803 as->pdev = pdev;
hartleys905aa0a2009-12-14 22:22:25 +0000804 as->regs = ioremap(regs->start, resource_size(regs));
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800805 if (!as->regs)
806 goto out_free_buffer;
807 as->irq = irq;
808 as->clk = clk;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800809
810 ret = request_irq(irq, atmel_spi_interrupt, 0,
Kay Sievers6c7377a2009-03-24 16:38:21 -0700811 dev_name(&pdev->dev), master);
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800812 if (ret)
813 goto out_unmap_regs;
814
815 /* Initialize the hardware */
816 clk_enable(clk);
817 spi_writel(as, CR, SPI_BIT(SWRST));
Jean-Christophe Lallemand50d7d5b2008-11-12 13:27:00 -0800818 spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800819 spi_writel(as, MR, SPI_BIT(MSTR) | SPI_BIT(MODFDIS));
820 spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS));
821 spi_writel(as, CR, SPI_BIT(SPIEN));
822
823 /* go! */
824 dev_info(&pdev->dev, "Atmel SPI Controller at 0x%08lx (irq %d)\n",
825 (unsigned long)regs->start, irq);
826
827 ret = spi_register_master(master);
828 if (ret)
829 goto out_reset_hw;
830
831 return 0;
832
833out_reset_hw:
834 spi_writel(as, CR, SPI_BIT(SWRST));
Jean-Christophe Lallemand50d7d5b2008-11-12 13:27:00 -0800835 spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800836 clk_disable(clk);
837 free_irq(irq, master);
838out_unmap_regs:
839 iounmap(as->regs);
840out_free_buffer:
841 dma_free_coherent(&pdev->dev, BUFFER_SIZE, as->buffer,
842 as->buffer_dma);
843out_free:
844 clk_put(clk);
845 spi_master_put(master);
846 return ret;
847}
848
849static int __exit atmel_spi_remove(struct platform_device *pdev)
850{
851 struct spi_master *master = platform_get_drvdata(pdev);
852 struct atmel_spi *as = spi_master_get_devdata(master);
853 struct spi_message *msg;
854
855 /* reset the hardware and block queue progress */
856 spin_lock_irq(&as->lock);
857 as->stopping = 1;
858 spi_writel(as, CR, SPI_BIT(SWRST));
Jean-Christophe Lallemand50d7d5b2008-11-12 13:27:00 -0800859 spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800860 spi_readl(as, SR);
861 spin_unlock_irq(&as->lock);
862
863 /* Terminate remaining queued transfers */
864 list_for_each_entry(msg, &as->queue, queue) {
865 /* REVISIT unmapping the dma is a NOP on ARM and AVR32
866 * but we shouldn't depend on that...
867 */
868 msg->status = -ESHUTDOWN;
869 msg->complete(msg->context);
870 }
871
872 dma_free_coherent(&pdev->dev, BUFFER_SIZE, as->buffer,
873 as->buffer_dma);
874
875 clk_disable(as->clk);
876 clk_put(as->clk);
877 free_irq(as->irq, master);
878 iounmap(as->regs);
879
880 spi_unregister_master(master);
881
882 return 0;
883}
884
885#ifdef CONFIG_PM
886
887static int atmel_spi_suspend(struct platform_device *pdev, pm_message_t mesg)
888{
889 struct spi_master *master = platform_get_drvdata(pdev);
890 struct atmel_spi *as = spi_master_get_devdata(master);
891
892 clk_disable(as->clk);
893 return 0;
894}
895
896static int atmel_spi_resume(struct platform_device *pdev)
897{
898 struct spi_master *master = platform_get_drvdata(pdev);
899 struct atmel_spi *as = spi_master_get_devdata(master);
900
901 clk_enable(as->clk);
902 return 0;
903}
904
905#else
906#define atmel_spi_suspend NULL
907#define atmel_spi_resume NULL
908#endif
909
910
911static struct platform_driver atmel_spi_driver = {
912 .driver = {
913 .name = "atmel_spi",
914 .owner = THIS_MODULE,
915 },
916 .suspend = atmel_spi_suspend,
917 .resume = atmel_spi_resume,
918 .remove = __exit_p(atmel_spi_remove),
919};
920
921static int __init atmel_spi_init(void)
922{
923 return platform_driver_probe(&atmel_spi_driver, atmel_spi_probe);
924}
925module_init(atmel_spi_init);
926
927static void __exit atmel_spi_exit(void)
928{
929 platform_driver_unregister(&atmel_spi_driver);
930}
931module_exit(atmel_spi_exit);
932
933MODULE_DESCRIPTION("Atmel AT32/AT91 SPI Controller driver");
934MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
935MODULE_LICENSE("GPL");
Kay Sievers7e38c3c2008-04-10 21:29:20 -0700936MODULE_ALIAS("platform:atmel_spi");