arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi

/*
 * Copyright 2013 Christian Hemp, Phytec Messtechnik GmbH
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

/ {
	chosen {
		linux,stdout-path = &uart4;
	};
};

&fec {
	status = "okay";
};

&gpmi {
	status = "okay";
};

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	clock-frequency = <100000>;
	status = "okay";

	tlv320@18 {
		compatible = "ti,tlv320aic3x";
		reg = <0x18>;
	};

	stmpe@41 {
		compatible = "st,stmpe811";
		reg = <0x41>;
	};

	rtc@51 {
		compatible = "nxp,rtc8564";
		reg = <0x51>;
	};

	adc@64 {
		compatible = "maxim,max1037";
		reg = <0x64>;
	};
};

&i2c3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	clock-frequency = <100000>;
	status = "okay";
};

&uart3 {
	status = "okay";
};

&uart4 {
	status = "okay";
};

&usbh1 {
	status = "okay";
};

&usbotg {
	status = "okay";
};

&usdhc2 {
	status = "okay";
};

&usdhc3 {
	status = "okay";
};

&iomuxc {
	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_EB2__I2C2_SCL		0x4001b8b1
			MX6QDL_PAD_EIM_D16__I2C2_SDA		0x4001b8b1
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D17__I2C3_SCL		0x4001b8b1
			MX6QDL_PAD_EIM_D18__I2C3_SDA		0x4001b8b1
		>;
	};
};