Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 1 | /* |
| 2 | * SH7720 Pinmux |
| 3 | * |
| 4 | * Copyright (C) 2008 Magnus Damm |
| 5 | * |
| 6 | * This file is subject to the terms and conditions of the GNU General Public |
| 7 | * License. See the file "COPYING" in the main directory of this archive |
| 8 | * for more details. |
| 9 | */ |
| 10 | |
| 11 | #include <linux/kernel.h> |
| 12 | #include <linux/gpio.h> |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 13 | #include <cpu/sh7720.h> |
| 14 | |
Laurent Pinchart | c332380 | 2012-12-15 23:51:55 +0100 | [diff] [blame] | 15 | #include "sh_pfc.h" |
| 16 | |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 17 | enum { |
| 18 | PINMUX_RESERVED = 0, |
| 19 | |
| 20 | PINMUX_DATA_BEGIN, |
| 21 | PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA, |
| 22 | PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA, |
| 23 | PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA, |
| 24 | PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA, |
| 25 | PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA, |
| 26 | PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA, |
| 27 | PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA, |
| 28 | PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA, |
| 29 | PTE6_DATA, PTE5_DATA, PTE4_DATA, |
| 30 | PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA, |
| 31 | PTF6_DATA, PTF5_DATA, PTF4_DATA, |
| 32 | PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA, |
| 33 | PTG6_DATA, PTG5_DATA, PTG4_DATA, |
| 34 | PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA, |
| 35 | PTH6_DATA, PTH5_DATA, PTH4_DATA, |
| 36 | PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA, |
| 37 | PTJ6_DATA, PTJ5_DATA, PTJ4_DATA, |
| 38 | PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA, |
| 39 | PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA, |
| 40 | PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA, PTL3_DATA, |
| 41 | PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA, |
| 42 | PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA, |
| 43 | PTP4_DATA, PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA, |
| 44 | PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA, |
| 45 | PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA, |
| 46 | PTS4_DATA, PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA, |
| 47 | PTT4_DATA, PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA, |
| 48 | PTU4_DATA, PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA, |
| 49 | PTV4_DATA, PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA, |
| 50 | PINMUX_DATA_END, |
| 51 | |
| 52 | PINMUX_INPUT_BEGIN, |
| 53 | PTA7_IN, PTA6_IN, PTA5_IN, PTA4_IN, |
| 54 | PTA3_IN, PTA2_IN, PTA1_IN, PTA0_IN, |
| 55 | PTB7_IN, PTB6_IN, PTB5_IN, PTB4_IN, |
| 56 | PTB3_IN, PTB2_IN, PTB1_IN, PTB0_IN, |
| 57 | PTC7_IN, PTC6_IN, PTC5_IN, PTC4_IN, |
| 58 | PTC3_IN, PTC2_IN, PTC1_IN, PTC0_IN, |
| 59 | PTD7_IN, PTD6_IN, PTD5_IN, PTD4_IN, |
| 60 | PTD3_IN, PTD2_IN, PTD1_IN, PTD0_IN, |
| 61 | PTE6_IN, PTE5_IN, PTE4_IN, |
| 62 | PTE3_IN, PTE2_IN, PTE1_IN, PTE0_IN, |
| 63 | PTF6_IN, PTF5_IN, PTF4_IN, |
| 64 | PTF3_IN, PTF2_IN, PTF1_IN, PTF0_IN, |
| 65 | PTG6_IN, PTG5_IN, PTG4_IN, |
| 66 | PTG3_IN, PTG2_IN, PTG1_IN, PTG0_IN, |
| 67 | PTH6_IN, PTH5_IN, PTH4_IN, |
| 68 | PTH3_IN, PTH2_IN, PTH1_IN, PTH0_IN, |
| 69 | PTJ6_IN, PTJ5_IN, PTJ4_IN, |
| 70 | PTJ3_IN, PTJ2_IN, PTJ1_IN, PTJ0_IN, |
| 71 | PTK3_IN, PTK2_IN, PTK1_IN, PTK0_IN, |
| 72 | PTL7_IN, PTL6_IN, PTL5_IN, PTL4_IN, PTL3_IN, |
| 73 | PTM7_IN, PTM6_IN, PTM5_IN, PTM4_IN, |
| 74 | PTM3_IN, PTM2_IN, PTM1_IN, PTM0_IN, |
| 75 | PTP4_IN, PTP3_IN, PTP2_IN, PTP1_IN, PTP0_IN, |
| 76 | PTR7_IN, PTR6_IN, PTR5_IN, PTR4_IN, |
| 77 | PTR3_IN, PTR2_IN, PTR1_IN, PTR0_IN, |
| 78 | PTS4_IN, PTS3_IN, PTS2_IN, PTS1_IN, PTS0_IN, |
| 79 | PTT4_IN, PTT3_IN, PTT2_IN, PTT1_IN, PTT0_IN, |
| 80 | PTU4_IN, PTU3_IN, PTU2_IN, PTU1_IN, PTU0_IN, |
| 81 | PTV4_IN, PTV3_IN, PTV2_IN, PTV1_IN, PTV0_IN, |
| 82 | PINMUX_INPUT_END, |
| 83 | |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 84 | PINMUX_OUTPUT_BEGIN, |
| 85 | PTA7_OUT, PTA6_OUT, PTA5_OUT, PTA4_OUT, |
| 86 | PTA3_OUT, PTA2_OUT, PTA1_OUT, PTA0_OUT, |
| 87 | PTB7_OUT, PTB6_OUT, PTB5_OUT, PTB4_OUT, |
| 88 | PTB3_OUT, PTB2_OUT, PTB1_OUT, PTB0_OUT, |
| 89 | PTC7_OUT, PTC6_OUT, PTC5_OUT, PTC4_OUT, |
| 90 | PTC3_OUT, PTC2_OUT, PTC1_OUT, PTC0_OUT, |
| 91 | PTD7_OUT, PTD6_OUT, PTD5_OUT, PTD4_OUT, |
| 92 | PTD3_OUT, PTD2_OUT, PTD1_OUT, PTD0_OUT, |
| 93 | PTE4_OUT, PTE3_OUT, PTE2_OUT, PTE1_OUT, PTE0_OUT, |
| 94 | PTF0_OUT, |
| 95 | PTG6_OUT, PTG5_OUT, PTG4_OUT, |
| 96 | PTG3_OUT, PTG2_OUT, PTG1_OUT, PTG0_OUT, |
| 97 | PTH6_OUT, PTH5_OUT, PTH4_OUT, |
| 98 | PTH3_OUT, PTH2_OUT, PTH1_OUT, PTH0_OUT, |
| 99 | PTJ6_OUT, PTJ5_OUT, PTJ4_OUT, |
| 100 | PTJ3_OUT, PTJ2_OUT, PTJ1_OUT, PTJ0_OUT, |
| 101 | PTK3_OUT, PTK2_OUT, PTK1_OUT, PTK0_OUT, |
| 102 | PTL7_OUT, PTL6_OUT, PTL5_OUT, PTL4_OUT, PTL3_OUT, |
| 103 | PTM7_OUT, PTM6_OUT, PTM5_OUT, PTM4_OUT, |
| 104 | PTM3_OUT, PTM2_OUT, PTM1_OUT, PTM0_OUT, |
| 105 | PTP4_OUT, PTP3_OUT, PTP2_OUT, PTP1_OUT, PTP0_OUT, |
| 106 | PTR7_OUT, PTR6_OUT, PTR5_OUT, PTR4_OUT, |
| 107 | PTR3_OUT, PTR2_OUT, PTR1_OUT, PTR0_OUT, |
| 108 | PTS4_OUT, PTS3_OUT, PTS2_OUT, PTS1_OUT, PTS0_OUT, |
| 109 | PTT4_OUT, PTT3_OUT, PTT2_OUT, PTT1_OUT, PTT0_OUT, |
| 110 | PTU4_OUT, PTU3_OUT, PTU2_OUT, PTU1_OUT, PTU0_OUT, |
| 111 | PTV4_OUT, PTV3_OUT, PTV2_OUT, PTV1_OUT, PTV0_OUT, |
| 112 | PINMUX_OUTPUT_END, |
| 113 | |
| 114 | PINMUX_FUNCTION_BEGIN, |
| 115 | PTA7_FN, PTA6_FN, PTA5_FN, PTA4_FN, |
| 116 | PTA3_FN, PTA2_FN, PTA1_FN, PTA0_FN, |
| 117 | PTB7_FN, PTB6_FN, PTB5_FN, PTB4_FN, |
| 118 | PTB3_FN, PTB2_FN, PTB1_FN, PTB0_FN, |
| 119 | PTC7_FN, PTC6_FN, PTC5_FN, PTC4_FN, |
| 120 | PTC3_FN, PTC2_FN, PTC1_FN, PTC0_FN, |
| 121 | PTD7_FN, PTD6_FN, PTD5_FN, PTD4_FN, |
| 122 | PTD3_FN, PTD2_FN, PTD1_FN, PTD0_FN, |
| 123 | PTE6_FN, PTE5_FN, PTE4_FN, |
| 124 | PTE3_FN, PTE2_FN, PTE1_FN, PTE0_FN, |
| 125 | PTF6_FN, PTF5_FN, PTF4_FN, |
| 126 | PTF3_FN, PTF2_FN, PTF1_FN, PTF0_FN, |
| 127 | PTG6_FN, PTG5_FN, PTG4_FN, |
| 128 | PTG3_FN, PTG2_FN, PTG1_FN, PTG0_FN, |
| 129 | PTH6_FN, PTH5_FN, PTH4_FN, |
| 130 | PTH3_FN, PTH2_FN, PTH1_FN, PTH0_FN, |
| 131 | PTJ6_FN, PTJ5_FN, PTJ4_FN, |
| 132 | PTJ3_FN, PTJ2_FN, PTJ1_FN, PTJ0_FN, |
| 133 | PTK3_FN, PTK2_FN, PTK1_FN, PTK0_FN, |
| 134 | PTL7_FN, PTL6_FN, PTL5_FN, PTL4_FN, PTL3_FN, |
| 135 | PTM7_FN, PTM6_FN, PTM5_FN, PTM4_FN, |
| 136 | PTM3_FN, PTM2_FN, PTM1_FN, PTM0_FN, |
| 137 | PTP4_FN, PTP3_FN, PTP2_FN, PTP1_FN, PTP0_FN, |
| 138 | PTR7_FN, PTR6_FN, PTR5_FN, PTR4_FN, |
| 139 | PTR3_FN, PTR2_FN, PTR1_FN, PTR0_FN, |
| 140 | PTS4_FN, PTS3_FN, PTS2_FN, PTS1_FN, PTS0_FN, |
| 141 | PTT4_FN, PTT3_FN, PTT2_FN, PTT1_FN, PTT0_FN, |
| 142 | PTU4_FN, PTU3_FN, PTU2_FN, PTU1_FN, PTU0_FN, |
| 143 | PTV4_FN, PTV3_FN, PTV2_FN, PTV1_FN, PTV0_FN, |
| 144 | |
| 145 | PSELA_1_0_00, PSELA_1_0_01, PSELA_1_0_10, |
| 146 | PSELA_3_2_00, PSELA_3_2_01, PSELA_3_2_10, PSELA_3_2_11, |
| 147 | PSELA_5_4_00, PSELA_5_4_01, PSELA_5_4_10, PSELA_5_4_11, |
| 148 | PSELA_7_6_00, PSELA_7_6_01, PSELA_7_6_10, |
| 149 | PSELA_9_8_00, PSELA_9_8_01, PSELA_9_8_10, |
| 150 | PSELA_11_10_00, PSELA_11_10_01, PSELA_11_10_10, |
| 151 | PSELA_13_12_00, PSELA_13_12_10, |
| 152 | PSELA_15_14_00, PSELA_15_14_10, |
| 153 | PSELB_9_8_00, PSELB_9_8_11, |
| 154 | PSELB_11_10_00, PSELB_11_10_01, PSELB_11_10_10, PSELB_11_10_11, |
| 155 | PSELB_13_12_00, PSELB_13_12_01, PSELB_13_12_10, PSELB_13_12_11, |
| 156 | PSELB_15_14_00, PSELB_15_14_11, |
| 157 | PSELC_9_8_00, PSELC_9_8_10, |
| 158 | PSELC_11_10_00, PSELC_11_10_10, |
| 159 | PSELC_13_12_00, PSELC_13_12_01, PSELC_13_12_10, |
| 160 | PSELC_15_14_00, PSELC_15_14_01, PSELC_15_14_10, |
| 161 | PSELD_1_0_00, PSELD_1_0_10, |
| 162 | PSELD_11_10_00, PSELD_11_10_01, |
| 163 | PSELD_15_14_00, PSELD_15_14_01, PSELD_15_14_10, |
| 164 | PINMUX_FUNCTION_END, |
| 165 | |
| 166 | PINMUX_MARK_BEGIN, |
| 167 | D31_MARK, D30_MARK, D29_MARK, D28_MARK, |
| 168 | D27_MARK, D26_MARK, D25_MARK, D24_MARK, |
| 169 | D23_MARK, D22_MARK, D21_MARK, D20_MARK, |
| 170 | D19_MARK, D18_MARK, D17_MARK, D16_MARK, |
| 171 | IOIS16_MARK, RAS_MARK, CAS_MARK, CKE_MARK, |
| 172 | CS5B_CE1A_MARK, CS6B_CE1B_MARK, |
| 173 | A25_MARK, A24_MARK, A23_MARK, A22_MARK, |
| 174 | A21_MARK, A20_MARK, A19_MARK, A0_MARK, |
| 175 | REFOUT_MARK, IRQOUT_MARK, |
| 176 | LCD_DATA15_MARK, LCD_DATA14_MARK, |
| 177 | LCD_DATA13_MARK, LCD_DATA12_MARK, |
| 178 | LCD_DATA11_MARK, LCD_DATA10_MARK, |
| 179 | LCD_DATA9_MARK, LCD_DATA8_MARK, |
| 180 | LCD_DATA7_MARK, LCD_DATA6_MARK, |
| 181 | LCD_DATA5_MARK, LCD_DATA4_MARK, |
| 182 | LCD_DATA3_MARK, LCD_DATA2_MARK, |
| 183 | LCD_DATA1_MARK, LCD_DATA0_MARK, |
| 184 | LCD_M_DISP_MARK, |
| 185 | LCD_CL1_MARK, LCD_CL2_MARK, |
| 186 | LCD_DON_MARK, LCD_FLM_MARK, |
| 187 | LCD_VEPWC_MARK, LCD_VCPWC_MARK, |
| 188 | AFE_RXIN_MARK, AFE_RDET_MARK, |
| 189 | AFE_FS_MARK, AFE_TXOUT_MARK, |
| 190 | AFE_SCLK_MARK, AFE_RLYCNT_MARK, |
| 191 | AFE_HC1_MARK, |
| 192 | IIC_SCL_MARK, IIC_SDA_MARK, |
| 193 | DA1_MARK, DA0_MARK, |
| 194 | AN3_MARK, AN2_MARK, AN1_MARK, AN0_MARK, ADTRG_MARK, |
| 195 | USB1D_RCV_MARK, USB1D_TXSE0_MARK, |
| 196 | USB1D_TXDPLS_MARK, USB1D_DMNS_MARK, |
| 197 | USB1D_DPLS_MARK, USB1D_SPEED_MARK, |
| 198 | USB1D_TXENL_MARK, |
| 199 | USB2_PWR_EN_MARK, USB1_PWR_EN_USBF_UPLUP_MARK, USB1D_SUSPEND_MARK, |
| 200 | IRQ5_MARK, IRQ4_MARK, |
| 201 | IRQ3_IRL3_MARK, IRQ2_IRL2_MARK, |
| 202 | IRQ1_IRL1_MARK, IRQ0_IRL0_MARK, |
| 203 | PCC_REG_MARK, PCC_DRV_MARK, |
| 204 | PCC_BVD2_MARK, PCC_BVD1_MARK, |
| 205 | PCC_CD2_MARK, PCC_CD1_MARK, |
| 206 | PCC_RESET_MARK, PCC_RDY_MARK, |
| 207 | PCC_VS2_MARK, PCC_VS1_MARK, |
| 208 | AUDATA3_MARK, AUDATA2_MARK, AUDATA1_MARK, AUDATA0_MARK, |
| 209 | AUDCK_MARK, AUDSYNC_MARK, ASEBRKAK_MARK, TRST_MARK, |
| 210 | TMS_MARK, TDO_MARK, TDI_MARK, TCK_MARK, |
| 211 | DACK1_MARK, DREQ1_MARK, DACK0_MARK, DREQ0_MARK, |
| 212 | TEND1_MARK, TEND0_MARK, |
| 213 | SIOF0_SYNC_MARK, SIOF0_MCLK_MARK, |
| 214 | SIOF0_TXD_MARK, SIOF0_RXD_MARK, |
| 215 | SIOF0_SCK_MARK, |
| 216 | SIOF1_SYNC_MARK, SIOF1_MCLK_MARK, |
| 217 | SIOF1_TXD_MARK, SIOF1_RXD_MARK, |
| 218 | SIOF1_SCK_MARK, |
| 219 | SCIF0_TXD_MARK, SCIF0_RXD_MARK, |
| 220 | SCIF0_RTS_MARK, SCIF0_CTS_MARK, SCIF0_SCK_MARK, |
| 221 | SCIF1_TXD_MARK, SCIF1_RXD_MARK, |
| 222 | SCIF1_RTS_MARK, SCIF1_CTS_MARK, SCIF1_SCK_MARK, |
| 223 | TPU_TO1_MARK, TPU_TO0_MARK, |
| 224 | TPU_TI3B_MARK, TPU_TI3A_MARK, |
| 225 | TPU_TI2B_MARK, TPU_TI2A_MARK, |
| 226 | TPU_TO3_MARK, TPU_TO2_MARK, |
| 227 | SIM_D_MARK, SIM_CLK_MARK, SIM_RST_MARK, |
| 228 | MMC_DAT_MARK, MMC_CMD_MARK, |
| 229 | MMC_CLK_MARK, MMC_VDDON_MARK, |
| 230 | MMC_ODMOD_MARK, |
| 231 | STATUS0_MARK, STATUS1_MARK, |
| 232 | PINMUX_MARK_END, |
| 233 | }; |
| 234 | |
Laurent Pinchart | 533743d | 2013-07-15 13:03:20 +0200 | [diff] [blame] | 235 | static const u16 pinmux_data[] = { |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 236 | /* PTA GPIO */ |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 237 | PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT), |
| 238 | PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT), |
| 239 | PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT), |
| 240 | PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_OUT), |
| 241 | PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_OUT), |
| 242 | PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_OUT), |
| 243 | PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_OUT), |
| 244 | PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_OUT), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 245 | |
| 246 | /* PTB GPIO */ |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 247 | PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT), |
| 248 | PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT), |
| 249 | PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT), |
| 250 | PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT), |
| 251 | PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT), |
| 252 | PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT), |
| 253 | PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT), |
| 254 | PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 255 | |
| 256 | /* PTC GPIO */ |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 257 | PINMUX_DATA(PTC7_DATA, PTC7_IN, PTC7_OUT), |
| 258 | PINMUX_DATA(PTC6_DATA, PTC6_IN, PTC6_OUT), |
| 259 | PINMUX_DATA(PTC5_DATA, PTC5_IN, PTC5_OUT), |
| 260 | PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT), |
| 261 | PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT), |
| 262 | PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT), |
| 263 | PINMUX_DATA(PTC1_DATA, PTC1_IN, PTC1_OUT), |
| 264 | PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 265 | |
| 266 | /* PTD GPIO */ |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 267 | PINMUX_DATA(PTD7_DATA, PTD7_IN, PTD7_OUT), |
| 268 | PINMUX_DATA(PTD6_DATA, PTD6_IN, PTD6_OUT), |
| 269 | PINMUX_DATA(PTD5_DATA, PTD5_IN, PTD5_OUT), |
| 270 | PINMUX_DATA(PTD4_DATA, PTD4_IN, PTD4_OUT), |
| 271 | PINMUX_DATA(PTD3_DATA, PTD3_IN, PTD3_OUT), |
| 272 | PINMUX_DATA(PTD2_DATA, PTD2_IN, PTD2_OUT), |
| 273 | PINMUX_DATA(PTD1_DATA, PTD1_IN, PTD1_OUT), |
| 274 | PINMUX_DATA(PTD0_DATA, PTD0_IN, PTD0_OUT), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 275 | |
| 276 | /* PTE GPIO */ |
| 277 | PINMUX_DATA(PTE6_DATA, PTE6_IN), |
| 278 | PINMUX_DATA(PTE5_DATA, PTE5_IN), |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 279 | PINMUX_DATA(PTE4_DATA, PTE4_IN, PTE4_OUT), |
| 280 | PINMUX_DATA(PTE3_DATA, PTE3_IN, PTE3_OUT), |
| 281 | PINMUX_DATA(PTE2_DATA, PTE2_IN, PTE2_OUT), |
| 282 | PINMUX_DATA(PTE1_DATA, PTE1_IN, PTE1_OUT), |
| 283 | PINMUX_DATA(PTE0_DATA, PTE0_IN, PTE0_OUT), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 284 | |
| 285 | /* PTF GPIO */ |
| 286 | PINMUX_DATA(PTF6_DATA, PTF6_IN), |
| 287 | PINMUX_DATA(PTF5_DATA, PTF5_IN), |
| 288 | PINMUX_DATA(PTF4_DATA, PTF4_IN), |
| 289 | PINMUX_DATA(PTF3_DATA, PTF3_IN), |
| 290 | PINMUX_DATA(PTF2_DATA, PTF2_IN), |
| 291 | PINMUX_DATA(PTF1_DATA, PTF1_IN), |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 292 | PINMUX_DATA(PTF0_DATA, PTF0_IN, PTF0_OUT), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 293 | |
| 294 | /* PTG GPIO */ |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 295 | PINMUX_DATA(PTG6_DATA, PTG6_IN, PTG6_OUT), |
| 296 | PINMUX_DATA(PTG5_DATA, PTG5_IN, PTG5_OUT), |
| 297 | PINMUX_DATA(PTG4_DATA, PTG4_IN, PTG4_OUT), |
| 298 | PINMUX_DATA(PTG3_DATA, PTG3_IN, PTG3_OUT), |
| 299 | PINMUX_DATA(PTG2_DATA, PTG2_IN, PTG2_OUT), |
| 300 | PINMUX_DATA(PTG1_DATA, PTG1_IN, PTG1_OUT), |
| 301 | PINMUX_DATA(PTG0_DATA, PTG0_IN, PTG0_OUT), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 302 | |
| 303 | /* PTH GPIO */ |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 304 | PINMUX_DATA(PTH6_DATA, PTH6_IN, PTH6_OUT), |
| 305 | PINMUX_DATA(PTH5_DATA, PTH5_IN, PTH5_OUT), |
| 306 | PINMUX_DATA(PTH4_DATA, PTH4_IN, PTH4_OUT), |
| 307 | PINMUX_DATA(PTH3_DATA, PTH3_IN, PTH3_OUT), |
| 308 | PINMUX_DATA(PTH2_DATA, PTH2_IN, PTH2_OUT), |
| 309 | PINMUX_DATA(PTH1_DATA, PTH1_IN, PTH1_OUT), |
| 310 | PINMUX_DATA(PTH0_DATA, PTH0_IN, PTH0_OUT), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 311 | |
| 312 | /* PTJ GPIO */ |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 313 | PINMUX_DATA(PTJ6_DATA, PTJ6_IN, PTJ6_OUT), |
| 314 | PINMUX_DATA(PTJ5_DATA, PTJ5_IN, PTJ5_OUT), |
| 315 | PINMUX_DATA(PTJ4_DATA, PTJ4_IN, PTJ4_OUT), |
| 316 | PINMUX_DATA(PTJ3_DATA, PTJ3_IN, PTJ3_OUT), |
| 317 | PINMUX_DATA(PTJ2_DATA, PTJ2_IN, PTJ2_OUT), |
| 318 | PINMUX_DATA(PTJ1_DATA, PTJ1_IN, PTJ1_OUT), |
| 319 | PINMUX_DATA(PTJ0_DATA, PTJ0_IN, PTJ0_OUT), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 320 | |
| 321 | /* PTK GPIO */ |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 322 | PINMUX_DATA(PTK3_DATA, PTK3_IN, PTK3_OUT), |
| 323 | PINMUX_DATA(PTK2_DATA, PTK2_IN, PTK2_OUT), |
| 324 | PINMUX_DATA(PTK1_DATA, PTK1_IN, PTK1_OUT), |
| 325 | PINMUX_DATA(PTK0_DATA, PTK0_IN, PTK0_OUT), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 326 | |
| 327 | /* PTL GPIO */ |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 328 | PINMUX_DATA(PTL7_DATA, PTL7_IN, PTL7_OUT), |
| 329 | PINMUX_DATA(PTL6_DATA, PTL6_IN, PTL6_OUT), |
| 330 | PINMUX_DATA(PTL5_DATA, PTL5_IN, PTL5_OUT), |
| 331 | PINMUX_DATA(PTL4_DATA, PTL4_IN, PTL4_OUT), |
| 332 | PINMUX_DATA(PTL3_DATA, PTL3_IN, PTL3_OUT), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 333 | |
| 334 | /* PTM GPIO */ |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 335 | PINMUX_DATA(PTM7_DATA, PTM7_IN, PTM7_OUT), |
| 336 | PINMUX_DATA(PTM6_DATA, PTM6_IN, PTM6_OUT), |
| 337 | PINMUX_DATA(PTM5_DATA, PTM5_IN, PTM5_OUT), |
| 338 | PINMUX_DATA(PTM4_DATA, PTM4_IN, PTM4_OUT), |
| 339 | PINMUX_DATA(PTM3_DATA, PTM3_IN, PTM3_OUT), |
| 340 | PINMUX_DATA(PTM2_DATA, PTM2_IN, PTM2_OUT), |
| 341 | PINMUX_DATA(PTM1_DATA, PTM1_IN, PTM1_OUT), |
| 342 | PINMUX_DATA(PTM0_DATA, PTM0_IN, PTM0_OUT), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 343 | |
| 344 | /* PTP GPIO */ |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 345 | PINMUX_DATA(PTP4_DATA, PTP4_IN, PTP4_OUT), |
| 346 | PINMUX_DATA(PTP3_DATA, PTP3_IN, PTP3_OUT), |
| 347 | PINMUX_DATA(PTP2_DATA, PTP2_IN, PTP2_OUT), |
| 348 | PINMUX_DATA(PTP1_DATA, PTP1_IN, PTP1_OUT), |
| 349 | PINMUX_DATA(PTP0_DATA, PTP0_IN, PTP0_OUT), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 350 | |
| 351 | /* PTR GPIO */ |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 352 | PINMUX_DATA(PTR7_DATA, PTR7_IN, PTR7_OUT), |
| 353 | PINMUX_DATA(PTR6_DATA, PTR6_IN, PTR6_OUT), |
| 354 | PINMUX_DATA(PTR5_DATA, PTR5_IN, PTR5_OUT), |
| 355 | PINMUX_DATA(PTR4_DATA, PTR4_IN, PTR4_OUT), |
| 356 | PINMUX_DATA(PTR3_DATA, PTR3_IN, PTR3_OUT), |
| 357 | PINMUX_DATA(PTR2_DATA, PTR2_IN, PTR2_OUT), |
| 358 | PINMUX_DATA(PTR1_DATA, PTR1_IN, PTR1_OUT), |
| 359 | PINMUX_DATA(PTR0_DATA, PTR0_IN, PTR0_OUT), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 360 | |
| 361 | /* PTS GPIO */ |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 362 | PINMUX_DATA(PTS4_DATA, PTS4_IN, PTS4_OUT), |
| 363 | PINMUX_DATA(PTS3_DATA, PTS3_IN, PTS3_OUT), |
| 364 | PINMUX_DATA(PTS2_DATA, PTS2_IN, PTS2_OUT), |
| 365 | PINMUX_DATA(PTS1_DATA, PTS1_IN, PTS1_OUT), |
| 366 | PINMUX_DATA(PTS0_DATA, PTS0_IN, PTS0_OUT), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 367 | |
| 368 | /* PTT GPIO */ |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 369 | PINMUX_DATA(PTT4_DATA, PTT4_IN, PTT4_OUT), |
| 370 | PINMUX_DATA(PTT3_DATA, PTT3_IN, PTT3_OUT), |
| 371 | PINMUX_DATA(PTT2_DATA, PTT2_IN, PTT2_OUT), |
| 372 | PINMUX_DATA(PTT1_DATA, PTT1_IN, PTT1_OUT), |
| 373 | PINMUX_DATA(PTT0_DATA, PTT0_IN, PTT0_OUT), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 374 | |
| 375 | /* PTU GPIO */ |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 376 | PINMUX_DATA(PTU4_DATA, PTU4_IN, PTU4_OUT), |
| 377 | PINMUX_DATA(PTU3_DATA, PTU3_IN, PTU3_OUT), |
| 378 | PINMUX_DATA(PTU2_DATA, PTU2_IN, PTU2_OUT), |
| 379 | PINMUX_DATA(PTU1_DATA, PTU1_IN, PTU1_OUT), |
| 380 | PINMUX_DATA(PTU0_DATA, PTU0_IN, PTU0_OUT), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 381 | |
| 382 | /* PTV GPIO */ |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 383 | PINMUX_DATA(PTV4_DATA, PTV4_IN, PTV4_OUT), |
| 384 | PINMUX_DATA(PTV3_DATA, PTV3_IN, PTV3_OUT), |
| 385 | PINMUX_DATA(PTV2_DATA, PTV2_IN, PTV2_OUT), |
| 386 | PINMUX_DATA(PTV1_DATA, PTV1_IN, PTV1_OUT), |
| 387 | PINMUX_DATA(PTV0_DATA, PTV0_IN, PTV0_OUT), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 388 | |
| 389 | /* PTA FN */ |
| 390 | PINMUX_DATA(D23_MARK, PTA7_FN), |
| 391 | PINMUX_DATA(D22_MARK, PTA6_FN), |
| 392 | PINMUX_DATA(D21_MARK, PTA5_FN), |
| 393 | PINMUX_DATA(D20_MARK, PTA4_FN), |
| 394 | PINMUX_DATA(D19_MARK, PTA3_FN), |
| 395 | PINMUX_DATA(D18_MARK, PTA2_FN), |
| 396 | PINMUX_DATA(D17_MARK, PTA1_FN), |
| 397 | PINMUX_DATA(D16_MARK, PTA0_FN), |
| 398 | |
| 399 | /* PTB FN */ |
| 400 | PINMUX_DATA(D31_MARK, PTB7_FN), |
| 401 | PINMUX_DATA(D30_MARK, PTB6_FN), |
| 402 | PINMUX_DATA(D29_MARK, PTB5_FN), |
| 403 | PINMUX_DATA(D28_MARK, PTB4_FN), |
| 404 | PINMUX_DATA(D27_MARK, PTB3_FN), |
| 405 | PINMUX_DATA(D26_MARK, PTB2_FN), |
| 406 | PINMUX_DATA(D25_MARK, PTB1_FN), |
| 407 | PINMUX_DATA(D24_MARK, PTB0_FN), |
| 408 | |
| 409 | /* PTC FN */ |
| 410 | PINMUX_DATA(LCD_DATA7_MARK, PTC7_FN), |
| 411 | PINMUX_DATA(LCD_DATA6_MARK, PTC6_FN), |
| 412 | PINMUX_DATA(LCD_DATA5_MARK, PTC5_FN), |
| 413 | PINMUX_DATA(LCD_DATA4_MARK, PTC4_FN), |
| 414 | PINMUX_DATA(LCD_DATA3_MARK, PTC3_FN), |
| 415 | PINMUX_DATA(LCD_DATA2_MARK, PTC2_FN), |
| 416 | PINMUX_DATA(LCD_DATA1_MARK, PTC1_FN), |
| 417 | PINMUX_DATA(LCD_DATA0_MARK, PTC0_FN), |
| 418 | |
| 419 | /* PTD FN */ |
| 420 | PINMUX_DATA(LCD_DATA15_MARK, PTD7_FN), |
| 421 | PINMUX_DATA(LCD_DATA14_MARK, PTD6_FN), |
| 422 | PINMUX_DATA(LCD_DATA13_MARK, PTD5_FN), |
| 423 | PINMUX_DATA(LCD_DATA12_MARK, PTD4_FN), |
| 424 | PINMUX_DATA(LCD_DATA11_MARK, PTD3_FN), |
| 425 | PINMUX_DATA(LCD_DATA10_MARK, PTD2_FN), |
| 426 | PINMUX_DATA(LCD_DATA9_MARK, PTD1_FN), |
| 427 | PINMUX_DATA(LCD_DATA8_MARK, PTD0_FN), |
| 428 | |
| 429 | /* PTE FN */ |
| 430 | PINMUX_DATA(IIC_SCL_MARK, PSELB_9_8_00, PTE6_FN), |
| 431 | PINMUX_DATA(AFE_RXIN_MARK, PSELB_9_8_11, PTE6_FN), |
| 432 | PINMUX_DATA(IIC_SDA_MARK, PSELB_9_8_00, PTE5_FN), |
| 433 | PINMUX_DATA(AFE_RDET_MARK, PSELB_9_8_11, PTE5_FN), |
| 434 | PINMUX_DATA(LCD_M_DISP_MARK, PTE4_FN), |
| 435 | PINMUX_DATA(LCD_CL1_MARK, PTE3_FN), |
| 436 | PINMUX_DATA(LCD_CL2_MARK, PTE2_FN), |
| 437 | PINMUX_DATA(LCD_DON_MARK, PTE1_FN), |
| 438 | PINMUX_DATA(LCD_FLM_MARK, PTE0_FN), |
| 439 | |
| 440 | /* PTF FN */ |
| 441 | PINMUX_DATA(DA1_MARK, PTF6_FN), |
| 442 | PINMUX_DATA(DA0_MARK, PTF5_FN), |
| 443 | PINMUX_DATA(AN3_MARK, PTF4_FN), |
| 444 | PINMUX_DATA(AN2_MARK, PTF3_FN), |
| 445 | PINMUX_DATA(AN1_MARK, PTF2_FN), |
| 446 | PINMUX_DATA(AN0_MARK, PTF1_FN), |
| 447 | PINMUX_DATA(ADTRG_MARK, PTF0_FN), |
| 448 | |
| 449 | /* PTG FN */ |
| 450 | PINMUX_DATA(USB1D_RCV_MARK, PSELA_3_2_00, PTG6_FN), |
| 451 | PINMUX_DATA(AFE_FS_MARK, PSELA_3_2_01, PTG6_FN), |
| 452 | PINMUX_DATA(PCC_REG_MARK, PSELA_3_2_10, PTG6_FN), |
| 453 | PINMUX_DATA(IRQ5_MARK, PSELA_3_2_11, PTG6_FN), |
| 454 | PINMUX_DATA(USB1D_TXSE0_MARK, PSELA_5_4_00, PTG5_FN), |
| 455 | PINMUX_DATA(AFE_TXOUT_MARK, PSELA_5_4_01, PTG5_FN), |
| 456 | PINMUX_DATA(PCC_DRV_MARK, PSELA_5_4_10, PTG5_FN), |
| 457 | PINMUX_DATA(IRQ4_MARK, PSELA_5_4_11, PTG5_FN), |
| 458 | PINMUX_DATA(USB1D_TXDPLS_MARK, PSELA_7_6_00, PTG4_FN), |
| 459 | PINMUX_DATA(AFE_SCLK_MARK, PSELA_7_6_01, PTG4_FN), |
| 460 | PINMUX_DATA(IOIS16_MARK, PSELA_7_6_10, PTG4_FN), |
| 461 | PINMUX_DATA(USB1D_DMNS_MARK, PSELA_9_8_00, PTG3_FN), |
| 462 | PINMUX_DATA(AFE_RLYCNT_MARK, PSELA_9_8_01, PTG3_FN), |
| 463 | PINMUX_DATA(PCC_BVD2_MARK, PSELA_9_8_10, PTG3_FN), |
| 464 | PINMUX_DATA(USB1D_DPLS_MARK, PSELA_11_10_00, PTG2_FN), |
| 465 | PINMUX_DATA(AFE_HC1_MARK, PSELA_11_10_01, PTG2_FN), |
| 466 | PINMUX_DATA(PCC_BVD1_MARK, PSELA_11_10_10, PTG2_FN), |
| 467 | PINMUX_DATA(USB1D_SPEED_MARK, PSELA_13_12_00, PTG1_FN), |
| 468 | PINMUX_DATA(PCC_CD2_MARK, PSELA_13_12_10, PTG1_FN), |
| 469 | PINMUX_DATA(USB1D_TXENL_MARK, PSELA_15_14_00, PTG0_FN), |
| 470 | PINMUX_DATA(PCC_CD1_MARK, PSELA_15_14_10, PTG0_FN), |
| 471 | |
| 472 | /* PTH FN */ |
| 473 | PINMUX_DATA(RAS_MARK, PTH6_FN), |
| 474 | PINMUX_DATA(CAS_MARK, PTH5_FN), |
| 475 | PINMUX_DATA(CKE_MARK, PTH4_FN), |
| 476 | PINMUX_DATA(STATUS1_MARK, PTH3_FN), |
| 477 | PINMUX_DATA(STATUS0_MARK, PTH2_FN), |
| 478 | PINMUX_DATA(USB2_PWR_EN_MARK, PTH1_FN), |
| 479 | PINMUX_DATA(USB1_PWR_EN_USBF_UPLUP_MARK, PTH0_FN), |
| 480 | |
| 481 | /* PTJ FN */ |
| 482 | PINMUX_DATA(AUDCK_MARK, PTJ6_FN), |
| 483 | PINMUX_DATA(ASEBRKAK_MARK, PTJ5_FN), |
| 484 | PINMUX_DATA(AUDATA3_MARK, PTJ4_FN), |
| 485 | PINMUX_DATA(AUDATA2_MARK, PTJ3_FN), |
| 486 | PINMUX_DATA(AUDATA1_MARK, PTJ2_FN), |
| 487 | PINMUX_DATA(AUDATA0_MARK, PTJ1_FN), |
| 488 | PINMUX_DATA(AUDSYNC_MARK, PTJ0_FN), |
| 489 | |
| 490 | /* PTK FN */ |
| 491 | PINMUX_DATA(PCC_RESET_MARK, PTK3_FN), |
| 492 | PINMUX_DATA(PCC_RDY_MARK, PTK2_FN), |
| 493 | PINMUX_DATA(PCC_VS2_MARK, PTK1_FN), |
| 494 | PINMUX_DATA(PCC_VS1_MARK, PTK0_FN), |
| 495 | |
| 496 | /* PTL FN */ |
| 497 | PINMUX_DATA(TRST_MARK, PTL7_FN), |
| 498 | PINMUX_DATA(TMS_MARK, PTL6_FN), |
| 499 | PINMUX_DATA(TDO_MARK, PTL5_FN), |
| 500 | PINMUX_DATA(TDI_MARK, PTL4_FN), |
| 501 | PINMUX_DATA(TCK_MARK, PTL3_FN), |
| 502 | |
| 503 | /* PTM FN */ |
| 504 | PINMUX_DATA(DREQ1_MARK, PTM7_FN), |
| 505 | PINMUX_DATA(DREQ0_MARK, PTM6_FN), |
| 506 | PINMUX_DATA(DACK1_MARK, PTM5_FN), |
| 507 | PINMUX_DATA(DACK0_MARK, PTM4_FN), |
| 508 | PINMUX_DATA(TEND1_MARK, PTM3_FN), |
| 509 | PINMUX_DATA(TEND0_MARK, PTM2_FN), |
| 510 | PINMUX_DATA(CS5B_CE1A_MARK, PTM1_FN), |
| 511 | PINMUX_DATA(CS6B_CE1B_MARK, PTM0_FN), |
| 512 | |
| 513 | /* PTP FN */ |
| 514 | PINMUX_DATA(USB1D_SUSPEND_MARK, PSELA_1_0_00, PTP4_FN), |
| 515 | PINMUX_DATA(REFOUT_MARK, PSELA_1_0_01, PTP4_FN), |
| 516 | PINMUX_DATA(IRQOUT_MARK, PSELA_1_0_10, PTP4_FN), |
| 517 | PINMUX_DATA(IRQ3_IRL3_MARK, PTP3_FN), |
| 518 | PINMUX_DATA(IRQ2_IRL2_MARK, PTP2_FN), |
| 519 | PINMUX_DATA(IRQ1_IRL1_MARK, PTP1_FN), |
| 520 | PINMUX_DATA(IRQ0_IRL0_MARK, PTP0_FN), |
| 521 | |
| 522 | /* PTR FN */ |
| 523 | PINMUX_DATA(A25_MARK, PTR7_FN), |
| 524 | PINMUX_DATA(A24_MARK, PTR6_FN), |
| 525 | PINMUX_DATA(A23_MARK, PTR5_FN), |
| 526 | PINMUX_DATA(A22_MARK, PTR4_FN), |
| 527 | PINMUX_DATA(A21_MARK, PTR3_FN), |
| 528 | PINMUX_DATA(A20_MARK, PTR2_FN), |
| 529 | PINMUX_DATA(A19_MARK, PTR1_FN), |
| 530 | PINMUX_DATA(A0_MARK, PTR0_FN), |
| 531 | |
| 532 | /* PTS FN */ |
| 533 | PINMUX_DATA(SIOF0_SYNC_MARK, PTS4_FN), |
| 534 | PINMUX_DATA(SIOF0_MCLK_MARK, PTS3_FN), |
| 535 | PINMUX_DATA(SIOF0_TXD_MARK, PTS2_FN), |
| 536 | PINMUX_DATA(SIOF0_RXD_MARK, PTS1_FN), |
| 537 | PINMUX_DATA(SIOF0_SCK_MARK, PTS0_FN), |
| 538 | |
| 539 | /* PTT FN */ |
| 540 | PINMUX_DATA(SCIF0_CTS_MARK, PSELB_15_14_00, PTT4_FN), |
| 541 | PINMUX_DATA(TPU_TO1_MARK, PSELB_15_14_11, PTT4_FN), |
| 542 | PINMUX_DATA(SCIF0_RTS_MARK, PSELB_15_14_00, PTT3_FN), |
| 543 | PINMUX_DATA(TPU_TO0_MARK, PSELB_15_14_11, PTT3_FN), |
| 544 | PINMUX_DATA(SCIF0_TXD_MARK, PTT2_FN), |
| 545 | PINMUX_DATA(SCIF0_RXD_MARK, PTT1_FN), |
| 546 | PINMUX_DATA(SCIF0_SCK_MARK, PTT0_FN), |
| 547 | |
| 548 | /* PTU FN */ |
| 549 | PINMUX_DATA(SIOF1_SYNC_MARK, PTU4_FN), |
| 550 | PINMUX_DATA(SIOF1_MCLK_MARK, PSELD_11_10_00, PTU3_FN), |
| 551 | PINMUX_DATA(TPU_TI3B_MARK, PSELD_11_10_01, PTU3_FN), |
| 552 | PINMUX_DATA(SIOF1_TXD_MARK, PSELD_15_14_00, PTU2_FN), |
| 553 | PINMUX_DATA(TPU_TI3A_MARK, PSELD_15_14_01, PTU2_FN), |
| 554 | PINMUX_DATA(MMC_DAT_MARK, PSELD_15_14_10, PTU2_FN), |
| 555 | PINMUX_DATA(SIOF1_RXD_MARK, PSELC_13_12_00, PTU1_FN), |
| 556 | PINMUX_DATA(TPU_TI2B_MARK, PSELC_13_12_01, PTU1_FN), |
| 557 | PINMUX_DATA(MMC_CMD_MARK, PSELC_13_12_10, PTU1_FN), |
| 558 | PINMUX_DATA(SIOF1_SCK_MARK, PSELC_15_14_00, PTU0_FN), |
| 559 | PINMUX_DATA(TPU_TI2A_MARK, PSELC_15_14_01, PTU0_FN), |
| 560 | PINMUX_DATA(MMC_CLK_MARK, PSELC_15_14_10, PTU0_FN), |
| 561 | |
| 562 | /* PTV FN */ |
| 563 | PINMUX_DATA(SCIF1_CTS_MARK, PSELB_11_10_00, PTV4_FN), |
| 564 | PINMUX_DATA(TPU_TO3_MARK, PSELB_11_10_01, PTV4_FN), |
| 565 | PINMUX_DATA(MMC_VDDON_MARK, PSELB_11_10_10, PTV4_FN), |
| 566 | PINMUX_DATA(LCD_VEPWC_MARK, PSELB_11_10_11, PTV4_FN), |
| 567 | PINMUX_DATA(SCIF1_RTS_MARK, PSELB_13_12_00, PTV3_FN), |
| 568 | PINMUX_DATA(TPU_TO2_MARK, PSELB_13_12_01, PTV3_FN), |
| 569 | PINMUX_DATA(MMC_ODMOD_MARK, PSELB_13_12_10, PTV3_FN), |
| 570 | PINMUX_DATA(LCD_VCPWC_MARK, PSELB_13_12_11, PTV3_FN), |
| 571 | PINMUX_DATA(SCIF1_TXD_MARK, PSELC_9_8_00, PTV2_FN), |
| 572 | PINMUX_DATA(SIM_D_MARK, PSELC_9_8_10, PTV2_FN), |
| 573 | PINMUX_DATA(SCIF1_RXD_MARK, PSELC_11_10_00, PTV1_FN), |
| 574 | PINMUX_DATA(SIM_RST_MARK, PSELC_11_10_10, PTV1_FN), |
| 575 | PINMUX_DATA(SCIF1_SCK_MARK, PSELD_1_0_00, PTV0_FN), |
| 576 | PINMUX_DATA(SIM_CLK_MARK, PSELD_1_0_10, PTV0_FN), |
| 577 | }; |
| 578 | |
Laurent Pinchart | f41a1ef | 2013-12-16 20:25:16 +0100 | [diff] [blame] | 579 | static const struct sh_pfc_pin pinmux_pins[] = { |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 580 | /* PTA */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 581 | PINMUX_GPIO(PTA7), |
| 582 | PINMUX_GPIO(PTA6), |
| 583 | PINMUX_GPIO(PTA5), |
| 584 | PINMUX_GPIO(PTA4), |
| 585 | PINMUX_GPIO(PTA3), |
| 586 | PINMUX_GPIO(PTA2), |
| 587 | PINMUX_GPIO(PTA1), |
| 588 | PINMUX_GPIO(PTA0), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 589 | |
| 590 | /* PTB */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 591 | PINMUX_GPIO(PTB7), |
| 592 | PINMUX_GPIO(PTB6), |
| 593 | PINMUX_GPIO(PTB5), |
| 594 | PINMUX_GPIO(PTB4), |
| 595 | PINMUX_GPIO(PTB3), |
| 596 | PINMUX_GPIO(PTB2), |
| 597 | PINMUX_GPIO(PTB1), |
| 598 | PINMUX_GPIO(PTB0), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 599 | |
| 600 | /* PTC */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 601 | PINMUX_GPIO(PTC7), |
| 602 | PINMUX_GPIO(PTC6), |
| 603 | PINMUX_GPIO(PTC5), |
| 604 | PINMUX_GPIO(PTC4), |
| 605 | PINMUX_GPIO(PTC3), |
| 606 | PINMUX_GPIO(PTC2), |
| 607 | PINMUX_GPIO(PTC1), |
| 608 | PINMUX_GPIO(PTC0), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 609 | |
| 610 | /* PTD */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 611 | PINMUX_GPIO(PTD7), |
| 612 | PINMUX_GPIO(PTD6), |
| 613 | PINMUX_GPIO(PTD5), |
| 614 | PINMUX_GPIO(PTD4), |
| 615 | PINMUX_GPIO(PTD3), |
| 616 | PINMUX_GPIO(PTD2), |
| 617 | PINMUX_GPIO(PTD1), |
| 618 | PINMUX_GPIO(PTD0), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 619 | |
| 620 | /* PTE */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 621 | PINMUX_GPIO(PTE6), |
| 622 | PINMUX_GPIO(PTE5), |
| 623 | PINMUX_GPIO(PTE4), |
| 624 | PINMUX_GPIO(PTE3), |
| 625 | PINMUX_GPIO(PTE2), |
| 626 | PINMUX_GPIO(PTE1), |
| 627 | PINMUX_GPIO(PTE0), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 628 | |
| 629 | /* PTF */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 630 | PINMUX_GPIO(PTF6), |
| 631 | PINMUX_GPIO(PTF5), |
| 632 | PINMUX_GPIO(PTF4), |
| 633 | PINMUX_GPIO(PTF3), |
| 634 | PINMUX_GPIO(PTF2), |
| 635 | PINMUX_GPIO(PTF1), |
| 636 | PINMUX_GPIO(PTF0), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 637 | |
| 638 | /* PTG */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 639 | PINMUX_GPIO(PTG6), |
| 640 | PINMUX_GPIO(PTG5), |
| 641 | PINMUX_GPIO(PTG4), |
| 642 | PINMUX_GPIO(PTG3), |
| 643 | PINMUX_GPIO(PTG2), |
| 644 | PINMUX_GPIO(PTG1), |
| 645 | PINMUX_GPIO(PTG0), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 646 | |
| 647 | /* PTH */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 648 | PINMUX_GPIO(PTH6), |
| 649 | PINMUX_GPIO(PTH5), |
| 650 | PINMUX_GPIO(PTH4), |
| 651 | PINMUX_GPIO(PTH3), |
| 652 | PINMUX_GPIO(PTH2), |
| 653 | PINMUX_GPIO(PTH1), |
| 654 | PINMUX_GPIO(PTH0), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 655 | |
| 656 | /* PTJ */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 657 | PINMUX_GPIO(PTJ6), |
| 658 | PINMUX_GPIO(PTJ5), |
| 659 | PINMUX_GPIO(PTJ4), |
| 660 | PINMUX_GPIO(PTJ3), |
| 661 | PINMUX_GPIO(PTJ2), |
| 662 | PINMUX_GPIO(PTJ1), |
| 663 | PINMUX_GPIO(PTJ0), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 664 | |
| 665 | /* PTK */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 666 | PINMUX_GPIO(PTK3), |
| 667 | PINMUX_GPIO(PTK2), |
| 668 | PINMUX_GPIO(PTK1), |
| 669 | PINMUX_GPIO(PTK0), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 670 | |
| 671 | /* PTL */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 672 | PINMUX_GPIO(PTL7), |
| 673 | PINMUX_GPIO(PTL6), |
| 674 | PINMUX_GPIO(PTL5), |
| 675 | PINMUX_GPIO(PTL4), |
| 676 | PINMUX_GPIO(PTL3), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 677 | |
| 678 | /* PTM */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 679 | PINMUX_GPIO(PTM7), |
| 680 | PINMUX_GPIO(PTM6), |
| 681 | PINMUX_GPIO(PTM5), |
| 682 | PINMUX_GPIO(PTM4), |
| 683 | PINMUX_GPIO(PTM3), |
| 684 | PINMUX_GPIO(PTM2), |
| 685 | PINMUX_GPIO(PTM1), |
| 686 | PINMUX_GPIO(PTM0), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 687 | |
| 688 | /* PTP */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 689 | PINMUX_GPIO(PTP4), |
| 690 | PINMUX_GPIO(PTP3), |
| 691 | PINMUX_GPIO(PTP2), |
| 692 | PINMUX_GPIO(PTP1), |
| 693 | PINMUX_GPIO(PTP0), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 694 | |
| 695 | /* PTR */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 696 | PINMUX_GPIO(PTR7), |
| 697 | PINMUX_GPIO(PTR6), |
| 698 | PINMUX_GPIO(PTR5), |
| 699 | PINMUX_GPIO(PTR4), |
| 700 | PINMUX_GPIO(PTR3), |
| 701 | PINMUX_GPIO(PTR2), |
| 702 | PINMUX_GPIO(PTR1), |
| 703 | PINMUX_GPIO(PTR0), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 704 | |
| 705 | /* PTS */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 706 | PINMUX_GPIO(PTS4), |
| 707 | PINMUX_GPIO(PTS3), |
| 708 | PINMUX_GPIO(PTS2), |
| 709 | PINMUX_GPIO(PTS1), |
| 710 | PINMUX_GPIO(PTS0), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 711 | |
| 712 | /* PTT */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 713 | PINMUX_GPIO(PTT4), |
| 714 | PINMUX_GPIO(PTT3), |
| 715 | PINMUX_GPIO(PTT2), |
| 716 | PINMUX_GPIO(PTT1), |
| 717 | PINMUX_GPIO(PTT0), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 718 | |
| 719 | /* PTU */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 720 | PINMUX_GPIO(PTU4), |
| 721 | PINMUX_GPIO(PTU3), |
| 722 | PINMUX_GPIO(PTU2), |
| 723 | PINMUX_GPIO(PTU1), |
| 724 | PINMUX_GPIO(PTU0), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 725 | |
| 726 | /* PTV */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 727 | PINMUX_GPIO(PTV4), |
| 728 | PINMUX_GPIO(PTV3), |
| 729 | PINMUX_GPIO(PTV2), |
| 730 | PINMUX_GPIO(PTV1), |
| 731 | PINMUX_GPIO(PTV0), |
Laurent Pinchart | a373ed0 | 2012-11-29 13:24:07 +0100 | [diff] [blame] | 732 | }; |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 733 | |
Laurent Pinchart | a373ed0 | 2012-11-29 13:24:07 +0100 | [diff] [blame] | 734 | #define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins) |
| 735 | |
Laurent Pinchart | cd3c1be | 2013-02-16 18:47:05 +0100 | [diff] [blame] | 736 | static const struct pinmux_func pinmux_func_gpios[] = { |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 737 | /* BSC */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 738 | GPIO_FN(D31), |
| 739 | GPIO_FN(D30), |
| 740 | GPIO_FN(D29), |
| 741 | GPIO_FN(D28), |
| 742 | GPIO_FN(D27), |
| 743 | GPIO_FN(D26), |
| 744 | GPIO_FN(D25), |
| 745 | GPIO_FN(D24), |
| 746 | GPIO_FN(D23), |
| 747 | GPIO_FN(D22), |
| 748 | GPIO_FN(D21), |
| 749 | GPIO_FN(D20), |
| 750 | GPIO_FN(D19), |
| 751 | GPIO_FN(D18), |
| 752 | GPIO_FN(D17), |
| 753 | GPIO_FN(D16), |
| 754 | GPIO_FN(IOIS16), |
| 755 | GPIO_FN(RAS), |
| 756 | GPIO_FN(CAS), |
| 757 | GPIO_FN(CKE), |
| 758 | GPIO_FN(CS5B_CE1A), |
| 759 | GPIO_FN(CS6B_CE1B), |
| 760 | GPIO_FN(A25), |
| 761 | GPIO_FN(A24), |
| 762 | GPIO_FN(A23), |
| 763 | GPIO_FN(A22), |
| 764 | GPIO_FN(A21), |
| 765 | GPIO_FN(A20), |
| 766 | GPIO_FN(A19), |
| 767 | GPIO_FN(A0), |
| 768 | GPIO_FN(REFOUT), |
| 769 | GPIO_FN(IRQOUT), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 770 | |
| 771 | /* LCDC */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 772 | GPIO_FN(LCD_DATA15), |
| 773 | GPIO_FN(LCD_DATA14), |
| 774 | GPIO_FN(LCD_DATA13), |
| 775 | GPIO_FN(LCD_DATA12), |
| 776 | GPIO_FN(LCD_DATA11), |
| 777 | GPIO_FN(LCD_DATA10), |
| 778 | GPIO_FN(LCD_DATA9), |
| 779 | GPIO_FN(LCD_DATA8), |
| 780 | GPIO_FN(LCD_DATA7), |
| 781 | GPIO_FN(LCD_DATA6), |
| 782 | GPIO_FN(LCD_DATA5), |
| 783 | GPIO_FN(LCD_DATA4), |
| 784 | GPIO_FN(LCD_DATA3), |
| 785 | GPIO_FN(LCD_DATA2), |
| 786 | GPIO_FN(LCD_DATA1), |
| 787 | GPIO_FN(LCD_DATA0), |
| 788 | GPIO_FN(LCD_M_DISP), |
| 789 | GPIO_FN(LCD_CL1), |
| 790 | GPIO_FN(LCD_CL2), |
| 791 | GPIO_FN(LCD_DON), |
| 792 | GPIO_FN(LCD_FLM), |
| 793 | GPIO_FN(LCD_VEPWC), |
| 794 | GPIO_FN(LCD_VCPWC), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 795 | |
| 796 | /* AFEIF */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 797 | GPIO_FN(AFE_RXIN), |
| 798 | GPIO_FN(AFE_RDET), |
| 799 | GPIO_FN(AFE_FS), |
| 800 | GPIO_FN(AFE_TXOUT), |
| 801 | GPIO_FN(AFE_SCLK), |
| 802 | GPIO_FN(AFE_RLYCNT), |
| 803 | GPIO_FN(AFE_HC1), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 804 | |
| 805 | /* IIC */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 806 | GPIO_FN(IIC_SCL), |
| 807 | GPIO_FN(IIC_SDA), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 808 | |
| 809 | /* DAC */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 810 | GPIO_FN(DA1), |
| 811 | GPIO_FN(DA0), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 812 | |
| 813 | /* ADC */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 814 | GPIO_FN(AN3), |
| 815 | GPIO_FN(AN2), |
| 816 | GPIO_FN(AN1), |
| 817 | GPIO_FN(AN0), |
| 818 | GPIO_FN(ADTRG), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 819 | |
| 820 | /* USB */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 821 | GPIO_FN(USB1D_RCV), |
| 822 | GPIO_FN(USB1D_TXSE0), |
| 823 | GPIO_FN(USB1D_TXDPLS), |
| 824 | GPIO_FN(USB1D_DMNS), |
| 825 | GPIO_FN(USB1D_DPLS), |
| 826 | GPIO_FN(USB1D_SPEED), |
| 827 | GPIO_FN(USB1D_TXENL), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 828 | |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 829 | GPIO_FN(USB2_PWR_EN), |
| 830 | GPIO_FN(USB1_PWR_EN_USBF_UPLUP), |
| 831 | GPIO_FN(USB1D_SUSPEND), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 832 | |
| 833 | /* INTC */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 834 | GPIO_FN(IRQ5), |
| 835 | GPIO_FN(IRQ4), |
| 836 | GPIO_FN(IRQ3_IRL3), |
| 837 | GPIO_FN(IRQ2_IRL2), |
| 838 | GPIO_FN(IRQ1_IRL1), |
| 839 | GPIO_FN(IRQ0_IRL0), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 840 | |
| 841 | /* PCC */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 842 | GPIO_FN(PCC_REG), |
| 843 | GPIO_FN(PCC_DRV), |
| 844 | GPIO_FN(PCC_BVD2), |
| 845 | GPIO_FN(PCC_BVD1), |
| 846 | GPIO_FN(PCC_CD2), |
| 847 | GPIO_FN(PCC_CD1), |
| 848 | GPIO_FN(PCC_RESET), |
| 849 | GPIO_FN(PCC_RDY), |
| 850 | GPIO_FN(PCC_VS2), |
| 851 | GPIO_FN(PCC_VS1), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 852 | |
| 853 | /* HUDI */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 854 | GPIO_FN(AUDATA3), |
| 855 | GPIO_FN(AUDATA2), |
| 856 | GPIO_FN(AUDATA1), |
| 857 | GPIO_FN(AUDATA0), |
| 858 | GPIO_FN(AUDCK), |
| 859 | GPIO_FN(AUDSYNC), |
| 860 | GPIO_FN(ASEBRKAK), |
| 861 | GPIO_FN(TRST), |
| 862 | GPIO_FN(TMS), |
| 863 | GPIO_FN(TDO), |
| 864 | GPIO_FN(TDI), |
| 865 | GPIO_FN(TCK), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 866 | |
| 867 | /* DMAC */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 868 | GPIO_FN(DACK1), |
| 869 | GPIO_FN(DREQ1), |
| 870 | GPIO_FN(DACK0), |
| 871 | GPIO_FN(DREQ0), |
| 872 | GPIO_FN(TEND1), |
| 873 | GPIO_FN(TEND0), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 874 | |
| 875 | /* SIOF0 */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 876 | GPIO_FN(SIOF0_SYNC), |
| 877 | GPIO_FN(SIOF0_MCLK), |
| 878 | GPIO_FN(SIOF0_TXD), |
| 879 | GPIO_FN(SIOF0_RXD), |
| 880 | GPIO_FN(SIOF0_SCK), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 881 | |
| 882 | /* SIOF1 */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 883 | GPIO_FN(SIOF1_SYNC), |
| 884 | GPIO_FN(SIOF1_MCLK), |
| 885 | GPIO_FN(SIOF1_TXD), |
| 886 | GPIO_FN(SIOF1_RXD), |
| 887 | GPIO_FN(SIOF1_SCK), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 888 | |
| 889 | /* SCIF0 */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 890 | GPIO_FN(SCIF0_TXD), |
| 891 | GPIO_FN(SCIF0_RXD), |
| 892 | GPIO_FN(SCIF0_RTS), |
| 893 | GPIO_FN(SCIF0_CTS), |
| 894 | GPIO_FN(SCIF0_SCK), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 895 | |
| 896 | /* SCIF1 */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 897 | GPIO_FN(SCIF1_TXD), |
| 898 | GPIO_FN(SCIF1_RXD), |
| 899 | GPIO_FN(SCIF1_RTS), |
| 900 | GPIO_FN(SCIF1_CTS), |
| 901 | GPIO_FN(SCIF1_SCK), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 902 | |
| 903 | /* TPU */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 904 | GPIO_FN(TPU_TO1), |
| 905 | GPIO_FN(TPU_TO0), |
| 906 | GPIO_FN(TPU_TI3B), |
| 907 | GPIO_FN(TPU_TI3A), |
| 908 | GPIO_FN(TPU_TI2B), |
| 909 | GPIO_FN(TPU_TI2A), |
| 910 | GPIO_FN(TPU_TO3), |
| 911 | GPIO_FN(TPU_TO2), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 912 | |
| 913 | /* SIM */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 914 | GPIO_FN(SIM_D), |
| 915 | GPIO_FN(SIM_CLK), |
| 916 | GPIO_FN(SIM_RST), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 917 | |
| 918 | /* MMC */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 919 | GPIO_FN(MMC_DAT), |
| 920 | GPIO_FN(MMC_CMD), |
| 921 | GPIO_FN(MMC_CLK), |
| 922 | GPIO_FN(MMC_VDDON), |
| 923 | GPIO_FN(MMC_ODMOD), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 924 | |
| 925 | /* SYSC */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 926 | GPIO_FN(STATUS0), |
| 927 | GPIO_FN(STATUS1), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 928 | }; |
| 929 | |
Laurent Pinchart | cd3c1be | 2013-02-16 18:47:05 +0100 | [diff] [blame] | 930 | static const struct pinmux_cfg_reg pinmux_config_regs[] = { |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 931 | { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) { |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 932 | PTA7_FN, PTA7_OUT, 0, PTA7_IN, |
| 933 | PTA6_FN, PTA6_OUT, 0, PTA6_IN, |
| 934 | PTA5_FN, PTA5_OUT, 0, PTA5_IN, |
| 935 | PTA4_FN, PTA4_OUT, 0, PTA4_IN, |
| 936 | PTA3_FN, PTA3_OUT, 0, PTA3_IN, |
| 937 | PTA2_FN, PTA2_OUT, 0, PTA2_IN, |
| 938 | PTA1_FN, PTA1_OUT, 0, PTA1_IN, |
| 939 | PTA0_FN, PTA0_OUT, 0, PTA0_IN } |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 940 | }, |
| 941 | { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2) { |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 942 | PTB7_FN, PTB7_OUT, 0, PTB7_IN, |
| 943 | PTB6_FN, PTB6_OUT, 0, PTB6_IN, |
| 944 | PTB5_FN, PTB5_OUT, 0, PTB5_IN, |
| 945 | PTB4_FN, PTB4_OUT, 0, PTB4_IN, |
| 946 | PTB3_FN, PTB3_OUT, 0, PTB3_IN, |
| 947 | PTB2_FN, PTB2_OUT, 0, PTB2_IN, |
| 948 | PTB1_FN, PTB1_OUT, 0, PTB1_IN, |
| 949 | PTB0_FN, PTB0_OUT, 0, PTB0_IN } |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 950 | }, |
| 951 | { PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2) { |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 952 | PTC7_FN, PTC7_OUT, 0, PTC7_IN, |
| 953 | PTC6_FN, PTC6_OUT, 0, PTC6_IN, |
| 954 | PTC5_FN, PTC5_OUT, 0, PTC5_IN, |
| 955 | PTC4_FN, PTC4_OUT, 0, PTC4_IN, |
| 956 | PTC3_FN, PTC3_OUT, 0, PTC3_IN, |
| 957 | PTC2_FN, PTC2_OUT, 0, PTC2_IN, |
| 958 | PTC1_FN, PTC1_OUT, 0, PTC1_IN, |
| 959 | PTC0_FN, PTC0_OUT, 0, PTC0_IN } |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 960 | }, |
| 961 | { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2) { |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 962 | PTD7_FN, PTD7_OUT, 0, PTD7_IN, |
| 963 | PTD6_FN, PTD6_OUT, 0, PTD6_IN, |
| 964 | PTD5_FN, PTD5_OUT, 0, PTD5_IN, |
| 965 | PTD4_FN, PTD4_OUT, 0, PTD4_IN, |
| 966 | PTD3_FN, PTD3_OUT, 0, PTD3_IN, |
| 967 | PTD2_FN, PTD2_OUT, 0, PTD2_IN, |
| 968 | PTD1_FN, PTD1_OUT, 0, PTD1_IN, |
| 969 | PTD0_FN, PTD0_OUT, 0, PTD0_IN } |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 970 | }, |
| 971 | { PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2) { |
| 972 | 0, 0, 0, 0, |
| 973 | PTE6_FN, 0, 0, PTE6_IN, |
| 974 | PTE5_FN, 0, 0, PTE5_IN, |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 975 | PTE4_FN, PTE4_OUT, 0, PTE4_IN, |
| 976 | PTE3_FN, PTE3_OUT, 0, PTE3_IN, |
| 977 | PTE2_FN, PTE2_OUT, 0, PTE2_IN, |
| 978 | PTE1_FN, PTE1_OUT, 0, PTE1_IN, |
| 979 | PTE0_FN, PTE0_OUT, 0, PTE0_IN } |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 980 | }, |
| 981 | { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2) { |
| 982 | 0, 0, 0, 0, |
| 983 | PTF6_FN, 0, 0, PTF6_IN, |
| 984 | PTF5_FN, 0, 0, PTF5_IN, |
| 985 | PTF4_FN, 0, 0, PTF4_IN, |
| 986 | PTF3_FN, 0, 0, PTF3_IN, |
| 987 | PTF2_FN, 0, 0, PTF2_IN, |
| 988 | PTF1_FN, 0, 0, PTF1_IN, |
| 989 | PTF0_FN, 0, 0, PTF0_IN } |
| 990 | }, |
| 991 | { PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2) { |
| 992 | 0, 0, 0, 0, |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 993 | PTG6_FN, PTG6_OUT, 0, PTG6_IN, |
| 994 | PTG5_FN, PTG5_OUT, 0, PTG5_IN, |
| 995 | PTG4_FN, PTG4_OUT, 0, PTG4_IN, |
| 996 | PTG3_FN, PTG3_OUT, 0, PTG3_IN, |
| 997 | PTG2_FN, PTG2_OUT, 0, PTG2_IN, |
| 998 | PTG1_FN, PTG1_OUT, 0, PTG1_IN, |
| 999 | PTG0_FN, PTG0_OUT, 0, PTG0_IN } |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 1000 | }, |
| 1001 | { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2) { |
| 1002 | 0, 0, 0, 0, |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1003 | PTH6_FN, PTH6_OUT, 0, PTH6_IN, |
| 1004 | PTH5_FN, PTH5_OUT, 0, PTH5_IN, |
| 1005 | PTH4_FN, PTH4_OUT, 0, PTH4_IN, |
| 1006 | PTH3_FN, PTH3_OUT, 0, PTH3_IN, |
| 1007 | PTH2_FN, PTH2_OUT, 0, PTH2_IN, |
| 1008 | PTH1_FN, PTH1_OUT, 0, PTH1_IN, |
| 1009 | PTH0_FN, PTH0_OUT, 0, PTH0_IN } |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 1010 | }, |
| 1011 | { PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2) { |
| 1012 | 0, 0, 0, 0, |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1013 | PTJ6_FN, PTJ6_OUT, 0, PTJ6_IN, |
| 1014 | PTJ5_FN, PTJ5_OUT, 0, PTJ5_IN, |
| 1015 | PTJ4_FN, PTJ4_OUT, 0, PTJ4_IN, |
| 1016 | PTJ3_FN, PTJ3_OUT, 0, PTJ3_IN, |
| 1017 | PTJ2_FN, PTJ2_OUT, 0, PTJ2_IN, |
| 1018 | PTJ1_FN, PTJ1_OUT, 0, PTJ1_IN, |
| 1019 | PTJ0_FN, PTJ0_OUT, 0, PTJ0_IN } |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 1020 | }, |
| 1021 | { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2) { |
| 1022 | 0, 0, 0, 0, |
| 1023 | 0, 0, 0, 0, |
| 1024 | 0, 0, 0, 0, |
| 1025 | 0, 0, 0, 0, |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1026 | PTK3_FN, PTK3_OUT, 0, PTK3_IN, |
| 1027 | PTK2_FN, PTK2_OUT, 0, PTK2_IN, |
| 1028 | PTK1_FN, PTK1_OUT, 0, PTK1_IN, |
| 1029 | PTK0_FN, PTK0_OUT, 0, PTK0_IN } |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 1030 | }, |
| 1031 | { PINMUX_CFG_REG("PLCR", 0xa4050114, 16, 2) { |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1032 | PTL7_FN, PTL7_OUT, 0, PTL7_IN, |
| 1033 | PTL6_FN, PTL6_OUT, 0, PTL6_IN, |
| 1034 | PTL5_FN, PTL5_OUT, 0, PTL5_IN, |
| 1035 | PTL4_FN, PTL4_OUT, 0, PTL4_IN, |
| 1036 | PTL3_FN, PTL3_OUT, 0, PTL3_IN, |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 1037 | 0, 0, 0, 0, |
| 1038 | 0, 0, 0, 0, |
| 1039 | 0, 0, 0, 0 } |
| 1040 | }, |
| 1041 | { PINMUX_CFG_REG("PMCR", 0xa4050116, 16, 2) { |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1042 | PTM7_FN, PTM7_OUT, 0, PTM7_IN, |
| 1043 | PTM6_FN, PTM6_OUT, 0, PTM6_IN, |
| 1044 | PTM5_FN, PTM5_OUT, 0, PTM5_IN, |
| 1045 | PTM4_FN, PTM4_OUT, 0, PTM4_IN, |
| 1046 | PTM3_FN, PTM3_OUT, 0, PTM3_IN, |
| 1047 | PTM2_FN, PTM2_OUT, 0, PTM2_IN, |
| 1048 | PTM1_FN, PTM1_OUT, 0, PTM1_IN, |
| 1049 | PTM0_FN, PTM0_OUT, 0, PTM0_IN } |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 1050 | }, |
| 1051 | { PINMUX_CFG_REG("PPCR", 0xa4050118, 16, 2) { |
| 1052 | 0, 0, 0, 0, |
| 1053 | 0, 0, 0, 0, |
| 1054 | 0, 0, 0, 0, |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1055 | PTP4_FN, PTP4_OUT, 0, PTP4_IN, |
| 1056 | PTP3_FN, PTP3_OUT, 0, PTP3_IN, |
| 1057 | PTP2_FN, PTP2_OUT, 0, PTP2_IN, |
| 1058 | PTP1_FN, PTP1_OUT, 0, PTP1_IN, |
| 1059 | PTP0_FN, PTP0_OUT, 0, PTP0_IN } |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 1060 | }, |
| 1061 | { PINMUX_CFG_REG("PRCR", 0xa405011a, 16, 2) { |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1062 | PTR7_FN, PTR7_OUT, 0, PTR7_IN, |
| 1063 | PTR6_FN, PTR6_OUT, 0, PTR6_IN, |
| 1064 | PTR5_FN, PTR5_OUT, 0, PTR5_IN, |
| 1065 | PTR4_FN, PTR4_OUT, 0, PTR4_IN, |
| 1066 | PTR3_FN, PTR3_OUT, 0, PTR3_IN, |
| 1067 | PTR2_FN, PTR2_OUT, 0, PTR2_IN, |
| 1068 | PTR1_FN, PTR1_OUT, 0, PTR1_IN, |
| 1069 | PTR0_FN, PTR0_OUT, 0, PTR0_IN } |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 1070 | }, |
| 1071 | { PINMUX_CFG_REG("PSCR", 0xa405011c, 16, 2) { |
| 1072 | 0, 0, 0, 0, |
| 1073 | 0, 0, 0, 0, |
| 1074 | 0, 0, 0, 0, |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1075 | PTS4_FN, PTS4_OUT, 0, PTS4_IN, |
| 1076 | PTS3_FN, PTS3_OUT, 0, PTS3_IN, |
| 1077 | PTS2_FN, PTS2_OUT, 0, PTS2_IN, |
| 1078 | PTS1_FN, PTS1_OUT, 0, PTS1_IN, |
| 1079 | PTS0_FN, PTS0_OUT, 0, PTS0_IN } |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 1080 | }, |
| 1081 | { PINMUX_CFG_REG("PTCR", 0xa405011e, 16, 2) { |
| 1082 | 0, 0, 0, 0, |
| 1083 | 0, 0, 0, 0, |
| 1084 | 0, 0, 0, 0, |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1085 | PTT4_FN, PTT4_OUT, 0, PTT4_IN, |
| 1086 | PTT3_FN, PTT3_OUT, 0, PTT3_IN, |
| 1087 | PTT2_FN, PTT2_OUT, 0, PTT2_IN, |
| 1088 | PTT1_FN, PTT1_OUT, 0, PTT1_IN, |
| 1089 | PTT0_FN, PTT0_OUT, 0, PTT0_IN } |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 1090 | }, |
| 1091 | { PINMUX_CFG_REG("PUCR", 0xa4050120, 16, 2) { |
| 1092 | 0, 0, 0, 0, |
| 1093 | 0, 0, 0, 0, |
| 1094 | 0, 0, 0, 0, |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1095 | PTU4_FN, PTU4_OUT, 0, PTU4_IN, |
| 1096 | PTU3_FN, PTU3_OUT, 0, PTU3_IN, |
| 1097 | PTU2_FN, PTU2_OUT, 0, PTU2_IN, |
| 1098 | PTU1_FN, PTU1_OUT, 0, PTU1_IN, |
| 1099 | PTU0_FN, PTU0_OUT, 0, PTU0_IN } |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 1100 | }, |
| 1101 | { PINMUX_CFG_REG("PVCR", 0xa4050122, 16, 2) { |
| 1102 | 0, 0, 0, 0, |
| 1103 | 0, 0, 0, 0, |
| 1104 | 0, 0, 0, 0, |
Laurent Pinchart | 7f975b3 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1105 | PTV4_FN, PTV4_OUT, 0, PTV4_IN, |
| 1106 | PTV3_FN, PTV3_OUT, 0, PTV3_IN, |
| 1107 | PTV2_FN, PTV2_OUT, 0, PTV2_IN, |
| 1108 | PTV1_FN, PTV1_OUT, 0, PTV1_IN, |
| 1109 | PTV0_FN, PTV0_OUT, 0, PTV0_IN } |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 1110 | }, |
| 1111 | {} |
| 1112 | }; |
| 1113 | |
Laurent Pinchart | cd3c1be | 2013-02-16 18:47:05 +0100 | [diff] [blame] | 1114 | static const struct pinmux_data_reg pinmux_data_regs[] = { |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 1115 | { PINMUX_DATA_REG("PADR", 0xa4050140, 8) { |
| 1116 | PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA, |
| 1117 | PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA } |
| 1118 | }, |
| 1119 | { PINMUX_DATA_REG("PBDR", 0xa4050142, 8) { |
| 1120 | PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA, |
| 1121 | PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA } |
| 1122 | }, |
| 1123 | { PINMUX_DATA_REG("PCDR", 0xa4050144, 8) { |
| 1124 | PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA, |
| 1125 | PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA } |
| 1126 | }, |
| 1127 | { PINMUX_DATA_REG("PDDR", 0xa4050126, 8) { |
| 1128 | PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA, |
| 1129 | PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA } |
| 1130 | }, |
| 1131 | { PINMUX_DATA_REG("PEDR", 0xa4050148, 8) { |
| 1132 | 0, PTE6_DATA, PTE5_DATA, PTE4_DATA, |
| 1133 | PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA } |
| 1134 | }, |
| 1135 | { PINMUX_DATA_REG("PFDR", 0xa405014a, 8) { |
| 1136 | 0, PTF6_DATA, PTF5_DATA, PTF4_DATA, |
| 1137 | PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA } |
| 1138 | }, |
| 1139 | { PINMUX_DATA_REG("PGDR", 0xa405014c, 8) { |
| 1140 | 0, PTG6_DATA, PTG5_DATA, PTG4_DATA, |
| 1141 | PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA } |
| 1142 | }, |
| 1143 | { PINMUX_DATA_REG("PHDR", 0xa405014e, 8) { |
| 1144 | 0, PTH6_DATA, PTH5_DATA, PTH4_DATA, |
| 1145 | PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA } |
| 1146 | }, |
| 1147 | { PINMUX_DATA_REG("PJDR", 0xa4050150, 8) { |
| 1148 | 0, PTJ6_DATA, PTJ5_DATA, PTJ4_DATA, |
| 1149 | PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA } |
| 1150 | }, |
| 1151 | { PINMUX_DATA_REG("PKDR", 0xa4050152, 8) { |
| 1152 | 0, 0, 0, 0, |
| 1153 | PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA } |
| 1154 | }, |
| 1155 | { PINMUX_DATA_REG("PLDR", 0xa4050154, 8) { |
| 1156 | PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA, |
| 1157 | PTL3_DATA, 0, 0, 0 } |
| 1158 | }, |
| 1159 | { PINMUX_DATA_REG("PMDR", 0xa4050156, 8) { |
| 1160 | PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA, |
| 1161 | PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA } |
| 1162 | }, |
| 1163 | { PINMUX_DATA_REG("PPDR", 0xa4050158, 8) { |
| 1164 | 0, 0, 0, PTP4_DATA, |
| 1165 | PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA } |
| 1166 | }, |
| 1167 | { PINMUX_DATA_REG("PRDR", 0xa405015a, 8) { |
| 1168 | PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA, |
| 1169 | PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA } |
| 1170 | }, |
| 1171 | { PINMUX_DATA_REG("PSDR", 0xa405015c, 8) { |
| 1172 | 0, 0, 0, PTS4_DATA, |
| 1173 | PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA } |
| 1174 | }, |
| 1175 | { PINMUX_DATA_REG("PTDR", 0xa405015e, 8) { |
| 1176 | 0, 0, 0, PTT4_DATA, |
| 1177 | PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA } |
| 1178 | }, |
| 1179 | { PINMUX_DATA_REG("PUDR", 0xa4050160, 8) { |
| 1180 | 0, 0, 0, PTU4_DATA, |
| 1181 | PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA } |
| 1182 | }, |
| 1183 | { PINMUX_DATA_REG("PVDR", 0xa4050162, 8) { |
| 1184 | 0, 0, 0, PTV4_DATA, |
| 1185 | PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA } |
| 1186 | }, |
| 1187 | { }, |
| 1188 | }; |
| 1189 | |
Laurent Pinchart | cd3c1be | 2013-02-16 18:47:05 +0100 | [diff] [blame] | 1190 | const struct sh_pfc_soc_info sh7720_pinmux_info = { |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 1191 | .name = "sh7720_pfc", |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 1192 | .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 1193 | .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 1194 | .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, |
| 1195 | |
Laurent Pinchart | a373ed0 | 2012-11-29 13:24:07 +0100 | [diff] [blame] | 1196 | .pins = pinmux_pins, |
| 1197 | .nr_pins = ARRAY_SIZE(pinmux_pins), |
| 1198 | .func_gpios = pinmux_func_gpios, |
| 1199 | .nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios), |
Laurent Pinchart | d7a7ca5 | 2012-11-28 17:51:00 +0100 | [diff] [blame] | 1200 | |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 1201 | .cfg_regs = pinmux_config_regs, |
| 1202 | .data_regs = pinmux_data_regs, |
| 1203 | |
Geert Uytterhoeven | b8b47d6 | 2015-09-21 16:27:23 +0200 | [diff] [blame] | 1204 | .pinmux_data = pinmux_data, |
| 1205 | .pinmux_data_size = ARRAY_SIZE(pinmux_data), |
Laurent Pinchart | 74cad60 | 2012-12-15 23:51:32 +0100 | [diff] [blame] | 1206 | }; |