blob: e32e1742c9a11730bd287ecc93cd09f2c1b33f6d [file] [log] [blame]
Stephen Warren6d7d7b32012-01-06 10:43:22 +00001/*
2 * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17#ifndef __MACH_TEGRA_IRAMMAP_H
18#define __MACH_TEGRA_IRAMMAP_H
19
20#include <asm/sizes.h>
21
22/* The first 1K of IRAM is permanently reserved for the CPU reset handler */
23#define TEGRA_IRAM_RESET_HANDLER_OFFSET 0
24#define TEGRA_IRAM_RESET_HANDLER_SIZE SZ_1K
25
Stephen Warrenfddb7702013-08-20 16:19:15 -060026/*
27 * This area is used for LPx resume vector, only while LPx power state is
28 * active. At other times, the AVP may use this area for arbitrary purposes
29 */
30#define TEGRA_IRAM_LPx_RESUME_AREA (TEGRA_IRAM_BASE + SZ_4K)
31
Stephen Warren6d7d7b32012-01-06 10:43:22 +000032#endif