Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/arm/mm/alignment.c |
| 3 | * |
| 4 | * Copyright (C) 1995 Linus Torvalds |
| 5 | * Modifications for ARM processor (c) 1995-2001 Russell King |
Simon Arlott | 6cbdc8c | 2007-05-11 20:40:30 +0100 | [diff] [blame] | 6 | * Thumb alignment fault fixups (c) 2004 MontaVista Software, Inc. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 | * - Adapted from gdb/sim/arm/thumbemu.c -- Thumb instruction emulation. |
| 8 | * Copyright (C) 1996, Cygnus Software Technologies Ltd. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License version 2 as |
| 12 | * published by the Free Software Foundation. |
| 13 | */ |
Russell King | d944d54 | 2010-02-20 16:13:29 +0000 | [diff] [blame] | 14 | #include <linux/moduleparam.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 15 | #include <linux/compiler.h> |
| 16 | #include <linux/kernel.h> |
| 17 | #include <linux/errno.h> |
| 18 | #include <linux/string.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 19 | #include <linux/proc_fs.h> |
Alexey Dobriyan | b7072c6 | 2010-05-02 12:40:35 +0300 | [diff] [blame] | 20 | #include <linux/seq_file.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 21 | #include <linux/init.h> |
Russell King | 87c5257 | 2008-11-29 17:35:51 +0000 | [diff] [blame] | 22 | #include <linux/sched.h> |
Russell King | 33fa9b1 | 2008-09-06 11:35:55 +0100 | [diff] [blame] | 23 | #include <linux/uaccess.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | |
Russell King | 15d07dc | 2012-03-28 18:30:01 +0100 | [diff] [blame] | 25 | #include <asm/cp15.h> |
David Howells | 9f97da7 | 2012-03-28 18:30:01 +0100 | [diff] [blame] | 26 | #include <asm/system_info.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | #include <asm/unaligned.h> |
Ben Dooks | 8592edf | 2013-07-18 21:10:56 +0100 | [diff] [blame] | 28 | #include <asm/opcodes.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | |
| 30 | #include "fault.h" |
Russell King | b4b20ad | 2014-04-13 18:57:29 +0100 | [diff] [blame] | 31 | #include "mm.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 32 | |
| 33 | /* |
| 34 | * 32-bit misaligned trap handler (c) 1998 San Mehat (CCC) -July 1998 |
| 35 | * /proc/sys/debug/alignment, modified and integrated into |
| 36 | * Linux 2.1 by Russell King |
| 37 | * |
| 38 | * Speed optimisations and better fault handling by Russell King. |
| 39 | * |
| 40 | * *** NOTE *** |
| 41 | * This code is not portable to processors with late data abort handling. |
| 42 | */ |
| 43 | #define CODING_BITS(i) (i & 0x0e000000) |
| 44 | |
| 45 | #define LDST_I_BIT(i) (i & (1 << 26)) /* Immediate constant */ |
| 46 | #define LDST_P_BIT(i) (i & (1 << 24)) /* Preindex */ |
| 47 | #define LDST_U_BIT(i) (i & (1 << 23)) /* Add offset */ |
| 48 | #define LDST_W_BIT(i) (i & (1 << 21)) /* Writeback */ |
| 49 | #define LDST_L_BIT(i) (i & (1 << 20)) /* Load */ |
| 50 | |
| 51 | #define LDST_P_EQ_U(i) ((((i) ^ ((i) >> 1)) & (1 << 23)) == 0) |
| 52 | |
Steve Longerbeam | f21ee2d | 2005-08-31 21:22:20 +0100 | [diff] [blame] | 53 | #define LDSTHD_I_BIT(i) (i & (1 << 22)) /* double/half-word immed */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 54 | #define LDM_S_BIT(i) (i & (1 << 22)) /* write CPSR from SPSR */ |
| 55 | |
| 56 | #define RN_BITS(i) ((i >> 16) & 15) /* Rn */ |
| 57 | #define RD_BITS(i) ((i >> 12) & 15) /* Rd */ |
| 58 | #define RM_BITS(i) (i & 15) /* Rm */ |
| 59 | |
| 60 | #define REGMASK_BITS(i) (i & 0xffff) |
| 61 | #define OFFSET_BITS(i) (i & 0x0fff) |
| 62 | |
| 63 | #define IS_SHIFT(i) (i & 0x0ff0) |
| 64 | #define SHIFT_BITS(i) ((i >> 7) & 0x1f) |
| 65 | #define SHIFT_TYPE(i) (i & 0x60) |
| 66 | #define SHIFT_LSL 0x00 |
| 67 | #define SHIFT_LSR 0x20 |
| 68 | #define SHIFT_ASR 0x40 |
| 69 | #define SHIFT_RORRRX 0x60 |
| 70 | |
George G. Davis | c2860d4 | 2009-06-04 17:16:04 +0100 | [diff] [blame] | 71 | #define BAD_INSTR 0xdeadc0de |
| 72 | |
| 73 | /* Thumb-2 32 bit format per ARMv7 DDI0406A A6.3, either f800h,e800h,f800h */ |
| 74 | #define IS_T32(hi16) \ |
| 75 | (((hi16) & 0xe000) == 0xe000 && ((hi16) & 0x1800)) |
| 76 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 77 | static unsigned long ai_user; |
| 78 | static unsigned long ai_sys; |
| 79 | static unsigned long ai_skipped; |
| 80 | static unsigned long ai_half; |
| 81 | static unsigned long ai_word; |
Steve Longerbeam | f21ee2d | 2005-08-31 21:22:20 +0100 | [diff] [blame] | 82 | static unsigned long ai_dword; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 83 | static unsigned long ai_multi; |
| 84 | static int ai_usermode; |
Russell King | 0aeb340 | 2014-04-13 19:43:26 +0100 | [diff] [blame] | 85 | static unsigned long cr_no_alignment; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 86 | |
Russell King | d944d54 | 2010-02-20 16:13:29 +0000 | [diff] [blame] | 87 | core_param(alignment, ai_usermode, int, 0600); |
| 88 | |
Russell King | baa745a | 2008-12-07 09:44:55 +0000 | [diff] [blame] | 89 | #define UM_WARN (1 << 0) |
| 90 | #define UM_FIXUP (1 << 1) |
| 91 | #define UM_SIGNAL (1 << 2) |
| 92 | |
Dave Martin | 088c01f | 2011-07-28 14:28:52 +0100 | [diff] [blame] | 93 | /* Return true if and only if the ARMv6 unaligned access model is in use. */ |
| 94 | static bool cpu_is_v6_unaligned(void) |
| 95 | { |
Russell King | 4585eaf | 2014-04-13 18:47:34 +0100 | [diff] [blame] | 96 | return cpu_architecture() >= CPU_ARCH_ARMv6 && get_cr() & CR_U; |
Dave Martin | 088c01f | 2011-07-28 14:28:52 +0100 | [diff] [blame] | 97 | } |
| 98 | |
| 99 | static int safe_usermode(int new_usermode, bool warn) |
| 100 | { |
| 101 | /* |
| 102 | * ARMv6 and later CPUs can perform unaligned accesses for |
| 103 | * most single load and store instructions up to word size. |
| 104 | * LDM, STM, LDRD and STRD still need to be handled. |
| 105 | * |
| 106 | * Ignoring the alignment fault is not an option on these |
| 107 | * CPUs since we spin re-faulting the instruction without |
| 108 | * making any progress. |
| 109 | */ |
| 110 | if (cpu_is_v6_unaligned() && !(new_usermode & (UM_FIXUP | UM_SIGNAL))) { |
| 111 | new_usermode |= UM_FIXUP; |
| 112 | |
| 113 | if (warn) |
| 114 | printk(KERN_WARNING "alignment: ignoring faults is unsafe on this CPU. Defaulting to fixup mode.\n"); |
| 115 | } |
| 116 | |
| 117 | return new_usermode; |
| 118 | } |
| 119 | |
Arnd Bergmann | ffc660c | 2011-08-27 20:01:07 +0200 | [diff] [blame] | 120 | #ifdef CONFIG_PROC_FS |
| 121 | static const char *usermode_action[] = { |
| 122 | "ignored", |
| 123 | "warn", |
| 124 | "fixup", |
| 125 | "fixup+warn", |
| 126 | "signal", |
| 127 | "signal+warn" |
| 128 | }; |
| 129 | |
Alexey Dobriyan | b7072c6 | 2010-05-02 12:40:35 +0300 | [diff] [blame] | 130 | static int alignment_proc_show(struct seq_file *m, void *v) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 131 | { |
Alexey Dobriyan | b7072c6 | 2010-05-02 12:40:35 +0300 | [diff] [blame] | 132 | seq_printf(m, "User:\t\t%lu\n", ai_user); |
| 133 | seq_printf(m, "System:\t\t%lu\n", ai_sys); |
| 134 | seq_printf(m, "Skipped:\t%lu\n", ai_skipped); |
| 135 | seq_printf(m, "Half:\t\t%lu\n", ai_half); |
| 136 | seq_printf(m, "Word:\t\t%lu\n", ai_word); |
Steve Longerbeam | f21ee2d | 2005-08-31 21:22:20 +0100 | [diff] [blame] | 137 | if (cpu_architecture() >= CPU_ARCH_ARMv5TE) |
Alexey Dobriyan | b7072c6 | 2010-05-02 12:40:35 +0300 | [diff] [blame] | 138 | seq_printf(m, "DWord:\t\t%lu\n", ai_dword); |
| 139 | seq_printf(m, "Multi:\t\t%lu\n", ai_multi); |
| 140 | seq_printf(m, "User faults:\t%i (%s)\n", ai_usermode, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 141 | usermode_action[ai_usermode]); |
| 142 | |
Alexey Dobriyan | b7072c6 | 2010-05-02 12:40:35 +0300 | [diff] [blame] | 143 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 144 | } |
| 145 | |
Alexey Dobriyan | b7072c6 | 2010-05-02 12:40:35 +0300 | [diff] [blame] | 146 | static int alignment_proc_open(struct inode *inode, struct file *file) |
| 147 | { |
| 148 | return single_open(file, alignment_proc_show, NULL); |
| 149 | } |
| 150 | |
| 151 | static ssize_t alignment_proc_write(struct file *file, const char __user *buffer, |
| 152 | size_t count, loff_t *pos) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 153 | { |
| 154 | char mode; |
| 155 | |
| 156 | if (count > 0) { |
| 157 | if (get_user(mode, buffer)) |
| 158 | return -EFAULT; |
| 159 | if (mode >= '0' && mode <= '5') |
Dave Martin | 088c01f | 2011-07-28 14:28:52 +0100 | [diff] [blame] | 160 | ai_usermode = safe_usermode(mode - '0', true); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 161 | } |
| 162 | return count; |
| 163 | } |
| 164 | |
Alexey Dobriyan | b7072c6 | 2010-05-02 12:40:35 +0300 | [diff] [blame] | 165 | static const struct file_operations alignment_proc_fops = { |
| 166 | .open = alignment_proc_open, |
| 167 | .read = seq_read, |
| 168 | .llseek = seq_lseek, |
| 169 | .release = single_release, |
| 170 | .write = alignment_proc_write, |
| 171 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 172 | #endif /* CONFIG_PROC_FS */ |
| 173 | |
| 174 | union offset_union { |
| 175 | unsigned long un; |
| 176 | signed long sn; |
| 177 | }; |
| 178 | |
| 179 | #define TYPE_ERROR 0 |
| 180 | #define TYPE_FAULT 1 |
| 181 | #define TYPE_LDST 2 |
| 182 | #define TYPE_DONE 3 |
| 183 | |
| 184 | #ifdef __ARMEB__ |
| 185 | #define BE 1 |
| 186 | #define FIRST_BYTE_16 "mov %1, %1, ror #8\n" |
| 187 | #define FIRST_BYTE_32 "mov %1, %1, ror #24\n" |
| 188 | #define NEXT_BYTE "ror #24" |
| 189 | #else |
| 190 | #define BE 0 |
| 191 | #define FIRST_BYTE_16 |
| 192 | #define FIRST_BYTE_32 |
| 193 | #define NEXT_BYTE "lsr #8" |
| 194 | #endif |
| 195 | |
| 196 | #define __get8_unaligned_check(ins,val,addr,err) \ |
| 197 | __asm__( \ |
Catalin Marinas | 347c8b7 | 2009-07-24 12:32:56 +0100 | [diff] [blame] | 198 | ARM( "1: "ins" %1, [%2], #1\n" ) \ |
| 199 | THUMB( "1: "ins" %1, [%2]\n" ) \ |
| 200 | THUMB( " add %2, %2, #1\n" ) \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 201 | "2:\n" \ |
Russell King | 4260415 | 2010-04-19 10:15:03 +0100 | [diff] [blame] | 202 | " .pushsection .fixup,\"ax\"\n" \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 203 | " .align 2\n" \ |
| 204 | "3: mov %0, #1\n" \ |
| 205 | " b 2b\n" \ |
Russell King | 4260415 | 2010-04-19 10:15:03 +0100 | [diff] [blame] | 206 | " .popsection\n" \ |
| 207 | " .pushsection __ex_table,\"a\"\n" \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 208 | " .align 3\n" \ |
| 209 | " .long 1b, 3b\n" \ |
Russell King | 4260415 | 2010-04-19 10:15:03 +0100 | [diff] [blame] | 210 | " .popsection\n" \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 211 | : "=r" (err), "=&r" (val), "=r" (addr) \ |
| 212 | : "0" (err), "2" (addr)) |
| 213 | |
| 214 | #define __get16_unaligned_check(ins,val,addr) \ |
| 215 | do { \ |
| 216 | unsigned int err = 0, v, a = addr; \ |
| 217 | __get8_unaligned_check(ins,v,a,err); \ |
| 218 | val = v << ((BE) ? 8 : 0); \ |
| 219 | __get8_unaligned_check(ins,v,a,err); \ |
| 220 | val |= v << ((BE) ? 0 : 8); \ |
| 221 | if (err) \ |
| 222 | goto fault; \ |
| 223 | } while (0) |
| 224 | |
| 225 | #define get16_unaligned_check(val,addr) \ |
| 226 | __get16_unaligned_check("ldrb",val,addr) |
| 227 | |
| 228 | #define get16t_unaligned_check(val,addr) \ |
| 229 | __get16_unaligned_check("ldrbt",val,addr) |
| 230 | |
| 231 | #define __get32_unaligned_check(ins,val,addr) \ |
| 232 | do { \ |
| 233 | unsigned int err = 0, v, a = addr; \ |
| 234 | __get8_unaligned_check(ins,v,a,err); \ |
| 235 | val = v << ((BE) ? 24 : 0); \ |
| 236 | __get8_unaligned_check(ins,v,a,err); \ |
| 237 | val |= v << ((BE) ? 16 : 8); \ |
| 238 | __get8_unaligned_check(ins,v,a,err); \ |
| 239 | val |= v << ((BE) ? 8 : 16); \ |
| 240 | __get8_unaligned_check(ins,v,a,err); \ |
| 241 | val |= v << ((BE) ? 0 : 24); \ |
| 242 | if (err) \ |
| 243 | goto fault; \ |
| 244 | } while (0) |
| 245 | |
| 246 | #define get32_unaligned_check(val,addr) \ |
| 247 | __get32_unaligned_check("ldrb",val,addr) |
| 248 | |
| 249 | #define get32t_unaligned_check(val,addr) \ |
| 250 | __get32_unaligned_check("ldrbt",val,addr) |
| 251 | |
| 252 | #define __put16_unaligned_check(ins,val,addr) \ |
| 253 | do { \ |
| 254 | unsigned int err = 0, v = val, a = addr; \ |
| 255 | __asm__( FIRST_BYTE_16 \ |
Catalin Marinas | 347c8b7 | 2009-07-24 12:32:56 +0100 | [diff] [blame] | 256 | ARM( "1: "ins" %1, [%2], #1\n" ) \ |
| 257 | THUMB( "1: "ins" %1, [%2]\n" ) \ |
| 258 | THUMB( " add %2, %2, #1\n" ) \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 259 | " mov %1, %1, "NEXT_BYTE"\n" \ |
| 260 | "2: "ins" %1, [%2]\n" \ |
| 261 | "3:\n" \ |
Russell King | 4260415 | 2010-04-19 10:15:03 +0100 | [diff] [blame] | 262 | " .pushsection .fixup,\"ax\"\n" \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 263 | " .align 2\n" \ |
| 264 | "4: mov %0, #1\n" \ |
| 265 | " b 3b\n" \ |
Russell King | 4260415 | 2010-04-19 10:15:03 +0100 | [diff] [blame] | 266 | " .popsection\n" \ |
| 267 | " .pushsection __ex_table,\"a\"\n" \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 268 | " .align 3\n" \ |
| 269 | " .long 1b, 4b\n" \ |
| 270 | " .long 2b, 4b\n" \ |
Russell King | 4260415 | 2010-04-19 10:15:03 +0100 | [diff] [blame] | 271 | " .popsection\n" \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 272 | : "=r" (err), "=&r" (v), "=&r" (a) \ |
| 273 | : "0" (err), "1" (v), "2" (a)); \ |
| 274 | if (err) \ |
| 275 | goto fault; \ |
| 276 | } while (0) |
| 277 | |
| 278 | #define put16_unaligned_check(val,addr) \ |
| 279 | __put16_unaligned_check("strb",val,addr) |
| 280 | |
| 281 | #define put16t_unaligned_check(val,addr) \ |
| 282 | __put16_unaligned_check("strbt",val,addr) |
| 283 | |
| 284 | #define __put32_unaligned_check(ins,val,addr) \ |
| 285 | do { \ |
| 286 | unsigned int err = 0, v = val, a = addr; \ |
| 287 | __asm__( FIRST_BYTE_32 \ |
Catalin Marinas | 347c8b7 | 2009-07-24 12:32:56 +0100 | [diff] [blame] | 288 | ARM( "1: "ins" %1, [%2], #1\n" ) \ |
| 289 | THUMB( "1: "ins" %1, [%2]\n" ) \ |
| 290 | THUMB( " add %2, %2, #1\n" ) \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 291 | " mov %1, %1, "NEXT_BYTE"\n" \ |
Catalin Marinas | 347c8b7 | 2009-07-24 12:32:56 +0100 | [diff] [blame] | 292 | ARM( "2: "ins" %1, [%2], #1\n" ) \ |
| 293 | THUMB( "2: "ins" %1, [%2]\n" ) \ |
| 294 | THUMB( " add %2, %2, #1\n" ) \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 295 | " mov %1, %1, "NEXT_BYTE"\n" \ |
Catalin Marinas | 347c8b7 | 2009-07-24 12:32:56 +0100 | [diff] [blame] | 296 | ARM( "3: "ins" %1, [%2], #1\n" ) \ |
| 297 | THUMB( "3: "ins" %1, [%2]\n" ) \ |
| 298 | THUMB( " add %2, %2, #1\n" ) \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 299 | " mov %1, %1, "NEXT_BYTE"\n" \ |
| 300 | "4: "ins" %1, [%2]\n" \ |
| 301 | "5:\n" \ |
Russell King | 4260415 | 2010-04-19 10:15:03 +0100 | [diff] [blame] | 302 | " .pushsection .fixup,\"ax\"\n" \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 303 | " .align 2\n" \ |
| 304 | "6: mov %0, #1\n" \ |
| 305 | " b 5b\n" \ |
Russell King | 4260415 | 2010-04-19 10:15:03 +0100 | [diff] [blame] | 306 | " .popsection\n" \ |
| 307 | " .pushsection __ex_table,\"a\"\n" \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 308 | " .align 3\n" \ |
| 309 | " .long 1b, 6b\n" \ |
| 310 | " .long 2b, 6b\n" \ |
| 311 | " .long 3b, 6b\n" \ |
| 312 | " .long 4b, 6b\n" \ |
Russell King | 4260415 | 2010-04-19 10:15:03 +0100 | [diff] [blame] | 313 | " .popsection\n" \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 314 | : "=r" (err), "=&r" (v), "=&r" (a) \ |
| 315 | : "0" (err), "1" (v), "2" (a)); \ |
| 316 | if (err) \ |
| 317 | goto fault; \ |
| 318 | } while (0) |
| 319 | |
George G. Davis | 737d0bb | 2005-10-12 19:58:10 +0100 | [diff] [blame] | 320 | #define put32_unaligned_check(val,addr) \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 321 | __put32_unaligned_check("strb", val, addr) |
| 322 | |
| 323 | #define put32t_unaligned_check(val,addr) \ |
| 324 | __put32_unaligned_check("strbt", val, addr) |
| 325 | |
| 326 | static void |
| 327 | do_alignment_finish_ldst(unsigned long addr, unsigned long instr, struct pt_regs *regs, union offset_union offset) |
| 328 | { |
| 329 | if (!LDST_U_BIT(instr)) |
| 330 | offset.un = -offset.un; |
| 331 | |
| 332 | if (!LDST_P_BIT(instr)) |
| 333 | addr += offset.un; |
| 334 | |
| 335 | if (!LDST_P_BIT(instr) || LDST_W_BIT(instr)) |
| 336 | regs->uregs[RN_BITS(instr)] = addr; |
| 337 | } |
| 338 | |
| 339 | static int |
| 340 | do_alignment_ldrhstrh(unsigned long addr, unsigned long instr, struct pt_regs *regs) |
| 341 | { |
| 342 | unsigned int rd = RD_BITS(instr); |
| 343 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 344 | ai_half += 1; |
| 345 | |
| 346 | if (user_mode(regs)) |
| 347 | goto user; |
| 348 | |
| 349 | if (LDST_L_BIT(instr)) { |
| 350 | unsigned long val; |
| 351 | get16_unaligned_check(val, addr); |
| 352 | |
| 353 | /* signed half-word? */ |
| 354 | if (instr & 0x40) |
| 355 | val = (signed long)((signed short) val); |
| 356 | |
| 357 | regs->uregs[rd] = val; |
| 358 | } else |
| 359 | put16_unaligned_check(regs->uregs[rd], addr); |
| 360 | |
| 361 | return TYPE_LDST; |
| 362 | |
| 363 | user: |
George G. Davis | 737d0bb | 2005-10-12 19:58:10 +0100 | [diff] [blame] | 364 | if (LDST_L_BIT(instr)) { |
| 365 | unsigned long val; |
| 366 | get16t_unaligned_check(val, addr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 367 | |
George G. Davis | 737d0bb | 2005-10-12 19:58:10 +0100 | [diff] [blame] | 368 | /* signed half-word? */ |
| 369 | if (instr & 0x40) |
| 370 | val = (signed long)((signed short) val); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 371 | |
George G. Davis | 737d0bb | 2005-10-12 19:58:10 +0100 | [diff] [blame] | 372 | regs->uregs[rd] = val; |
| 373 | } else |
| 374 | put16t_unaligned_check(regs->uregs[rd], addr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 375 | |
George G. Davis | 737d0bb | 2005-10-12 19:58:10 +0100 | [diff] [blame] | 376 | return TYPE_LDST; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 377 | |
Steve Longerbeam | f21ee2d | 2005-08-31 21:22:20 +0100 | [diff] [blame] | 378 | fault: |
| 379 | return TYPE_FAULT; |
| 380 | } |
| 381 | |
| 382 | static int |
| 383 | do_alignment_ldrdstrd(unsigned long addr, unsigned long instr, |
| 384 | struct pt_regs *regs) |
| 385 | { |
| 386 | unsigned int rd = RD_BITS(instr); |
George G. Davis | c2860d4 | 2009-06-04 17:16:04 +0100 | [diff] [blame] | 387 | unsigned int rd2; |
| 388 | int load; |
Steve Longerbeam | f21ee2d | 2005-08-31 21:22:20 +0100 | [diff] [blame] | 389 | |
George G. Davis | c2860d4 | 2009-06-04 17:16:04 +0100 | [diff] [blame] | 390 | if ((instr & 0xfe000000) == 0xe8000000) { |
| 391 | /* ARMv7 Thumb-2 32-bit LDRD/STRD */ |
| 392 | rd2 = (instr >> 8) & 0xf; |
| 393 | load = !!(LDST_L_BIT(instr)); |
| 394 | } else if (((rd & 1) == 1) || (rd == 14)) |
George G. Davis | 19da83f | 2005-10-10 10:17:44 +0100 | [diff] [blame] | 395 | goto bad; |
George G. Davis | c2860d4 | 2009-06-04 17:16:04 +0100 | [diff] [blame] | 396 | else { |
| 397 | load = ((instr & 0xf0) == 0xd0); |
| 398 | rd2 = rd + 1; |
| 399 | } |
George G. Davis | 19da83f | 2005-10-10 10:17:44 +0100 | [diff] [blame] | 400 | |
Steve Longerbeam | f21ee2d | 2005-08-31 21:22:20 +0100 | [diff] [blame] | 401 | ai_dword += 1; |
| 402 | |
| 403 | if (user_mode(regs)) |
| 404 | goto user; |
| 405 | |
George G. Davis | c2860d4 | 2009-06-04 17:16:04 +0100 | [diff] [blame] | 406 | if (load) { |
Steve Longerbeam | f21ee2d | 2005-08-31 21:22:20 +0100 | [diff] [blame] | 407 | unsigned long val; |
| 408 | get32_unaligned_check(val, addr); |
| 409 | regs->uregs[rd] = val; |
George G. Davis | 737d0bb | 2005-10-12 19:58:10 +0100 | [diff] [blame] | 410 | get32_unaligned_check(val, addr + 4); |
George G. Davis | c2860d4 | 2009-06-04 17:16:04 +0100 | [diff] [blame] | 411 | regs->uregs[rd2] = val; |
Steve Longerbeam | f21ee2d | 2005-08-31 21:22:20 +0100 | [diff] [blame] | 412 | } else { |
| 413 | put32_unaligned_check(regs->uregs[rd], addr); |
George G. Davis | c2860d4 | 2009-06-04 17:16:04 +0100 | [diff] [blame] | 414 | put32_unaligned_check(regs->uregs[rd2], addr + 4); |
Steve Longerbeam | f21ee2d | 2005-08-31 21:22:20 +0100 | [diff] [blame] | 415 | } |
| 416 | |
| 417 | return TYPE_LDST; |
| 418 | |
| 419 | user: |
George G. Davis | c2860d4 | 2009-06-04 17:16:04 +0100 | [diff] [blame] | 420 | if (load) { |
Steve Longerbeam | f21ee2d | 2005-08-31 21:22:20 +0100 | [diff] [blame] | 421 | unsigned long val; |
| 422 | get32t_unaligned_check(val, addr); |
| 423 | regs->uregs[rd] = val; |
George G. Davis | 737d0bb | 2005-10-12 19:58:10 +0100 | [diff] [blame] | 424 | get32t_unaligned_check(val, addr + 4); |
George G. Davis | c2860d4 | 2009-06-04 17:16:04 +0100 | [diff] [blame] | 425 | regs->uregs[rd2] = val; |
Steve Longerbeam | f21ee2d | 2005-08-31 21:22:20 +0100 | [diff] [blame] | 426 | } else { |
| 427 | put32t_unaligned_check(regs->uregs[rd], addr); |
George G. Davis | c2860d4 | 2009-06-04 17:16:04 +0100 | [diff] [blame] | 428 | put32t_unaligned_check(regs->uregs[rd2], addr + 4); |
Steve Longerbeam | f21ee2d | 2005-08-31 21:22:20 +0100 | [diff] [blame] | 429 | } |
| 430 | |
| 431 | return TYPE_LDST; |
George G. Davis | 19da83f | 2005-10-10 10:17:44 +0100 | [diff] [blame] | 432 | bad: |
| 433 | return TYPE_ERROR; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 434 | fault: |
| 435 | return TYPE_FAULT; |
| 436 | } |
| 437 | |
| 438 | static int |
| 439 | do_alignment_ldrstr(unsigned long addr, unsigned long instr, struct pt_regs *regs) |
| 440 | { |
| 441 | unsigned int rd = RD_BITS(instr); |
| 442 | |
| 443 | ai_word += 1; |
| 444 | |
| 445 | if ((!LDST_P_BIT(instr) && LDST_W_BIT(instr)) || user_mode(regs)) |
| 446 | goto trans; |
| 447 | |
| 448 | if (LDST_L_BIT(instr)) { |
| 449 | unsigned int val; |
| 450 | get32_unaligned_check(val, addr); |
| 451 | regs->uregs[rd] = val; |
| 452 | } else |
| 453 | put32_unaligned_check(regs->uregs[rd], addr); |
| 454 | return TYPE_LDST; |
| 455 | |
| 456 | trans: |
| 457 | if (LDST_L_BIT(instr)) { |
| 458 | unsigned int val; |
| 459 | get32t_unaligned_check(val, addr); |
| 460 | regs->uregs[rd] = val; |
| 461 | } else |
| 462 | put32t_unaligned_check(regs->uregs[rd], addr); |
| 463 | return TYPE_LDST; |
| 464 | |
| 465 | fault: |
| 466 | return TYPE_FAULT; |
| 467 | } |
| 468 | |
| 469 | /* |
| 470 | * LDM/STM alignment handler. |
| 471 | * |
| 472 | * There are 4 variants of this instruction: |
| 473 | * |
| 474 | * B = rn pointer before instruction, A = rn pointer after instruction |
| 475 | * ------ increasing address -----> |
| 476 | * | | r0 | r1 | ... | rx | | |
| 477 | * PU = 01 B A |
| 478 | * PU = 11 B A |
| 479 | * PU = 00 A B |
| 480 | * PU = 10 A B |
| 481 | */ |
| 482 | static int |
| 483 | do_alignment_ldmstm(unsigned long addr, unsigned long instr, struct pt_regs *regs) |
| 484 | { |
| 485 | unsigned int rd, rn, correction, nr_regs, regbits; |
| 486 | unsigned long eaddr, newaddr; |
| 487 | |
| 488 | if (LDM_S_BIT(instr)) |
| 489 | goto bad; |
| 490 | |
| 491 | correction = 4; /* processor implementation defined */ |
| 492 | regs->ARM_pc += correction; |
| 493 | |
| 494 | ai_multi += 1; |
| 495 | |
| 496 | /* count the number of registers in the mask to be transferred */ |
| 497 | nr_regs = hweight16(REGMASK_BITS(instr)) * 4; |
| 498 | |
| 499 | rn = RN_BITS(instr); |
| 500 | newaddr = eaddr = regs->uregs[rn]; |
| 501 | |
| 502 | if (!LDST_U_BIT(instr)) |
| 503 | nr_regs = -nr_regs; |
| 504 | newaddr += nr_regs; |
| 505 | if (!LDST_U_BIT(instr)) |
| 506 | eaddr = newaddr; |
| 507 | |
| 508 | if (LDST_P_EQ_U(instr)) /* U = P */ |
| 509 | eaddr += 4; |
| 510 | |
George G. Davis | 737d0bb | 2005-10-12 19:58:10 +0100 | [diff] [blame] | 511 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 512 | * For alignment faults on the ARM922T/ARM920T the MMU makes |
| 513 | * the FSR (and hence addr) equal to the updated base address |
| 514 | * of the multiple access rather than the restored value. |
| 515 | * Switch this message off if we've got a ARM92[02], otherwise |
| 516 | * [ls]dm alignment faults are noisy! |
| 517 | */ |
| 518 | #if !(defined CONFIG_CPU_ARM922T) && !(defined CONFIG_CPU_ARM920T) |
| 519 | /* |
| 520 | * This is a "hint" - we already have eaddr worked out by the |
| 521 | * processor for us. |
| 522 | */ |
| 523 | if (addr != eaddr) { |
| 524 | printk(KERN_ERR "LDMSTM: PC = %08lx, instr = %08lx, " |
| 525 | "addr = %08lx, eaddr = %08lx\n", |
| 526 | instruction_pointer(regs), instr, addr, eaddr); |
| 527 | show_regs(regs); |
| 528 | } |
| 529 | #endif |
| 530 | |
| 531 | if (user_mode(regs)) { |
| 532 | for (regbits = REGMASK_BITS(instr), rd = 0; regbits; |
| 533 | regbits >>= 1, rd += 1) |
| 534 | if (regbits & 1) { |
| 535 | if (LDST_L_BIT(instr)) { |
| 536 | unsigned int val; |
| 537 | get32t_unaligned_check(val, eaddr); |
| 538 | regs->uregs[rd] = val; |
| 539 | } else |
| 540 | put32t_unaligned_check(regs->uregs[rd], eaddr); |
| 541 | eaddr += 4; |
| 542 | } |
| 543 | } else { |
| 544 | for (regbits = REGMASK_BITS(instr), rd = 0; regbits; |
| 545 | regbits >>= 1, rd += 1) |
| 546 | if (regbits & 1) { |
| 547 | if (LDST_L_BIT(instr)) { |
| 548 | unsigned int val; |
| 549 | get32_unaligned_check(val, eaddr); |
| 550 | regs->uregs[rd] = val; |
| 551 | } else |
| 552 | put32_unaligned_check(regs->uregs[rd], eaddr); |
| 553 | eaddr += 4; |
| 554 | } |
| 555 | } |
| 556 | |
| 557 | if (LDST_W_BIT(instr)) |
| 558 | regs->uregs[rn] = newaddr; |
| 559 | if (!LDST_L_BIT(instr) || !(REGMASK_BITS(instr) & (1 << 15))) |
| 560 | regs->ARM_pc -= correction; |
| 561 | return TYPE_DONE; |
| 562 | |
| 563 | fault: |
| 564 | regs->ARM_pc -= correction; |
| 565 | return TYPE_FAULT; |
| 566 | |
| 567 | bad: |
| 568 | printk(KERN_ERR "Alignment trap: not handling ldm with s-bit set\n"); |
| 569 | return TYPE_ERROR; |
| 570 | } |
| 571 | |
| 572 | /* |
| 573 | * Convert Thumb ld/st instruction forms to equivalent ARM instructions so |
| 574 | * we can reuse ARM userland alignment fault fixups for Thumb. |
| 575 | * |
| 576 | * This implementation was initially based on the algorithm found in |
| 577 | * gdb/sim/arm/thumbemu.c. It is basically just a code reduction of same |
| 578 | * to convert only Thumb ld/st instruction forms to equivalent ARM forms. |
| 579 | * |
| 580 | * NOTES: |
| 581 | * 1. Comments below refer to ARM ARM DDI0100E Thumb Instruction sections. |
| 582 | * 2. If for some reason we're passed an non-ld/st Thumb instruction to |
| 583 | * decode, we return 0xdeadc0de. This should never happen under normal |
| 584 | * circumstances but if it does, we've got other problems to deal with |
| 585 | * elsewhere and we obviously can't fix those problems here. |
| 586 | */ |
| 587 | |
| 588 | static unsigned long |
| 589 | thumb2arm(u16 tinstr) |
| 590 | { |
| 591 | u32 L = (tinstr & (1<<11)) >> 11; |
| 592 | |
| 593 | switch ((tinstr & 0xf800) >> 11) { |
| 594 | /* 6.5.1 Format 1: */ |
| 595 | case 0x6000 >> 11: /* 7.1.52 STR(1) */ |
| 596 | case 0x6800 >> 11: /* 7.1.26 LDR(1) */ |
| 597 | case 0x7000 >> 11: /* 7.1.55 STRB(1) */ |
| 598 | case 0x7800 >> 11: /* 7.1.30 LDRB(1) */ |
| 599 | return 0xe5800000 | |
| 600 | ((tinstr & (1<<12)) << (22-12)) | /* fixup */ |
| 601 | (L<<20) | /* L==1? */ |
| 602 | ((tinstr & (7<<0)) << (12-0)) | /* Rd */ |
| 603 | ((tinstr & (7<<3)) << (16-3)) | /* Rn */ |
| 604 | ((tinstr & (31<<6)) >> /* immed_5 */ |
| 605 | (6 - ((tinstr & (1<<12)) ? 0 : 2))); |
| 606 | case 0x8000 >> 11: /* 7.1.57 STRH(1) */ |
| 607 | case 0x8800 >> 11: /* 7.1.32 LDRH(1) */ |
| 608 | return 0xe1c000b0 | |
| 609 | (L<<20) | /* L==1? */ |
| 610 | ((tinstr & (7<<0)) << (12-0)) | /* Rd */ |
| 611 | ((tinstr & (7<<3)) << (16-3)) | /* Rn */ |
| 612 | ((tinstr & (7<<6)) >> (6-1)) | /* immed_5[2:0] */ |
| 613 | ((tinstr & (3<<9)) >> (9-8)); /* immed_5[4:3] */ |
| 614 | |
| 615 | /* 6.5.1 Format 2: */ |
| 616 | case 0x5000 >> 11: |
| 617 | case 0x5800 >> 11: |
| 618 | { |
| 619 | static const u32 subset[8] = { |
| 620 | 0xe7800000, /* 7.1.53 STR(2) */ |
| 621 | 0xe18000b0, /* 7.1.58 STRH(2) */ |
| 622 | 0xe7c00000, /* 7.1.56 STRB(2) */ |
| 623 | 0xe19000d0, /* 7.1.34 LDRSB */ |
| 624 | 0xe7900000, /* 7.1.27 LDR(2) */ |
| 625 | 0xe19000b0, /* 7.1.33 LDRH(2) */ |
| 626 | 0xe7d00000, /* 7.1.31 LDRB(2) */ |
| 627 | 0xe19000f0 /* 7.1.35 LDRSH */ |
| 628 | }; |
| 629 | return subset[(tinstr & (7<<9)) >> 9] | |
| 630 | ((tinstr & (7<<0)) << (12-0)) | /* Rd */ |
| 631 | ((tinstr & (7<<3)) << (16-3)) | /* Rn */ |
| 632 | ((tinstr & (7<<6)) >> (6-0)); /* Rm */ |
| 633 | } |
| 634 | |
| 635 | /* 6.5.1 Format 3: */ |
| 636 | case 0x4800 >> 11: /* 7.1.28 LDR(3) */ |
| 637 | /* NOTE: This case is not technically possible. We're |
George G. Davis | 737d0bb | 2005-10-12 19:58:10 +0100 | [diff] [blame] | 638 | * loading 32-bit memory data via PC relative |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 639 | * addressing mode. So we can and should eliminate |
| 640 | * this case. But I'll leave it here for now. |
| 641 | */ |
| 642 | return 0xe59f0000 | |
| 643 | ((tinstr & (7<<8)) << (12-8)) | /* Rd */ |
| 644 | ((tinstr & 255) << (2-0)); /* immed_8 */ |
| 645 | |
| 646 | /* 6.5.1 Format 4: */ |
| 647 | case 0x9000 >> 11: /* 7.1.54 STR(3) */ |
| 648 | case 0x9800 >> 11: /* 7.1.29 LDR(4) */ |
| 649 | return 0xe58d0000 | |
| 650 | (L<<20) | /* L==1? */ |
| 651 | ((tinstr & (7<<8)) << (12-8)) | /* Rd */ |
| 652 | ((tinstr & 255) << 2); /* immed_8 */ |
| 653 | |
| 654 | /* 6.6.1 Format 1: */ |
| 655 | case 0xc000 >> 11: /* 7.1.51 STMIA */ |
| 656 | case 0xc800 >> 11: /* 7.1.25 LDMIA */ |
| 657 | { |
| 658 | u32 Rn = (tinstr & (7<<8)) >> 8; |
| 659 | u32 W = ((L<<Rn) & (tinstr&255)) ? 0 : 1<<21; |
| 660 | |
| 661 | return 0xe8800000 | W | (L<<20) | (Rn<<16) | |
| 662 | (tinstr&255); |
| 663 | } |
| 664 | |
| 665 | /* 6.6.1 Format 2: */ |
| 666 | case 0xb000 >> 11: /* 7.1.48 PUSH */ |
| 667 | case 0xb800 >> 11: /* 7.1.47 POP */ |
| 668 | if ((tinstr & (3 << 9)) == 0x0400) { |
| 669 | static const u32 subset[4] = { |
| 670 | 0xe92d0000, /* STMDB sp!,{registers} */ |
| 671 | 0xe92d4000, /* STMDB sp!,{registers,lr} */ |
| 672 | 0xe8bd0000, /* LDMIA sp!,{registers} */ |
| 673 | 0xe8bd8000 /* LDMIA sp!,{registers,pc} */ |
| 674 | }; |
| 675 | return subset[(L<<1) | ((tinstr & (1<<8)) >> 8)] | |
| 676 | (tinstr & 255); /* register_list */ |
| 677 | } |
| 678 | /* Else fall through for illegal instruction case */ |
| 679 | |
| 680 | default: |
George G. Davis | c2860d4 | 2009-06-04 17:16:04 +0100 | [diff] [blame] | 681 | return BAD_INSTR; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 682 | } |
| 683 | } |
| 684 | |
George G. Davis | c2860d4 | 2009-06-04 17:16:04 +0100 | [diff] [blame] | 685 | /* |
| 686 | * Convert Thumb-2 32 bit LDM, STM, LDRD, STRD to equivalent instruction |
| 687 | * handlable by ARM alignment handler, also find the corresponding handler, |
| 688 | * so that we can reuse ARM userland alignment fault fixups for Thumb. |
| 689 | * |
| 690 | * @pinstr: original Thumb-2 instruction; returns new handlable instruction |
| 691 | * @regs: register context. |
| 692 | * @poffset: return offset from faulted addr for later writeback |
| 693 | * |
| 694 | * NOTES: |
| 695 | * 1. Comments below refer to ARMv7 DDI0406A Thumb Instruction sections. |
| 696 | * 2. Register name Rt from ARMv7 is same as Rd from ARMv6 (Rd is Rt) |
| 697 | */ |
| 698 | static void * |
| 699 | do_alignment_t32_to_handler(unsigned long *pinstr, struct pt_regs *regs, |
| 700 | union offset_union *poffset) |
| 701 | { |
| 702 | unsigned long instr = *pinstr; |
| 703 | u16 tinst1 = (instr >> 16) & 0xffff; |
| 704 | u16 tinst2 = instr & 0xffff; |
George G. Davis | c2860d4 | 2009-06-04 17:16:04 +0100 | [diff] [blame] | 705 | |
| 706 | switch (tinst1 & 0xffe0) { |
| 707 | /* A6.3.5 Load/Store multiple */ |
| 708 | case 0xe880: /* STM/STMIA/STMEA,LDM/LDMIA, PUSH/POP T2 */ |
| 709 | case 0xe8a0: /* ...above writeback version */ |
| 710 | case 0xe900: /* STMDB/STMFD, LDMDB/LDMEA */ |
| 711 | case 0xe920: /* ...above writeback version */ |
| 712 | /* no need offset decision since handler calculates it */ |
| 713 | return do_alignment_ldmstm; |
| 714 | |
| 715 | case 0xf840: /* POP/PUSH T3 (single register) */ |
| 716 | if (RN_BITS(instr) == 13 && (tinst2 & 0x09ff) == 0x0904) { |
| 717 | u32 L = !!(LDST_L_BIT(instr)); |
| 718 | const u32 subset[2] = { |
| 719 | 0xe92d0000, /* STMDB sp!,{registers} */ |
| 720 | 0xe8bd0000, /* LDMIA sp!,{registers} */ |
| 721 | }; |
| 722 | *pinstr = subset[L] | (1<<RD_BITS(instr)); |
| 723 | return do_alignment_ldmstm; |
| 724 | } |
| 725 | /* Else fall through for illegal instruction case */ |
| 726 | break; |
| 727 | |
| 728 | /* A6.3.6 Load/store double, STRD/LDRD(immed, lit, reg) */ |
| 729 | case 0xe860: |
| 730 | case 0xe960: |
| 731 | case 0xe8e0: |
| 732 | case 0xe9e0: |
| 733 | poffset->un = (tinst2 & 0xff) << 2; |
| 734 | case 0xe940: |
| 735 | case 0xe9c0: |
| 736 | return do_alignment_ldrdstrd; |
| 737 | |
| 738 | /* |
| 739 | * No need to handle load/store instructions up to word size |
| 740 | * since ARMv6 and later CPUs can perform unaligned accesses. |
| 741 | */ |
| 742 | default: |
| 743 | break; |
| 744 | } |
| 745 | return NULL; |
| 746 | } |
| 747 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 748 | static int |
| 749 | do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs) |
| 750 | { |
viresh kumar | 6404f0b | 2012-10-31 10:40:42 +0100 | [diff] [blame] | 751 | union offset_union uninitialized_var(offset); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 752 | unsigned long instr = 0, instrptr; |
| 753 | int (*handler)(unsigned long addr, unsigned long instr, struct pt_regs *regs); |
| 754 | unsigned int type; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 755 | unsigned int fault; |
| 756 | u16 tinstr = 0; |
George G. Davis | c2860d4 | 2009-06-04 17:16:04 +0100 | [diff] [blame] | 757 | int isize = 4; |
| 758 | int thumb2_32b = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 759 | |
Russell King | 02fe284 | 2011-06-25 11:44:06 +0100 | [diff] [blame] | 760 | if (interrupts_enabled(regs)) |
| 761 | local_irq_enable(); |
| 762 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 763 | instrptr = instruction_pointer(regs); |
| 764 | |
Yoann Padioleau | f834368 | 2007-06-01 00:46:36 -0700 | [diff] [blame] | 765 | if (thumb_mode(regs)) { |
Russell King | b255188 | 2013-02-25 16:10:42 +0000 | [diff] [blame] | 766 | u16 *ptr = (u16 *)(instrptr & ~1); |
| 767 | fault = probe_kernel_address(ptr, tinstr); |
Ben Dooks | 8592edf | 2013-07-18 21:10:56 +0100 | [diff] [blame] | 768 | tinstr = __mem_to_opcode_thumb16(tinstr); |
George G. Davis | c2860d4 | 2009-06-04 17:16:04 +0100 | [diff] [blame] | 769 | if (!fault) { |
| 770 | if (cpu_architecture() >= CPU_ARCH_ARMv7 && |
| 771 | IS_T32(tinstr)) { |
| 772 | /* Thumb-2 32-bit */ |
| 773 | u16 tinst2 = 0; |
Russell King | b255188 | 2013-02-25 16:10:42 +0000 | [diff] [blame] | 774 | fault = probe_kernel_address(ptr + 1, tinst2); |
Ben Dooks | 8592edf | 2013-07-18 21:10:56 +0100 | [diff] [blame] | 775 | tinst2 = __mem_to_opcode_thumb16(tinst2); |
| 776 | instr = __opcode_thumb32_compose(tinstr, tinst2); |
George G. Davis | c2860d4 | 2009-06-04 17:16:04 +0100 | [diff] [blame] | 777 | thumb2_32b = 1; |
| 778 | } else { |
| 779 | isize = 2; |
| 780 | instr = thumb2arm(tinstr); |
| 781 | } |
| 782 | } |
Ben Dooks | 8592edf | 2013-07-18 21:10:56 +0100 | [diff] [blame] | 783 | } else { |
Russell King | b255188 | 2013-02-25 16:10:42 +0000 | [diff] [blame] | 784 | fault = probe_kernel_address(instrptr, instr); |
Ben Dooks | 8592edf | 2013-07-18 21:10:56 +0100 | [diff] [blame] | 785 | instr = __mem_to_opcode_arm(instr); |
| 786 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 787 | |
| 788 | if (fault) { |
| 789 | type = TYPE_FAULT; |
George G. Davis | 737d0bb | 2005-10-12 19:58:10 +0100 | [diff] [blame] | 790 | goto bad_or_fault; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 791 | } |
| 792 | |
| 793 | if (user_mode(regs)) |
| 794 | goto user; |
| 795 | |
| 796 | ai_sys += 1; |
| 797 | |
| 798 | fixup: |
| 799 | |
George G. Davis | c2860d4 | 2009-06-04 17:16:04 +0100 | [diff] [blame] | 800 | regs->ARM_pc += isize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 801 | |
| 802 | switch (CODING_BITS(instr)) { |
Steve Longerbeam | f21ee2d | 2005-08-31 21:22:20 +0100 | [diff] [blame] | 803 | case 0x00000000: /* 3.13.4 load/store instruction extensions */ |
| 804 | if (LDSTHD_I_BIT(instr)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 805 | offset.un = (instr & 0xf00) >> 4 | (instr & 15); |
| 806 | else |
| 807 | offset.un = regs->uregs[RM_BITS(instr)]; |
Steve Longerbeam | f21ee2d | 2005-08-31 21:22:20 +0100 | [diff] [blame] | 808 | |
| 809 | if ((instr & 0x000000f0) == 0x000000b0 || /* LDRH, STRH */ |
| 810 | (instr & 0x001000f0) == 0x001000f0) /* LDRSH */ |
| 811 | handler = do_alignment_ldrhstrh; |
| 812 | else if ((instr & 0x001000f0) == 0x000000d0 || /* LDRD */ |
| 813 | (instr & 0x001000f0) == 0x000000f0) /* STRD */ |
| 814 | handler = do_alignment_ldrdstrd; |
George G. Davis | 19da83f | 2005-10-10 10:17:44 +0100 | [diff] [blame] | 815 | else if ((instr & 0x01f00ff0) == 0x01000090) /* SWP */ |
| 816 | goto swp; |
Steve Longerbeam | f21ee2d | 2005-08-31 21:22:20 +0100 | [diff] [blame] | 817 | else |
| 818 | goto bad; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 819 | break; |
| 820 | |
| 821 | case 0x04000000: /* ldr or str immediate */ |
| 822 | offset.un = OFFSET_BITS(instr); |
| 823 | handler = do_alignment_ldrstr; |
| 824 | break; |
| 825 | |
| 826 | case 0x06000000: /* ldr or str register */ |
| 827 | offset.un = regs->uregs[RM_BITS(instr)]; |
| 828 | |
| 829 | if (IS_SHIFT(instr)) { |
| 830 | unsigned int shiftval = SHIFT_BITS(instr); |
| 831 | |
| 832 | switch(SHIFT_TYPE(instr)) { |
| 833 | case SHIFT_LSL: |
| 834 | offset.un <<= shiftval; |
| 835 | break; |
| 836 | |
| 837 | case SHIFT_LSR: |
| 838 | offset.un >>= shiftval; |
| 839 | break; |
| 840 | |
| 841 | case SHIFT_ASR: |
| 842 | offset.sn >>= shiftval; |
| 843 | break; |
| 844 | |
| 845 | case SHIFT_RORRRX: |
| 846 | if (shiftval == 0) { |
| 847 | offset.un >>= 1; |
| 848 | if (regs->ARM_cpsr & PSR_C_BIT) |
| 849 | offset.un |= 1 << 31; |
| 850 | } else |
| 851 | offset.un = offset.un >> shiftval | |
| 852 | offset.un << (32 - shiftval); |
| 853 | break; |
| 854 | } |
| 855 | } |
| 856 | handler = do_alignment_ldrstr; |
| 857 | break; |
| 858 | |
George G. Davis | c2860d4 | 2009-06-04 17:16:04 +0100 | [diff] [blame] | 859 | case 0x08000000: /* ldm or stm, or thumb-2 32bit instruction */ |
Russell King | a761ceb | 2012-09-10 11:50:45 +0100 | [diff] [blame] | 860 | if (thumb2_32b) { |
| 861 | offset.un = 0; |
George G. Davis | c2860d4 | 2009-06-04 17:16:04 +0100 | [diff] [blame] | 862 | handler = do_alignment_t32_to_handler(&instr, regs, &offset); |
Arnd Bergmann | 31d2a63 | 2012-10-07 20:35:18 +0000 | [diff] [blame] | 863 | } else { |
| 864 | offset.un = 0; |
George G. Davis | c2860d4 | 2009-06-04 17:16:04 +0100 | [diff] [blame] | 865 | handler = do_alignment_ldmstm; |
Arnd Bergmann | 31d2a63 | 2012-10-07 20:35:18 +0000 | [diff] [blame] | 866 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 867 | break; |
| 868 | |
| 869 | default: |
| 870 | goto bad; |
| 871 | } |
| 872 | |
George G. Davis | c2860d4 | 2009-06-04 17:16:04 +0100 | [diff] [blame] | 873 | if (!handler) |
| 874 | goto bad; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 875 | type = handler(addr, instr, regs); |
| 876 | |
George G. Davis | c2860d4 | 2009-06-04 17:16:04 +0100 | [diff] [blame] | 877 | if (type == TYPE_ERROR || type == TYPE_FAULT) { |
| 878 | regs->ARM_pc -= isize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 879 | goto bad_or_fault; |
George G. Davis | c2860d4 | 2009-06-04 17:16:04 +0100 | [diff] [blame] | 880 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 881 | |
| 882 | if (type == TYPE_LDST) |
| 883 | do_alignment_finish_ldst(addr, instr, regs, offset); |
| 884 | |
| 885 | return 0; |
| 886 | |
| 887 | bad_or_fault: |
| 888 | if (type == TYPE_ERROR) |
| 889 | goto bad; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 890 | /* |
| 891 | * We got a fault - fix it up, or die. |
| 892 | */ |
Russell King | e5beac3 | 2006-09-27 16:13:48 +0100 | [diff] [blame] | 893 | do_bad_area(addr, fsr, regs); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 894 | return 0; |
| 895 | |
George G. Davis | 19da83f | 2005-10-10 10:17:44 +0100 | [diff] [blame] | 896 | swp: |
| 897 | printk(KERN_ERR "Alignment trap: not handling swp instruction\n"); |
| 898 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 899 | bad: |
| 900 | /* |
| 901 | * Oops, we didn't handle the instruction. |
| 902 | */ |
| 903 | printk(KERN_ERR "Alignment trap: not handling instruction " |
| 904 | "%0*lx at [<%08lx>]\n", |
George G. Davis | c2860d4 | 2009-06-04 17:16:04 +0100 | [diff] [blame] | 905 | isize << 1, |
| 906 | isize == 2 ? tinstr : instr, instrptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 907 | ai_skipped += 1; |
| 908 | return 1; |
| 909 | |
| 910 | user: |
| 911 | ai_user += 1; |
| 912 | |
Russell King | baa745a | 2008-12-07 09:44:55 +0000 | [diff] [blame] | 913 | if (ai_usermode & UM_WARN) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 914 | printk("Alignment trap: %s (%d) PC=0x%08lx Instr=0x%0*lx " |
| 915 | "Address=0x%08lx FSR 0x%03x\n", current->comm, |
Alexey Dobriyan | 19c5870 | 2007-10-18 23:40:41 -0700 | [diff] [blame] | 916 | task_pid_nr(current), instrptr, |
George G. Davis | c2860d4 | 2009-06-04 17:16:04 +0100 | [diff] [blame] | 917 | isize << 1, |
| 918 | isize == 2 ? tinstr : instr, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 919 | addr, fsr); |
| 920 | |
Russell King | baa745a | 2008-12-07 09:44:55 +0000 | [diff] [blame] | 921 | if (ai_usermode & UM_FIXUP) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 922 | goto fixup; |
| 923 | |
Dave Martin | 2102a65 | 2011-07-28 14:29:40 +0100 | [diff] [blame] | 924 | if (ai_usermode & UM_SIGNAL) { |
| 925 | siginfo_t si; |
| 926 | |
| 927 | si.si_signo = SIGBUS; |
| 928 | si.si_errno = 0; |
| 929 | si.si_code = BUS_ADRALN; |
| 930 | si.si_addr = (void __user *)addr; |
| 931 | |
| 932 | force_sig_info(si.si_signo, &si, current); |
| 933 | } else { |
Nicolas Pitre | 2f27bf8 | 2010-09-20 04:10:43 +0100 | [diff] [blame] | 934 | /* |
| 935 | * We're about to disable the alignment trap and return to |
| 936 | * user space. But if an interrupt occurs before actually |
| 937 | * reaching user space, then the IRQ vector entry code will |
| 938 | * notice that we were still in kernel space and therefore |
| 939 | * the alignment trap won't be re-enabled in that case as it |
| 940 | * is presumed to be always on from kernel space. |
| 941 | * Let's prevent that race by disabling interrupts here (they |
| 942 | * are disabled on the way back to user space anyway in |
| 943 | * entry-common.S) and disable the alignment trap only if |
| 944 | * there is no work pending for this thread. |
| 945 | */ |
| 946 | raw_local_irq_disable(); |
| 947 | if (!(current_thread_info()->flags & _TIF_WORK_MASK)) |
| 948 | set_cr(cr_no_alignment); |
| 949 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 950 | |
| 951 | return 0; |
| 952 | } |
| 953 | |
Russell King | 175352a | 2014-04-13 19:00:17 +0100 | [diff] [blame] | 954 | static int __init noalign_setup(char *__unused) |
| 955 | { |
| 956 | set_cr(__clear_cr(CR_A)); |
| 957 | return 1; |
| 958 | } |
| 959 | __setup("noalign", noalign_setup); |
| 960 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 961 | /* |
| 962 | * This needs to be done after sysctl_init, otherwise sys/ will be |
| 963 | * overwritten. Actually, this shouldn't be in sys/ at all since |
| 964 | * it isn't a sysctl, and it doesn't contain sysctl information. |
| 965 | * We now locate it in /proc/cpu/alignment instead. |
| 966 | */ |
| 967 | static int __init alignment_init(void) |
| 968 | { |
| 969 | #ifdef CONFIG_PROC_FS |
| 970 | struct proc_dir_entry *res; |
| 971 | |
Alexey Dobriyan | b7072c6 | 2010-05-02 12:40:35 +0300 | [diff] [blame] | 972 | res = proc_create("cpu/alignment", S_IWUSR | S_IRUGO, NULL, |
| 973 | &alignment_proc_fops); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 974 | if (!res) |
| 975 | return -ENOMEM; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 976 | #endif |
| 977 | |
Dave Martin | 088c01f | 2011-07-28 14:28:52 +0100 | [diff] [blame] | 978 | if (cpu_is_v6_unaligned()) { |
Russell King | b4b20ad | 2014-04-13 18:57:29 +0100 | [diff] [blame] | 979 | set_cr(__clear_cr(CR_A)); |
Dave Martin | 088c01f | 2011-07-28 14:28:52 +0100 | [diff] [blame] | 980 | ai_usermode = safe_usermode(ai_usermode, false); |
Russell King | baa745a | 2008-12-07 09:44:55 +0000 | [diff] [blame] | 981 | } |
| 982 | |
Russell King | 0aeb340 | 2014-04-13 19:43:26 +0100 | [diff] [blame] | 983 | cr_no_alignment = get_cr() & ~CR_A; |
| 984 | |
Catalin Marinas | f7b8156 | 2011-11-22 17:30:31 +0000 | [diff] [blame] | 985 | hook_fault_code(FAULT_CODE_ALIGNMENT, do_alignment, SIGBUS, BUS_ADRALN, |
Kirill A. Shutemov | 6338a6a | 2010-07-22 13:18:19 +0100 | [diff] [blame] | 986 | "alignment exception"); |
Kirill A. Shutemov | b8ab539 | 2010-07-26 11:20:41 +0100 | [diff] [blame] | 987 | |
| 988 | /* |
| 989 | * ARMv6K and ARMv7 use fault status 3 (0b00011) as Access Flag section |
| 990 | * fault, not as alignment error. |
| 991 | * |
| 992 | * TODO: handle ARMv6K properly. Runtime check for 'K' extension is |
| 993 | * needed. |
| 994 | */ |
| 995 | if (cpu_architecture() <= CPU_ARCH_ARMv6) { |
| 996 | hook_fault_code(3, do_alignment, SIGBUS, BUS_ADRALN, |
| 997 | "alignment exception"); |
| 998 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 999 | |
| 1000 | return 0; |
| 1001 | } |
| 1002 | |
| 1003 | fs_initcall(alignment_init); |