Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 1 | /* |
Saeed Mahameed | 302bdf6 | 2015-04-02 17:07:29 +0300 | [diff] [blame] | 2 | * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved. |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 3 | * |
| 4 | * This software is available to you under a choice of one of two |
| 5 | * licenses. You may choose to be licensed under the terms of the GNU |
| 6 | * General Public License (GPL) Version 2, available from the file |
| 7 | * COPYING in the main directory of this source tree, or the |
| 8 | * OpenIB.org BSD license below: |
| 9 | * |
| 10 | * Redistribution and use in source and binary forms, with or |
| 11 | * without modification, are permitted provided that the following |
| 12 | * conditions are met: |
| 13 | * |
| 14 | * - Redistributions of source code must retain the above |
| 15 | * copyright notice, this list of conditions and the following |
| 16 | * disclaimer. |
| 17 | * |
| 18 | * - Redistributions in binary form must reproduce the above |
| 19 | * copyright notice, this list of conditions and the following |
| 20 | * disclaimer in the documentation and/or other materials |
| 21 | * provided with the distribution. |
| 22 | * |
| 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS |
| 27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
| 28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
| 29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 30 | * SOFTWARE. |
| 31 | */ |
| 32 | |
Christoph Hellwig | adec640 | 2015-08-28 09:27:19 +0200 | [diff] [blame] | 33 | #include <linux/highmem.h> |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 34 | #include <linux/module.h> |
| 35 | #include <linux/init.h> |
| 36 | #include <linux/errno.h> |
| 37 | #include <linux/pci.h> |
| 38 | #include <linux/dma-mapping.h> |
| 39 | #include <linux/slab.h> |
| 40 | #include <linux/io-mapping.h> |
Saeed Mahameed | db058a1 | 2015-05-28 22:28:39 +0300 | [diff] [blame] | 41 | #include <linux/interrupt.h> |
Eli Cohen | e329724 | 2015-10-14 17:43:47 +0300 | [diff] [blame] | 42 | #include <linux/delay.h> |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 43 | #include <linux/mlx5/driver.h> |
| 44 | #include <linux/mlx5/cq.h> |
| 45 | #include <linux/mlx5/qp.h> |
| 46 | #include <linux/mlx5/srq.h> |
| 47 | #include <linux/debugfs.h> |
Eli Cohen | f66f049 | 2014-12-02 12:26:11 +0200 | [diff] [blame] | 48 | #include <linux/kmod.h> |
Eli Cohen | b775516 | 2014-10-02 12:19:44 +0300 | [diff] [blame] | 49 | #include <linux/mlx5/mlx5_ifc.h> |
Maor Gottlieb | 5a7b27e | 2016-04-29 01:36:39 +0300 | [diff] [blame] | 50 | #ifdef CONFIG_RFS_ACCEL |
| 51 | #include <linux/cpu_rmap.h> |
| 52 | #endif |
Or Gerlitz | feae908 | 2016-07-01 14:51:02 +0300 | [diff] [blame] | 53 | #include <net/devlink.h> |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 54 | #include "mlx5_core.h" |
Maor Gottlieb | 86d722a | 2015-12-10 17:12:44 +0200 | [diff] [blame] | 55 | #include "fs_core.h" |
Saeed Mahameed | 073bb18 | 2015-12-01 18:03:18 +0200 | [diff] [blame] | 56 | #ifdef CONFIG_MLX5_CORE_EN |
| 57 | #include "eswitch.h" |
| 58 | #endif |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 59 | |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 60 | MODULE_AUTHOR("Eli Cohen <eli@mellanox.com>"); |
Achiad Shochat | 4ae6c18 | 2015-04-02 17:07:31 +0300 | [diff] [blame] | 61 | MODULE_DESCRIPTION("Mellanox Connect-IB, ConnectX-4 core driver"); |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 62 | MODULE_LICENSE("Dual BSD/GPL"); |
| 63 | MODULE_VERSION(DRIVER_VERSION); |
| 64 | |
Kamal Heib | f663ad9 | 2016-12-06 17:32:43 +0200 | [diff] [blame] | 65 | unsigned int mlx5_core_debug_mask; |
| 66 | module_param_named(debug_mask, mlx5_core_debug_mask, uint, 0644); |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 67 | MODULE_PARM_DESC(debug_mask, "debug mask: 1 = dump cmd data, 2 = dump cmd exec time, 3 = both. Default=0"); |
| 68 | |
Jack Morgenstein | 9603b61 | 2014-07-28 23:30:22 +0300 | [diff] [blame] | 69 | #define MLX5_DEFAULT_PROF 2 |
Kamal Heib | f663ad9 | 2016-12-06 17:32:43 +0200 | [diff] [blame] | 70 | static unsigned int prof_sel = MLX5_DEFAULT_PROF; |
| 71 | module_param_named(prof_sel, prof_sel, uint, 0444); |
Jack Morgenstein | 9603b61 | 2014-07-28 23:30:22 +0300 | [diff] [blame] | 72 | MODULE_PARM_DESC(prof_sel, "profile selector. Valid range 0 - 2"); |
| 73 | |
Eran Ben Elisha | f91e6d8 | 2015-12-14 16:34:09 +0200 | [diff] [blame] | 74 | enum { |
| 75 | MLX5_ATOMIC_REQ_MODE_BE = 0x0, |
| 76 | MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS = 0x1, |
| 77 | }; |
| 78 | |
Jack Morgenstein | 9603b61 | 2014-07-28 23:30:22 +0300 | [diff] [blame] | 79 | static struct mlx5_profile profile[] = { |
| 80 | [0] = { |
| 81 | .mask = 0, |
| 82 | }, |
| 83 | [1] = { |
| 84 | .mask = MLX5_PROF_MASK_QP_SIZE, |
| 85 | .log_max_qp = 12, |
| 86 | }, |
| 87 | [2] = { |
| 88 | .mask = MLX5_PROF_MASK_QP_SIZE | |
| 89 | MLX5_PROF_MASK_MR_CACHE, |
Maor Gottlieb | 0ceb718 | 2017-03-21 15:59:17 +0200 | [diff] [blame] | 90 | .log_max_qp = 18, |
Jack Morgenstein | 9603b61 | 2014-07-28 23:30:22 +0300 | [diff] [blame] | 91 | .mr_cache[0] = { |
| 92 | .size = 500, |
| 93 | .limit = 250 |
| 94 | }, |
| 95 | .mr_cache[1] = { |
| 96 | .size = 500, |
| 97 | .limit = 250 |
| 98 | }, |
| 99 | .mr_cache[2] = { |
| 100 | .size = 500, |
| 101 | .limit = 250 |
| 102 | }, |
| 103 | .mr_cache[3] = { |
| 104 | .size = 500, |
| 105 | .limit = 250 |
| 106 | }, |
| 107 | .mr_cache[4] = { |
| 108 | .size = 500, |
| 109 | .limit = 250 |
| 110 | }, |
| 111 | .mr_cache[5] = { |
| 112 | .size = 500, |
| 113 | .limit = 250 |
| 114 | }, |
| 115 | .mr_cache[6] = { |
| 116 | .size = 500, |
| 117 | .limit = 250 |
| 118 | }, |
| 119 | .mr_cache[7] = { |
| 120 | .size = 500, |
| 121 | .limit = 250 |
| 122 | }, |
| 123 | .mr_cache[8] = { |
| 124 | .size = 500, |
| 125 | .limit = 250 |
| 126 | }, |
| 127 | .mr_cache[9] = { |
| 128 | .size = 500, |
| 129 | .limit = 250 |
| 130 | }, |
| 131 | .mr_cache[10] = { |
| 132 | .size = 500, |
| 133 | .limit = 250 |
| 134 | }, |
| 135 | .mr_cache[11] = { |
| 136 | .size = 500, |
| 137 | .limit = 250 |
| 138 | }, |
| 139 | .mr_cache[12] = { |
| 140 | .size = 64, |
| 141 | .limit = 32 |
| 142 | }, |
| 143 | .mr_cache[13] = { |
| 144 | .size = 32, |
| 145 | .limit = 16 |
| 146 | }, |
| 147 | .mr_cache[14] = { |
| 148 | .size = 16, |
| 149 | .limit = 8 |
| 150 | }, |
| 151 | .mr_cache[15] = { |
| 152 | .size = 8, |
| 153 | .limit = 4 |
| 154 | }, |
| 155 | }, |
| 156 | }; |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 157 | |
Eli Cohen | 25ff350 | 2017-06-08 11:33:16 -0500 | [diff] [blame] | 158 | #define FW_INIT_TIMEOUT_MILI 2000 |
| 159 | #define FW_INIT_WAIT_MS 2 |
| 160 | #define FW_PRE_INIT_TIMEOUT_MILI 10000 |
Eli Cohen | e329724 | 2015-10-14 17:43:47 +0300 | [diff] [blame] | 161 | |
| 162 | static int wait_fw_init(struct mlx5_core_dev *dev, u32 max_wait_mili) |
| 163 | { |
| 164 | unsigned long end = jiffies + msecs_to_jiffies(max_wait_mili); |
| 165 | int err = 0; |
| 166 | |
| 167 | while (fw_initializing(dev)) { |
| 168 | if (time_after(jiffies, end)) { |
| 169 | err = -EBUSY; |
| 170 | break; |
| 171 | } |
| 172 | msleep(FW_INIT_WAIT_MS); |
| 173 | } |
| 174 | |
| 175 | return err; |
| 176 | } |
| 177 | |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 178 | static int set_dma_caps(struct pci_dev *pdev) |
| 179 | { |
| 180 | int err; |
| 181 | |
| 182 | err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); |
| 183 | if (err) { |
Joe Perches | 1a91de2 | 2014-05-07 12:52:57 -0700 | [diff] [blame] | 184 | dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask\n"); |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 185 | err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); |
| 186 | if (err) { |
Joe Perches | 1a91de2 | 2014-05-07 12:52:57 -0700 | [diff] [blame] | 187 | dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting\n"); |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 188 | return err; |
| 189 | } |
| 190 | } |
| 191 | |
| 192 | err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); |
| 193 | if (err) { |
| 194 | dev_warn(&pdev->dev, |
Joe Perches | 1a91de2 | 2014-05-07 12:52:57 -0700 | [diff] [blame] | 195 | "Warning: couldn't set 64-bit consistent PCI DMA mask\n"); |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 196 | err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); |
| 197 | if (err) { |
| 198 | dev_err(&pdev->dev, |
Joe Perches | 1a91de2 | 2014-05-07 12:52:57 -0700 | [diff] [blame] | 199 | "Can't set consistent PCI DMA mask, aborting\n"); |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 200 | return err; |
| 201 | } |
| 202 | } |
| 203 | |
| 204 | dma_set_max_seg_size(&pdev->dev, 2u * 1024 * 1024 * 1024); |
| 205 | return err; |
| 206 | } |
| 207 | |
Majd Dibbiny | 89d44f0 | 2015-10-14 17:43:46 +0300 | [diff] [blame] | 208 | static int mlx5_pci_enable_device(struct mlx5_core_dev *dev) |
| 209 | { |
| 210 | struct pci_dev *pdev = dev->pdev; |
| 211 | int err = 0; |
| 212 | |
| 213 | mutex_lock(&dev->pci_status_mutex); |
| 214 | if (dev->pci_status == MLX5_PCI_STATUS_DISABLED) { |
| 215 | err = pci_enable_device(pdev); |
| 216 | if (!err) |
| 217 | dev->pci_status = MLX5_PCI_STATUS_ENABLED; |
| 218 | } |
| 219 | mutex_unlock(&dev->pci_status_mutex); |
| 220 | |
| 221 | return err; |
| 222 | } |
| 223 | |
| 224 | static void mlx5_pci_disable_device(struct mlx5_core_dev *dev) |
| 225 | { |
| 226 | struct pci_dev *pdev = dev->pdev; |
| 227 | |
| 228 | mutex_lock(&dev->pci_status_mutex); |
| 229 | if (dev->pci_status == MLX5_PCI_STATUS_ENABLED) { |
| 230 | pci_disable_device(pdev); |
| 231 | dev->pci_status = MLX5_PCI_STATUS_DISABLED; |
| 232 | } |
| 233 | mutex_unlock(&dev->pci_status_mutex); |
| 234 | } |
| 235 | |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 236 | static int request_bar(struct pci_dev *pdev) |
| 237 | { |
| 238 | int err = 0; |
| 239 | |
| 240 | if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { |
Joe Perches | 1a91de2 | 2014-05-07 12:52:57 -0700 | [diff] [blame] | 241 | dev_err(&pdev->dev, "Missing registers BAR, aborting\n"); |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 242 | return -ENODEV; |
| 243 | } |
| 244 | |
| 245 | err = pci_request_regions(pdev, DRIVER_NAME); |
| 246 | if (err) |
| 247 | dev_err(&pdev->dev, "Couldn't get PCI resources, aborting\n"); |
| 248 | |
| 249 | return err; |
| 250 | } |
| 251 | |
| 252 | static void release_bar(struct pci_dev *pdev) |
| 253 | { |
| 254 | pci_release_regions(pdev); |
| 255 | } |
| 256 | |
| 257 | static int mlx5_enable_msix(struct mlx5_core_dev *dev) |
| 258 | { |
Saeed Mahameed | db058a1 | 2015-05-28 22:28:39 +0300 | [diff] [blame] | 259 | struct mlx5_priv *priv = &dev->priv; |
| 260 | struct mlx5_eq_table *table = &priv->eq_table; |
Saeed Mahameed | 938fe83 | 2015-05-28 22:28:41 +0300 | [diff] [blame] | 261 | int num_eqs = 1 << MLX5_CAP_GEN(dev, log_max_eq); |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 262 | int nvec; |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 263 | int i; |
| 264 | |
Saeed Mahameed | 938fe83 | 2015-05-28 22:28:41 +0300 | [diff] [blame] | 265 | nvec = MLX5_CAP_GEN(dev, num_ports) * num_online_cpus() + |
| 266 | MLX5_EQ_VEC_COMP_BASE; |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 267 | nvec = min_t(int, nvec, num_eqs); |
| 268 | if (nvec <= MLX5_EQ_VEC_COMP_BASE) |
| 269 | return -ENOMEM; |
| 270 | |
Saeed Mahameed | db058a1 | 2015-05-28 22:28:39 +0300 | [diff] [blame] | 271 | priv->msix_arr = kcalloc(nvec, sizeof(*priv->msix_arr), GFP_KERNEL); |
| 272 | |
| 273 | priv->irq_info = kcalloc(nvec, sizeof(*priv->irq_info), GFP_KERNEL); |
| 274 | if (!priv->msix_arr || !priv->irq_info) |
| 275 | goto err_free_msix; |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 276 | |
| 277 | for (i = 0; i < nvec; i++) |
Saeed Mahameed | db058a1 | 2015-05-28 22:28:39 +0300 | [diff] [blame] | 278 | priv->msix_arr[i].entry = i; |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 279 | |
Saeed Mahameed | db058a1 | 2015-05-28 22:28:39 +0300 | [diff] [blame] | 280 | nvec = pci_enable_msix_range(dev->pdev, priv->msix_arr, |
Eli Cohen | 3a9e161 | 2014-12-02 12:26:12 +0200 | [diff] [blame] | 281 | MLX5_EQ_VEC_COMP_BASE + 1, nvec); |
Alexander Gordeev | f3c9407 | 2014-02-18 11:11:48 +0100 | [diff] [blame] | 282 | if (nvec < 0) |
| 283 | return nvec; |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 284 | |
Alexander Gordeev | f3c9407 | 2014-02-18 11:11:48 +0100 | [diff] [blame] | 285 | table->num_comp_vectors = nvec - MLX5_EQ_VEC_COMP_BASE; |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 286 | |
| 287 | return 0; |
Saeed Mahameed | db058a1 | 2015-05-28 22:28:39 +0300 | [diff] [blame] | 288 | |
| 289 | err_free_msix: |
| 290 | kfree(priv->irq_info); |
| 291 | kfree(priv->msix_arr); |
| 292 | return -ENOMEM; |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 293 | } |
| 294 | |
| 295 | static void mlx5_disable_msix(struct mlx5_core_dev *dev) |
| 296 | { |
Saeed Mahameed | db058a1 | 2015-05-28 22:28:39 +0300 | [diff] [blame] | 297 | struct mlx5_priv *priv = &dev->priv; |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 298 | |
| 299 | pci_disable_msix(dev->pdev); |
Saeed Mahameed | db058a1 | 2015-05-28 22:28:39 +0300 | [diff] [blame] | 300 | kfree(priv->irq_info); |
| 301 | kfree(priv->msix_arr); |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 302 | } |
| 303 | |
| 304 | struct mlx5_reg_host_endianess { |
| 305 | u8 he; |
| 306 | u8 rsvd[15]; |
| 307 | }; |
| 308 | |
Eli Cohen | 87b8de4 | 2013-10-23 09:53:20 +0300 | [diff] [blame] | 309 | |
| 310 | #define CAP_MASK(pos, size) ((u64)((1 << (size)) - 1) << (pos)) |
| 311 | |
| 312 | enum { |
Eli Cohen | c7a08ac | 2014-10-02 12:19:42 +0300 | [diff] [blame] | 313 | MLX5_CAP_BITS_RW_MASK = CAP_MASK(MLX5_CAP_OFF_CMDIF_CSUM, 2) | |
| 314 | MLX5_DEV_CAP_FLAG_DCT, |
Eli Cohen | 87b8de4 | 2013-10-23 09:53:20 +0300 | [diff] [blame] | 315 | }; |
| 316 | |
Saeed Mahameed | 2974ab6 | 2016-07-28 16:43:17 +0300 | [diff] [blame] | 317 | static u16 to_fw_pkey_sz(struct mlx5_core_dev *dev, u32 size) |
Eli Cohen | c7a08ac | 2014-10-02 12:19:42 +0300 | [diff] [blame] | 318 | { |
| 319 | switch (size) { |
| 320 | case 128: |
| 321 | return 0; |
| 322 | case 256: |
| 323 | return 1; |
| 324 | case 512: |
| 325 | return 2; |
| 326 | case 1024: |
| 327 | return 3; |
| 328 | case 2048: |
| 329 | return 4; |
| 330 | case 4096: |
| 331 | return 5; |
| 332 | default: |
Saeed Mahameed | 2974ab6 | 2016-07-28 16:43:17 +0300 | [diff] [blame] | 333 | mlx5_core_warn(dev, "invalid pkey table size %d\n", size); |
Eli Cohen | c7a08ac | 2014-10-02 12:19:42 +0300 | [diff] [blame] | 334 | return 0; |
| 335 | } |
| 336 | } |
| 337 | |
Leon Romanovsky | b06e7de | 2016-02-23 10:25:22 +0200 | [diff] [blame] | 338 | static int mlx5_core_get_caps_mode(struct mlx5_core_dev *dev, |
| 339 | enum mlx5_cap_type cap_type, |
| 340 | enum mlx5_cap_mode cap_mode) |
Eli Cohen | c7a08ac | 2014-10-02 12:19:42 +0300 | [diff] [blame] | 341 | { |
Eli Cohen | b775516 | 2014-10-02 12:19:44 +0300 | [diff] [blame] | 342 | u8 in[MLX5_ST_SZ_BYTES(query_hca_cap_in)]; |
| 343 | int out_sz = MLX5_ST_SZ_BYTES(query_hca_cap_out); |
Saeed Mahameed | 938fe83 | 2015-05-28 22:28:41 +0300 | [diff] [blame] | 344 | void *out, *hca_caps; |
| 345 | u16 opmod = (cap_type << 1) | (cap_mode & 0x01); |
Eli Cohen | c7a08ac | 2014-10-02 12:19:42 +0300 | [diff] [blame] | 346 | int err; |
| 347 | |
Eli Cohen | b775516 | 2014-10-02 12:19:44 +0300 | [diff] [blame] | 348 | memset(in, 0, sizeof(in)); |
| 349 | out = kzalloc(out_sz, GFP_KERNEL); |
Eli Cohen | c7a08ac | 2014-10-02 12:19:42 +0300 | [diff] [blame] | 350 | if (!out) |
| 351 | return -ENOMEM; |
Saeed Mahameed | 938fe83 | 2015-05-28 22:28:41 +0300 | [diff] [blame] | 352 | |
Eli Cohen | b775516 | 2014-10-02 12:19:44 +0300 | [diff] [blame] | 353 | MLX5_SET(query_hca_cap_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_CAP); |
| 354 | MLX5_SET(query_hca_cap_in, in, op_mod, opmod); |
| 355 | err = mlx5_cmd_exec(dev, in, sizeof(in), out, out_sz); |
Eli Cohen | c7a08ac | 2014-10-02 12:19:42 +0300 | [diff] [blame] | 356 | if (err) { |
Saeed Mahameed | 938fe83 | 2015-05-28 22:28:41 +0300 | [diff] [blame] | 357 | mlx5_core_warn(dev, |
| 358 | "QUERY_HCA_CAP : type(%x) opmode(%x) Failed(%d)\n", |
| 359 | cap_type, cap_mode, err); |
Eli Cohen | c7a08ac | 2014-10-02 12:19:42 +0300 | [diff] [blame] | 360 | goto query_ex; |
| 361 | } |
Eli Cohen | c7a08ac | 2014-10-02 12:19:42 +0300 | [diff] [blame] | 362 | |
Saeed Mahameed | 938fe83 | 2015-05-28 22:28:41 +0300 | [diff] [blame] | 363 | hca_caps = MLX5_ADDR_OF(query_hca_cap_out, out, capability); |
| 364 | |
| 365 | switch (cap_mode) { |
| 366 | case HCA_CAP_OPMOD_GET_MAX: |
| 367 | memcpy(dev->hca_caps_max[cap_type], hca_caps, |
| 368 | MLX5_UN_SZ_BYTES(hca_cap_union)); |
| 369 | break; |
| 370 | case HCA_CAP_OPMOD_GET_CUR: |
| 371 | memcpy(dev->hca_caps_cur[cap_type], hca_caps, |
| 372 | MLX5_UN_SZ_BYTES(hca_cap_union)); |
| 373 | break; |
| 374 | default: |
| 375 | mlx5_core_warn(dev, |
| 376 | "Tried to query dev cap type(%x) with wrong opmode(%x)\n", |
| 377 | cap_type, cap_mode); |
| 378 | err = -EINVAL; |
| 379 | break; |
| 380 | } |
Eli Cohen | c7a08ac | 2014-10-02 12:19:42 +0300 | [diff] [blame] | 381 | query_ex: |
| 382 | kfree(out); |
| 383 | return err; |
| 384 | } |
| 385 | |
Leon Romanovsky | b06e7de | 2016-02-23 10:25:22 +0200 | [diff] [blame] | 386 | int mlx5_core_get_caps(struct mlx5_core_dev *dev, enum mlx5_cap_type cap_type) |
| 387 | { |
| 388 | int ret; |
| 389 | |
| 390 | ret = mlx5_core_get_caps_mode(dev, cap_type, HCA_CAP_OPMOD_GET_CUR); |
| 391 | if (ret) |
| 392 | return ret; |
| 393 | return mlx5_core_get_caps_mode(dev, cap_type, HCA_CAP_OPMOD_GET_MAX); |
| 394 | } |
| 395 | |
Eran Ben Elisha | f91e6d8 | 2015-12-14 16:34:09 +0200 | [diff] [blame] | 396 | static int set_caps(struct mlx5_core_dev *dev, void *in, int in_sz, int opmod) |
Eli Cohen | c7a08ac | 2014-10-02 12:19:42 +0300 | [diff] [blame] | 397 | { |
Saeed Mahameed | c4f287c | 2016-07-19 20:17:12 +0300 | [diff] [blame] | 398 | u32 out[MLX5_ST_SZ_DW(set_hca_cap_out)] = {0}; |
Eli Cohen | c7a08ac | 2014-10-02 12:19:42 +0300 | [diff] [blame] | 399 | |
Eli Cohen | b775516 | 2014-10-02 12:19:44 +0300 | [diff] [blame] | 400 | MLX5_SET(set_hca_cap_in, in, opcode, MLX5_CMD_OP_SET_HCA_CAP); |
Eran Ben Elisha | f91e6d8 | 2015-12-14 16:34:09 +0200 | [diff] [blame] | 401 | MLX5_SET(set_hca_cap_in, in, op_mod, opmod << 1); |
Saeed Mahameed | c4f287c | 2016-07-19 20:17:12 +0300 | [diff] [blame] | 402 | return mlx5_cmd_exec(dev, in, in_sz, out, sizeof(out)); |
Eli Cohen | c7a08ac | 2014-10-02 12:19:42 +0300 | [diff] [blame] | 403 | } |
Eli Cohen | 87b8de4 | 2013-10-23 09:53:20 +0300 | [diff] [blame] | 404 | |
Eran Ben Elisha | f91e6d8 | 2015-12-14 16:34:09 +0200 | [diff] [blame] | 405 | static int handle_hca_cap_atomic(struct mlx5_core_dev *dev) |
| 406 | { |
| 407 | void *set_ctx; |
| 408 | void *set_hca_cap; |
| 409 | int set_sz = MLX5_ST_SZ_BYTES(set_hca_cap_in); |
| 410 | int req_endianness; |
| 411 | int err; |
| 412 | |
| 413 | if (MLX5_CAP_GEN(dev, atomic)) { |
Leon Romanovsky | b06e7de | 2016-02-23 10:25:22 +0200 | [diff] [blame] | 414 | err = mlx5_core_get_caps(dev, MLX5_CAP_ATOMIC); |
Eran Ben Elisha | f91e6d8 | 2015-12-14 16:34:09 +0200 | [diff] [blame] | 415 | if (err) |
| 416 | return err; |
| 417 | } else { |
| 418 | return 0; |
| 419 | } |
| 420 | |
| 421 | req_endianness = |
| 422 | MLX5_CAP_ATOMIC(dev, |
| 423 | supported_atomic_req_8B_endianess_mode_1); |
| 424 | |
| 425 | if (req_endianness != MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS) |
| 426 | return 0; |
| 427 | |
| 428 | set_ctx = kzalloc(set_sz, GFP_KERNEL); |
| 429 | if (!set_ctx) |
| 430 | return -ENOMEM; |
| 431 | |
| 432 | set_hca_cap = MLX5_ADDR_OF(set_hca_cap_in, set_ctx, capability); |
| 433 | |
| 434 | /* Set requestor to host endianness */ |
| 435 | MLX5_SET(atomic_caps, set_hca_cap, atomic_req_8B_endianess_mode, |
| 436 | MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS); |
| 437 | |
| 438 | err = set_caps(dev, set_ctx, set_sz, MLX5_SET_HCA_CAP_OP_MOD_ATOMIC); |
| 439 | |
| 440 | kfree(set_ctx); |
| 441 | return err; |
| 442 | } |
| 443 | |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 444 | static int handle_hca_cap(struct mlx5_core_dev *dev) |
| 445 | { |
Eli Cohen | b775516 | 2014-10-02 12:19:44 +0300 | [diff] [blame] | 446 | void *set_ctx = NULL; |
Eli Cohen | c7a08ac | 2014-10-02 12:19:42 +0300 | [diff] [blame] | 447 | struct mlx5_profile *prof = dev->profile; |
Eli Cohen | c7a08ac | 2014-10-02 12:19:42 +0300 | [diff] [blame] | 448 | int err = -ENOMEM; |
Eli Cohen | b775516 | 2014-10-02 12:19:44 +0300 | [diff] [blame] | 449 | int set_sz = MLX5_ST_SZ_BYTES(set_hca_cap_in); |
Saeed Mahameed | 938fe83 | 2015-05-28 22:28:41 +0300 | [diff] [blame] | 450 | void *set_hca_cap; |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 451 | |
Eli Cohen | b775516 | 2014-10-02 12:19:44 +0300 | [diff] [blame] | 452 | set_ctx = kzalloc(set_sz, GFP_KERNEL); |
Eli Cohen | c7a08ac | 2014-10-02 12:19:42 +0300 | [diff] [blame] | 453 | if (!set_ctx) |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 454 | goto query_ex; |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 455 | |
Leon Romanovsky | b06e7de | 2016-02-23 10:25:22 +0200 | [diff] [blame] | 456 | err = mlx5_core_get_caps(dev, MLX5_CAP_GENERAL); |
Eli Cohen | c7a08ac | 2014-10-02 12:19:42 +0300 | [diff] [blame] | 457 | if (err) |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 458 | goto query_ex; |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 459 | |
Saeed Mahameed | 938fe83 | 2015-05-28 22:28:41 +0300 | [diff] [blame] | 460 | set_hca_cap = MLX5_ADDR_OF(set_hca_cap_in, set_ctx, |
| 461 | capability); |
| 462 | memcpy(set_hca_cap, dev->hca_caps_cur[MLX5_CAP_GENERAL], |
| 463 | MLX5_ST_SZ_BYTES(cmd_hca_cap)); |
| 464 | |
| 465 | mlx5_core_dbg(dev, "Current Pkey table size %d Setting new size %d\n", |
Majd Dibbiny | 707c460 | 2015-06-04 19:30:41 +0300 | [diff] [blame] | 466 | mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(dev, pkey_table_size)), |
Saeed Mahameed | 938fe83 | 2015-05-28 22:28:41 +0300 | [diff] [blame] | 467 | 128); |
Eli Cohen | c7a08ac | 2014-10-02 12:19:42 +0300 | [diff] [blame] | 468 | /* we limit the size of the pkey table to 128 entries for now */ |
Saeed Mahameed | 938fe83 | 2015-05-28 22:28:41 +0300 | [diff] [blame] | 469 | MLX5_SET(cmd_hca_cap, set_hca_cap, pkey_table_size, |
Saeed Mahameed | 2974ab6 | 2016-07-28 16:43:17 +0300 | [diff] [blame] | 470 | to_fw_pkey_sz(dev, 128)); |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 471 | |
Noa Osherovich | 7bf1de7 | 2016-12-28 14:58:32 +0200 | [diff] [blame] | 472 | /* Check log_max_qp from HCA caps to set in current profile */ |
| 473 | if (MLX5_CAP_GEN_MAX(dev, log_max_qp) < profile[prof_sel].log_max_qp) { |
| 474 | mlx5_core_warn(dev, "log_max_qp value in current profile is %d, changing it to HCA capability limit (%d)\n", |
| 475 | profile[prof_sel].log_max_qp, |
| 476 | MLX5_CAP_GEN_MAX(dev, log_max_qp)); |
| 477 | profile[prof_sel].log_max_qp = MLX5_CAP_GEN_MAX(dev, log_max_qp); |
| 478 | } |
Eli Cohen | c7a08ac | 2014-10-02 12:19:42 +0300 | [diff] [blame] | 479 | if (prof->mask & MLX5_PROF_MASK_QP_SIZE) |
Saeed Mahameed | 938fe83 | 2015-05-28 22:28:41 +0300 | [diff] [blame] | 480 | MLX5_SET(cmd_hca_cap, set_hca_cap, log_max_qp, |
| 481 | prof->log_max_qp); |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 482 | |
Saeed Mahameed | 938fe83 | 2015-05-28 22:28:41 +0300 | [diff] [blame] | 483 | /* disable cmdif checksum */ |
| 484 | MLX5_SET(cmd_hca_cap, set_hca_cap, cmdif_checksum, 0); |
Eli Cohen | c1868b8 | 2013-09-11 16:35:25 +0300 | [diff] [blame] | 485 | |
Carol L Soto | fe1e187 | 2015-08-05 11:05:32 -0500 | [diff] [blame] | 486 | MLX5_SET(cmd_hca_cap, set_hca_cap, log_uar_page_sz, PAGE_SHIFT - 12); |
| 487 | |
Eran Ben Elisha | f91e6d8 | 2015-12-14 16:34:09 +0200 | [diff] [blame] | 488 | err = set_caps(dev, set_ctx, set_sz, |
| 489 | MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE); |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 490 | |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 491 | query_ex: |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 492 | kfree(set_ctx); |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 493 | return err; |
| 494 | } |
| 495 | |
| 496 | static int set_hca_ctrl(struct mlx5_core_dev *dev) |
| 497 | { |
| 498 | struct mlx5_reg_host_endianess he_in; |
| 499 | struct mlx5_reg_host_endianess he_out; |
| 500 | int err; |
| 501 | |
Eli Cohen | fc50db9 | 2015-12-01 18:03:09 +0200 | [diff] [blame] | 502 | if (!mlx5_core_is_pf(dev)) |
| 503 | return 0; |
| 504 | |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 505 | memset(&he_in, 0, sizeof(he_in)); |
| 506 | he_in.he = MLX5_SET_HOST_ENDIANNESS; |
| 507 | err = mlx5_core_access_reg(dev, &he_in, sizeof(he_in), |
| 508 | &he_out, sizeof(he_out), |
| 509 | MLX5_REG_HOST_ENDIANNESS, 0, 1); |
| 510 | return err; |
| 511 | } |
| 512 | |
Eli Cohen | 0b10710 | 2015-12-01 18:03:08 +0200 | [diff] [blame] | 513 | int mlx5_core_enable_hca(struct mlx5_core_dev *dev, u16 func_id) |
Eli Cohen | cd23b14 | 2013-07-18 15:31:08 +0300 | [diff] [blame] | 514 | { |
Saeed Mahameed | c4f287c | 2016-07-19 20:17:12 +0300 | [diff] [blame] | 515 | u32 out[MLX5_ST_SZ_DW(enable_hca_out)] = {0}; |
| 516 | u32 in[MLX5_ST_SZ_DW(enable_hca_in)] = {0}; |
Eli Cohen | cd23b14 | 2013-07-18 15:31:08 +0300 | [diff] [blame] | 517 | |
Eli Cohen | 0b10710 | 2015-12-01 18:03:08 +0200 | [diff] [blame] | 518 | MLX5_SET(enable_hca_in, in, opcode, MLX5_CMD_OP_ENABLE_HCA); |
| 519 | MLX5_SET(enable_hca_in, in, function_id, func_id); |
Saeed Mahameed | c4f287c | 2016-07-19 20:17:12 +0300 | [diff] [blame] | 520 | return mlx5_cmd_exec(dev, &in, sizeof(in), &out, sizeof(out)); |
Eli Cohen | cd23b14 | 2013-07-18 15:31:08 +0300 | [diff] [blame] | 521 | } |
| 522 | |
Eli Cohen | 0b10710 | 2015-12-01 18:03:08 +0200 | [diff] [blame] | 523 | int mlx5_core_disable_hca(struct mlx5_core_dev *dev, u16 func_id) |
Eli Cohen | cd23b14 | 2013-07-18 15:31:08 +0300 | [diff] [blame] | 524 | { |
Saeed Mahameed | c4f287c | 2016-07-19 20:17:12 +0300 | [diff] [blame] | 525 | u32 out[MLX5_ST_SZ_DW(disable_hca_out)] = {0}; |
| 526 | u32 in[MLX5_ST_SZ_DW(disable_hca_in)] = {0}; |
Eli Cohen | cd23b14 | 2013-07-18 15:31:08 +0300 | [diff] [blame] | 527 | |
Eli Cohen | 0b10710 | 2015-12-01 18:03:08 +0200 | [diff] [blame] | 528 | MLX5_SET(disable_hca_in, in, opcode, MLX5_CMD_OP_DISABLE_HCA); |
| 529 | MLX5_SET(disable_hca_in, in, function_id, func_id); |
Saeed Mahameed | c4f287c | 2016-07-19 20:17:12 +0300 | [diff] [blame] | 530 | return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out)); |
Eli Cohen | cd23b14 | 2013-07-18 15:31:08 +0300 | [diff] [blame] | 531 | } |
| 532 | |
Eran Ben Elisha | b084444 | 2015-12-29 14:58:30 +0200 | [diff] [blame] | 533 | cycle_t mlx5_read_internal_timer(struct mlx5_core_dev *dev) |
| 534 | { |
| 535 | u32 timer_h, timer_h1, timer_l; |
| 536 | |
| 537 | timer_h = ioread32be(&dev->iseg->internal_timer_h); |
| 538 | timer_l = ioread32be(&dev->iseg->internal_timer_l); |
| 539 | timer_h1 = ioread32be(&dev->iseg->internal_timer_h); |
| 540 | if (timer_h != timer_h1) /* wrap around */ |
| 541 | timer_l = ioread32be(&dev->iseg->internal_timer_l); |
| 542 | |
| 543 | return (cycle_t)timer_l | (cycle_t)timer_h1 << 32; |
| 544 | } |
| 545 | |
Saeed Mahameed | db058a1 | 2015-05-28 22:28:39 +0300 | [diff] [blame] | 546 | static int mlx5_irq_set_affinity_hint(struct mlx5_core_dev *mdev, int i) |
| 547 | { |
| 548 | struct mlx5_priv *priv = &mdev->priv; |
| 549 | struct msix_entry *msix = priv->msix_arr; |
| 550 | int irq = msix[i + MLX5_EQ_VEC_COMP_BASE].vector; |
Saeed Mahameed | db058a1 | 2015-05-28 22:28:39 +0300 | [diff] [blame] | 551 | |
| 552 | if (!zalloc_cpumask_var(&priv->irq_info[i].mask, GFP_KERNEL)) { |
| 553 | mlx5_core_warn(mdev, "zalloc_cpumask_var failed"); |
| 554 | return -ENOMEM; |
| 555 | } |
| 556 | |
Eli Cohen | efbbc75 | 2016-12-28 14:58:34 +0200 | [diff] [blame] | 557 | cpumask_set_cpu(cpumask_local_spread(i, priv->numa_node), |
David S. Miller | dda922c | 2015-06-01 22:33:25 -0700 | [diff] [blame] | 558 | priv->irq_info[i].mask); |
Saeed Mahameed | db058a1 | 2015-05-28 22:28:39 +0300 | [diff] [blame] | 559 | |
Arnd Bergmann | ecbd702 | 2017-05-29 15:00:17 +0200 | [diff] [blame] | 560 | if (IS_ENABLED(CONFIG_SMP) && |
| 561 | irq_set_affinity_hint(irq, priv->irq_info[i].mask)) |
Tariq Toukan | 2c582b6 | 2017-05-18 13:34:43 +0300 | [diff] [blame] | 562 | mlx5_core_warn(mdev, "irq_set_affinity_hint failed, irq 0x%.4x", irq); |
Saeed Mahameed | db058a1 | 2015-05-28 22:28:39 +0300 | [diff] [blame] | 563 | |
| 564 | return 0; |
Saeed Mahameed | db058a1 | 2015-05-28 22:28:39 +0300 | [diff] [blame] | 565 | } |
| 566 | |
| 567 | static void mlx5_irq_clear_affinity_hint(struct mlx5_core_dev *mdev, int i) |
| 568 | { |
| 569 | struct mlx5_priv *priv = &mdev->priv; |
| 570 | struct msix_entry *msix = priv->msix_arr; |
| 571 | int irq = msix[i + MLX5_EQ_VEC_COMP_BASE].vector; |
| 572 | |
| 573 | irq_set_affinity_hint(irq, NULL); |
| 574 | free_cpumask_var(priv->irq_info[i].mask); |
| 575 | } |
| 576 | |
| 577 | static int mlx5_irq_set_affinity_hints(struct mlx5_core_dev *mdev) |
| 578 | { |
| 579 | int err; |
| 580 | int i; |
| 581 | |
| 582 | for (i = 0; i < mdev->priv.eq_table.num_comp_vectors; i++) { |
| 583 | err = mlx5_irq_set_affinity_hint(mdev, i); |
| 584 | if (err) |
| 585 | goto err_out; |
| 586 | } |
| 587 | |
| 588 | return 0; |
| 589 | |
| 590 | err_out: |
| 591 | for (i--; i >= 0; i--) |
| 592 | mlx5_irq_clear_affinity_hint(mdev, i); |
| 593 | |
| 594 | return err; |
| 595 | } |
| 596 | |
| 597 | static void mlx5_irq_clear_affinity_hints(struct mlx5_core_dev *mdev) |
| 598 | { |
| 599 | int i; |
| 600 | |
| 601 | for (i = 0; i < mdev->priv.eq_table.num_comp_vectors; i++) |
| 602 | mlx5_irq_clear_affinity_hint(mdev, i); |
| 603 | } |
| 604 | |
Doron Tsur | 0b6e26c | 2016-01-17 11:25:47 +0200 | [diff] [blame] | 605 | int mlx5_vector2eqn(struct mlx5_core_dev *dev, int vector, int *eqn, |
| 606 | unsigned int *irqn) |
Saeed Mahameed | 233d05d | 2015-04-02 17:07:32 +0300 | [diff] [blame] | 607 | { |
| 608 | struct mlx5_eq_table *table = &dev->priv.eq_table; |
| 609 | struct mlx5_eq *eq, *n; |
| 610 | int err = -ENOENT; |
| 611 | |
| 612 | spin_lock(&table->lock); |
| 613 | list_for_each_entry_safe(eq, n, &table->comp_eqs_list, list) { |
| 614 | if (eq->index == vector) { |
| 615 | *eqn = eq->eqn; |
| 616 | *irqn = eq->irqn; |
| 617 | err = 0; |
| 618 | break; |
| 619 | } |
| 620 | } |
| 621 | spin_unlock(&table->lock); |
| 622 | |
| 623 | return err; |
| 624 | } |
| 625 | EXPORT_SYMBOL(mlx5_vector2eqn); |
| 626 | |
Matan Barak | 94c6825 | 2016-04-17 17:08:40 +0300 | [diff] [blame] | 627 | struct mlx5_eq *mlx5_eqn2eq(struct mlx5_core_dev *dev, int eqn) |
| 628 | { |
| 629 | struct mlx5_eq_table *table = &dev->priv.eq_table; |
| 630 | struct mlx5_eq *eq; |
| 631 | |
| 632 | spin_lock(&table->lock); |
| 633 | list_for_each_entry(eq, &table->comp_eqs_list, list) |
| 634 | if (eq->eqn == eqn) { |
| 635 | spin_unlock(&table->lock); |
| 636 | return eq; |
| 637 | } |
| 638 | |
| 639 | spin_unlock(&table->lock); |
| 640 | |
| 641 | return ERR_PTR(-ENOENT); |
| 642 | } |
| 643 | |
Saeed Mahameed | 233d05d | 2015-04-02 17:07:32 +0300 | [diff] [blame] | 644 | static void free_comp_eqs(struct mlx5_core_dev *dev) |
| 645 | { |
| 646 | struct mlx5_eq_table *table = &dev->priv.eq_table; |
| 647 | struct mlx5_eq *eq, *n; |
| 648 | |
Maor Gottlieb | 5a7b27e | 2016-04-29 01:36:39 +0300 | [diff] [blame] | 649 | #ifdef CONFIG_RFS_ACCEL |
| 650 | if (dev->rmap) { |
| 651 | free_irq_cpu_rmap(dev->rmap); |
| 652 | dev->rmap = NULL; |
| 653 | } |
| 654 | #endif |
Saeed Mahameed | 233d05d | 2015-04-02 17:07:32 +0300 | [diff] [blame] | 655 | spin_lock(&table->lock); |
| 656 | list_for_each_entry_safe(eq, n, &table->comp_eqs_list, list) { |
| 657 | list_del(&eq->list); |
| 658 | spin_unlock(&table->lock); |
| 659 | if (mlx5_destroy_unmap_eq(dev, eq)) |
| 660 | mlx5_core_warn(dev, "failed to destroy EQ 0x%x\n", |
| 661 | eq->eqn); |
| 662 | kfree(eq); |
| 663 | spin_lock(&table->lock); |
| 664 | } |
| 665 | spin_unlock(&table->lock); |
| 666 | } |
| 667 | |
| 668 | static int alloc_comp_eqs(struct mlx5_core_dev *dev) |
| 669 | { |
| 670 | struct mlx5_eq_table *table = &dev->priv.eq_table; |
Saeed Mahameed | db058a1 | 2015-05-28 22:28:39 +0300 | [diff] [blame] | 671 | char name[MLX5_MAX_IRQ_NAME]; |
Saeed Mahameed | 233d05d | 2015-04-02 17:07:32 +0300 | [diff] [blame] | 672 | struct mlx5_eq *eq; |
| 673 | int ncomp_vec; |
| 674 | int nent; |
| 675 | int err; |
| 676 | int i; |
| 677 | |
| 678 | INIT_LIST_HEAD(&table->comp_eqs_list); |
| 679 | ncomp_vec = table->num_comp_vectors; |
| 680 | nent = MLX5_COMP_EQ_SIZE; |
Maor Gottlieb | 5a7b27e | 2016-04-29 01:36:39 +0300 | [diff] [blame] | 681 | #ifdef CONFIG_RFS_ACCEL |
| 682 | dev->rmap = alloc_irq_cpu_rmap(ncomp_vec); |
| 683 | if (!dev->rmap) |
| 684 | return -ENOMEM; |
| 685 | #endif |
Saeed Mahameed | 233d05d | 2015-04-02 17:07:32 +0300 | [diff] [blame] | 686 | for (i = 0; i < ncomp_vec; i++) { |
| 687 | eq = kzalloc(sizeof(*eq), GFP_KERNEL); |
| 688 | if (!eq) { |
| 689 | err = -ENOMEM; |
| 690 | goto clean; |
| 691 | } |
| 692 | |
Maor Gottlieb | 5a7b27e | 2016-04-29 01:36:39 +0300 | [diff] [blame] | 693 | #ifdef CONFIG_RFS_ACCEL |
| 694 | irq_cpu_rmap_add(dev->rmap, |
| 695 | dev->priv.msix_arr[i + MLX5_EQ_VEC_COMP_BASE].vector); |
| 696 | #endif |
Saeed Mahameed | db058a1 | 2015-05-28 22:28:39 +0300 | [diff] [blame] | 697 | snprintf(name, MLX5_MAX_IRQ_NAME, "mlx5_comp%d", i); |
Saeed Mahameed | 233d05d | 2015-04-02 17:07:32 +0300 | [diff] [blame] | 698 | err = mlx5_create_map_eq(dev, eq, |
| 699 | i + MLX5_EQ_VEC_COMP_BASE, nent, 0, |
| 700 | name, &dev->priv.uuari.uars[0]); |
| 701 | if (err) { |
| 702 | kfree(eq); |
| 703 | goto clean; |
| 704 | } |
| 705 | mlx5_core_dbg(dev, "allocated completion EQN %d\n", eq->eqn); |
| 706 | eq->index = i; |
| 707 | spin_lock(&table->lock); |
| 708 | list_add_tail(&eq->list, &table->comp_eqs_list); |
| 709 | spin_unlock(&table->lock); |
| 710 | } |
| 711 | |
| 712 | return 0; |
| 713 | |
| 714 | clean: |
| 715 | free_comp_eqs(dev); |
| 716 | return err; |
| 717 | } |
| 718 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 719 | static int mlx5_core_set_issi(struct mlx5_core_dev *dev) |
| 720 | { |
Saeed Mahameed | c4f287c | 2016-07-19 20:17:12 +0300 | [diff] [blame] | 721 | u32 query_in[MLX5_ST_SZ_DW(query_issi_in)] = {0}; |
| 722 | u32 query_out[MLX5_ST_SZ_DW(query_issi_out)] = {0}; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 723 | u32 sup_issi; |
Saeed Mahameed | c4f287c | 2016-07-19 20:17:12 +0300 | [diff] [blame] | 724 | int err; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 725 | |
| 726 | MLX5_SET(query_issi_in, query_in, opcode, MLX5_CMD_OP_QUERY_ISSI); |
Saeed Mahameed | c4f287c | 2016-07-19 20:17:12 +0300 | [diff] [blame] | 727 | err = mlx5_cmd_exec(dev, query_in, sizeof(query_in), |
| 728 | query_out, sizeof(query_out)); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 729 | if (err) { |
Saeed Mahameed | c4f287c | 2016-07-19 20:17:12 +0300 | [diff] [blame] | 730 | u32 syndrome; |
| 731 | u8 status; |
| 732 | |
| 733 | mlx5_cmd_mbox_status(query_out, &status, &syndrome); |
Kamal Heib | f9c14e4 | 2016-12-06 17:32:45 +0200 | [diff] [blame] | 734 | if (!status || syndrome == MLX5_DRIVER_SYND) { |
| 735 | mlx5_core_err(dev, "Failed to query ISSI err(%d) status(%d) synd(%d)\n", |
| 736 | err, status, syndrome); |
| 737 | return err; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 738 | } |
| 739 | |
Kamal Heib | f9c14e4 | 2016-12-06 17:32:45 +0200 | [diff] [blame] | 740 | mlx5_core_warn(dev, "Query ISSI is not supported by FW, ISSI is 0\n"); |
| 741 | dev->issi = 0; |
| 742 | return 0; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 743 | } |
| 744 | |
| 745 | sup_issi = MLX5_GET(query_issi_out, query_out, supported_issi_dw0); |
| 746 | |
| 747 | if (sup_issi & (1 << 1)) { |
Saeed Mahameed | c4f287c | 2016-07-19 20:17:12 +0300 | [diff] [blame] | 748 | u32 set_in[MLX5_ST_SZ_DW(set_issi_in)] = {0}; |
| 749 | u32 set_out[MLX5_ST_SZ_DW(set_issi_out)] = {0}; |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 750 | |
| 751 | MLX5_SET(set_issi_in, set_in, opcode, MLX5_CMD_OP_SET_ISSI); |
| 752 | MLX5_SET(set_issi_in, set_in, current_issi, 1); |
Saeed Mahameed | c4f287c | 2016-07-19 20:17:12 +0300 | [diff] [blame] | 753 | err = mlx5_cmd_exec(dev, set_in, sizeof(set_in), |
| 754 | set_out, sizeof(set_out)); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 755 | if (err) { |
Kamal Heib | f9c14e4 | 2016-12-06 17:32:45 +0200 | [diff] [blame] | 756 | mlx5_core_err(dev, "Failed to set ISSI to 1 err(%d)\n", |
| 757 | err); |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 758 | return err; |
| 759 | } |
| 760 | |
| 761 | dev->issi = 1; |
| 762 | |
| 763 | return 0; |
Haggai Abramonvsky | e74a1db | 2015-06-04 19:30:39 +0300 | [diff] [blame] | 764 | } else if (sup_issi & (1 << 0) || !sup_issi) { |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 765 | return 0; |
| 766 | } |
| 767 | |
| 768 | return -ENOTSUPP; |
| 769 | } |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 770 | |
Aviv Heller | 7907f23 | 2016-04-17 16:57:32 +0300 | [diff] [blame] | 771 | |
Majd Dibbiny | a31208b | 2015-09-25 10:49:14 +0300 | [diff] [blame] | 772 | static int mlx5_pci_init(struct mlx5_core_dev *dev, struct mlx5_priv *priv) |
| 773 | { |
| 774 | struct pci_dev *pdev = dev->pdev; |
| 775 | int err = 0; |
| 776 | |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 777 | pci_set_drvdata(dev->pdev, dev); |
| 778 | strncpy(priv->name, dev_name(&pdev->dev), MLX5_MAX_NAME_LEN); |
| 779 | priv->name[MLX5_MAX_NAME_LEN - 1] = 0; |
| 780 | |
| 781 | mutex_init(&priv->pgdir_mutex); |
| 782 | INIT_LIST_HEAD(&priv->pgdir_list); |
| 783 | spin_lock_init(&priv->mkey_lock); |
| 784 | |
Saeed Mahameed | 311c7c7 | 2015-07-23 23:35:57 +0300 | [diff] [blame] | 785 | mutex_init(&priv->alloc_mutex); |
| 786 | |
| 787 | priv->numa_node = dev_to_node(&dev->pdev->dev); |
| 788 | |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 789 | priv->dbg_root = debugfs_create_dir(dev_name(&pdev->dev), mlx5_debugfs_root); |
Jack Morgenstein | 6d1659b | 2018-08-07 09:59:03 +0300 | [diff] [blame] | 790 | if (!priv->dbg_root) { |
| 791 | dev_err(&pdev->dev, "Cannot create debugfs dir, aborting\n"); |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 792 | return -ENOMEM; |
Jack Morgenstein | 6d1659b | 2018-08-07 09:59:03 +0300 | [diff] [blame] | 793 | } |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 794 | |
Majd Dibbiny | 89d44f0 | 2015-10-14 17:43:46 +0300 | [diff] [blame] | 795 | err = mlx5_pci_enable_device(dev); |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 796 | if (err) { |
Joe Perches | 1a91de2 | 2014-05-07 12:52:57 -0700 | [diff] [blame] | 797 | dev_err(&pdev->dev, "Cannot enable PCI device, aborting\n"); |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 798 | goto err_dbg; |
| 799 | } |
| 800 | |
| 801 | err = request_bar(pdev); |
| 802 | if (err) { |
Joe Perches | 1a91de2 | 2014-05-07 12:52:57 -0700 | [diff] [blame] | 803 | dev_err(&pdev->dev, "error requesting BARs, aborting\n"); |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 804 | goto err_disable; |
| 805 | } |
| 806 | |
| 807 | pci_set_master(pdev); |
| 808 | |
| 809 | err = set_dma_caps(pdev); |
| 810 | if (err) { |
| 811 | dev_err(&pdev->dev, "Failed setting DMA capabilities mask, aborting\n"); |
| 812 | goto err_clr_master; |
| 813 | } |
| 814 | |
| 815 | dev->iseg_base = pci_resource_start(dev->pdev, 0); |
| 816 | dev->iseg = ioremap(dev->iseg_base, sizeof(*dev->iseg)); |
| 817 | if (!dev->iseg) { |
| 818 | err = -ENOMEM; |
| 819 | dev_err(&pdev->dev, "Failed mapping initialization segment, aborting\n"); |
| 820 | goto err_clr_master; |
| 821 | } |
Majd Dibbiny | a31208b | 2015-09-25 10:49:14 +0300 | [diff] [blame] | 822 | |
| 823 | return 0; |
| 824 | |
| 825 | err_clr_master: |
| 826 | pci_clear_master(dev->pdev); |
| 827 | release_bar(dev->pdev); |
| 828 | err_disable: |
Majd Dibbiny | 89d44f0 | 2015-10-14 17:43:46 +0300 | [diff] [blame] | 829 | mlx5_pci_disable_device(dev); |
Majd Dibbiny | a31208b | 2015-09-25 10:49:14 +0300 | [diff] [blame] | 830 | |
| 831 | err_dbg: |
| 832 | debugfs_remove(priv->dbg_root); |
| 833 | return err; |
| 834 | } |
| 835 | |
| 836 | static void mlx5_pci_close(struct mlx5_core_dev *dev, struct mlx5_priv *priv) |
| 837 | { |
| 838 | iounmap(dev->iseg); |
| 839 | pci_clear_master(dev->pdev); |
| 840 | release_bar(dev->pdev); |
Majd Dibbiny | 89d44f0 | 2015-10-14 17:43:46 +0300 | [diff] [blame] | 841 | mlx5_pci_disable_device(dev); |
Jack Morgenstein | 6d1659b | 2018-08-07 09:59:03 +0300 | [diff] [blame] | 842 | debugfs_remove_recursive(priv->dbg_root); |
Majd Dibbiny | a31208b | 2015-09-25 10:49:14 +0300 | [diff] [blame] | 843 | } |
| 844 | |
Mohamad Haj Yahia | 59211bd | 2016-09-09 17:35:20 +0300 | [diff] [blame] | 845 | static int mlx5_init_once(struct mlx5_core_dev *dev, struct mlx5_priv *priv) |
| 846 | { |
| 847 | struct pci_dev *pdev = dev->pdev; |
| 848 | int err; |
| 849 | |
Mohamad Haj Yahia | 59211bd | 2016-09-09 17:35:20 +0300 | [diff] [blame] | 850 | err = mlx5_query_board_id(dev); |
| 851 | if (err) { |
| 852 | dev_err(&pdev->dev, "query board id failed\n"); |
| 853 | goto out; |
| 854 | } |
| 855 | |
| 856 | err = mlx5_eq_init(dev); |
| 857 | if (err) { |
| 858 | dev_err(&pdev->dev, "failed to initialize eq\n"); |
| 859 | goto out; |
| 860 | } |
| 861 | |
| 862 | MLX5_INIT_DOORBELL_LOCK(&priv->cq_uar_lock); |
| 863 | |
| 864 | err = mlx5_init_cq_table(dev); |
| 865 | if (err) { |
| 866 | dev_err(&pdev->dev, "failed to initialize cq table\n"); |
| 867 | goto err_eq_cleanup; |
| 868 | } |
| 869 | |
| 870 | mlx5_init_qp_table(dev); |
| 871 | |
| 872 | mlx5_init_srq_table(dev); |
| 873 | |
| 874 | mlx5_init_mkey_table(dev); |
| 875 | |
| 876 | err = mlx5_init_rl_table(dev); |
| 877 | if (err) { |
| 878 | dev_err(&pdev->dev, "Failed to init rate limiting\n"); |
| 879 | goto err_tables_cleanup; |
| 880 | } |
| 881 | |
Mohamad Haj Yahia | c2d6e31 | 2016-09-09 17:35:23 +0300 | [diff] [blame] | 882 | #ifdef CONFIG_MLX5_CORE_EN |
| 883 | err = mlx5_eswitch_init(dev); |
| 884 | if (err) { |
| 885 | dev_err(&pdev->dev, "Failed to init eswitch %d\n", err); |
| 886 | goto err_rl_cleanup; |
| 887 | } |
| 888 | #endif |
| 889 | |
| 890 | err = mlx5_sriov_init(dev); |
| 891 | if (err) { |
| 892 | dev_err(&pdev->dev, "Failed to init sriov %d\n", err); |
| 893 | goto err_eswitch_cleanup; |
| 894 | } |
| 895 | |
Mohamad Haj Yahia | 59211bd | 2016-09-09 17:35:20 +0300 | [diff] [blame] | 896 | return 0; |
| 897 | |
Mohamad Haj Yahia | c2d6e31 | 2016-09-09 17:35:23 +0300 | [diff] [blame] | 898 | err_eswitch_cleanup: |
| 899 | #ifdef CONFIG_MLX5_CORE_EN |
| 900 | mlx5_eswitch_cleanup(dev->priv.eswitch); |
| 901 | |
| 902 | err_rl_cleanup: |
| 903 | #endif |
| 904 | mlx5_cleanup_rl_table(dev); |
| 905 | |
Mohamad Haj Yahia | 59211bd | 2016-09-09 17:35:20 +0300 | [diff] [blame] | 906 | err_tables_cleanup: |
| 907 | mlx5_cleanup_mkey_table(dev); |
| 908 | mlx5_cleanup_srq_table(dev); |
| 909 | mlx5_cleanup_qp_table(dev); |
| 910 | mlx5_cleanup_cq_table(dev); |
| 911 | |
| 912 | err_eq_cleanup: |
| 913 | mlx5_eq_cleanup(dev); |
| 914 | |
| 915 | out: |
| 916 | return err; |
| 917 | } |
| 918 | |
| 919 | static void mlx5_cleanup_once(struct mlx5_core_dev *dev) |
| 920 | { |
Mohamad Haj Yahia | c2d6e31 | 2016-09-09 17:35:23 +0300 | [diff] [blame] | 921 | mlx5_sriov_cleanup(dev); |
| 922 | #ifdef CONFIG_MLX5_CORE_EN |
| 923 | mlx5_eswitch_cleanup(dev->priv.eswitch); |
| 924 | #endif |
Mohamad Haj Yahia | 59211bd | 2016-09-09 17:35:20 +0300 | [diff] [blame] | 925 | mlx5_cleanup_rl_table(dev); |
| 926 | mlx5_cleanup_mkey_table(dev); |
| 927 | mlx5_cleanup_srq_table(dev); |
| 928 | mlx5_cleanup_qp_table(dev); |
| 929 | mlx5_cleanup_cq_table(dev); |
| 930 | mlx5_eq_cleanup(dev); |
| 931 | } |
| 932 | |
| 933 | static int mlx5_load_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv, |
| 934 | bool boot) |
Majd Dibbiny | a31208b | 2015-09-25 10:49:14 +0300 | [diff] [blame] | 935 | { |
| 936 | struct pci_dev *pdev = dev->pdev; |
| 937 | int err; |
| 938 | |
Majd Dibbiny | 89d44f0 | 2015-10-14 17:43:46 +0300 | [diff] [blame] | 939 | mutex_lock(&dev->intf_state_mutex); |
Majd Dibbiny | 5fc7197 | 2016-04-22 00:33:07 +0300 | [diff] [blame] | 940 | if (test_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state)) { |
Majd Dibbiny | 89d44f0 | 2015-10-14 17:43:46 +0300 | [diff] [blame] | 941 | dev_warn(&dev->pdev->dev, "%s: interface is up, NOP\n", |
| 942 | __func__); |
| 943 | goto out; |
| 944 | } |
| 945 | |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 946 | dev_info(&pdev->dev, "firmware version: %d.%d.%d\n", fw_rev_maj(dev), |
| 947 | fw_rev_min(dev), fw_rev_sub(dev)); |
| 948 | |
Majd Dibbiny | 89d44f0 | 2015-10-14 17:43:46 +0300 | [diff] [blame] | 949 | /* on load removing any previous indication of internal error, device is |
| 950 | * up |
| 951 | */ |
| 952 | dev->state = MLX5_DEVICE_STATE_UP; |
| 953 | |
Eli Cohen | 25ff350 | 2017-06-08 11:33:16 -0500 | [diff] [blame] | 954 | /* wait for firmware to accept initialization segments configurations |
| 955 | */ |
| 956 | err = wait_fw_init(dev, FW_PRE_INIT_TIMEOUT_MILI); |
| 957 | if (err) { |
| 958 | dev_err(&dev->pdev->dev, "Firmware over %d MS in pre-initializing state, aborting\n", |
| 959 | FW_PRE_INIT_TIMEOUT_MILI); |
| 960 | goto out; |
| 961 | } |
| 962 | |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 963 | err = mlx5_cmd_init(dev); |
| 964 | if (err) { |
| 965 | dev_err(&pdev->dev, "Failed initializing command interface, aborting\n"); |
Majd Dibbiny | 89d44f0 | 2015-10-14 17:43:46 +0300 | [diff] [blame] | 966 | goto out_err; |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 967 | } |
| 968 | |
Eli Cohen | e329724 | 2015-10-14 17:43:47 +0300 | [diff] [blame] | 969 | err = wait_fw_init(dev, FW_INIT_TIMEOUT_MILI); |
| 970 | if (err) { |
| 971 | dev_err(&dev->pdev->dev, "Firmware over %d MS in initializing state, aborting\n", |
| 972 | FW_INIT_TIMEOUT_MILI); |
Mohamad Haj Yahia | 03641c4 | 2017-03-30 17:00:25 +0300 | [diff] [blame] | 973 | goto err_cmd_cleanup; |
Eli Cohen | e329724 | 2015-10-14 17:43:47 +0300 | [diff] [blame] | 974 | } |
| 975 | |
Eli Cohen | 0b10710 | 2015-12-01 18:03:08 +0200 | [diff] [blame] | 976 | err = mlx5_core_enable_hca(dev, 0); |
Eli Cohen | cd23b14 | 2013-07-18 15:31:08 +0300 | [diff] [blame] | 977 | if (err) { |
| 978 | dev_err(&pdev->dev, "enable hca failed\n"); |
Mohamad Haj Yahia | 59211bd | 2016-09-09 17:35:20 +0300 | [diff] [blame] | 979 | goto err_cmd_cleanup; |
Eli Cohen | cd23b14 | 2013-07-18 15:31:08 +0300 | [diff] [blame] | 980 | } |
| 981 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 982 | err = mlx5_core_set_issi(dev); |
| 983 | if (err) { |
| 984 | dev_err(&pdev->dev, "failed to set issi\n"); |
| 985 | goto err_disable_hca; |
| 986 | } |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 987 | |
Eli Cohen | cd23b14 | 2013-07-18 15:31:08 +0300 | [diff] [blame] | 988 | err = mlx5_satisfy_startup_pages(dev, 1); |
| 989 | if (err) { |
| 990 | dev_err(&pdev->dev, "failed to allocate boot pages\n"); |
| 991 | goto err_disable_hca; |
| 992 | } |
| 993 | |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 994 | err = set_hca_ctrl(dev); |
| 995 | if (err) { |
| 996 | dev_err(&pdev->dev, "set_hca_ctrl failed\n"); |
Eli Cohen | cd23b14 | 2013-07-18 15:31:08 +0300 | [diff] [blame] | 997 | goto reclaim_boot_pages; |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 998 | } |
| 999 | |
| 1000 | err = handle_hca_cap(dev); |
| 1001 | if (err) { |
| 1002 | dev_err(&pdev->dev, "handle_hca_cap failed\n"); |
Eli Cohen | cd23b14 | 2013-07-18 15:31:08 +0300 | [diff] [blame] | 1003 | goto reclaim_boot_pages; |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 1004 | } |
| 1005 | |
Eran Ben Elisha | f91e6d8 | 2015-12-14 16:34:09 +0200 | [diff] [blame] | 1006 | err = handle_hca_cap_atomic(dev); |
| 1007 | if (err) { |
| 1008 | dev_err(&pdev->dev, "handle_hca_cap_atomic failed\n"); |
| 1009 | goto reclaim_boot_pages; |
| 1010 | } |
| 1011 | |
Eli Cohen | cd23b14 | 2013-07-18 15:31:08 +0300 | [diff] [blame] | 1012 | err = mlx5_satisfy_startup_pages(dev, 0); |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 1013 | if (err) { |
Eli Cohen | cd23b14 | 2013-07-18 15:31:08 +0300 | [diff] [blame] | 1014 | dev_err(&pdev->dev, "failed to allocate init pages\n"); |
| 1015 | goto reclaim_boot_pages; |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 1016 | } |
| 1017 | |
| 1018 | err = mlx5_pagealloc_start(dev); |
| 1019 | if (err) { |
| 1020 | dev_err(&pdev->dev, "mlx5_pagealloc_start failed\n"); |
Eli Cohen | cd23b14 | 2013-07-18 15:31:08 +0300 | [diff] [blame] | 1021 | goto reclaim_boot_pages; |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 1022 | } |
| 1023 | |
| 1024 | err = mlx5_cmd_init_hca(dev); |
| 1025 | if (err) { |
| 1026 | dev_err(&pdev->dev, "init hca failed\n"); |
| 1027 | goto err_pagealloc_stop; |
| 1028 | } |
| 1029 | |
| 1030 | mlx5_start_health_poll(dev); |
| 1031 | |
Daniel Jurgens | bba1574 | 2016-10-25 18:36:25 +0300 | [diff] [blame] | 1032 | err = mlx5_query_hca_caps(dev); |
| 1033 | if (err) { |
| 1034 | dev_err(&pdev->dev, "query hca failed\n"); |
| 1035 | goto err_stop_poll; |
| 1036 | } |
| 1037 | |
Mohamad Haj Yahia | 59211bd | 2016-09-09 17:35:20 +0300 | [diff] [blame] | 1038 | if (boot && mlx5_init_once(dev, priv)) { |
| 1039 | dev_err(&pdev->dev, "sw objs init failed\n"); |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 1040 | goto err_stop_poll; |
| 1041 | } |
| 1042 | |
| 1043 | err = mlx5_enable_msix(dev); |
| 1044 | if (err) { |
| 1045 | dev_err(&pdev->dev, "enable msix failed\n"); |
Mohamad Haj Yahia | 59211bd | 2016-09-09 17:35:20 +0300 | [diff] [blame] | 1046 | goto err_cleanup_once; |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 1047 | } |
| 1048 | |
| 1049 | err = mlx5_alloc_uuars(dev, &priv->uuari); |
| 1050 | if (err) { |
| 1051 | dev_err(&pdev->dev, "Failed allocating uar, aborting\n"); |
Mohamad Haj Yahia | 59211bd | 2016-09-09 17:35:20 +0300 | [diff] [blame] | 1052 | goto err_disable_msix; |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 1053 | } |
| 1054 | |
| 1055 | err = mlx5_start_eqs(dev); |
| 1056 | if (err) { |
| 1057 | dev_err(&pdev->dev, "Failed to start pages and async EQs\n"); |
| 1058 | goto err_free_uar; |
| 1059 | } |
| 1060 | |
Saeed Mahameed | 233d05d | 2015-04-02 17:07:32 +0300 | [diff] [blame] | 1061 | err = alloc_comp_eqs(dev); |
| 1062 | if (err) { |
| 1063 | dev_err(&pdev->dev, "Failed to alloc completion EQs\n"); |
| 1064 | goto err_stop_eqs; |
| 1065 | } |
| 1066 | |
Saeed Mahameed | db058a1 | 2015-05-28 22:28:39 +0300 | [diff] [blame] | 1067 | err = mlx5_irq_set_affinity_hints(dev); |
Mohamad Haj Yahia | 59211bd | 2016-09-09 17:35:20 +0300 | [diff] [blame] | 1068 | if (err) { |
Saeed Mahameed | db058a1 | 2015-05-28 22:28:39 +0300 | [diff] [blame] | 1069 | dev_err(&pdev->dev, "Failed to alloc affinity hint cpumask\n"); |
Mohamad Haj Yahia | 59211bd | 2016-09-09 17:35:20 +0300 | [diff] [blame] | 1070 | goto err_affinity_hints; |
| 1071 | } |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 1072 | |
Maor Gottlieb | 86d722a | 2015-12-10 17:12:44 +0200 | [diff] [blame] | 1073 | err = mlx5_init_fs(dev); |
| 1074 | if (err) { |
| 1075 | dev_err(&pdev->dev, "Failed to init flow steering\n"); |
| 1076 | goto err_fs; |
| 1077 | } |
Yevgeny Petrilin | 1466cc5 | 2016-06-23 17:02:37 +0300 | [diff] [blame] | 1078 | |
Saeed Mahameed | 073bb18 | 2015-12-01 18:03:18 +0200 | [diff] [blame] | 1079 | #ifdef CONFIG_MLX5_CORE_EN |
Mohamad Haj Yahia | c2d6e31 | 2016-09-09 17:35:23 +0300 | [diff] [blame] | 1080 | mlx5_eswitch_attach(dev->priv.eswitch); |
Saeed Mahameed | 073bb18 | 2015-12-01 18:03:18 +0200 | [diff] [blame] | 1081 | #endif |
| 1082 | |
Mohamad Haj Yahia | c2d6e31 | 2016-09-09 17:35:23 +0300 | [diff] [blame] | 1083 | err = mlx5_sriov_attach(dev); |
Eli Cohen | fc50db9 | 2015-12-01 18:03:09 +0200 | [diff] [blame] | 1084 | if (err) { |
| 1085 | dev_err(&pdev->dev, "sriov init failed %d\n", err); |
| 1086 | goto err_sriov; |
| 1087 | } |
| 1088 | |
Mohamad Haj Yahia | 737a234 | 2016-09-09 17:35:19 +0300 | [diff] [blame] | 1089 | if (mlx5_device_registered(dev)) { |
| 1090 | mlx5_attach_device(dev); |
| 1091 | } else { |
| 1092 | err = mlx5_register_device(dev); |
| 1093 | if (err) { |
| 1094 | dev_err(&pdev->dev, "mlx5_register_device failed %d\n", err); |
| 1095 | goto err_reg_dev; |
| 1096 | } |
Majd Dibbiny | a31208b | 2015-09-25 10:49:14 +0300 | [diff] [blame] | 1097 | } |
| 1098 | |
Majd Dibbiny | 5fc7197 | 2016-04-22 00:33:07 +0300 | [diff] [blame] | 1099 | clear_bit(MLX5_INTERFACE_STATE_DOWN, &dev->intf_state); |
| 1100 | set_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state); |
Majd Dibbiny | 89d44f0 | 2015-10-14 17:43:46 +0300 | [diff] [blame] | 1101 | out: |
| 1102 | mutex_unlock(&dev->intf_state_mutex); |
| 1103 | |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 1104 | return 0; |
| 1105 | |
Mohamad Haj Yahia | 59211bd | 2016-09-09 17:35:20 +0300 | [diff] [blame] | 1106 | err_reg_dev: |
Mohamad Haj Yahia | c2d6e31 | 2016-09-09 17:35:23 +0300 | [diff] [blame] | 1107 | mlx5_sriov_detach(dev); |
Eli Cohen | fc50db9 | 2015-12-01 18:03:09 +0200 | [diff] [blame] | 1108 | |
Mohamad Haj Yahia | 59211bd | 2016-09-09 17:35:20 +0300 | [diff] [blame] | 1109 | err_sriov: |
Saeed Mahameed | 073bb18 | 2015-12-01 18:03:18 +0200 | [diff] [blame] | 1110 | #ifdef CONFIG_MLX5_CORE_EN |
Mohamad Haj Yahia | c2d6e31 | 2016-09-09 17:35:23 +0300 | [diff] [blame] | 1111 | mlx5_eswitch_detach(dev->priv.eswitch); |
Saeed Mahameed | 073bb18 | 2015-12-01 18:03:18 +0200 | [diff] [blame] | 1112 | #endif |
Maor Gottlieb | 86d722a | 2015-12-10 17:12:44 +0200 | [diff] [blame] | 1113 | mlx5_cleanup_fs(dev); |
Mohamad Haj Yahia | 59211bd | 2016-09-09 17:35:20 +0300 | [diff] [blame] | 1114 | |
Maor Gottlieb | 86d722a | 2015-12-10 17:12:44 +0200 | [diff] [blame] | 1115 | err_fs: |
Majd Dibbiny | a31208b | 2015-09-25 10:49:14 +0300 | [diff] [blame] | 1116 | mlx5_irq_clear_affinity_hints(dev); |
Mohamad Haj Yahia | 59211bd | 2016-09-09 17:35:20 +0300 | [diff] [blame] | 1117 | |
| 1118 | err_affinity_hints: |
Saeed Mahameed | db058a1 | 2015-05-28 22:28:39 +0300 | [diff] [blame] | 1119 | free_comp_eqs(dev); |
| 1120 | |
Saeed Mahameed | 233d05d | 2015-04-02 17:07:32 +0300 | [diff] [blame] | 1121 | err_stop_eqs: |
| 1122 | mlx5_stop_eqs(dev); |
| 1123 | |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 1124 | err_free_uar: |
| 1125 | mlx5_free_uuars(dev, &priv->uuari); |
| 1126 | |
Mohamad Haj Yahia | 59211bd | 2016-09-09 17:35:20 +0300 | [diff] [blame] | 1127 | err_disable_msix: |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 1128 | mlx5_disable_msix(dev); |
| 1129 | |
Mohamad Haj Yahia | 59211bd | 2016-09-09 17:35:20 +0300 | [diff] [blame] | 1130 | err_cleanup_once: |
| 1131 | if (boot) |
| 1132 | mlx5_cleanup_once(dev); |
| 1133 | |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 1134 | err_stop_poll: |
Jack Morgenstein | ccb8961 | 2018-08-05 09:19:33 +0300 | [diff] [blame] | 1135 | mlx5_stop_health_poll(dev, boot); |
Eli Cohen | 1bde6e3 | 2014-01-14 17:45:22 +0200 | [diff] [blame] | 1136 | if (mlx5_cmd_teardown_hca(dev)) { |
| 1137 | dev_err(&dev->pdev->dev, "tear_down_hca failed, skip cleanup\n"); |
Majd Dibbiny | 89d44f0 | 2015-10-14 17:43:46 +0300 | [diff] [blame] | 1138 | goto out_err; |
Eli Cohen | 1bde6e3 | 2014-01-14 17:45:22 +0200 | [diff] [blame] | 1139 | } |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 1140 | |
| 1141 | err_pagealloc_stop: |
| 1142 | mlx5_pagealloc_stop(dev); |
| 1143 | |
Eli Cohen | cd23b14 | 2013-07-18 15:31:08 +0300 | [diff] [blame] | 1144 | reclaim_boot_pages: |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 1145 | mlx5_reclaim_startup_pages(dev); |
| 1146 | |
Eli Cohen | cd23b14 | 2013-07-18 15:31:08 +0300 | [diff] [blame] | 1147 | err_disable_hca: |
Eli Cohen | 0b10710 | 2015-12-01 18:03:08 +0200 | [diff] [blame] | 1148 | mlx5_core_disable_hca(dev, 0); |
Eli Cohen | cd23b14 | 2013-07-18 15:31:08 +0300 | [diff] [blame] | 1149 | |
Mohamad Haj Yahia | 59211bd | 2016-09-09 17:35:20 +0300 | [diff] [blame] | 1150 | err_cmd_cleanup: |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 1151 | mlx5_cmd_cleanup(dev); |
| 1152 | |
Majd Dibbiny | 89d44f0 | 2015-10-14 17:43:46 +0300 | [diff] [blame] | 1153 | out_err: |
| 1154 | dev->state = MLX5_DEVICE_STATE_INTERNAL_ERROR; |
| 1155 | mutex_unlock(&dev->intf_state_mutex); |
| 1156 | |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 1157 | return err; |
| 1158 | } |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 1159 | |
Mohamad Haj Yahia | 59211bd | 2016-09-09 17:35:20 +0300 | [diff] [blame] | 1160 | static int mlx5_unload_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv, |
| 1161 | bool cleanup) |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 1162 | { |
Majd Dibbiny | 89d44f0 | 2015-10-14 17:43:46 +0300 | [diff] [blame] | 1163 | int err = 0; |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 1164 | |
Daniel Jurgens | ce31072 | 2017-01-10 22:33:39 +0200 | [diff] [blame] | 1165 | if (cleanup) |
Mohamad Haj Yahia | e20204d | 2017-03-30 17:09:00 +0300 | [diff] [blame] | 1166 | mlx5_drain_health_recovery(dev); |
Daniel Jurgens | ca8a644 | 2016-12-28 14:58:33 +0200 | [diff] [blame] | 1167 | |
Majd Dibbiny | 89d44f0 | 2015-10-14 17:43:46 +0300 | [diff] [blame] | 1168 | mutex_lock(&dev->intf_state_mutex); |
Majd Dibbiny | 5fc7197 | 2016-04-22 00:33:07 +0300 | [diff] [blame] | 1169 | if (test_bit(MLX5_INTERFACE_STATE_DOWN, &dev->intf_state)) { |
Majd Dibbiny | 89d44f0 | 2015-10-14 17:43:46 +0300 | [diff] [blame] | 1170 | dev_warn(&dev->pdev->dev, "%s: interface is down, NOP\n", |
| 1171 | __func__); |
Mohamad Haj Yahia | 59211bd | 2016-09-09 17:35:20 +0300 | [diff] [blame] | 1172 | if (cleanup) |
| 1173 | mlx5_cleanup_once(dev); |
Majd Dibbiny | 89d44f0 | 2015-10-14 17:43:46 +0300 | [diff] [blame] | 1174 | goto out; |
| 1175 | } |
Mohamad Haj Yahia | 6b6adee | 2016-09-09 17:35:18 +0300 | [diff] [blame] | 1176 | |
Mohamad Haj Yahia | 737a234 | 2016-09-09 17:35:19 +0300 | [diff] [blame] | 1177 | if (mlx5_device_registered(dev)) |
| 1178 | mlx5_detach_device(dev); |
| 1179 | |
Mohamad Haj Yahia | c2d6e31 | 2016-09-09 17:35:23 +0300 | [diff] [blame] | 1180 | mlx5_sriov_detach(dev); |
Saeed Mahameed | 073bb18 | 2015-12-01 18:03:18 +0200 | [diff] [blame] | 1181 | #ifdef CONFIG_MLX5_CORE_EN |
Mohamad Haj Yahia | c2d6e31 | 2016-09-09 17:35:23 +0300 | [diff] [blame] | 1182 | mlx5_eswitch_detach(dev->priv.eswitch); |
Saeed Mahameed | 073bb18 | 2015-12-01 18:03:18 +0200 | [diff] [blame] | 1183 | #endif |
Maor Gottlieb | 86d722a | 2015-12-10 17:12:44 +0200 | [diff] [blame] | 1184 | mlx5_cleanup_fs(dev); |
Saeed Mahameed | db058a1 | 2015-05-28 22:28:39 +0300 | [diff] [blame] | 1185 | mlx5_irq_clear_affinity_hints(dev); |
Saeed Mahameed | 233d05d | 2015-04-02 17:07:32 +0300 | [diff] [blame] | 1186 | free_comp_eqs(dev); |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 1187 | mlx5_stop_eqs(dev); |
| 1188 | mlx5_free_uuars(dev, &priv->uuari); |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 1189 | mlx5_disable_msix(dev); |
Mohamad Haj Yahia | 59211bd | 2016-09-09 17:35:20 +0300 | [diff] [blame] | 1190 | if (cleanup) |
| 1191 | mlx5_cleanup_once(dev); |
Jack Morgenstein | ccb8961 | 2018-08-05 09:19:33 +0300 | [diff] [blame] | 1192 | mlx5_stop_health_poll(dev, cleanup); |
Eli Cohen | ac6ea6e | 2015-10-08 17:14:00 +0300 | [diff] [blame] | 1193 | err = mlx5_cmd_teardown_hca(dev); |
| 1194 | if (err) { |
Eli Cohen | 1bde6e3 | 2014-01-14 17:45:22 +0200 | [diff] [blame] | 1195 | dev_err(&dev->pdev->dev, "tear_down_hca failed, skip cleanup\n"); |
Eli Cohen | ac6ea6e | 2015-10-08 17:14:00 +0300 | [diff] [blame] | 1196 | goto out; |
Eli Cohen | 1bde6e3 | 2014-01-14 17:45:22 +0200 | [diff] [blame] | 1197 | } |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 1198 | mlx5_pagealloc_stop(dev); |
| 1199 | mlx5_reclaim_startup_pages(dev); |
Eli Cohen | 0b10710 | 2015-12-01 18:03:08 +0200 | [diff] [blame] | 1200 | mlx5_core_disable_hca(dev, 0); |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 1201 | mlx5_cmd_cleanup(dev); |
Jack Morgenstein | 9603b61 | 2014-07-28 23:30:22 +0300 | [diff] [blame] | 1202 | |
Eli Cohen | ac6ea6e | 2015-10-08 17:14:00 +0300 | [diff] [blame] | 1203 | out: |
Majd Dibbiny | 5fc7197 | 2016-04-22 00:33:07 +0300 | [diff] [blame] | 1204 | clear_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state); |
| 1205 | set_bit(MLX5_INTERFACE_STATE_DOWN, &dev->intf_state); |
Majd Dibbiny | 89d44f0 | 2015-10-14 17:43:46 +0300 | [diff] [blame] | 1206 | mutex_unlock(&dev->intf_state_mutex); |
Eli Cohen | ac6ea6e | 2015-10-08 17:14:00 +0300 | [diff] [blame] | 1207 | return err; |
Jack Morgenstein | 9603b61 | 2014-07-28 23:30:22 +0300 | [diff] [blame] | 1208 | } |
Saeed Mahameed | 64613d94 | 2015-04-02 17:07:34 +0300 | [diff] [blame] | 1209 | |
Jack Morgenstein | 9603b61 | 2014-07-28 23:30:22 +0300 | [diff] [blame] | 1210 | struct mlx5_core_event_handler { |
| 1211 | void (*event)(struct mlx5_core_dev *dev, |
| 1212 | enum mlx5_dev_event event, |
| 1213 | void *data); |
| 1214 | }; |
| 1215 | |
Or Gerlitz | feae908 | 2016-07-01 14:51:02 +0300 | [diff] [blame] | 1216 | static const struct devlink_ops mlx5_devlink_ops = { |
| 1217 | #ifdef CONFIG_MLX5_CORE_EN |
| 1218 | .eswitch_mode_set = mlx5_devlink_eswitch_mode_set, |
| 1219 | .eswitch_mode_get = mlx5_devlink_eswitch_mode_get, |
| 1220 | #endif |
| 1221 | }; |
Eli Cohen | f66f049 | 2014-12-02 12:26:11 +0200 | [diff] [blame] | 1222 | |
Mohamad Haj Yahia | 59211bd | 2016-09-09 17:35:20 +0300 | [diff] [blame] | 1223 | #define MLX5_IB_MOD "mlx5_ib" |
Jack Morgenstein | 9603b61 | 2014-07-28 23:30:22 +0300 | [diff] [blame] | 1224 | static int init_one(struct pci_dev *pdev, |
| 1225 | const struct pci_device_id *id) |
| 1226 | { |
| 1227 | struct mlx5_core_dev *dev; |
Or Gerlitz | feae908 | 2016-07-01 14:51:02 +0300 | [diff] [blame] | 1228 | struct devlink *devlink; |
Jack Morgenstein | 9603b61 | 2014-07-28 23:30:22 +0300 | [diff] [blame] | 1229 | struct mlx5_priv *priv; |
| 1230 | int err; |
| 1231 | |
Or Gerlitz | feae908 | 2016-07-01 14:51:02 +0300 | [diff] [blame] | 1232 | devlink = devlink_alloc(&mlx5_devlink_ops, sizeof(*dev)); |
| 1233 | if (!devlink) { |
Jack Morgenstein | 9603b61 | 2014-07-28 23:30:22 +0300 | [diff] [blame] | 1234 | dev_err(&pdev->dev, "kzalloc failed\n"); |
| 1235 | return -ENOMEM; |
| 1236 | } |
Or Gerlitz | feae908 | 2016-07-01 14:51:02 +0300 | [diff] [blame] | 1237 | |
| 1238 | dev = devlink_priv(devlink); |
Jack Morgenstein | 9603b61 | 2014-07-28 23:30:22 +0300 | [diff] [blame] | 1239 | priv = &dev->priv; |
Eli Cohen | fc50db9 | 2015-12-01 18:03:09 +0200 | [diff] [blame] | 1240 | priv->pci_dev_data = id->driver_data; |
Jack Morgenstein | 9603b61 | 2014-07-28 23:30:22 +0300 | [diff] [blame] | 1241 | |
| 1242 | pci_set_drvdata(pdev, dev); |
| 1243 | |
Huy Nguyen | 0e97a34 | 2016-11-04 01:48:47 +0200 | [diff] [blame] | 1244 | dev->pdev = pdev; |
| 1245 | dev->event = mlx5_core_event; |
Jack Morgenstein | 9603b61 | 2014-07-28 23:30:22 +0300 | [diff] [blame] | 1246 | dev->profile = &profile[prof_sel]; |
Jack Morgenstein | 9603b61 | 2014-07-28 23:30:22 +0300 | [diff] [blame] | 1247 | |
Eli Cohen | 364d179 | 2014-11-06 12:51:22 +0200 | [diff] [blame] | 1248 | INIT_LIST_HEAD(&priv->ctx_list); |
| 1249 | spin_lock_init(&priv->ctx_lock); |
Majd Dibbiny | 89d44f0 | 2015-10-14 17:43:46 +0300 | [diff] [blame] | 1250 | mutex_init(&dev->pci_status_mutex); |
| 1251 | mutex_init(&dev->intf_state_mutex); |
Majd Dibbiny | a31208b | 2015-09-25 10:49:14 +0300 | [diff] [blame] | 1252 | err = mlx5_pci_init(dev, priv); |
Jack Morgenstein | 9603b61 | 2014-07-28 23:30:22 +0300 | [diff] [blame] | 1253 | if (err) { |
Majd Dibbiny | a31208b | 2015-09-25 10:49:14 +0300 | [diff] [blame] | 1254 | dev_err(&pdev->dev, "mlx5_pci_init failed with error code %d\n", err); |
| 1255 | goto clean_dev; |
Jack Morgenstein | 9603b61 | 2014-07-28 23:30:22 +0300 | [diff] [blame] | 1256 | } |
| 1257 | |
Eli Cohen | ac6ea6e | 2015-10-08 17:14:00 +0300 | [diff] [blame] | 1258 | err = mlx5_health_init(dev); |
| 1259 | if (err) { |
| 1260 | dev_err(&pdev->dev, "mlx5_health_init failed with error code %d\n", err); |
| 1261 | goto close_pci; |
| 1262 | } |
| 1263 | |
Mohamad Haj Yahia | 59211bd | 2016-09-09 17:35:20 +0300 | [diff] [blame] | 1264 | mlx5_pagealloc_init(dev); |
| 1265 | |
| 1266 | err = mlx5_load_one(dev, priv, true); |
Jack Morgenstein | 9603b61 | 2014-07-28 23:30:22 +0300 | [diff] [blame] | 1267 | if (err) { |
Majd Dibbiny | a31208b | 2015-09-25 10:49:14 +0300 | [diff] [blame] | 1268 | dev_err(&pdev->dev, "mlx5_load_one failed with error code %d\n", err); |
Eli Cohen | ac6ea6e | 2015-10-08 17:14:00 +0300 | [diff] [blame] | 1269 | goto clean_health; |
Jack Morgenstein | 9603b61 | 2014-07-28 23:30:22 +0300 | [diff] [blame] | 1270 | } |
Mohamad Haj Yahia | 59211bd | 2016-09-09 17:35:20 +0300 | [diff] [blame] | 1271 | |
Mohamad Haj Yahia | 737a234 | 2016-09-09 17:35:19 +0300 | [diff] [blame] | 1272 | err = request_module_nowait(MLX5_IB_MOD); |
| 1273 | if (err) |
| 1274 | pr_info("failed request module on %s\n", MLX5_IB_MOD); |
Jack Morgenstein | 9603b61 | 2014-07-28 23:30:22 +0300 | [diff] [blame] | 1275 | |
Or Gerlitz | feae908 | 2016-07-01 14:51:02 +0300 | [diff] [blame] | 1276 | err = devlink_register(devlink, &pdev->dev); |
| 1277 | if (err) |
| 1278 | goto clean_load; |
| 1279 | |
Daniel Jurgens | 721c136 | 2017-03-10 14:33:02 +0200 | [diff] [blame] | 1280 | pci_save_state(pdev); |
Jack Morgenstein | 9603b61 | 2014-07-28 23:30:22 +0300 | [diff] [blame] | 1281 | return 0; |
| 1282 | |
Or Gerlitz | feae908 | 2016-07-01 14:51:02 +0300 | [diff] [blame] | 1283 | clean_load: |
Mohamad Haj Yahia | 59211bd | 2016-09-09 17:35:20 +0300 | [diff] [blame] | 1284 | mlx5_unload_one(dev, priv, true); |
Eli Cohen | ac6ea6e | 2015-10-08 17:14:00 +0300 | [diff] [blame] | 1285 | clean_health: |
Mohamad Haj Yahia | 59211bd | 2016-09-09 17:35:20 +0300 | [diff] [blame] | 1286 | mlx5_pagealloc_cleanup(dev); |
Eli Cohen | ac6ea6e | 2015-10-08 17:14:00 +0300 | [diff] [blame] | 1287 | mlx5_health_cleanup(dev); |
Majd Dibbiny | a31208b | 2015-09-25 10:49:14 +0300 | [diff] [blame] | 1288 | close_pci: |
| 1289 | mlx5_pci_close(dev, priv); |
| 1290 | clean_dev: |
| 1291 | pci_set_drvdata(pdev, NULL); |
Or Gerlitz | feae908 | 2016-07-01 14:51:02 +0300 | [diff] [blame] | 1292 | devlink_free(devlink); |
Majd Dibbiny | a31208b | 2015-09-25 10:49:14 +0300 | [diff] [blame] | 1293 | |
Jack Morgenstein | 9603b61 | 2014-07-28 23:30:22 +0300 | [diff] [blame] | 1294 | return err; |
| 1295 | } |
Majd Dibbiny | a31208b | 2015-09-25 10:49:14 +0300 | [diff] [blame] | 1296 | |
Jack Morgenstein | 9603b61 | 2014-07-28 23:30:22 +0300 | [diff] [blame] | 1297 | static void remove_one(struct pci_dev *pdev) |
| 1298 | { |
| 1299 | struct mlx5_core_dev *dev = pci_get_drvdata(pdev); |
Or Gerlitz | feae908 | 2016-07-01 14:51:02 +0300 | [diff] [blame] | 1300 | struct devlink *devlink = priv_to_devlink(dev); |
Majd Dibbiny | a31208b | 2015-09-25 10:49:14 +0300 | [diff] [blame] | 1301 | struct mlx5_priv *priv = &dev->priv; |
Jack Morgenstein | 9603b61 | 2014-07-28 23:30:22 +0300 | [diff] [blame] | 1302 | |
Or Gerlitz | feae908 | 2016-07-01 14:51:02 +0300 | [diff] [blame] | 1303 | devlink_unregister(devlink); |
Mohamad Haj Yahia | 737a234 | 2016-09-09 17:35:19 +0300 | [diff] [blame] | 1304 | mlx5_unregister_device(dev); |
| 1305 | |
Mohamad Haj Yahia | 59211bd | 2016-09-09 17:35:20 +0300 | [diff] [blame] | 1306 | if (mlx5_unload_one(dev, priv, true)) { |
Majd Dibbiny | a31208b | 2015-09-25 10:49:14 +0300 | [diff] [blame] | 1307 | dev_err(&dev->pdev->dev, "mlx5_unload_one failed\n"); |
Eli Cohen | ac6ea6e | 2015-10-08 17:14:00 +0300 | [diff] [blame] | 1308 | mlx5_health_cleanup(dev); |
Majd Dibbiny | a31208b | 2015-09-25 10:49:14 +0300 | [diff] [blame] | 1309 | return; |
| 1310 | } |
Mohamad Haj Yahia | 737a234 | 2016-09-09 17:35:19 +0300 | [diff] [blame] | 1311 | |
Mohamad Haj Yahia | 59211bd | 2016-09-09 17:35:20 +0300 | [diff] [blame] | 1312 | mlx5_pagealloc_cleanup(dev); |
Eli Cohen | ac6ea6e | 2015-10-08 17:14:00 +0300 | [diff] [blame] | 1313 | mlx5_health_cleanup(dev); |
Majd Dibbiny | a31208b | 2015-09-25 10:49:14 +0300 | [diff] [blame] | 1314 | mlx5_pci_close(dev, priv); |
| 1315 | pci_set_drvdata(pdev, NULL); |
Or Gerlitz | feae908 | 2016-07-01 14:51:02 +0300 | [diff] [blame] | 1316 | devlink_free(devlink); |
Jack Morgenstein | 9603b61 | 2014-07-28 23:30:22 +0300 | [diff] [blame] | 1317 | } |
| 1318 | |
Majd Dibbiny | 89d44f0 | 2015-10-14 17:43:46 +0300 | [diff] [blame] | 1319 | static pci_ers_result_t mlx5_pci_err_detected(struct pci_dev *pdev, |
| 1320 | pci_channel_state_t state) |
| 1321 | { |
| 1322 | struct mlx5_core_dev *dev = pci_get_drvdata(pdev); |
| 1323 | struct mlx5_priv *priv = &dev->priv; |
| 1324 | |
| 1325 | dev_info(&pdev->dev, "%s was called\n", __func__); |
Mohamad Haj Yahia | 04c0c1ab | 2016-10-25 18:36:34 +0300 | [diff] [blame] | 1326 | |
Majd Dibbiny | 89d44f0 | 2015-10-14 17:43:46 +0300 | [diff] [blame] | 1327 | mlx5_enter_error_state(dev); |
Mohamad Haj Yahia | 59211bd | 2016-09-09 17:35:20 +0300 | [diff] [blame] | 1328 | mlx5_unload_one(dev, priv, false); |
Daniel Jurgens | 721c136 | 2017-03-10 14:33:02 +0200 | [diff] [blame] | 1329 | /* In case of kernel call drain the health wq */ |
Mohamad Haj Yahia | 05ac2c0 | 2016-10-25 18:36:33 +0300 | [diff] [blame] | 1330 | if (state) { |
Daniel Jurgens | ce31072 | 2017-01-10 22:33:39 +0200 | [diff] [blame] | 1331 | mlx5_drain_health_wq(dev); |
Mohamad Haj Yahia | 05ac2c0 | 2016-10-25 18:36:33 +0300 | [diff] [blame] | 1332 | mlx5_pci_disable_device(dev); |
| 1333 | } |
| 1334 | |
Majd Dibbiny | 89d44f0 | 2015-10-14 17:43:46 +0300 | [diff] [blame] | 1335 | return state == pci_channel_io_perm_failure ? |
| 1336 | PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_NEED_RESET; |
| 1337 | } |
| 1338 | |
Daniel Jurgens | d57847d | 2016-06-30 17:34:41 +0300 | [diff] [blame] | 1339 | /* wait for the device to show vital signs by waiting |
| 1340 | * for the health counter to start counting. |
Majd Dibbiny | 89d44f0 | 2015-10-14 17:43:46 +0300 | [diff] [blame] | 1341 | */ |
Daniel Jurgens | d57847d | 2016-06-30 17:34:41 +0300 | [diff] [blame] | 1342 | static int wait_vital(struct pci_dev *pdev) |
Majd Dibbiny | 89d44f0 | 2015-10-14 17:43:46 +0300 | [diff] [blame] | 1343 | { |
| 1344 | struct mlx5_core_dev *dev = pci_get_drvdata(pdev); |
| 1345 | struct mlx5_core_health *health = &dev->priv.health; |
| 1346 | const int niter = 100; |
Daniel Jurgens | d57847d | 2016-06-30 17:34:41 +0300 | [diff] [blame] | 1347 | u32 last_count = 0; |
Majd Dibbiny | 89d44f0 | 2015-10-14 17:43:46 +0300 | [diff] [blame] | 1348 | u32 count; |
Majd Dibbiny | 89d44f0 | 2015-10-14 17:43:46 +0300 | [diff] [blame] | 1349 | int i; |
| 1350 | |
Majd Dibbiny | 89d44f0 | 2015-10-14 17:43:46 +0300 | [diff] [blame] | 1351 | for (i = 0; i < niter; i++) { |
| 1352 | count = ioread32be(health->health_counter); |
| 1353 | if (count && count != 0xffffffff) { |
Daniel Jurgens | d57847d | 2016-06-30 17:34:41 +0300 | [diff] [blame] | 1354 | if (last_count && last_count != count) { |
| 1355 | dev_info(&pdev->dev, "Counter value 0x%x after %d iterations\n", count, i); |
| 1356 | return 0; |
| 1357 | } |
| 1358 | last_count = count; |
Majd Dibbiny | 89d44f0 | 2015-10-14 17:43:46 +0300 | [diff] [blame] | 1359 | } |
| 1360 | msleep(50); |
| 1361 | } |
| 1362 | |
Daniel Jurgens | d57847d | 2016-06-30 17:34:41 +0300 | [diff] [blame] | 1363 | return -ETIMEDOUT; |
Majd Dibbiny | 89d44f0 | 2015-10-14 17:43:46 +0300 | [diff] [blame] | 1364 | } |
| 1365 | |
Mohamad Haj Yahia | 1061c90 | 2016-08-18 21:09:04 +0300 | [diff] [blame] | 1366 | static pci_ers_result_t mlx5_pci_slot_reset(struct pci_dev *pdev) |
| 1367 | { |
| 1368 | struct mlx5_core_dev *dev = pci_get_drvdata(pdev); |
| 1369 | int err; |
| 1370 | |
| 1371 | dev_info(&pdev->dev, "%s was called\n", __func__); |
| 1372 | |
| 1373 | err = mlx5_pci_enable_device(dev); |
| 1374 | if (err) { |
| 1375 | dev_err(&pdev->dev, "%s: mlx5_pci_enable_device failed with error code: %d\n" |
| 1376 | , __func__, err); |
| 1377 | return PCI_ERS_RESULT_DISCONNECT; |
| 1378 | } |
| 1379 | |
| 1380 | pci_set_master(pdev); |
| 1381 | pci_restore_state(pdev); |
Daniel Jurgens | 721c136 | 2017-03-10 14:33:02 +0200 | [diff] [blame] | 1382 | pci_save_state(pdev); |
Mohamad Haj Yahia | 1061c90 | 2016-08-18 21:09:04 +0300 | [diff] [blame] | 1383 | |
| 1384 | if (wait_vital(pdev)) { |
| 1385 | dev_err(&pdev->dev, "%s: wait_vital timed out\n", __func__); |
| 1386 | return PCI_ERS_RESULT_DISCONNECT; |
| 1387 | } |
| 1388 | |
| 1389 | return PCI_ERS_RESULT_RECOVERED; |
| 1390 | } |
| 1391 | |
Majd Dibbiny | 89d44f0 | 2015-10-14 17:43:46 +0300 | [diff] [blame] | 1392 | static void mlx5_pci_resume(struct pci_dev *pdev) |
| 1393 | { |
| 1394 | struct mlx5_core_dev *dev = pci_get_drvdata(pdev); |
| 1395 | struct mlx5_priv *priv = &dev->priv; |
| 1396 | int err; |
| 1397 | |
| 1398 | dev_info(&pdev->dev, "%s was called\n", __func__); |
| 1399 | |
Mohamad Haj Yahia | 59211bd | 2016-09-09 17:35:20 +0300 | [diff] [blame] | 1400 | err = mlx5_load_one(dev, priv, false); |
Majd Dibbiny | 89d44f0 | 2015-10-14 17:43:46 +0300 | [diff] [blame] | 1401 | if (err) |
| 1402 | dev_err(&pdev->dev, "%s: mlx5_load_one failed with error code: %d\n" |
| 1403 | , __func__, err); |
| 1404 | else |
| 1405 | dev_info(&pdev->dev, "%s: device recovered\n", __func__); |
| 1406 | } |
| 1407 | |
| 1408 | static const struct pci_error_handlers mlx5_err_handler = { |
| 1409 | .error_detected = mlx5_pci_err_detected, |
| 1410 | .slot_reset = mlx5_pci_slot_reset, |
| 1411 | .resume = mlx5_pci_resume |
| 1412 | }; |
| 1413 | |
Majd Dibbiny | 5fc7197 | 2016-04-22 00:33:07 +0300 | [diff] [blame] | 1414 | static void shutdown(struct pci_dev *pdev) |
| 1415 | { |
| 1416 | struct mlx5_core_dev *dev = pci_get_drvdata(pdev); |
| 1417 | struct mlx5_priv *priv = &dev->priv; |
| 1418 | |
| 1419 | dev_info(&pdev->dev, "Shutdown was called\n"); |
| 1420 | /* Notify mlx5 clients that the kernel is being shut down */ |
| 1421 | set_bit(MLX5_INTERFACE_STATE_SHUTDOWN, &dev->intf_state); |
Mohamad Haj Yahia | 59211bd | 2016-09-09 17:35:20 +0300 | [diff] [blame] | 1422 | mlx5_unload_one(dev, priv, false); |
Majd Dibbiny | 5fc7197 | 2016-04-22 00:33:07 +0300 | [diff] [blame] | 1423 | mlx5_pci_disable_device(dev); |
| 1424 | } |
| 1425 | |
Jack Morgenstein | 9603b61 | 2014-07-28 23:30:22 +0300 | [diff] [blame] | 1426 | static const struct pci_device_id mlx5_core_pci_table[] = { |
Eli Cohen | fc50db9 | 2015-12-01 18:03:09 +0200 | [diff] [blame] | 1427 | { PCI_VDEVICE(MELLANOX, 0x1011) }, /* Connect-IB */ |
| 1428 | { PCI_VDEVICE(MELLANOX, 0x1012), MLX5_PCI_DEV_IS_VF}, /* Connect-IB VF */ |
| 1429 | { PCI_VDEVICE(MELLANOX, 0x1013) }, /* ConnectX-4 */ |
| 1430 | { PCI_VDEVICE(MELLANOX, 0x1014), MLX5_PCI_DEV_IS_VF}, /* ConnectX-4 VF */ |
| 1431 | { PCI_VDEVICE(MELLANOX, 0x1015) }, /* ConnectX-4LX */ |
| 1432 | { PCI_VDEVICE(MELLANOX, 0x1016), MLX5_PCI_DEV_IS_VF}, /* ConnectX-4LX VF */ |
Majd Dibbiny | 7092fe8 | 2016-06-27 12:08:33 +0300 | [diff] [blame] | 1433 | { PCI_VDEVICE(MELLANOX, 0x1017) }, /* ConnectX-5, PCIe 3.0 */ |
Majd Dibbiny | 64dbbdf | 2016-04-22 00:33:02 +0300 | [diff] [blame] | 1434 | { PCI_VDEVICE(MELLANOX, 0x1018), MLX5_PCI_DEV_IS_VF}, /* ConnectX-5 VF */ |
Majd Dibbiny | 7092fe8 | 2016-06-27 12:08:33 +0300 | [diff] [blame] | 1435 | { PCI_VDEVICE(MELLANOX, 0x1019) }, /* ConnectX-5, PCIe 4.0 */ |
Jack Morgenstein | 9603b61 | 2014-07-28 23:30:22 +0300 | [diff] [blame] | 1436 | { 0, } |
| 1437 | }; |
| 1438 | |
| 1439 | MODULE_DEVICE_TABLE(pci, mlx5_core_pci_table); |
| 1440 | |
Mohamad Haj Yahia | 04c0c1ab | 2016-10-25 18:36:34 +0300 | [diff] [blame] | 1441 | void mlx5_disable_device(struct mlx5_core_dev *dev) |
| 1442 | { |
| 1443 | mlx5_pci_err_detected(dev->pdev, 0); |
| 1444 | } |
| 1445 | |
| 1446 | void mlx5_recover_device(struct mlx5_core_dev *dev) |
| 1447 | { |
| 1448 | mlx5_pci_disable_device(dev); |
| 1449 | if (mlx5_pci_slot_reset(dev->pdev) == PCI_ERS_RESULT_RECOVERED) |
| 1450 | mlx5_pci_resume(dev->pdev); |
| 1451 | } |
| 1452 | |
Jack Morgenstein | 9603b61 | 2014-07-28 23:30:22 +0300 | [diff] [blame] | 1453 | static struct pci_driver mlx5_core_driver = { |
| 1454 | .name = DRIVER_NAME, |
| 1455 | .id_table = mlx5_core_pci_table, |
| 1456 | .probe = init_one, |
Majd Dibbiny | 89d44f0 | 2015-10-14 17:43:46 +0300 | [diff] [blame] | 1457 | .remove = remove_one, |
Majd Dibbiny | 5fc7197 | 2016-04-22 00:33:07 +0300 | [diff] [blame] | 1458 | .shutdown = shutdown, |
Eli Cohen | fc50db9 | 2015-12-01 18:03:09 +0200 | [diff] [blame] | 1459 | .err_handler = &mlx5_err_handler, |
| 1460 | .sriov_configure = mlx5_core_sriov_configure, |
Jack Morgenstein | 9603b61 | 2014-07-28 23:30:22 +0300 | [diff] [blame] | 1461 | }; |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 1462 | |
Kamal Heib | f663ad9 | 2016-12-06 17:32:43 +0200 | [diff] [blame] | 1463 | static void mlx5_core_verify_params(void) |
| 1464 | { |
| 1465 | if (prof_sel >= ARRAY_SIZE(profile)) { |
| 1466 | pr_warn("mlx5_core: WARNING: Invalid module parameter prof_sel %d, valid range 0-%zu, changing back to default(%d)\n", |
| 1467 | prof_sel, |
| 1468 | ARRAY_SIZE(profile) - 1, |
| 1469 | MLX5_DEFAULT_PROF); |
| 1470 | prof_sel = MLX5_DEFAULT_PROF; |
| 1471 | } |
| 1472 | } |
| 1473 | |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 1474 | static int __init init(void) |
| 1475 | { |
| 1476 | int err; |
| 1477 | |
Kamal Heib | f663ad9 | 2016-12-06 17:32:43 +0200 | [diff] [blame] | 1478 | mlx5_core_verify_params(); |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 1479 | mlx5_register_debugfs(); |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 1480 | |
Jack Morgenstein | 9603b61 | 2014-07-28 23:30:22 +0300 | [diff] [blame] | 1481 | err = pci_register_driver(&mlx5_core_driver); |
| 1482 | if (err) |
Eli Cohen | ac6ea6e | 2015-10-08 17:14:00 +0300 | [diff] [blame] | 1483 | goto err_debug; |
Jack Morgenstein | 9603b61 | 2014-07-28 23:30:22 +0300 | [diff] [blame] | 1484 | |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1485 | #ifdef CONFIG_MLX5_CORE_EN |
| 1486 | mlx5e_init(); |
| 1487 | #endif |
| 1488 | |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 1489 | return 0; |
| 1490 | |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 1491 | err_debug: |
| 1492 | mlx5_unregister_debugfs(); |
| 1493 | return err; |
| 1494 | } |
| 1495 | |
| 1496 | static void __exit cleanup(void) |
| 1497 | { |
Amir Vadai | f62b8bb8 | 2015-05-28 22:28:48 +0300 | [diff] [blame] | 1498 | #ifdef CONFIG_MLX5_CORE_EN |
| 1499 | mlx5e_cleanup(); |
| 1500 | #endif |
Jack Morgenstein | 9603b61 | 2014-07-28 23:30:22 +0300 | [diff] [blame] | 1501 | pci_unregister_driver(&mlx5_core_driver); |
Eli Cohen | e126ba9 | 2013-07-07 17:25:49 +0300 | [diff] [blame] | 1502 | mlx5_unregister_debugfs(); |
| 1503 | } |
| 1504 | |
| 1505 | module_init(init); |
| 1506 | module_exit(cleanup); |