Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2004 Matthew Wilcox <matthew@wil.cx> |
| 3 | * Copyright (C) 2004 Intel Corp. |
| 4 | * |
| 5 | * This code is released under the GNU General Public License version 2. |
| 6 | */ |
| 7 | |
| 8 | /* |
| 9 | * mmconfig.c - Low-level direct PCI config space access via MMCONFIG |
| 10 | */ |
| 11 | |
| 12 | #include <linux/pci.h> |
| 13 | #include <linux/init.h> |
Greg Kroah-Hartman | 5454939 | 2005-06-23 17:35:56 -0700 | [diff] [blame] | 14 | #include <linux/acpi.h> |
Arjan van de Ven | 946f2ee | 2006-04-07 19:49:30 +0200 | [diff] [blame] | 15 | #include <asm/e820.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 16 | #include "pci.h" |
| 17 | |
Andi Kleen | 8c30b1a74 | 2006-04-07 19:50:12 +0200 | [diff] [blame] | 18 | /* Assume systems with more busses have correct MCFG */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 19 | #define mmcfg_virt_addr ((void __iomem *) fix_to_virt(FIX_PCIE_MCFG)) |
| 20 | |
| 21 | /* The base address of the last MMCONFIG device accessed */ |
| 22 | static u32 mmcfg_last_accessed_device; |
OGAWA Hirofumi | 8d1c481 | 2006-12-23 10:00:43 +0900 | [diff] [blame] | 23 | static int mmcfg_last_accessed_cpu; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | |
| 25 | /* |
| 26 | * Functions for accessing PCI configuration space with MMCONFIG accesses |
| 27 | */ |
Andi Kleen | d6ece54 | 2005-12-12 22:17:11 -0800 | [diff] [blame] | 28 | static u32 get_base_addr(unsigned int seg, int bus, unsigned devfn) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | { |
Greg Kroah-Hartman | d57e26c | 2005-06-23 17:35:56 -0700 | [diff] [blame] | 30 | int cfg_num = -1; |
Alexey Starikovskiy | 15a58ed | 2007-02-02 19:48:22 +0300 | [diff] [blame] | 31 | struct acpi_mcfg_allocation *cfg; |
Greg Kroah-Hartman | d57e26c | 2005-06-23 17:35:56 -0700 | [diff] [blame] | 32 | |
Olivier Galibert | b786739 | 2007-02-13 13:26:20 +0100 | [diff] [blame^] | 33 | if (seg == 0 && bus < PCI_MMCFG_MAX_CHECK_BUS && |
| 34 | test_bit(PCI_SLOT(devfn) + 32*bus, pci_mmcfg_fallback_slots)) |
Andi Kleen | d6ece54 | 2005-12-12 22:17:11 -0800 | [diff] [blame] | 35 | return 0; |
| 36 | |
Greg Kroah-Hartman | d57e26c | 2005-06-23 17:35:56 -0700 | [diff] [blame] | 37 | while (1) { |
| 38 | ++cfg_num; |
| 39 | if (cfg_num >= pci_mmcfg_config_num) { |
Andi Kleen | 3103039 | 2006-01-27 02:03:50 +0100 | [diff] [blame] | 40 | break; |
Greg Kroah-Hartman | d57e26c | 2005-06-23 17:35:56 -0700 | [diff] [blame] | 41 | } |
| 42 | cfg = &pci_mmcfg_config[cfg_num]; |
Alexey Starikovskiy | 15a58ed | 2007-02-02 19:48:22 +0300 | [diff] [blame] | 43 | if (cfg->pci_segment != seg) |
Greg Kroah-Hartman | d57e26c | 2005-06-23 17:35:56 -0700 | [diff] [blame] | 44 | continue; |
| 45 | if ((cfg->start_bus_number <= bus) && |
| 46 | (cfg->end_bus_number >= bus)) |
Alexey Starikovskiy | 15a58ed | 2007-02-02 19:48:22 +0300 | [diff] [blame] | 47 | return cfg->address; |
Greg Kroah-Hartman | d57e26c | 2005-06-23 17:35:56 -0700 | [diff] [blame] | 48 | } |
Andi Kleen | 3103039 | 2006-01-27 02:03:50 +0100 | [diff] [blame] | 49 | |
| 50 | /* Handle more broken MCFG tables on Asus etc. |
| 51 | They only contain a single entry for bus 0-0. Assume |
| 52 | this applies to all busses. */ |
| 53 | cfg = &pci_mmcfg_config[0]; |
| 54 | if (pci_mmcfg_config_num == 1 && |
Alexey Starikovskiy | 15a58ed | 2007-02-02 19:48:22 +0300 | [diff] [blame] | 55 | cfg->pci_segment == 0 && |
Andi Kleen | 3103039 | 2006-01-27 02:03:50 +0100 | [diff] [blame] | 56 | (cfg->start_bus_number | cfg->end_bus_number) == 0) |
Alexey Starikovskiy | 15a58ed | 2007-02-02 19:48:22 +0300 | [diff] [blame] | 57 | return cfg->address; |
Andi Kleen | 3103039 | 2006-01-27 02:03:50 +0100 | [diff] [blame] | 58 | |
| 59 | /* Fall back to type 0 */ |
| 60 | return 0; |
Greg Kroah-Hartman | d57e26c | 2005-06-23 17:35:56 -0700 | [diff] [blame] | 61 | } |
| 62 | |
Andrew Morton | be5b7a8 | 2006-09-30 23:27:10 -0700 | [diff] [blame] | 63 | /* |
| 64 | * This is always called under pci_config_lock |
| 65 | */ |
| 66 | static void pci_exp_set_dev_base(unsigned int base, int bus, int devfn) |
Greg Kroah-Hartman | d57e26c | 2005-06-23 17:35:56 -0700 | [diff] [blame] | 67 | { |
Andi Kleen | 928cf8c | 2005-12-12 22:17:10 -0800 | [diff] [blame] | 68 | u32 dev_base = base | (bus << 20) | (devfn << 12); |
OGAWA Hirofumi | 8d1c481 | 2006-12-23 10:00:43 +0900 | [diff] [blame] | 69 | int cpu = smp_processor_id(); |
| 70 | if (dev_base != mmcfg_last_accessed_device || |
| 71 | cpu != mmcfg_last_accessed_cpu) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 72 | mmcfg_last_accessed_device = dev_base; |
OGAWA Hirofumi | 8d1c481 | 2006-12-23 10:00:43 +0900 | [diff] [blame] | 73 | mmcfg_last_accessed_cpu = cpu; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 74 | set_fixmap_nocache(FIX_PCIE_MCFG, dev_base); |
| 75 | } |
| 76 | } |
| 77 | |
| 78 | static int pci_mmcfg_read(unsigned int seg, unsigned int bus, |
| 79 | unsigned int devfn, int reg, int len, u32 *value) |
| 80 | { |
| 81 | unsigned long flags; |
Andi Kleen | 928cf8c | 2005-12-12 22:17:10 -0800 | [diff] [blame] | 82 | u32 base; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 83 | |
Andi Kleen | ecc16ba | 2006-04-11 12:54:48 +0200 | [diff] [blame] | 84 | if ((bus > 255) || (devfn > 255) || (reg > 4095)) { |
Andi Kleen | 49c93e8 | 2006-04-07 19:50:15 +0200 | [diff] [blame] | 85 | *value = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 86 | return -EINVAL; |
Andi Kleen | 49c93e8 | 2006-04-07 19:50:15 +0200 | [diff] [blame] | 87 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 88 | |
Andi Kleen | d6ece54 | 2005-12-12 22:17:11 -0800 | [diff] [blame] | 89 | base = get_base_addr(seg, bus, devfn); |
Andi Kleen | 928cf8c | 2005-12-12 22:17:10 -0800 | [diff] [blame] | 90 | if (!base) |
| 91 | return pci_conf1_read(seg,bus,devfn,reg,len,value); |
| 92 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 93 | spin_lock_irqsave(&pci_config_lock, flags); |
| 94 | |
Andi Kleen | 928cf8c | 2005-12-12 22:17:10 -0800 | [diff] [blame] | 95 | pci_exp_set_dev_base(base, bus, devfn); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 96 | |
| 97 | switch (len) { |
| 98 | case 1: |
| 99 | *value = readb(mmcfg_virt_addr + reg); |
| 100 | break; |
| 101 | case 2: |
| 102 | *value = readw(mmcfg_virt_addr + reg); |
| 103 | break; |
| 104 | case 4: |
| 105 | *value = readl(mmcfg_virt_addr + reg); |
| 106 | break; |
| 107 | } |
| 108 | |
| 109 | spin_unlock_irqrestore(&pci_config_lock, flags); |
| 110 | |
| 111 | return 0; |
| 112 | } |
| 113 | |
| 114 | static int pci_mmcfg_write(unsigned int seg, unsigned int bus, |
| 115 | unsigned int devfn, int reg, int len, u32 value) |
| 116 | { |
| 117 | unsigned long flags; |
Andi Kleen | 928cf8c | 2005-12-12 22:17:10 -0800 | [diff] [blame] | 118 | u32 base; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 119 | |
Alexey Starikovskiy | 15a58ed | 2007-02-02 19:48:22 +0300 | [diff] [blame] | 120 | if ((bus > 255) || (devfn > 255) || (reg > 4095)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 121 | return -EINVAL; |
| 122 | |
Andi Kleen | d6ece54 | 2005-12-12 22:17:11 -0800 | [diff] [blame] | 123 | base = get_base_addr(seg, bus, devfn); |
Andi Kleen | 928cf8c | 2005-12-12 22:17:10 -0800 | [diff] [blame] | 124 | if (!base) |
| 125 | return pci_conf1_write(seg,bus,devfn,reg,len,value); |
| 126 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 127 | spin_lock_irqsave(&pci_config_lock, flags); |
| 128 | |
Andi Kleen | 928cf8c | 2005-12-12 22:17:10 -0800 | [diff] [blame] | 129 | pci_exp_set_dev_base(base, bus, devfn); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 130 | |
| 131 | switch (len) { |
| 132 | case 1: |
| 133 | writeb(value, mmcfg_virt_addr + reg); |
| 134 | break; |
| 135 | case 2: |
| 136 | writew(value, mmcfg_virt_addr + reg); |
| 137 | break; |
| 138 | case 4: |
| 139 | writel(value, mmcfg_virt_addr + reg); |
| 140 | break; |
| 141 | } |
| 142 | |
| 143 | spin_unlock_irqrestore(&pci_config_lock, flags); |
| 144 | |
| 145 | return 0; |
| 146 | } |
| 147 | |
| 148 | static struct pci_raw_ops pci_mmcfg = { |
| 149 | .read = pci_mmcfg_read, |
| 150 | .write = pci_mmcfg_write, |
| 151 | }; |
| 152 | |
Olivier Galibert | b786739 | 2007-02-13 13:26:20 +0100 | [diff] [blame^] | 153 | int __init pci_mmcfg_arch_init(void) |
Andi Kleen | d6ece54 | 2005-12-12 22:17:11 -0800 | [diff] [blame] | 154 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 155 | printk(KERN_INFO "PCI: Using MMCONFIG\n"); |
| 156 | raw_pci_ops = &pci_mmcfg; |
Olivier Galibert | b786739 | 2007-02-13 13:26:20 +0100 | [diff] [blame^] | 157 | return 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 158 | } |