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Tony Lindgren92105bb2005-09-07 17:20:26 +01001/*
2 * linux/arch/arm/plat-omap/dmtimer.c
3 *
4 * OMAP Dual-Mode Timers
5 *
Tarun Kanti DebBarma97933d62011-09-20 17:00:17 +05306 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
7 * Tarun Kanti DebBarma <tarun.kanti@ti.com>
8 * Thara Gopinath <thara@ti.com>
9 *
10 * dmtimer adaptation to platform_driver.
11 *
Tony Lindgren92105bb2005-09-07 17:20:26 +010012 * Copyright (C) 2005 Nokia Corporation
Timo Teras77900a22006-06-26 16:16:12 -070013 * OMAP2 support by Juha Yrjola
14 * API improvements and OMAP2 clock framework support by Timo Teras
Tony Lindgren92105bb2005-09-07 17:20:26 +010015 *
Santosh Shilimkar44169072009-05-28 14:16:04 -070016 * Copyright (C) 2009 Texas Instruments
17 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
18 *
Tony Lindgren92105bb2005-09-07 17:20:26 +010019 * This program is free software; you can redistribute it and/or modify it
20 * under the terms of the GNU General Public License as published by the
21 * Free Software Foundation; either version 2 of the License, or (at your
22 * option) any later version.
23 *
24 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
25 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
26 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
27 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
28 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
29 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 * You should have received a copy of the GNU General Public License along
34 * with this program; if not, write to the Free Software Foundation, Inc.,
35 * 675 Mass Ave, Cambridge, MA 02139, USA.
36 */
37
Axel Lin869dec12011-11-02 09:49:46 +080038#include <linux/module.h>
Russell Kingfced80c2008-09-06 12:10:45 +010039#include <linux/io.h>
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +053040#include <linux/slab.h>
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +053041#include <linux/err.h>
Tarun Kanti DebBarmaffe07ce2011-09-20 17:00:21 +053042#include <linux/pm_runtime.h>
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +053043
Tony Lindgrence491cf2009-10-20 09:40:47 -070044#include <plat/dmtimer.h>
Tony Lindgren92105bb2005-09-07 17:20:26 +010045
Tony Lindgren2c799ce2012-02-24 10:34:35 -080046#include <mach/hardware.h>
47
Jon Hunterb7b4ff72012-06-05 12:34:51 -050048static u32 omap_reserved_systimers;
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +053049static LIST_HEAD(omap_timer_list);
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +053050static DEFINE_SPINLOCK(dm_timer_lock);
Tony Lindgren92105bb2005-09-07 17:20:26 +010051
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +053052/**
53 * omap_dm_timer_read_reg - read timer registers in posted and non-posted mode
54 * @timer: timer pointer over which read operation to perform
55 * @reg: lowest byte holds the register offset
56 *
57 * The posted mode bit is encoded in reg. Note that in posted mode write
58 * pending bit must be checked. Otherwise a read of a non completed write
59 * will produce an error.
Richard Woodruff0f0d0802008-07-03 12:24:30 +030060 */
61static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg)
Tony Lindgren92105bb2005-09-07 17:20:26 +010062{
Tony Lindgrenee17f112011-09-16 15:44:20 -070063 WARN_ON((reg & 0xff) < _OMAP_TIMER_WAKEUP_EN_OFFSET);
64 return __omap_dm_timer_read(timer, reg, timer->posted);
Timo Teras77900a22006-06-26 16:16:12 -070065}
66
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +053067/**
68 * omap_dm_timer_write_reg - write timer registers in posted and non-posted mode
69 * @timer: timer pointer over which write operation is to perform
70 * @reg: lowest byte holds the register offset
71 * @value: data to write into the register
72 *
73 * The posted mode bit is encoded in reg. Note that in posted mode the write
74 * pending bit must be checked. Otherwise a write on a register which has a
75 * pending write will be lost.
Richard Woodruff0f0d0802008-07-03 12:24:30 +030076 */
77static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg,
78 u32 value)
Timo Teras77900a22006-06-26 16:16:12 -070079{
Tony Lindgrenee17f112011-09-16 15:44:20 -070080 WARN_ON((reg & 0xff) < _OMAP_TIMER_WAKEUP_EN_OFFSET);
81 __omap_dm_timer_write(timer, reg, value, timer->posted);
Tony Lindgren92105bb2005-09-07 17:20:26 +010082}
83
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +053084static void omap_timer_restore_context(struct omap_dm_timer *timer)
85{
Tarun Kanti DebBarmadffc9da2012-03-05 16:11:00 -080086 if (timer->revision == 1)
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +053087 __raw_writel(timer->context.tistat, timer->sys_stat);
88
89 __raw_writel(timer->context.tisr, timer->irq_stat);
90 omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG,
91 timer->context.twer);
92 omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG,
93 timer->context.tcrr);
94 omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG,
95 timer->context.tldr);
96 omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG,
97 timer->context.tmar);
98 omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG,
99 timer->context.tsicr);
100 __raw_writel(timer->context.tier, timer->irq_ena);
101 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG,
102 timer->context.tclr);
103}
104
Timo Teras77900a22006-06-26 16:16:12 -0700105static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100106{
Timo Teras77900a22006-06-26 16:16:12 -0700107 int c;
108
Tony Lindgrenee17f112011-09-16 15:44:20 -0700109 if (!timer->sys_stat)
110 return;
111
Timo Teras77900a22006-06-26 16:16:12 -0700112 c = 0;
Tony Lindgrenee17f112011-09-16 15:44:20 -0700113 while (!(__raw_readl(timer->sys_stat) & 1)) {
Timo Teras77900a22006-06-26 16:16:12 -0700114 c++;
115 if (c > 100000) {
116 printk(KERN_ERR "Timer failed to reset\n");
117 return;
118 }
119 }
Tony Lindgren92105bb2005-09-07 17:20:26 +0100120}
121
Timo Teras77900a22006-06-26 16:16:12 -0700122static void omap_dm_timer_reset(struct omap_dm_timer *timer)
123{
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530124 omap_dm_timer_enable(timer);
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530125 if (timer->pdev->id != 1) {
Timo Terase32f7ec2006-06-26 16:16:13 -0700126 omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06);
127 omap_dm_timer_wait_for_reset(timer);
128 }
Timo Teras77900a22006-06-26 16:16:12 -0700129
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530130 __omap_dm_timer_reset(timer, 0, 0);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530131 omap_dm_timer_disable(timer);
Richard Woodruff0f0d0802008-07-03 12:24:30 +0300132 timer->posted = 1;
Timo Teras77900a22006-06-26 16:16:12 -0700133}
134
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530135int omap_dm_timer_prepare(struct omap_dm_timer *timer)
Timo Teras77900a22006-06-26 16:16:12 -0700136{
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530137 struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data;
138 int ret;
139
140 timer->fclk = clk_get(&timer->pdev->dev, "fck");
141 if (WARN_ON_ONCE(IS_ERR_OR_NULL(timer->fclk))) {
142 timer->fclk = NULL;
143 dev_err(&timer->pdev->dev, ": No fclk handle.\n");
144 return -EINVAL;
145 }
146
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530147 if (pdata->needs_manual_reset)
148 omap_dm_timer_reset(timer);
149
150 ret = omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ);
151
152 timer->posted = 1;
153 return ret;
Timo Teras77900a22006-06-26 16:16:12 -0700154}
155
Jon Hunterb7b4ff72012-06-05 12:34:51 -0500156static inline u32 omap_dm_timer_reserved_systimer(int id)
157{
158 return (omap_reserved_systimers & (1 << (id - 1))) ? 1 : 0;
159}
160
161int omap_dm_timer_reserve_systimer(int id)
162{
163 if (omap_dm_timer_reserved_systimer(id))
164 return -ENODEV;
165
166 omap_reserved_systimers |= (1 << (id - 1));
167
168 return 0;
169}
170
Timo Teras77900a22006-06-26 16:16:12 -0700171struct omap_dm_timer *omap_dm_timer_request(void)
172{
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530173 struct omap_dm_timer *timer = NULL, *t;
Timo Teras77900a22006-06-26 16:16:12 -0700174 unsigned long flags;
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530175 int ret = 0;
Timo Teras77900a22006-06-26 16:16:12 -0700176
177 spin_lock_irqsave(&dm_timer_lock, flags);
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530178 list_for_each_entry(t, &omap_timer_list, node) {
179 if (t->reserved)
Timo Teras77900a22006-06-26 16:16:12 -0700180 continue;
181
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530182 timer = t;
Timo Teras83379c82006-06-26 16:16:23 -0700183 timer->reserved = 1;
Timo Teras77900a22006-06-26 16:16:12 -0700184 break;
185 }
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530186
187 if (timer) {
188 ret = omap_dm_timer_prepare(timer);
189 if (ret) {
190 timer->reserved = 0;
191 timer = NULL;
192 }
193 }
Timo Teras77900a22006-06-26 16:16:12 -0700194 spin_unlock_irqrestore(&dm_timer_lock, flags);
195
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530196 if (!timer)
197 pr_debug("%s: timer request failed!\n", __func__);
Timo Teras83379c82006-06-26 16:16:23 -0700198
Timo Teras77900a22006-06-26 16:16:12 -0700199 return timer;
200}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700201EXPORT_SYMBOL_GPL(omap_dm_timer_request);
Timo Teras77900a22006-06-26 16:16:12 -0700202
203struct omap_dm_timer *omap_dm_timer_request_specific(int id)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100204{
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530205 struct omap_dm_timer *timer = NULL, *t;
Timo Teras77900a22006-06-26 16:16:12 -0700206 unsigned long flags;
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530207 int ret = 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100208
Timo Teras77900a22006-06-26 16:16:12 -0700209 spin_lock_irqsave(&dm_timer_lock, flags);
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530210 list_for_each_entry(t, &omap_timer_list, node) {
211 if (t->pdev->id == id && !t->reserved) {
212 timer = t;
213 timer->reserved = 1;
214 break;
215 }
Timo Teras77900a22006-06-26 16:16:12 -0700216 }
Tony Lindgren92105bb2005-09-07 17:20:26 +0100217
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530218 if (timer) {
219 ret = omap_dm_timer_prepare(timer);
220 if (ret) {
221 timer->reserved = 0;
222 timer = NULL;
223 }
224 }
Timo Teras77900a22006-06-26 16:16:12 -0700225 spin_unlock_irqrestore(&dm_timer_lock, flags);
226
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530227 if (!timer)
228 pr_debug("%s: timer%d request failed!\n", __func__, id);
Timo Teras83379c82006-06-26 16:16:23 -0700229
Timo Teras77900a22006-06-26 16:16:12 -0700230 return timer;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100231}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700232EXPORT_SYMBOL_GPL(omap_dm_timer_request_specific);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100233
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530234int omap_dm_timer_free(struct omap_dm_timer *timer)
Timo Teras77900a22006-06-26 16:16:12 -0700235{
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530236 if (unlikely(!timer))
237 return -EINVAL;
238
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530239 clk_put(timer->fclk);
Timo Terasfa4bb622006-09-25 12:41:35 +0300240
Timo Teras77900a22006-06-26 16:16:12 -0700241 WARN_ON(!timer->reserved);
242 timer->reserved = 0;
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530243 return 0;
Timo Teras77900a22006-06-26 16:16:12 -0700244}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700245EXPORT_SYMBOL_GPL(omap_dm_timer_free);
Timo Teras77900a22006-06-26 16:16:12 -0700246
Timo Teras12583a72006-09-25 12:41:42 +0300247void omap_dm_timer_enable(struct omap_dm_timer *timer)
248{
Tarun Kanti DebBarmaffe07ce2011-09-20 17:00:21 +0530249 pm_runtime_get_sync(&timer->pdev->dev);
Timo Teras12583a72006-09-25 12:41:42 +0300250}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700251EXPORT_SYMBOL_GPL(omap_dm_timer_enable);
Timo Teras12583a72006-09-25 12:41:42 +0300252
253void omap_dm_timer_disable(struct omap_dm_timer *timer)
254{
Tarun Kanti DebBarmaffe07ce2011-09-20 17:00:21 +0530255 pm_runtime_put(&timer->pdev->dev);
Timo Teras12583a72006-09-25 12:41:42 +0300256}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700257EXPORT_SYMBOL_GPL(omap_dm_timer_disable);
Timo Teras12583a72006-09-25 12:41:42 +0300258
Timo Teras77900a22006-06-26 16:16:12 -0700259int omap_dm_timer_get_irq(struct omap_dm_timer *timer)
260{
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530261 if (timer)
262 return timer->irq;
263 return -EINVAL;
Timo Teras77900a22006-06-26 16:16:12 -0700264}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700265EXPORT_SYMBOL_GPL(omap_dm_timer_get_irq);
Timo Teras77900a22006-06-26 16:16:12 -0700266
267#if defined(CONFIG_ARCH_OMAP1)
268
Tony Lindgrena569c6e2006-04-02 17:46:21 +0100269/**
270 * omap_dm_timer_modify_idlect_mask - Check if any running timers use ARMXOR
271 * @inputmask: current value of idlect mask
272 */
273__u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
274{
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530275 int i = 0;
276 struct omap_dm_timer *timer = NULL;
277 unsigned long flags;
Tony Lindgrena569c6e2006-04-02 17:46:21 +0100278
279 /* If ARMXOR cannot be idled this function call is unnecessary */
280 if (!(inputmask & (1 << 1)))
281 return inputmask;
282
283 /* If any active timer is using ARMXOR return modified mask */
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530284 spin_lock_irqsave(&dm_timer_lock, flags);
285 list_for_each_entry(timer, &omap_timer_list, node) {
Timo Teras77900a22006-06-26 16:16:12 -0700286 u32 l;
287
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530288 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
Timo Teras77900a22006-06-26 16:16:12 -0700289 if (l & OMAP_TIMER_CTRL_ST) {
290 if (((omap_readl(MOD_CONF_CTRL_1) >> (i * 2)) & 0x03) == 0)
Tony Lindgrena569c6e2006-04-02 17:46:21 +0100291 inputmask &= ~(1 << 1);
292 else
293 inputmask &= ~(1 << 2);
294 }
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530295 i++;
Timo Teras77900a22006-06-26 16:16:12 -0700296 }
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530297 spin_unlock_irqrestore(&dm_timer_lock, flags);
Tony Lindgrena569c6e2006-04-02 17:46:21 +0100298
299 return inputmask;
300}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700301EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
Tony Lindgrena569c6e2006-04-02 17:46:21 +0100302
Tony Lindgren140455f2010-02-12 12:26:48 -0800303#else
Timo Teras77900a22006-06-26 16:16:12 -0700304
305struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
306{
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530307 if (timer)
308 return timer->fclk;
309 return NULL;
Timo Teras77900a22006-06-26 16:16:12 -0700310}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700311EXPORT_SYMBOL_GPL(omap_dm_timer_get_fclk);
Timo Teras77900a22006-06-26 16:16:12 -0700312
313__u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
314{
315 BUG();
Dirk Behme21218802006-12-06 17:14:00 -0800316
317 return 0;
Timo Teras77900a22006-06-26 16:16:12 -0700318}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700319EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
Timo Teras77900a22006-06-26 16:16:12 -0700320
321#endif
322
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530323int omap_dm_timer_trigger(struct omap_dm_timer *timer)
Timo Teras77900a22006-06-26 16:16:12 -0700324{
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530325 if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
326 pr_err("%s: timer not available or enabled.\n", __func__);
327 return -EINVAL;
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530328 }
329
Timo Teras77900a22006-06-26 16:16:12 -0700330 omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530331 return 0;
Timo Teras77900a22006-06-26 16:16:12 -0700332}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700333EXPORT_SYMBOL_GPL(omap_dm_timer_trigger);
Timo Teras77900a22006-06-26 16:16:12 -0700334
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530335int omap_dm_timer_start(struct omap_dm_timer *timer)
Timo Teras77900a22006-06-26 16:16:12 -0700336{
337 u32 l;
338
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530339 if (unlikely(!timer))
340 return -EINVAL;
341
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530342 omap_dm_timer_enable(timer);
343
344 if (timer->loses_context) {
345 u32 ctx_loss_cnt_after =
346 timer->get_context_loss_count(&timer->pdev->dev);
347 if (ctx_loss_cnt_after != timer->ctx_loss_count)
348 omap_timer_restore_context(timer);
349 }
350
Timo Teras77900a22006-06-26 16:16:12 -0700351 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
352 if (!(l & OMAP_TIMER_CTRL_ST)) {
353 l |= OMAP_TIMER_CTRL_ST;
354 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
355 }
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530356
357 /* Save the context */
358 timer->context.tclr = l;
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530359 return 0;
Timo Teras77900a22006-06-26 16:16:12 -0700360}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700361EXPORT_SYMBOL_GPL(omap_dm_timer_start);
Timo Teras77900a22006-06-26 16:16:12 -0700362
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530363int omap_dm_timer_stop(struct omap_dm_timer *timer)
Timo Teras77900a22006-06-26 16:16:12 -0700364{
Tony Lindgrencaf64f22011-03-29 15:54:48 -0700365 unsigned long rate = 0;
Paul Walmsleyeeb37112012-04-13 06:34:32 -0600366 struct dmtimer_platform_data *pdata;
Timo Teras77900a22006-06-26 16:16:12 -0700367
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530368 if (unlikely(!timer))
369 return -EINVAL;
370
Paul Walmsleyeeb37112012-04-13 06:34:32 -0600371 pdata = timer->pdev->dev.platform_data;
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530372 if (!pdata->needs_manual_reset)
373 rate = clk_get_rate(timer->fclk);
Tony Lindgrencaf64f22011-03-29 15:54:48 -0700374
Tony Lindgrenee17f112011-09-16 15:44:20 -0700375 __omap_dm_timer_stop(timer, timer->posted, rate);
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530376
Tarun Kanti DebBarmadffc9da2012-03-05 16:11:00 -0800377 if (timer->loses_context && timer->get_context_loss_count)
378 timer->ctx_loss_count =
379 timer->get_context_loss_count(&timer->pdev->dev);
380
381 /*
382 * Since the register values are computed and written within
383 * __omap_dm_timer_stop, we need to use read to retrieve the
384 * context.
385 */
386 timer->context.tclr =
387 omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
388 timer->context.tisr = __raw_readl(timer->irq_stat);
389 omap_dm_timer_disable(timer);
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530390 return 0;
Timo Teras77900a22006-06-26 16:16:12 -0700391}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700392EXPORT_SYMBOL_GPL(omap_dm_timer_stop);
Timo Teras77900a22006-06-26 16:16:12 -0700393
Paul Walmsleyf2480762009-04-23 21:11:10 -0600394int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100395{
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530396 int ret;
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530397 struct dmtimer_platform_data *pdata;
398
399 if (unlikely(!timer))
400 return -EINVAL;
401
402 pdata = timer->pdev->dev.platform_data;
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530403
Timo Teras77900a22006-06-26 16:16:12 -0700404 if (source < 0 || source >= 3)
Paul Walmsleyf2480762009-04-23 21:11:10 -0600405 return -EINVAL;
Timo Teras77900a22006-06-26 16:16:12 -0700406
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530407 ret = pdata->set_timer_src(timer->pdev, source);
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530408
409 return ret;
Timo Teras77900a22006-06-26 16:16:12 -0700410}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700411EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
Timo Teras77900a22006-06-26 16:16:12 -0700412
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530413int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
Timo Teras77900a22006-06-26 16:16:12 -0700414 unsigned int load)
415{
416 u32 l;
417
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530418 if (unlikely(!timer))
419 return -EINVAL;
420
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530421 omap_dm_timer_enable(timer);
Timo Teras77900a22006-06-26 16:16:12 -0700422 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
423 if (autoreload)
424 l |= OMAP_TIMER_CTRL_AR;
425 else
426 l &= ~OMAP_TIMER_CTRL_AR;
427 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
428 omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);
Richard Woodruff0f0d0802008-07-03 12:24:30 +0300429
Timo Teras77900a22006-06-26 16:16:12 -0700430 omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530431 /* Save the context */
432 timer->context.tclr = l;
433 timer->context.tldr = load;
434 omap_dm_timer_disable(timer);
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530435 return 0;
Timo Teras77900a22006-06-26 16:16:12 -0700436}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700437EXPORT_SYMBOL_GPL(omap_dm_timer_set_load);
Timo Teras77900a22006-06-26 16:16:12 -0700438
Richard Woodruff3fddd092008-07-03 12:24:30 +0300439/* Optimized set_load which removes costly spin wait in timer_start */
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530440int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
Richard Woodruff3fddd092008-07-03 12:24:30 +0300441 unsigned int load)
442{
443 u32 l;
444
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530445 if (unlikely(!timer))
446 return -EINVAL;
447
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530448 omap_dm_timer_enable(timer);
449
450 if (timer->loses_context) {
451 u32 ctx_loss_cnt_after =
452 timer->get_context_loss_count(&timer->pdev->dev);
453 if (ctx_loss_cnt_after != timer->ctx_loss_count)
454 omap_timer_restore_context(timer);
455 }
456
Richard Woodruff3fddd092008-07-03 12:24:30 +0300457 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
Paul Walmsley64ce2902008-12-10 17:36:34 -0800458 if (autoreload) {
Richard Woodruff3fddd092008-07-03 12:24:30 +0300459 l |= OMAP_TIMER_CTRL_AR;
Paul Walmsley64ce2902008-12-10 17:36:34 -0800460 omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);
461 } else {
Richard Woodruff3fddd092008-07-03 12:24:30 +0300462 l &= ~OMAP_TIMER_CTRL_AR;
Paul Walmsley64ce2902008-12-10 17:36:34 -0800463 }
Richard Woodruff3fddd092008-07-03 12:24:30 +0300464 l |= OMAP_TIMER_CTRL_ST;
465
Tony Lindgrenee17f112011-09-16 15:44:20 -0700466 __omap_dm_timer_load_start(timer, l, load, timer->posted);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530467
468 /* Save the context */
469 timer->context.tclr = l;
470 timer->context.tldr = load;
471 timer->context.tcrr = load;
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530472 return 0;
Richard Woodruff3fddd092008-07-03 12:24:30 +0300473}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700474EXPORT_SYMBOL_GPL(omap_dm_timer_set_load_start);
Richard Woodruff3fddd092008-07-03 12:24:30 +0300475
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530476int omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
Timo Teras77900a22006-06-26 16:16:12 -0700477 unsigned int match)
478{
479 u32 l;
480
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530481 if (unlikely(!timer))
482 return -EINVAL;
483
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530484 omap_dm_timer_enable(timer);
Timo Teras77900a22006-06-26 16:16:12 -0700485 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
Timo Teras83379c82006-06-26 16:16:23 -0700486 if (enable)
Timo Teras77900a22006-06-26 16:16:12 -0700487 l |= OMAP_TIMER_CTRL_CE;
488 else
489 l &= ~OMAP_TIMER_CTRL_CE;
490 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
491 omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG, match);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530492
493 /* Save the context */
494 timer->context.tclr = l;
495 timer->context.tmar = match;
496 omap_dm_timer_disable(timer);
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530497 return 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100498}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700499EXPORT_SYMBOL_GPL(omap_dm_timer_set_match);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100500
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530501int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on,
Timo Teras77900a22006-06-26 16:16:12 -0700502 int toggle, int trigger)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100503{
Timo Teras77900a22006-06-26 16:16:12 -0700504 u32 l;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100505
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530506 if (unlikely(!timer))
507 return -EINVAL;
508
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530509 omap_dm_timer_enable(timer);
Timo Teras77900a22006-06-26 16:16:12 -0700510 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
511 l &= ~(OMAP_TIMER_CTRL_GPOCFG | OMAP_TIMER_CTRL_SCPWM |
512 OMAP_TIMER_CTRL_PT | (0x03 << 10));
513 if (def_on)
514 l |= OMAP_TIMER_CTRL_SCPWM;
515 if (toggle)
516 l |= OMAP_TIMER_CTRL_PT;
517 l |= trigger << 10;
518 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530519
520 /* Save the context */
521 timer->context.tclr = l;
522 omap_dm_timer_disable(timer);
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530523 return 0;
Timo Teras77900a22006-06-26 16:16:12 -0700524}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700525EXPORT_SYMBOL_GPL(omap_dm_timer_set_pwm);
Timo Teras77900a22006-06-26 16:16:12 -0700526
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530527int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler)
Timo Teras77900a22006-06-26 16:16:12 -0700528{
529 u32 l;
530
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530531 if (unlikely(!timer))
532 return -EINVAL;
533
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530534 omap_dm_timer_enable(timer);
Timo Teras77900a22006-06-26 16:16:12 -0700535 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
536 l &= ~(OMAP_TIMER_CTRL_PRE | (0x07 << 2));
537 if (prescaler >= 0x00 && prescaler <= 0x07) {
538 l |= OMAP_TIMER_CTRL_PRE;
539 l |= prescaler << 2;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100540 }
Timo Teras77900a22006-06-26 16:16:12 -0700541 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530542
543 /* Save the context */
544 timer->context.tclr = l;
545 omap_dm_timer_disable(timer);
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530546 return 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100547}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700548EXPORT_SYMBOL_GPL(omap_dm_timer_set_prescaler);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100549
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530550int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
Timo Teras77900a22006-06-26 16:16:12 -0700551 unsigned int value)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100552{
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530553 if (unlikely(!timer))
554 return -EINVAL;
555
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530556 omap_dm_timer_enable(timer);
Tony Lindgrenee17f112011-09-16 15:44:20 -0700557 __omap_dm_timer_int_enable(timer, value);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530558
559 /* Save the context */
560 timer->context.tier = value;
561 timer->context.twer = value;
562 omap_dm_timer_disable(timer);
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530563 return 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100564}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700565EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100566
567unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
568{
Timo Terasfa4bb622006-09-25 12:41:35 +0300569 unsigned int l;
570
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530571 if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
572 pr_err("%s: timer not available or enabled.\n", __func__);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530573 return 0;
574 }
575
Tony Lindgrenee17f112011-09-16 15:44:20 -0700576 l = __raw_readl(timer->irq_stat);
Timo Terasfa4bb622006-09-25 12:41:35 +0300577
578 return l;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100579}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700580EXPORT_SYMBOL_GPL(omap_dm_timer_read_status);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100581
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530582int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100583{
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530584 if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev)))
585 return -EINVAL;
586
Tony Lindgrenee17f112011-09-16 15:44:20 -0700587 __omap_dm_timer_write_status(timer, value);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530588 /* Save the context */
589 timer->context.tisr = value;
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530590 return 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100591}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700592EXPORT_SYMBOL_GPL(omap_dm_timer_write_status);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100593
Tony Lindgren92105bb2005-09-07 17:20:26 +0100594unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer)
595{
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530596 if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
597 pr_err("%s: timer not iavailable or enabled.\n", __func__);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530598 return 0;
599 }
600
Tony Lindgrenee17f112011-09-16 15:44:20 -0700601 return __omap_dm_timer_read_counter(timer, timer->posted);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100602}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700603EXPORT_SYMBOL_GPL(omap_dm_timer_read_counter);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100604
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530605int omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value)
Timo Teras83379c82006-06-26 16:16:23 -0700606{
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530607 if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
608 pr_err("%s: timer not available or enabled.\n", __func__);
609 return -EINVAL;
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530610 }
611
Timo Terasfa4bb622006-09-25 12:41:35 +0300612 omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, value);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530613
614 /* Save the context */
615 timer->context.tcrr = value;
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530616 return 0;
Timo Teras83379c82006-06-26 16:16:23 -0700617}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700618EXPORT_SYMBOL_GPL(omap_dm_timer_write_counter);
Timo Teras83379c82006-06-26 16:16:23 -0700619
Timo Teras77900a22006-06-26 16:16:12 -0700620int omap_dm_timers_active(void)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100621{
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530622 struct omap_dm_timer *timer;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100623
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530624 list_for_each_entry(timer, &omap_timer_list, node) {
Tarun Kanti DebBarmaffe07ce2011-09-20 17:00:21 +0530625 if (!timer->reserved)
Timo Teras12583a72006-09-25 12:41:42 +0300626 continue;
627
Timo Teras77900a22006-06-26 16:16:12 -0700628 if (omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG) &
Timo Terasfa4bb622006-09-25 12:41:35 +0300629 OMAP_TIMER_CTRL_ST) {
Timo Teras77900a22006-06-26 16:16:12 -0700630 return 1;
Timo Terasfa4bb622006-09-25 12:41:35 +0300631 }
Tony Lindgren92105bb2005-09-07 17:20:26 +0100632 }
Tony Lindgren92105bb2005-09-07 17:20:26 +0100633 return 0;
634}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700635EXPORT_SYMBOL_GPL(omap_dm_timers_active);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100636
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530637/**
638 * omap_dm_timer_probe - probe function called for every registered device
639 * @pdev: pointer to current timer platform device
640 *
641 * Called by driver framework at the end of device registration for all
642 * timer devices.
643 */
644static int __devinit omap_dm_timer_probe(struct platform_device *pdev)
645{
646 int ret;
647 unsigned long flags;
648 struct omap_dm_timer *timer;
649 struct resource *mem, *irq, *ioarea;
650 struct dmtimer_platform_data *pdata = pdev->dev.platform_data;
651
652 if (!pdata) {
653 dev_err(&pdev->dev, "%s: no platform data.\n", __func__);
654 return -ENODEV;
655 }
656
657 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
658 if (unlikely(!irq)) {
659 dev_err(&pdev->dev, "%s: no IRQ resource.\n", __func__);
660 return -ENODEV;
661 }
662
663 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
664 if (unlikely(!mem)) {
665 dev_err(&pdev->dev, "%s: no memory resource.\n", __func__);
666 return -ENODEV;
667 }
668
669 ioarea = request_mem_region(mem->start, resource_size(mem),
670 pdev->name);
671 if (!ioarea) {
672 dev_err(&pdev->dev, "%s: region already claimed.\n", __func__);
673 return -EBUSY;
674 }
675
676 timer = kzalloc(sizeof(struct omap_dm_timer), GFP_KERNEL);
677 if (!timer) {
678 dev_err(&pdev->dev, "%s: no memory for omap_dm_timer.\n",
679 __func__);
680 ret = -ENOMEM;
681 goto err_free_ioregion;
682 }
683
684 timer->io_base = ioremap(mem->start, resource_size(mem));
685 if (!timer->io_base) {
686 dev_err(&pdev->dev, "%s: ioremap failed.\n", __func__);
687 ret = -ENOMEM;
688 goto err_free_mem;
689 }
690
691 timer->id = pdev->id;
692 timer->irq = irq->start;
Jon Hunterb7b4ff72012-06-05 12:34:51 -0500693 timer->reserved = omap_dm_timer_reserved_systimer(timer->id);
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530694 timer->pdev = pdev;
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530695 timer->loses_context = pdata->loses_context;
696 timer->get_context_loss_count = pdata->get_context_loss_count;
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530697
Tarun Kanti DebBarmaffe07ce2011-09-20 17:00:21 +0530698 /* Skip pm_runtime_enable for OMAP1 */
699 if (!pdata->needs_manual_reset) {
700 pm_runtime_enable(&pdev->dev);
701 pm_runtime_irq_safe(&pdev->dev);
702 }
703
Tony Lindgren0dad9fa2011-09-21 16:38:51 -0700704 if (!timer->reserved) {
705 pm_runtime_get_sync(&pdev->dev);
706 __omap_dm_timer_init_regs(timer);
707 pm_runtime_put(&pdev->dev);
708 }
709
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530710 /* add the timer element to the list */
711 spin_lock_irqsave(&dm_timer_lock, flags);
712 list_add_tail(&timer->node, &omap_timer_list);
713 spin_unlock_irqrestore(&dm_timer_lock, flags);
714
715 dev_dbg(&pdev->dev, "Device Probed.\n");
716
717 return 0;
718
719err_free_mem:
720 kfree(timer);
721
722err_free_ioregion:
723 release_mem_region(mem->start, resource_size(mem));
724
725 return ret;
726}
727
728/**
729 * omap_dm_timer_remove - cleanup a registered timer device
730 * @pdev: pointer to current timer platform device
731 *
732 * Called by driver framework whenever a timer device is unregistered.
733 * In addition to freeing platform resources it also deletes the timer
734 * entry from the local list.
735 */
736static int __devexit omap_dm_timer_remove(struct platform_device *pdev)
737{
738 struct omap_dm_timer *timer;
739 unsigned long flags;
740 int ret = -EINVAL;
741
742 spin_lock_irqsave(&dm_timer_lock, flags);
743 list_for_each_entry(timer, &omap_timer_list, node)
744 if (timer->pdev->id == pdev->id) {
745 list_del(&timer->node);
746 kfree(timer);
747 ret = 0;
748 break;
749 }
750 spin_unlock_irqrestore(&dm_timer_lock, flags);
751
752 return ret;
753}
754
755static struct platform_driver omap_dm_timer_driver = {
756 .probe = omap_dm_timer_probe,
Arnd Bergmann4c23c8d2011-10-01 18:42:47 +0200757 .remove = __devexit_p(omap_dm_timer_remove),
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530758 .driver = {
759 .name = "omap_timer",
760 },
761};
762
763static int __init omap_dm_timer_driver_init(void)
764{
765 return platform_driver_register(&omap_dm_timer_driver);
766}
767
768static void __exit omap_dm_timer_driver_exit(void)
769{
770 platform_driver_unregister(&omap_dm_timer_driver);
771}
772
773early_platform_init("earlytimer", &omap_dm_timer_driver);
774module_init(omap_dm_timer_driver_init);
775module_exit(omap_dm_timer_driver_exit);
776
777MODULE_DESCRIPTION("OMAP Dual-Mode Timer Driver");
778MODULE_LICENSE("GPL");
779MODULE_ALIAS("platform:" DRIVER_NAME);
780MODULE_AUTHOR("Texas Instruments Inc");