blob: 0901b2f14e15e9b2b396e923641de5c2a28eb90d [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Precise Delay Loops for SuperH
3 *
4 * Copyright (C) 1999 Niibe Yutaka & Kaz Kojima
5 */
6
7#include <linux/sched.h>
8#include <linux/delay.h>
9
10void __delay(unsigned long loops)
11{
12 __asm__ __volatile__(
Stuart Menefya0865362010-11-11 18:26:31 +000013 /*
14 * ST40-300 appears to have an issue with this code,
15 * normally taking two cycles each loop, as with all
16 * other SH variants. If however the branch and the
17 * delay slot straddle an 8 byte boundary, this increases
18 * to 3 cycles.
19 * This align directive ensures this doesn't occur.
20 */
21 ".balign 8\n\t"
22
Linus Torvalds1da177e2005-04-16 15:20:36 -070023 "tst %0, %0\n\t"
24 "1:\t"
25 "bf/s 1b\n\t"
26 " dt %0"
27 : "=r" (loops)
28 : "0" (loops)
29 : "t");
30}
31
32inline void __const_udelay(unsigned long xloops)
33{
Stuart Menefybd4fb4d2009-08-24 18:18:50 +090034 xloops *= 4;
Linus Torvalds1da177e2005-04-16 15:20:36 -070035 __asm__("dmulu.l %0, %2\n\t"
36 "sts mach, %0"
37 : "=r" (xloops)
kogiidenac71861e2007-05-08 20:45:46 +090038 : "0" (xloops),
Stuart Menefybd4fb4d2009-08-24 18:18:50 +090039 "r" (cpu_data[raw_smp_processor_id()].loops_per_jiffy * (HZ/4))
Linus Torvalds1da177e2005-04-16 15:20:36 -070040 : "macl", "mach");
Stuart Menefybd4fb4d2009-08-24 18:18:50 +090041 __delay(++xloops);
Linus Torvalds1da177e2005-04-16 15:20:36 -070042}
43
44void __udelay(unsigned long usecs)
45{
46 __const_udelay(usecs * 0x000010c6); /* 2**32 / 1000000 */
47}
48
49void __ndelay(unsigned long nsecs)
50{
51 __const_udelay(nsecs * 0x00000005);
52}
53