blob: 4a295f9ba067350cf4e3e3350eddc93414b81022 [file] [log] [blame]
Patrik Jakobssonf35257a2014-03-11 22:53:43 +01001/**************************************************************************
2 * Copyright (c) 2011, Intel Corporation.
3 * All Rights Reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 **************************************************************************/
15
16#include <drm/drmP.h>
17#include "psb_drv.h"
18
19void gma_get_core_freq(struct drm_device *dev)
20{
21 uint32_t clock;
22 struct pci_dev *pci_root = pci_get_bus_and_slot(0, 0);
23 struct drm_psb_private *dev_priv = dev->dev_private;
24
25 /*pci_write_config_dword(pci_root, 0xD4, 0x00C32004);*/
26 /*pci_write_config_dword(pci_root, 0xD0, 0xE0033000);*/
27
28 pci_write_config_dword(pci_root, 0xD0, 0xD0050300);
29 pci_read_config_dword(pci_root, 0xD4, &clock);
30 pci_dev_put(pci_root);
31
32 switch (clock & 0x07) {
33 case 0:
34 dev_priv->core_freq = 100;
35 break;
36 case 1:
37 dev_priv->core_freq = 133;
38 break;
39 case 2:
40 dev_priv->core_freq = 150;
41 break;
42 case 3:
43 dev_priv->core_freq = 178;
44 break;
45 case 4:
46 dev_priv->core_freq = 200;
47 break;
48 case 5:
49 case 6:
50 case 7:
51 dev_priv->core_freq = 266;
52 break;
53 default:
54 dev_priv->core_freq = 0;
55 }
56}