Andrew Lunn | 55fc830 | 2014-05-26 21:29:48 +0200 | [diff] [blame] | 1 | /* |
| 2 | * arch/arm/mach-mvbu/board-netxbig.c |
| 3 | * |
| 4 | * LaCie 2Big and 5Big Network v2 board setup |
| 5 | * |
| 6 | * Copyright (C) 2010 Simon Guinot <sguinot@lacie.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; either version 2 of the License, or |
| 11 | * (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | */ |
| 18 | |
| 19 | #include <linux/kernel.h> |
| 20 | #include <linux/of.h> |
| 21 | #include <linux/platform_device.h> |
| 22 | #include <linux/platform_data/leds-kirkwood-netxbig.h> |
| 23 | #include "common.h" |
| 24 | |
| 25 | /***************************************************************************** |
| 26 | * GPIO extension LEDs |
| 27 | ****************************************************************************/ |
| 28 | |
| 29 | /* |
| 30 | * The LEDs are controlled by a CPLD and can be configured through a GPIO |
| 31 | * extension bus: |
| 32 | * |
| 33 | * - address register : bit [0-2] -> GPIO [47-49] |
| 34 | * - data register : bit [0-2] -> GPIO [44-46] |
| 35 | * - enable register : GPIO 29 |
| 36 | */ |
| 37 | |
| 38 | static int netxbig_v2_gpio_ext_addr[] = { 47, 48, 49 }; |
| 39 | static int netxbig_v2_gpio_ext_data[] = { 44, 45, 46 }; |
| 40 | |
| 41 | static struct netxbig_gpio_ext netxbig_v2_gpio_ext = { |
| 42 | .addr = netxbig_v2_gpio_ext_addr, |
| 43 | .num_addr = ARRAY_SIZE(netxbig_v2_gpio_ext_addr), |
| 44 | .data = netxbig_v2_gpio_ext_data, |
| 45 | .num_data = ARRAY_SIZE(netxbig_v2_gpio_ext_data), |
| 46 | .enable = 29, |
| 47 | }; |
| 48 | |
| 49 | /* |
| 50 | * Address register selection: |
| 51 | * |
| 52 | * addr | register |
| 53 | * ---------------------------- |
| 54 | * 0 | front LED |
| 55 | * 1 | front LED brightness |
| 56 | * 2 | SATA LED brightness |
| 57 | * 3 | SATA0 LED |
| 58 | * 4 | SATA1 LED |
| 59 | * 5 | SATA2 LED |
| 60 | * 6 | SATA3 LED |
| 61 | * 7 | SATA4 LED |
| 62 | * |
| 63 | * Data register configuration: |
| 64 | * |
| 65 | * data | LED brightness |
| 66 | * ------------------------------------------------- |
| 67 | * 0 | min (off) |
| 68 | * - | - |
| 69 | * 7 | max |
| 70 | * |
| 71 | * data | front LED mode |
| 72 | * ------------------------------------------------- |
| 73 | * 0 | fix off |
| 74 | * 1 | fix blue on |
| 75 | * 2 | fix red on |
| 76 | * 3 | blink blue on=1 sec and blue off=1 sec |
| 77 | * 4 | blink red on=1 sec and red off=1 sec |
| 78 | * 5 | blink blue on=2.5 sec and red on=0.5 sec |
| 79 | * 6 | blink blue on=1 sec and red on=1 sec |
| 80 | * 7 | blink blue on=0.5 sec and blue off=2.5 sec |
| 81 | * |
| 82 | * data | SATA LED mode |
| 83 | * ------------------------------------------------- |
| 84 | * 0 | fix off |
| 85 | * 1 | SATA activity blink |
| 86 | * 2 | fix red on |
| 87 | * 3 | blink blue on=1 sec and blue off=1 sec |
| 88 | * 4 | blink red on=1 sec and red off=1 sec |
| 89 | * 5 | blink blue on=2.5 sec and red on=0.5 sec |
| 90 | * 6 | blink blue on=1 sec and red on=1 sec |
| 91 | * 7 | fix blue on |
| 92 | */ |
| 93 | |
| 94 | static int netxbig_v2_red_mled[NETXBIG_LED_MODE_NUM] = { |
| 95 | [NETXBIG_LED_OFF] = 0, |
| 96 | [NETXBIG_LED_ON] = 2, |
| 97 | [NETXBIG_LED_SATA] = NETXBIG_LED_INVALID_MODE, |
| 98 | [NETXBIG_LED_TIMER1] = 4, |
| 99 | [NETXBIG_LED_TIMER2] = NETXBIG_LED_INVALID_MODE, |
| 100 | }; |
| 101 | |
| 102 | static int netxbig_v2_blue_pwr_mled[NETXBIG_LED_MODE_NUM] = { |
| 103 | [NETXBIG_LED_OFF] = 0, |
| 104 | [NETXBIG_LED_ON] = 1, |
| 105 | [NETXBIG_LED_SATA] = NETXBIG_LED_INVALID_MODE, |
| 106 | [NETXBIG_LED_TIMER1] = 3, |
| 107 | [NETXBIG_LED_TIMER2] = 7, |
| 108 | }; |
| 109 | |
| 110 | static int netxbig_v2_blue_sata_mled[NETXBIG_LED_MODE_NUM] = { |
| 111 | [NETXBIG_LED_OFF] = 0, |
| 112 | [NETXBIG_LED_ON] = 7, |
| 113 | [NETXBIG_LED_SATA] = 1, |
| 114 | [NETXBIG_LED_TIMER1] = 3, |
| 115 | [NETXBIG_LED_TIMER2] = NETXBIG_LED_INVALID_MODE, |
| 116 | }; |
| 117 | |
| 118 | static struct netxbig_led_timer netxbig_v2_led_timer[] = { |
| 119 | [0] = { |
| 120 | .delay_on = 500, |
| 121 | .delay_off = 500, |
| 122 | .mode = NETXBIG_LED_TIMER1, |
| 123 | }, |
| 124 | [1] = { |
| 125 | .delay_on = 500, |
| 126 | .delay_off = 1000, |
| 127 | .mode = NETXBIG_LED_TIMER2, |
| 128 | }, |
| 129 | }; |
| 130 | |
| 131 | #define NETXBIG_LED(_name, maddr, mval, baddr) \ |
| 132 | { .name = _name, \ |
| 133 | .mode_addr = maddr, \ |
| 134 | .mode_val = mval, \ |
| 135 | .bright_addr = baddr } |
| 136 | |
| 137 | static struct netxbig_led net2big_v2_leds_ctrl[] = { |
| 138 | NETXBIG_LED("net2big-v2:blue:power", 0, netxbig_v2_blue_pwr_mled, 1), |
| 139 | NETXBIG_LED("net2big-v2:red:power", 0, netxbig_v2_red_mled, 1), |
| 140 | NETXBIG_LED("net2big-v2:blue:sata0", 3, netxbig_v2_blue_sata_mled, 2), |
| 141 | NETXBIG_LED("net2big-v2:red:sata0", 3, netxbig_v2_red_mled, 2), |
| 142 | NETXBIG_LED("net2big-v2:blue:sata1", 4, netxbig_v2_blue_sata_mled, 2), |
| 143 | NETXBIG_LED("net2big-v2:red:sata1", 4, netxbig_v2_red_mled, 2), |
| 144 | }; |
| 145 | |
| 146 | static struct netxbig_led_platform_data net2big_v2_leds_data = { |
| 147 | .gpio_ext = &netxbig_v2_gpio_ext, |
| 148 | .timer = netxbig_v2_led_timer, |
| 149 | .num_timer = ARRAY_SIZE(netxbig_v2_led_timer), |
| 150 | .leds = net2big_v2_leds_ctrl, |
| 151 | .num_leds = ARRAY_SIZE(net2big_v2_leds_ctrl), |
| 152 | }; |
| 153 | |
| 154 | static struct netxbig_led net5big_v2_leds_ctrl[] = { |
| 155 | NETXBIG_LED("net5big-v2:blue:power", 0, netxbig_v2_blue_pwr_mled, 1), |
| 156 | NETXBIG_LED("net5big-v2:red:power", 0, netxbig_v2_red_mled, 1), |
| 157 | NETXBIG_LED("net5big-v2:blue:sata0", 3, netxbig_v2_blue_sata_mled, 2), |
| 158 | NETXBIG_LED("net5big-v2:red:sata0", 3, netxbig_v2_red_mled, 2), |
| 159 | NETXBIG_LED("net5big-v2:blue:sata1", 4, netxbig_v2_blue_sata_mled, 2), |
| 160 | NETXBIG_LED("net5big-v2:red:sata1", 4, netxbig_v2_red_mled, 2), |
| 161 | NETXBIG_LED("net5big-v2:blue:sata2", 5, netxbig_v2_blue_sata_mled, 2), |
| 162 | NETXBIG_LED("net5big-v2:red:sata2", 5, netxbig_v2_red_mled, 2), |
| 163 | NETXBIG_LED("net5big-v2:blue:sata3", 6, netxbig_v2_blue_sata_mled, 2), |
| 164 | NETXBIG_LED("net5big-v2:red:sata3", 6, netxbig_v2_red_mled, 2), |
| 165 | NETXBIG_LED("net5big-v2:blue:sata4", 7, netxbig_v2_blue_sata_mled, 2), |
| 166 | NETXBIG_LED("net5big-v2:red:sata4", 7, netxbig_v2_red_mled, 2), |
| 167 | }; |
| 168 | |
| 169 | static struct netxbig_led_platform_data net5big_v2_leds_data = { |
| 170 | .gpio_ext = &netxbig_v2_gpio_ext, |
| 171 | .timer = netxbig_v2_led_timer, |
| 172 | .num_timer = ARRAY_SIZE(netxbig_v2_led_timer), |
| 173 | .leds = net5big_v2_leds_ctrl, |
| 174 | .num_leds = ARRAY_SIZE(net5big_v2_leds_ctrl), |
| 175 | }; |
| 176 | |
| 177 | static struct platform_device netxbig_v2_leds = { |
| 178 | .name = "leds-netxbig", |
| 179 | .id = -1, |
| 180 | .dev = { |
| 181 | .platform_data = &net2big_v2_leds_data, |
| 182 | }, |
| 183 | }; |
| 184 | |
| 185 | void __init netxbig_init(void) |
| 186 | { |
| 187 | |
| 188 | if (of_machine_is_compatible("lacie,net5big_v2")) |
| 189 | netxbig_v2_leds.dev.platform_data = &net5big_v2_leds_data; |
| 190 | platform_device_register(&netxbig_v2_leds); |
| 191 | } |