Mike Frysinger | 5d1617b | 2008-04-24 05:03:26 +0800 | [diff] [blame] | 1 | /* |
Robin Getz | 96f1050 | 2009-09-24 14:11:24 +0000 | [diff] [blame] | 2 | * Copyright 2004-2009 Analog Devices Inc. |
| 3 | * 2007 David Rowe |
| 4 | * 2006 Intratrade Ltd. |
| 5 | * Ivan Danov <idanov@gmail.com> |
| 6 | * 2005 National ICT Australia (NICTA) |
| 7 | * Aidan Williams <aidan@nicta.com.au> |
Mike Frysinger | 5d1617b | 2008-04-24 05:03:26 +0800 | [diff] [blame] | 8 | * |
Robin Getz | 96f1050 | 2009-09-24 14:11:24 +0000 | [diff] [blame] | 9 | * Licensed under the GPL-2 or later. |
Mike Frysinger | 5d1617b | 2008-04-24 05:03:26 +0800 | [diff] [blame] | 10 | */ |
| 11 | |
| 12 | #include <linux/device.h> |
| 13 | #include <linux/platform_device.h> |
| 14 | #include <linux/mtd/mtd.h> |
| 15 | #include <linux/mtd/partitions.h> |
| 16 | #include <linux/spi/spi.h> |
| 17 | #include <linux/spi/flash.h> |
| 18 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) |
| 19 | #include <linux/usb/isp1362.h> |
| 20 | #endif |
| 21 | #include <asm/irq.h> |
Sonic Zhang | 6bd1fbe | 2009-09-09 10:46:19 +0000 | [diff] [blame] | 22 | #include <asm/dma.h> |
Mike Frysinger | 5d1617b | 2008-04-24 05:03:26 +0800 | [diff] [blame] | 23 | #include <asm/bfin5xx_spi.h> |
Mike Frysinger | 99e452e | 2009-12-03 23:37:07 +0000 | [diff] [blame] | 24 | #include <asm/portmux.h> |
David Howells | f344194 | 2010-10-07 14:08:50 +0100 | [diff] [blame] | 25 | #include <mach/fio_flag.h> |
Mike Frysinger | 5d1617b | 2008-04-24 05:03:26 +0800 | [diff] [blame] | 26 | |
| 27 | /* |
| 28 | * Name the Board for the /proc/cpuinfo |
| 29 | */ |
| 30 | const char bfin_board_name[] = "IP04/IP08"; |
| 31 | |
| 32 | /* |
| 33 | * Driver needs to know address, irq and flag pin. |
| 34 | */ |
| 35 | #if defined(CONFIG_BFIN532_IP0X) |
| 36 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) |
| 37 | |
| 38 | #include <linux/dm9000.h> |
| 39 | |
| 40 | static struct resource dm9000_resource1[] = { |
| 41 | { |
| 42 | .start = 0x20100000, |
| 43 | .end = 0x20100000 + 1, |
| 44 | .flags = IORESOURCE_MEM |
| 45 | },{ |
| 46 | .start = 0x20100000 + 2, |
| 47 | .end = 0x20100000 + 3, |
| 48 | .flags = IORESOURCE_MEM |
| 49 | },{ |
| 50 | .start = IRQ_PF15, |
| 51 | .end = IRQ_PF15, |
| 52 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
| 53 | } |
| 54 | }; |
| 55 | |
| 56 | static struct resource dm9000_resource2[] = { |
| 57 | { |
| 58 | .start = 0x20200000, |
| 59 | .end = 0x20200000 + 1, |
| 60 | .flags = IORESOURCE_MEM |
| 61 | },{ |
| 62 | .start = 0x20200000 + 2, |
| 63 | .end = 0x20200000 + 3, |
| 64 | .flags = IORESOURCE_MEM |
| 65 | },{ |
| 66 | .start = IRQ_PF14, |
| 67 | .end = IRQ_PF14, |
| 68 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
| 69 | } |
| 70 | }; |
| 71 | |
| 72 | /* |
| 73 | * for the moment we limit ourselves to 16bit IO until some |
| 74 | * better IO routines can be written and tested |
| 75 | */ |
| 76 | static struct dm9000_plat_data dm9000_platdata1 = { |
| 77 | .flags = DM9000_PLATF_16BITONLY, |
| 78 | }; |
| 79 | |
| 80 | static struct platform_device dm9000_device1 = { |
| 81 | .name = "dm9000", |
| 82 | .id = 0, |
| 83 | .num_resources = ARRAY_SIZE(dm9000_resource1), |
| 84 | .resource = dm9000_resource1, |
| 85 | .dev = { |
| 86 | .platform_data = &dm9000_platdata1, |
| 87 | } |
| 88 | }; |
| 89 | |
| 90 | static struct dm9000_plat_data dm9000_platdata2 = { |
| 91 | .flags = DM9000_PLATF_16BITONLY, |
| 92 | }; |
| 93 | |
| 94 | static struct platform_device dm9000_device2 = { |
| 95 | .name = "dm9000", |
| 96 | .id = 1, |
| 97 | .num_resources = ARRAY_SIZE(dm9000_resource2), |
| 98 | .resource = dm9000_resource2, |
| 99 | .dev = { |
| 100 | .platform_data = &dm9000_platdata2, |
| 101 | } |
| 102 | }; |
| 103 | |
| 104 | #endif |
| 105 | #endif |
| 106 | |
| 107 | |
| 108 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
| 109 | /* all SPI peripherals info goes here */ |
| 110 | |
Michael Hennerich | f3f704d | 2009-03-06 00:27:57 +0800 | [diff] [blame] | 111 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
| 112 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
Mike Frysinger | 5d1617b | 2008-04-24 05:03:26 +0800 | [diff] [blame] | 113 | .enable_dma = 0, /* if 1 - block!!! */ |
| 114 | .bits_per_word = 8, |
Mike Frysinger | 5d1617b | 2008-04-24 05:03:26 +0800 | [diff] [blame] | 115 | }; |
| 116 | #endif |
| 117 | |
| 118 | /* Notice: for blackfin, the speed_hz is the value of register |
| 119 | * SPI_BAUD, not the real baudrate */ |
| 120 | static struct spi_board_info bfin_spi_board_info[] __initdata = { |
Michael Hennerich | f3f704d | 2009-03-06 00:27:57 +0800 | [diff] [blame] | 121 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
Mike Frysinger | 5d1617b | 2008-04-24 05:03:26 +0800 | [diff] [blame] | 122 | { |
Michael Hennerich | f3f704d | 2009-03-06 00:27:57 +0800 | [diff] [blame] | 123 | .modalias = "mmc_spi", |
Mike Frysinger | 5d1617b | 2008-04-24 05:03:26 +0800 | [diff] [blame] | 124 | .max_speed_hz = 2, |
| 125 | .bus_num = 1, |
Michael Hennerich | f3f704d | 2009-03-06 00:27:57 +0800 | [diff] [blame] | 126 | .chip_select = 5, |
| 127 | .controller_data = &mmc_spi_chip_info, |
Mike Frysinger | 5d1617b | 2008-04-24 05:03:26 +0800 | [diff] [blame] | 128 | }, |
| 129 | #endif |
| 130 | }; |
| 131 | |
| 132 | /* SPI controller data */ |
| 133 | static struct bfin5xx_spi_master spi_bfin_master_info = { |
| 134 | .num_chipselect = 8, |
| 135 | .enable_dma = 1, /* master has the ability to do dma transfer */ |
| 136 | }; |
| 137 | |
| 138 | static struct platform_device spi_bfin_master_device = { |
| 139 | .name = "bfin-spi-master", |
| 140 | .id = 1, /* Bus number */ |
| 141 | .dev = { |
| 142 | .platform_data = &spi_bfin_master_info, /* Passed to driver */ |
| 143 | }, |
| 144 | }; |
| 145 | #endif /* spi master and devices */ |
| 146 | |
| 147 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) |
Sonic Zhang | 6bd1fbe | 2009-09-09 10:46:19 +0000 | [diff] [blame] | 148 | #ifdef CONFIG_SERIAL_BFIN_UART0 |
| 149 | static struct resource bfin_uart0_resources[] = { |
Mike Frysinger | 5d1617b | 2008-04-24 05:03:26 +0800 | [diff] [blame] | 150 | { |
Sonic Zhang | 6bd1fbe | 2009-09-09 10:46:19 +0000 | [diff] [blame] | 151 | .start = BFIN_UART_THR, |
| 152 | .end = BFIN_UART_GCTL+2, |
Mike Frysinger | 5d1617b | 2008-04-24 05:03:26 +0800 | [diff] [blame] | 153 | .flags = IORESOURCE_MEM, |
| 154 | }, |
Sonic Zhang | 6bd1fbe | 2009-09-09 10:46:19 +0000 | [diff] [blame] | 155 | { |
| 156 | .start = IRQ_UART0_RX, |
| 157 | .end = IRQ_UART0_RX + 1, |
| 158 | .flags = IORESOURCE_IRQ, |
| 159 | }, |
| 160 | { |
| 161 | .start = IRQ_UART0_ERROR, |
| 162 | .end = IRQ_UART0_ERROR, |
| 163 | .flags = IORESOURCE_IRQ, |
| 164 | }, |
| 165 | { |
| 166 | .start = CH_UART0_TX, |
| 167 | .end = CH_UART0_TX, |
| 168 | .flags = IORESOURCE_DMA, |
| 169 | }, |
| 170 | { |
| 171 | .start = CH_UART0_RX, |
| 172 | .end = CH_UART0_RX, |
| 173 | .flags = IORESOURCE_DMA, |
| 174 | }, |
Mike Frysinger | 5d1617b | 2008-04-24 05:03:26 +0800 | [diff] [blame] | 175 | }; |
| 176 | |
Sonic Zhang | 6bd1fbe | 2009-09-09 10:46:19 +0000 | [diff] [blame] | 177 | unsigned short bfin_uart0_peripherals[] = { |
| 178 | P_UART0_TX, P_UART0_RX, 0 |
Mike Frysinger | 5d1617b | 2008-04-24 05:03:26 +0800 | [diff] [blame] | 179 | }; |
Sonic Zhang | 6bd1fbe | 2009-09-09 10:46:19 +0000 | [diff] [blame] | 180 | |
| 181 | static struct platform_device bfin_uart0_device = { |
| 182 | .name = "bfin-uart", |
| 183 | .id = 0, |
| 184 | .num_resources = ARRAY_SIZE(bfin_uart0_resources), |
| 185 | .resource = bfin_uart0_resources, |
| 186 | .dev = { |
| 187 | .platform_data = &bfin_uart0_peripherals, /* Passed to driver */ |
| 188 | }, |
| 189 | }; |
| 190 | #endif |
Mike Frysinger | 5d1617b | 2008-04-24 05:03:26 +0800 | [diff] [blame] | 191 | #endif |
| 192 | |
Graf Yang | 5be36d2 | 2008-04-25 03:09:15 +0800 | [diff] [blame] | 193 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
Graf Yang | 5be36d2 | 2008-04-25 03:09:15 +0800 | [diff] [blame] | 194 | #ifdef CONFIG_BFIN_SIR0 |
Graf Yang | 42bd8bc | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 195 | static struct resource bfin_sir0_resources[] = { |
Graf Yang | 5be36d2 | 2008-04-25 03:09:15 +0800 | [diff] [blame] | 196 | { |
| 197 | .start = 0xFFC00400, |
| 198 | .end = 0xFFC004FF, |
| 199 | .flags = IORESOURCE_MEM, |
| 200 | }, |
Graf Yang | 42bd8bc | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 201 | { |
| 202 | .start = IRQ_UART0_RX, |
| 203 | .end = IRQ_UART0_RX+1, |
| 204 | .flags = IORESOURCE_IRQ, |
| 205 | }, |
| 206 | { |
| 207 | .start = CH_UART0_RX, |
| 208 | .end = CH_UART0_RX+1, |
| 209 | .flags = IORESOURCE_DMA, |
| 210 | }, |
Graf Yang | 5be36d2 | 2008-04-25 03:09:15 +0800 | [diff] [blame] | 211 | }; |
| 212 | |
Graf Yang | 42bd8bc | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 213 | static struct platform_device bfin_sir0_device = { |
Graf Yang | 5be36d2 | 2008-04-25 03:09:15 +0800 | [diff] [blame] | 214 | .name = "bfin_sir", |
| 215 | .id = 0, |
Graf Yang | 42bd8bc | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 216 | .num_resources = ARRAY_SIZE(bfin_sir0_resources), |
| 217 | .resource = bfin_sir0_resources, |
Graf Yang | 5be36d2 | 2008-04-25 03:09:15 +0800 | [diff] [blame] | 218 | }; |
| 219 | #endif |
Graf Yang | 42bd8bc | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 220 | #endif |
Graf Yang | 5be36d2 | 2008-04-25 03:09:15 +0800 | [diff] [blame] | 221 | |
Mike Frysinger | 5d1617b | 2008-04-24 05:03:26 +0800 | [diff] [blame] | 222 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) |
| 223 | static struct resource isp1362_hcd_resources[] = { |
| 224 | { |
| 225 | .start = 0x20300000, |
| 226 | .end = 0x20300000 + 1, |
| 227 | .flags = IORESOURCE_MEM, |
| 228 | },{ |
| 229 | .start = 0x20300000 + 2, |
| 230 | .end = 0x20300000 + 3, |
| 231 | .flags = IORESOURCE_MEM, |
| 232 | },{ |
| 233 | .start = IRQ_PF11, |
| 234 | .end = IRQ_PF11, |
| 235 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, |
| 236 | }, |
| 237 | }; |
| 238 | |
| 239 | static struct isp1362_platform_data isp1362_priv = { |
| 240 | .sel15Kres = 1, |
| 241 | .clknotstop = 0, |
| 242 | .oc_enable = 0, /* external OC */ |
| 243 | .int_act_high = 0, |
| 244 | .int_edge_triggered = 0, |
| 245 | .remote_wakeup_connected = 0, |
| 246 | .no_power_switching = 1, |
| 247 | .power_switching_mode = 0, |
| 248 | }; |
| 249 | |
| 250 | static struct platform_device isp1362_hcd_device = { |
| 251 | .name = "isp1362-hcd", |
| 252 | .id = 0, |
| 253 | .dev = { |
| 254 | .platform_data = &isp1362_priv, |
| 255 | }, |
| 256 | .num_resources = ARRAY_SIZE(isp1362_hcd_resources), |
| 257 | .resource = isp1362_hcd_resources, |
| 258 | }; |
| 259 | #endif |
| 260 | |
| 261 | |
| 262 | static struct platform_device *ip0x_devices[] __initdata = { |
| 263 | #if defined(CONFIG_BFIN532_IP0X) |
| 264 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) |
| 265 | &dm9000_device1, |
| 266 | &dm9000_device2, |
| 267 | #endif |
| 268 | #endif |
| 269 | |
| 270 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
| 271 | &spi_bfin_master_device, |
| 272 | #endif |
| 273 | |
| 274 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) |
Sonic Zhang | 6bd1fbe | 2009-09-09 10:46:19 +0000 | [diff] [blame] | 275 | #ifdef CONFIG_SERIAL_BFIN_UART0 |
| 276 | &bfin_uart0_device, |
| 277 | #endif |
Mike Frysinger | 5d1617b | 2008-04-24 05:03:26 +0800 | [diff] [blame] | 278 | #endif |
Graf Yang | 5be36d2 | 2008-04-25 03:09:15 +0800 | [diff] [blame] | 279 | |
| 280 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
Graf Yang | 42bd8bc | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 281 | #ifdef CONFIG_BFIN_SIR0 |
| 282 | &bfin_sir0_device, |
| 283 | #endif |
Graf Yang | 5be36d2 | 2008-04-25 03:09:15 +0800 | [diff] [blame] | 284 | #endif |
| 285 | |
Mike Frysinger | 5d1617b | 2008-04-24 05:03:26 +0800 | [diff] [blame] | 286 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) |
| 287 | &isp1362_hcd_device, |
| 288 | #endif |
| 289 | }; |
| 290 | |
| 291 | static int __init ip0x_init(void) |
| 292 | { |
| 293 | int i; |
| 294 | |
| 295 | printk(KERN_INFO "%s(): registering device resources\n", __func__); |
| 296 | platform_add_devices(ip0x_devices, ARRAY_SIZE(ip0x_devices)); |
| 297 | |
| 298 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
| 299 | for (i = 0; i < ARRAY_SIZE(bfin_spi_board_info); ++i) { |
| 300 | int j = 1 << bfin_spi_board_info[i].chip_select; |
| 301 | /* set spi cs to 1 */ |
| 302 | bfin_write_FIO_DIR(bfin_read_FIO_DIR() | j); |
| 303 | bfin_write_FIO_FLAG_S(j); |
| 304 | } |
| 305 | spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); |
| 306 | #endif |
| 307 | |
| 308 | return 0; |
| 309 | } |
| 310 | |
| 311 | arch_initcall(ip0x_init); |
Sonic Zhang | c13ce9f | 2009-09-23 09:37:46 +0000 | [diff] [blame] | 312 | |
| 313 | static struct platform_device *ip0x_early_devices[] __initdata = { |
| 314 | #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK) |
| 315 | #ifdef CONFIG_SERIAL_BFIN_UART0 |
| 316 | &bfin_uart0_device, |
| 317 | #endif |
| 318 | #endif |
| 319 | }; |
| 320 | |
| 321 | void __init native_machine_early_platform_add_devices(void) |
| 322 | { |
| 323 | printk(KERN_INFO "register early platform devices\n"); |
| 324 | early_platform_add_devices(ip0x_early_devices, |
| 325 | ARRAY_SIZE(ip0x_early_devices)); |
| 326 | } |