blob: 60415b52fd34a08adf006a77d57464fa2dd13e1e [file] [log] [blame]
Vishal Verma5d0f6132013-03-04 18:40:58 -07001/*
2 * NVM Express device driver
Matthew Wilcox8757ad62014-04-11 10:37:39 -04003 * Copyright (c) 2011-2014, Intel Corporation.
Vishal Verma5d0f6132013-03-04 18:40:58 -07004 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
Vishal Verma5d0f6132013-03-04 18:40:58 -070013 */
14
15/*
16 * Refer to the SCSI-NVMe Translation spec for details on how
17 * each command is translated.
18 */
19
20#include <linux/nvme.h>
21#include <linux/bio.h>
22#include <linux/bitops.h>
23#include <linux/blkdev.h>
Keith Busch320a3822013-10-23 13:07:34 -060024#include <linux/compat.h>
Vishal Verma5d0f6132013-03-04 18:40:58 -070025#include <linux/delay.h>
26#include <linux/errno.h>
27#include <linux/fs.h>
28#include <linux/genhd.h>
29#include <linux/idr.h>
30#include <linux/init.h>
31#include <linux/interrupt.h>
32#include <linux/io.h>
33#include <linux/kdev_t.h>
34#include <linux/kthread.h>
35#include <linux/kernel.h>
36#include <linux/mm.h>
37#include <linux/module.h>
38#include <linux/moduleparam.h>
39#include <linux/pci.h>
40#include <linux/poison.h>
41#include <linux/sched.h>
42#include <linux/slab.h>
43#include <linux/types.h>
Vishal Verma5d0f6132013-03-04 18:40:58 -070044#include <scsi/sg.h>
45#include <scsi/scsi.h>
46
47
48static int sg_version_num = 30534; /* 2 digits for each component */
49
50#define SNTI_TRANSLATION_SUCCESS 0
51#define SNTI_INTERNAL_ERROR 1
52
53/* VPD Page Codes */
54#define VPD_SUPPORTED_PAGES 0x00
55#define VPD_SERIAL_NUMBER 0x80
56#define VPD_DEVICE_IDENTIFIERS 0x83
57#define VPD_EXTENDED_INQUIRY 0x86
Keith Busch7f749d92015-04-07 15:34:18 -060058#define VPD_BLOCK_LIMITS 0xB0
Vishal Verma5d0f6132013-03-04 18:40:58 -070059#define VPD_BLOCK_DEV_CHARACTERISTICS 0xB1
60
61/* CDB offsets */
62#define REPORT_LUNS_CDB_ALLOC_LENGTH_OFFSET 6
63#define REPORT_LUNS_SR_OFFSET 2
64#define READ_CAP_16_CDB_ALLOC_LENGTH_OFFSET 10
65#define REQUEST_SENSE_CDB_ALLOC_LENGTH_OFFSET 4
66#define REQUEST_SENSE_DESC_OFFSET 1
67#define REQUEST_SENSE_DESC_MASK 0x01
68#define DESCRIPTOR_FORMAT_SENSE_DATA_TYPE 1
69#define INQUIRY_EVPD_BYTE_OFFSET 1
70#define INQUIRY_PAGE_CODE_BYTE_OFFSET 2
71#define INQUIRY_EVPD_BIT_MASK 1
72#define INQUIRY_CDB_ALLOCATION_LENGTH_OFFSET 3
73#define START_STOP_UNIT_CDB_IMMED_OFFSET 1
74#define START_STOP_UNIT_CDB_IMMED_MASK 0x1
75#define START_STOP_UNIT_CDB_POWER_COND_MOD_OFFSET 3
76#define START_STOP_UNIT_CDB_POWER_COND_MOD_MASK 0xF
77#define START_STOP_UNIT_CDB_POWER_COND_OFFSET 4
78#define START_STOP_UNIT_CDB_POWER_COND_MASK 0xF0
79#define START_STOP_UNIT_CDB_NO_FLUSH_OFFSET 4
80#define START_STOP_UNIT_CDB_NO_FLUSH_MASK 0x4
81#define START_STOP_UNIT_CDB_START_OFFSET 4
82#define START_STOP_UNIT_CDB_START_MASK 0x1
83#define WRITE_BUFFER_CDB_MODE_OFFSET 1
84#define WRITE_BUFFER_CDB_MODE_MASK 0x1F
85#define WRITE_BUFFER_CDB_BUFFER_ID_OFFSET 2
86#define WRITE_BUFFER_CDB_BUFFER_OFFSET_OFFSET 3
87#define WRITE_BUFFER_CDB_PARM_LIST_LENGTH_OFFSET 6
88#define FORMAT_UNIT_CDB_FORMAT_PROT_INFO_OFFSET 1
89#define FORMAT_UNIT_CDB_FORMAT_PROT_INFO_MASK 0xC0
90#define FORMAT_UNIT_CDB_FORMAT_PROT_INFO_SHIFT 6
91#define FORMAT_UNIT_CDB_LONG_LIST_OFFSET 1
92#define FORMAT_UNIT_CDB_LONG_LIST_MASK 0x20
93#define FORMAT_UNIT_CDB_FORMAT_DATA_OFFSET 1
94#define FORMAT_UNIT_CDB_FORMAT_DATA_MASK 0x10
95#define FORMAT_UNIT_SHORT_PARM_LIST_LEN 4
96#define FORMAT_UNIT_LONG_PARM_LIST_LEN 8
97#define FORMAT_UNIT_PROT_INT_OFFSET 3
98#define FORMAT_UNIT_PROT_FIELD_USAGE_OFFSET 0
99#define FORMAT_UNIT_PROT_FIELD_USAGE_MASK 0x07
Keith Buschec503732013-04-24 15:44:24 -0600100#define UNMAP_CDB_PARAM_LIST_LENGTH_OFFSET 7
Vishal Verma5d0f6132013-03-04 18:40:58 -0700101
102/* Misc. defines */
103#define NIBBLE_SHIFT 4
104#define FIXED_SENSE_DATA 0x70
105#define DESC_FORMAT_SENSE_DATA 0x72
106#define FIXED_SENSE_DATA_ADD_LENGTH 10
107#define LUN_ENTRY_SIZE 8
108#define LUN_DATA_HEADER_SIZE 8
109#define ALL_LUNS_RETURNED 0x02
110#define ALL_WELL_KNOWN_LUNS_RETURNED 0x01
111#define RESTRICTED_LUNS_RETURNED 0x00
112#define NVME_POWER_STATE_START_VALID 0x00
113#define NVME_POWER_STATE_ACTIVE 0x01
114#define NVME_POWER_STATE_IDLE 0x02
115#define NVME_POWER_STATE_STANDBY 0x03
116#define NVME_POWER_STATE_LU_CONTROL 0x07
117#define POWER_STATE_0 0
118#define POWER_STATE_1 1
119#define POWER_STATE_2 2
120#define POWER_STATE_3 3
121#define DOWNLOAD_SAVE_ACTIVATE 0x05
122#define DOWNLOAD_SAVE_DEFER_ACTIVATE 0x0E
123#define ACTIVATE_DEFERRED_MICROCODE 0x0F
124#define FORMAT_UNIT_IMMED_MASK 0x2
125#define FORMAT_UNIT_IMMED_OFFSET 1
126#define KELVIN_TEMP_FACTOR 273
127#define FIXED_FMT_SENSE_DATA_SIZE 18
128#define DESC_FMT_SENSE_DATA_SIZE 8
129
130/* SCSI/NVMe defines and bit masks */
131#define INQ_STANDARD_INQUIRY_PAGE 0x00
132#define INQ_SUPPORTED_VPD_PAGES_PAGE 0x00
133#define INQ_UNIT_SERIAL_NUMBER_PAGE 0x80
134#define INQ_DEVICE_IDENTIFICATION_PAGE 0x83
135#define INQ_EXTENDED_INQUIRY_DATA_PAGE 0x86
Keith Busch7f749d92015-04-07 15:34:18 -0600136#define INQ_BDEV_LIMITS_PAGE 0xB0
Vishal Verma5d0f6132013-03-04 18:40:58 -0700137#define INQ_BDEV_CHARACTERISTICS_PAGE 0xB1
138#define INQ_SERIAL_NUMBER_LENGTH 0x14
Keith Busch7f749d92015-04-07 15:34:18 -0600139#define INQ_NUM_SUPPORTED_VPD_PAGES 6
Vishal Verma5d0f6132013-03-04 18:40:58 -0700140#define VERSION_SPC_4 0x06
141#define ACA_UNSUPPORTED 0
142#define STANDARD_INQUIRY_LENGTH 36
143#define ADDITIONAL_STD_INQ_LENGTH 31
144#define EXTENDED_INQUIRY_DATA_PAGE_LENGTH 0x3C
145#define RESERVED_FIELD 0
146
147/* SCSI READ/WRITE Defines */
148#define IO_CDB_WP_MASK 0xE0
149#define IO_CDB_WP_SHIFT 5
150#define IO_CDB_FUA_MASK 0x8
151#define IO_6_CDB_LBA_OFFSET 0
152#define IO_6_CDB_LBA_MASK 0x001FFFFF
153#define IO_6_CDB_TX_LEN_OFFSET 4
154#define IO_6_DEFAULT_TX_LEN 256
155#define IO_10_CDB_LBA_OFFSET 2
156#define IO_10_CDB_TX_LEN_OFFSET 7
157#define IO_10_CDB_WP_OFFSET 1
158#define IO_10_CDB_FUA_OFFSET 1
159#define IO_12_CDB_LBA_OFFSET 2
160#define IO_12_CDB_TX_LEN_OFFSET 6
161#define IO_12_CDB_WP_OFFSET 1
162#define IO_12_CDB_FUA_OFFSET 1
163#define IO_16_CDB_FUA_OFFSET 1
164#define IO_16_CDB_WP_OFFSET 1
165#define IO_16_CDB_LBA_OFFSET 2
166#define IO_16_CDB_TX_LEN_OFFSET 10
167
168/* Mode Sense/Select defines */
169#define MODE_PAGE_INFO_EXCEP 0x1C
170#define MODE_PAGE_CACHING 0x08
171#define MODE_PAGE_CONTROL 0x0A
172#define MODE_PAGE_POWER_CONDITION 0x1A
173#define MODE_PAGE_RETURN_ALL 0x3F
174#define MODE_PAGE_BLK_DES_LEN 0x08
175#define MODE_PAGE_LLBAA_BLK_DES_LEN 0x10
176#define MODE_PAGE_CACHING_LEN 0x14
177#define MODE_PAGE_CONTROL_LEN 0x0C
178#define MODE_PAGE_POW_CND_LEN 0x28
179#define MODE_PAGE_INF_EXC_LEN 0x0C
180#define MODE_PAGE_ALL_LEN 0x54
181#define MODE_SENSE6_MPH_SIZE 4
182#define MODE_SENSE6_ALLOC_LEN_OFFSET 4
183#define MODE_SENSE_PAGE_CONTROL_OFFSET 2
184#define MODE_SENSE_PAGE_CONTROL_MASK 0xC0
185#define MODE_SENSE_PAGE_CODE_OFFSET 2
186#define MODE_SENSE_PAGE_CODE_MASK 0x3F
187#define MODE_SENSE_LLBAA_OFFSET 1
188#define MODE_SENSE_LLBAA_MASK 0x10
189#define MODE_SENSE_LLBAA_SHIFT 4
190#define MODE_SENSE_DBD_OFFSET 1
191#define MODE_SENSE_DBD_MASK 8
192#define MODE_SENSE_DBD_SHIFT 3
193#define MODE_SENSE10_MPH_SIZE 8
194#define MODE_SENSE10_ALLOC_LEN_OFFSET 7
195#define MODE_SELECT_CDB_PAGE_FORMAT_OFFSET 1
196#define MODE_SELECT_CDB_SAVE_PAGES_OFFSET 1
197#define MODE_SELECT_6_CDB_PARAM_LIST_LENGTH_OFFSET 4
198#define MODE_SELECT_10_CDB_PARAM_LIST_LENGTH_OFFSET 7
199#define MODE_SELECT_CDB_PAGE_FORMAT_MASK 0x10
200#define MODE_SELECT_CDB_SAVE_PAGES_MASK 0x1
201#define MODE_SELECT_6_BD_OFFSET 3
202#define MODE_SELECT_10_BD_OFFSET 6
203#define MODE_SELECT_10_LLBAA_OFFSET 4
204#define MODE_SELECT_10_LLBAA_MASK 1
205#define MODE_SELECT_6_MPH_SIZE 4
206#define MODE_SELECT_10_MPH_SIZE 8
207#define CACHING_MODE_PAGE_WCE_MASK 0x04
208#define MODE_SENSE_BLK_DESC_ENABLED 0
209#define MODE_SENSE_BLK_DESC_COUNT 1
210#define MODE_SELECT_PAGE_CODE_MASK 0x3F
211#define SHORT_DESC_BLOCK 8
212#define LONG_DESC_BLOCK 16
213#define MODE_PAGE_POW_CND_LEN_FIELD 0x26
214#define MODE_PAGE_INF_EXC_LEN_FIELD 0x0A
215#define MODE_PAGE_CACHING_LEN_FIELD 0x12
216#define MODE_PAGE_CONTROL_LEN_FIELD 0x0A
217#define MODE_SENSE_PC_CURRENT_VALUES 0
218
219/* Log Sense defines */
220#define LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE 0x00
221#define LOG_PAGE_SUPPORTED_LOG_PAGES_LENGTH 0x07
222#define LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE 0x2F
223#define LOG_PAGE_TEMPERATURE_PAGE 0x0D
224#define LOG_SENSE_CDB_SP_OFFSET 1
225#define LOG_SENSE_CDB_SP_NOT_ENABLED 0
226#define LOG_SENSE_CDB_PC_OFFSET 2
227#define LOG_SENSE_CDB_PC_MASK 0xC0
228#define LOG_SENSE_CDB_PC_SHIFT 6
229#define LOG_SENSE_CDB_PC_CUMULATIVE_VALUES 1
230#define LOG_SENSE_CDB_PAGE_CODE_MASK 0x3F
231#define LOG_SENSE_CDB_ALLOC_LENGTH_OFFSET 7
232#define REMAINING_INFO_EXCP_PAGE_LENGTH 0x8
233#define LOG_INFO_EXCP_PAGE_LENGTH 0xC
234#define REMAINING_TEMP_PAGE_LENGTH 0xC
235#define LOG_TEMP_PAGE_LENGTH 0x10
236#define LOG_TEMP_UNKNOWN 0xFF
237#define SUPPORTED_LOG_PAGES_PAGE_LENGTH 0x3
238
239/* Read Capacity defines */
240#define READ_CAP_10_RESP_SIZE 8
241#define READ_CAP_16_RESP_SIZE 32
242
243/* NVMe Namespace and Command Defines */
Vishal Verma5d0f6132013-03-04 18:40:58 -0700244#define BYTES_TO_DWORDS 4
245#define NVME_MAX_FIRMWARE_SLOT 7
246
247/* Report LUNs defines */
248#define REPORT_LUNS_FIRST_LUN_OFFSET 8
249
250/* SCSI ADDITIONAL SENSE Codes */
251
252#define SCSI_ASC_NO_SENSE 0x00
253#define SCSI_ASC_PERIPHERAL_DEV_WRITE_FAULT 0x03
254#define SCSI_ASC_LUN_NOT_READY 0x04
255#define SCSI_ASC_WARNING 0x0B
256#define SCSI_ASC_LOG_BLOCK_GUARD_CHECK_FAILED 0x10
257#define SCSI_ASC_LOG_BLOCK_APPTAG_CHECK_FAILED 0x10
258#define SCSI_ASC_LOG_BLOCK_REFTAG_CHECK_FAILED 0x10
259#define SCSI_ASC_UNRECOVERED_READ_ERROR 0x11
260#define SCSI_ASC_MISCOMPARE_DURING_VERIFY 0x1D
261#define SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID 0x20
262#define SCSI_ASC_ILLEGAL_COMMAND 0x20
263#define SCSI_ASC_ILLEGAL_BLOCK 0x21
264#define SCSI_ASC_INVALID_CDB 0x24
265#define SCSI_ASC_INVALID_LUN 0x25
266#define SCSI_ASC_INVALID_PARAMETER 0x26
267#define SCSI_ASC_FORMAT_COMMAND_FAILED 0x31
268#define SCSI_ASC_INTERNAL_TARGET_FAILURE 0x44
269
270/* SCSI ADDITIONAL SENSE Code Qualifiers */
271
272#define SCSI_ASCQ_CAUSE_NOT_REPORTABLE 0x00
273#define SCSI_ASCQ_FORMAT_COMMAND_FAILED 0x01
274#define SCSI_ASCQ_LOG_BLOCK_GUARD_CHECK_FAILED 0x01
275#define SCSI_ASCQ_LOG_BLOCK_APPTAG_CHECK_FAILED 0x02
276#define SCSI_ASCQ_LOG_BLOCK_REFTAG_CHECK_FAILED 0x03
277#define SCSI_ASCQ_FORMAT_IN_PROGRESS 0x04
278#define SCSI_ASCQ_POWER_LOSS_EXPECTED 0x08
279#define SCSI_ASCQ_INVALID_LUN_ID 0x09
280
281/**
282 * DEVICE_SPECIFIC_PARAMETER in mode parameter header (see sbc2r16) to
283 * enable DPOFUA support type 0x10 value.
284 */
285#define DEVICE_SPECIFIC_PARAMETER 0
286#define VPD_ID_DESCRIPTOR_LENGTH sizeof(VPD_IDENTIFICATION_DESCRIPTOR)
287
288/* MACROs to extract information from CDBs */
289
290#define GET_OPCODE(cdb) cdb[0]
291
292#define GET_U8_FROM_CDB(cdb, index) (cdb[index] << 0)
293
294#define GET_U16_FROM_CDB(cdb, index) ((cdb[index] << 8) | (cdb[index + 1] << 0))
295
296#define GET_U24_FROM_CDB(cdb, index) ((cdb[index] << 16) | \
297(cdb[index + 1] << 8) | \
298(cdb[index + 2] << 0))
299
300#define GET_U32_FROM_CDB(cdb, index) ((cdb[index] << 24) | \
301(cdb[index + 1] << 16) | \
302(cdb[index + 2] << 8) | \
303(cdb[index + 3] << 0))
304
305#define GET_U64_FROM_CDB(cdb, index) ((((u64)cdb[index]) << 56) | \
306(((u64)cdb[index + 1]) << 48) | \
307(((u64)cdb[index + 2]) << 40) | \
308(((u64)cdb[index + 3]) << 32) | \
309(((u64)cdb[index + 4]) << 24) | \
310(((u64)cdb[index + 5]) << 16) | \
311(((u64)cdb[index + 6]) << 8) | \
312(((u64)cdb[index + 7]) << 0))
313
314/* Inquiry Helper Macros */
315#define GET_INQ_EVPD_BIT(cdb) \
316((GET_U8_FROM_CDB(cdb, INQUIRY_EVPD_BYTE_OFFSET) & \
317INQUIRY_EVPD_BIT_MASK) ? 1 : 0)
318
319#define GET_INQ_PAGE_CODE(cdb) \
320(GET_U8_FROM_CDB(cdb, INQUIRY_PAGE_CODE_BYTE_OFFSET))
321
322#define GET_INQ_ALLOC_LENGTH(cdb) \
323(GET_U16_FROM_CDB(cdb, INQUIRY_CDB_ALLOCATION_LENGTH_OFFSET))
324
325/* Report LUNs Helper Macros */
326#define GET_REPORT_LUNS_ALLOC_LENGTH(cdb) \
327(GET_U32_FROM_CDB(cdb, REPORT_LUNS_CDB_ALLOC_LENGTH_OFFSET))
328
329/* Read Capacity Helper Macros */
330#define GET_READ_CAP_16_ALLOC_LENGTH(cdb) \
331(GET_U32_FROM_CDB(cdb, READ_CAP_16_CDB_ALLOC_LENGTH_OFFSET))
332
333#define IS_READ_CAP_16(cdb) \
Hannes Reineckeeb846d92014-11-17 14:25:19 +0100334((cdb[0] == SERVICE_ACTION_IN_16 && cdb[1] == SAI_READ_CAPACITY_16) ? 1 : 0)
Vishal Verma5d0f6132013-03-04 18:40:58 -0700335
336/* Request Sense Helper Macros */
337#define GET_REQUEST_SENSE_ALLOC_LENGTH(cdb) \
338(GET_U8_FROM_CDB(cdb, REQUEST_SENSE_CDB_ALLOC_LENGTH_OFFSET))
339
340/* Mode Sense Helper Macros */
341#define GET_MODE_SENSE_DBD(cdb) \
342((GET_U8_FROM_CDB(cdb, MODE_SENSE_DBD_OFFSET) & MODE_SENSE_DBD_MASK) >> \
343MODE_SENSE_DBD_SHIFT)
344
345#define GET_MODE_SENSE_LLBAA(cdb) \
346((GET_U8_FROM_CDB(cdb, MODE_SENSE_LLBAA_OFFSET) & \
347MODE_SENSE_LLBAA_MASK) >> MODE_SENSE_LLBAA_SHIFT)
348
349#define GET_MODE_SENSE_MPH_SIZE(cdb10) \
350(cdb10 ? MODE_SENSE10_MPH_SIZE : MODE_SENSE6_MPH_SIZE)
351
352
353/* Struct to gather data that needs to be extracted from a SCSI CDB.
354 Not conforming to any particular CDB variant, but compatible with all. */
355
356struct nvme_trans_io_cdb {
357 u8 fua;
358 u8 prot_info;
359 u64 lba;
360 u32 xfer_len;
361};
362
363
364/* Internal Helper Functions */
365
366
367/* Copy data to userspace memory */
368
369static int nvme_trans_copy_to_user(struct sg_io_hdr *hdr, void *from,
370 unsigned long n)
371{
372 int res = SNTI_TRANSLATION_SUCCESS;
373 unsigned long not_copied;
374 int i;
375 void *index = from;
376 size_t remaining = n;
377 size_t xfer_len;
378
379 if (hdr->iovec_count > 0) {
Vishal Verma8741ee42013-04-04 17:52:27 -0600380 struct sg_iovec sgl;
Vishal Verma5d0f6132013-03-04 18:40:58 -0700381
382 for (i = 0; i < hdr->iovec_count; i++) {
Vishal Verma8741ee42013-04-04 17:52:27 -0600383 not_copied = copy_from_user(&sgl, hdr->dxferp +
384 i * sizeof(struct sg_iovec),
385 sizeof(struct sg_iovec));
386 if (not_copied)
387 return -EFAULT;
388 xfer_len = min(remaining, sgl.iov_len);
389 not_copied = copy_to_user(sgl.iov_base, index,
Vishal Verma5d0f6132013-03-04 18:40:58 -0700390 xfer_len);
391 if (not_copied) {
392 res = -EFAULT;
393 break;
394 }
395 index += xfer_len;
396 remaining -= xfer_len;
397 if (remaining == 0)
398 break;
399 }
400 return res;
401 }
Vishal Verma8741ee42013-04-04 17:52:27 -0600402 not_copied = copy_to_user(hdr->dxferp, from, n);
Vishal Verma5d0f6132013-03-04 18:40:58 -0700403 if (not_copied)
404 res = -EFAULT;
405 return res;
406}
407
408/* Copy data from userspace memory */
409
410static int nvme_trans_copy_from_user(struct sg_io_hdr *hdr, void *to,
411 unsigned long n)
412{
413 int res = SNTI_TRANSLATION_SUCCESS;
414 unsigned long not_copied;
415 int i;
416 void *index = to;
417 size_t remaining = n;
418 size_t xfer_len;
419
420 if (hdr->iovec_count > 0) {
Vishal Verma8741ee42013-04-04 17:52:27 -0600421 struct sg_iovec sgl;
Vishal Verma5d0f6132013-03-04 18:40:58 -0700422
423 for (i = 0; i < hdr->iovec_count; i++) {
Vishal Verma8741ee42013-04-04 17:52:27 -0600424 not_copied = copy_from_user(&sgl, hdr->dxferp +
425 i * sizeof(struct sg_iovec),
426 sizeof(struct sg_iovec));
427 if (not_copied)
428 return -EFAULT;
429 xfer_len = min(remaining, sgl.iov_len);
430 not_copied = copy_from_user(index, sgl.iov_base,
431 xfer_len);
Vishal Verma5d0f6132013-03-04 18:40:58 -0700432 if (not_copied) {
433 res = -EFAULT;
434 break;
435 }
436 index += xfer_len;
437 remaining -= xfer_len;
438 if (remaining == 0)
439 break;
440 }
441 return res;
442 }
443
Vishal Verma8741ee42013-04-04 17:52:27 -0600444 not_copied = copy_from_user(to, hdr->dxferp, n);
Vishal Verma5d0f6132013-03-04 18:40:58 -0700445 if (not_copied)
446 res = -EFAULT;
447 return res;
448}
449
450/* Status/Sense Buffer Writeback */
451
452static int nvme_trans_completion(struct sg_io_hdr *hdr, u8 status, u8 sense_key,
453 u8 asc, u8 ascq)
454{
455 int res = SNTI_TRANSLATION_SUCCESS;
456 u8 xfer_len;
457 u8 resp[DESC_FMT_SENSE_DATA_SIZE];
458
459 if (scsi_status_is_good(status)) {
460 hdr->status = SAM_STAT_GOOD;
461 hdr->masked_status = GOOD;
462 hdr->host_status = DID_OK;
463 hdr->driver_status = DRIVER_OK;
464 hdr->sb_len_wr = 0;
465 } else {
466 hdr->status = status;
467 hdr->masked_status = status >> 1;
468 hdr->host_status = DID_OK;
469 hdr->driver_status = DRIVER_OK;
470
471 memset(resp, 0, DESC_FMT_SENSE_DATA_SIZE);
472 resp[0] = DESC_FORMAT_SENSE_DATA;
473 resp[1] = sense_key;
474 resp[2] = asc;
475 resp[3] = ascq;
476
477 xfer_len = min_t(u8, hdr->mx_sb_len, DESC_FMT_SENSE_DATA_SIZE);
478 hdr->sb_len_wr = xfer_len;
Vishal Verma8741ee42013-04-04 17:52:27 -0600479 if (copy_to_user(hdr->sbp, resp, xfer_len) > 0)
Vishal Verma5d0f6132013-03-04 18:40:58 -0700480 res = -EFAULT;
481 }
482
483 return res;
484}
485
486static int nvme_trans_status_code(struct sg_io_hdr *hdr, int nvme_sc)
487{
488 u8 status, sense_key, asc, ascq;
489 int res = SNTI_TRANSLATION_SUCCESS;
490
491 /* For non-nvme (Linux) errors, simply return the error code */
492 if (nvme_sc < 0)
493 return nvme_sc;
494
495 /* Mask DNR, More, and reserved fields */
496 nvme_sc &= 0x7FF;
497
498 switch (nvme_sc) {
499 /* Generic Command Status */
500 case NVME_SC_SUCCESS:
501 status = SAM_STAT_GOOD;
502 sense_key = NO_SENSE;
503 asc = SCSI_ASC_NO_SENSE;
504 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
505 break;
506 case NVME_SC_INVALID_OPCODE:
507 status = SAM_STAT_CHECK_CONDITION;
508 sense_key = ILLEGAL_REQUEST;
509 asc = SCSI_ASC_ILLEGAL_COMMAND;
510 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
511 break;
512 case NVME_SC_INVALID_FIELD:
513 status = SAM_STAT_CHECK_CONDITION;
514 sense_key = ILLEGAL_REQUEST;
515 asc = SCSI_ASC_INVALID_CDB;
516 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
517 break;
518 case NVME_SC_DATA_XFER_ERROR:
519 status = SAM_STAT_CHECK_CONDITION;
520 sense_key = MEDIUM_ERROR;
521 asc = SCSI_ASC_NO_SENSE;
522 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
523 break;
524 case NVME_SC_POWER_LOSS:
525 status = SAM_STAT_TASK_ABORTED;
526 sense_key = ABORTED_COMMAND;
527 asc = SCSI_ASC_WARNING;
528 ascq = SCSI_ASCQ_POWER_LOSS_EXPECTED;
529 break;
530 case NVME_SC_INTERNAL:
531 status = SAM_STAT_CHECK_CONDITION;
532 sense_key = HARDWARE_ERROR;
533 asc = SCSI_ASC_INTERNAL_TARGET_FAILURE;
534 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
535 break;
536 case NVME_SC_ABORT_REQ:
537 status = SAM_STAT_TASK_ABORTED;
538 sense_key = ABORTED_COMMAND;
539 asc = SCSI_ASC_NO_SENSE;
540 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
541 break;
542 case NVME_SC_ABORT_QUEUE:
543 status = SAM_STAT_TASK_ABORTED;
544 sense_key = ABORTED_COMMAND;
545 asc = SCSI_ASC_NO_SENSE;
546 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
547 break;
548 case NVME_SC_FUSED_FAIL:
549 status = SAM_STAT_TASK_ABORTED;
550 sense_key = ABORTED_COMMAND;
551 asc = SCSI_ASC_NO_SENSE;
552 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
553 break;
554 case NVME_SC_FUSED_MISSING:
555 status = SAM_STAT_TASK_ABORTED;
556 sense_key = ABORTED_COMMAND;
557 asc = SCSI_ASC_NO_SENSE;
558 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
559 break;
560 case NVME_SC_INVALID_NS:
561 status = SAM_STAT_CHECK_CONDITION;
562 sense_key = ILLEGAL_REQUEST;
563 asc = SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID;
564 ascq = SCSI_ASCQ_INVALID_LUN_ID;
565 break;
566 case NVME_SC_LBA_RANGE:
567 status = SAM_STAT_CHECK_CONDITION;
568 sense_key = ILLEGAL_REQUEST;
569 asc = SCSI_ASC_ILLEGAL_BLOCK;
570 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
571 break;
572 case NVME_SC_CAP_EXCEEDED:
573 status = SAM_STAT_CHECK_CONDITION;
574 sense_key = MEDIUM_ERROR;
575 asc = SCSI_ASC_NO_SENSE;
576 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
577 break;
578 case NVME_SC_NS_NOT_READY:
579 status = SAM_STAT_CHECK_CONDITION;
580 sense_key = NOT_READY;
581 asc = SCSI_ASC_LUN_NOT_READY;
582 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
583 break;
584
585 /* Command Specific Status */
586 case NVME_SC_INVALID_FORMAT:
587 status = SAM_STAT_CHECK_CONDITION;
588 sense_key = ILLEGAL_REQUEST;
589 asc = SCSI_ASC_FORMAT_COMMAND_FAILED;
590 ascq = SCSI_ASCQ_FORMAT_COMMAND_FAILED;
591 break;
592 case NVME_SC_BAD_ATTRIBUTES:
593 status = SAM_STAT_CHECK_CONDITION;
594 sense_key = ILLEGAL_REQUEST;
595 asc = SCSI_ASC_INVALID_CDB;
596 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
597 break;
598
599 /* Media Errors */
600 case NVME_SC_WRITE_FAULT:
601 status = SAM_STAT_CHECK_CONDITION;
602 sense_key = MEDIUM_ERROR;
603 asc = SCSI_ASC_PERIPHERAL_DEV_WRITE_FAULT;
604 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
605 break;
606 case NVME_SC_READ_ERROR:
607 status = SAM_STAT_CHECK_CONDITION;
608 sense_key = MEDIUM_ERROR;
609 asc = SCSI_ASC_UNRECOVERED_READ_ERROR;
610 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
611 break;
612 case NVME_SC_GUARD_CHECK:
613 status = SAM_STAT_CHECK_CONDITION;
614 sense_key = MEDIUM_ERROR;
615 asc = SCSI_ASC_LOG_BLOCK_GUARD_CHECK_FAILED;
616 ascq = SCSI_ASCQ_LOG_BLOCK_GUARD_CHECK_FAILED;
617 break;
618 case NVME_SC_APPTAG_CHECK:
619 status = SAM_STAT_CHECK_CONDITION;
620 sense_key = MEDIUM_ERROR;
621 asc = SCSI_ASC_LOG_BLOCK_APPTAG_CHECK_FAILED;
622 ascq = SCSI_ASCQ_LOG_BLOCK_APPTAG_CHECK_FAILED;
623 break;
624 case NVME_SC_REFTAG_CHECK:
625 status = SAM_STAT_CHECK_CONDITION;
626 sense_key = MEDIUM_ERROR;
627 asc = SCSI_ASC_LOG_BLOCK_REFTAG_CHECK_FAILED;
628 ascq = SCSI_ASCQ_LOG_BLOCK_REFTAG_CHECK_FAILED;
629 break;
630 case NVME_SC_COMPARE_FAILED:
631 status = SAM_STAT_CHECK_CONDITION;
632 sense_key = MISCOMPARE;
633 asc = SCSI_ASC_MISCOMPARE_DURING_VERIFY;
634 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
635 break;
636 case NVME_SC_ACCESS_DENIED:
637 status = SAM_STAT_CHECK_CONDITION;
638 sense_key = ILLEGAL_REQUEST;
639 asc = SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID;
640 ascq = SCSI_ASCQ_INVALID_LUN_ID;
641 break;
642
643 /* Unspecified/Default */
644 case NVME_SC_CMDID_CONFLICT:
645 case NVME_SC_CMD_SEQ_ERROR:
646 case NVME_SC_CQ_INVALID:
647 case NVME_SC_QID_INVALID:
648 case NVME_SC_QUEUE_SIZE:
649 case NVME_SC_ABORT_LIMIT:
650 case NVME_SC_ABORT_MISSING:
651 case NVME_SC_ASYNC_LIMIT:
652 case NVME_SC_FIRMWARE_SLOT:
653 case NVME_SC_FIRMWARE_IMAGE:
654 case NVME_SC_INVALID_VECTOR:
655 case NVME_SC_INVALID_LOG_PAGE:
656 default:
657 status = SAM_STAT_CHECK_CONDITION;
658 sense_key = ILLEGAL_REQUEST;
659 asc = SCSI_ASC_NO_SENSE;
660 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
661 break;
662 }
663
664 res = nvme_trans_completion(hdr, status, sense_key, asc, ascq);
665
666 return res;
667}
668
669/* INQUIRY Helper Functions */
670
671static int nvme_trans_standard_inquiry_page(struct nvme_ns *ns,
672 struct sg_io_hdr *hdr, u8 *inq_response,
673 int alloc_len)
674{
675 struct nvme_dev *dev = ns->dev;
676 dma_addr_t dma_addr;
677 void *mem;
678 struct nvme_id_ns *id_ns;
679 int res = SNTI_TRANSLATION_SUCCESS;
680 int nvme_sc;
681 int xfer_len;
682 u8 resp_data_format = 0x02;
683 u8 protect;
684 u8 cmdque = 0x01 << 1;
Keith Buschdedf4b12014-04-29 15:52:27 -0600685 u8 fw_offset = sizeof(dev->firmware_rev);
Vishal Verma5d0f6132013-03-04 18:40:58 -0700686
Christoph Hellwige75ec752015-05-22 11:12:39 +0200687 mem = dma_alloc_coherent(dev->dev, sizeof(struct nvme_id_ns),
Vishal Verma5d0f6132013-03-04 18:40:58 -0700688 &dma_addr, GFP_KERNEL);
689 if (mem == NULL) {
690 res = -ENOMEM;
691 goto out_dma;
692 }
693
694 /* nvme ns identify - use DPS value for PROTECT field */
695 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
696 res = nvme_trans_status_code(hdr, nvme_sc);
697 /*
698 * If nvme_sc was -ve, res will be -ve here.
699 * If nvme_sc was +ve, the status would bace been translated, and res
700 * can only be 0 or -ve.
701 * - If 0 && nvme_sc > 0, then go into next if where res gets nvme_sc
702 * - If -ve, return because its a Linux error.
703 */
704 if (res)
705 goto out_free;
706 if (nvme_sc) {
707 res = nvme_sc;
708 goto out_free;
709 }
710 id_ns = mem;
711 (id_ns->dps) ? (protect = 0x01) : (protect = 0);
712
713 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
714 inq_response[2] = VERSION_SPC_4;
715 inq_response[3] = resp_data_format; /*normaca=0 | hisup=0 */
716 inq_response[4] = ADDITIONAL_STD_INQ_LENGTH;
717 inq_response[5] = protect; /* sccs=0 | acc=0 | tpgs=0 | pc3=0 */
718 inq_response[7] = cmdque; /* wbus16=0 | sync=0 | vs=0 */
719 strncpy(&inq_response[8], "NVMe ", 8);
720 strncpy(&inq_response[16], dev->model, 16);
Keith Buschdedf4b12014-04-29 15:52:27 -0600721
722 while (dev->firmware_rev[fw_offset - 1] == ' ' && fw_offset > 4)
723 fw_offset--;
724 fw_offset -= 4;
725 strncpy(&inq_response[32], dev->firmware_rev + fw_offset, 4);
Vishal Verma5d0f6132013-03-04 18:40:58 -0700726
727 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
728 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
729
730 out_free:
Christoph Hellwige75ec752015-05-22 11:12:39 +0200731 dma_free_coherent(dev->dev, sizeof(struct nvme_id_ns), mem, dma_addr);
Vishal Verma5d0f6132013-03-04 18:40:58 -0700732 out_dma:
733 return res;
734}
735
736static int nvme_trans_supported_vpd_pages(struct nvme_ns *ns,
737 struct sg_io_hdr *hdr, u8 *inq_response,
738 int alloc_len)
739{
740 int res = SNTI_TRANSLATION_SUCCESS;
741 int xfer_len;
742
743 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
744 inq_response[1] = INQ_SUPPORTED_VPD_PAGES_PAGE; /* Page Code */
745 inq_response[3] = INQ_NUM_SUPPORTED_VPD_PAGES; /* Page Length */
746 inq_response[4] = INQ_SUPPORTED_VPD_PAGES_PAGE;
747 inq_response[5] = INQ_UNIT_SERIAL_NUMBER_PAGE;
748 inq_response[6] = INQ_DEVICE_IDENTIFICATION_PAGE;
749 inq_response[7] = INQ_EXTENDED_INQUIRY_DATA_PAGE;
750 inq_response[8] = INQ_BDEV_CHARACTERISTICS_PAGE;
Keith Busch7f749d92015-04-07 15:34:18 -0600751 inq_response[9] = INQ_BDEV_LIMITS_PAGE;
Vishal Verma5d0f6132013-03-04 18:40:58 -0700752
753 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
754 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
755
756 return res;
757}
758
759static int nvme_trans_unit_serial_page(struct nvme_ns *ns,
760 struct sg_io_hdr *hdr, u8 *inq_response,
761 int alloc_len)
762{
763 struct nvme_dev *dev = ns->dev;
764 int res = SNTI_TRANSLATION_SUCCESS;
765 int xfer_len;
766
767 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
768 inq_response[1] = INQ_UNIT_SERIAL_NUMBER_PAGE; /* Page Code */
769 inq_response[3] = INQ_SERIAL_NUMBER_LENGTH; /* Page Length */
770 strncpy(&inq_response[4], dev->serial, INQ_SERIAL_NUMBER_LENGTH);
771
772 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
773 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
774
775 return res;
776}
777
778static int nvme_trans_device_id_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
779 u8 *inq_response, int alloc_len)
780{
781 struct nvme_dev *dev = ns->dev;
782 dma_addr_t dma_addr;
783 void *mem;
Vishal Verma5d0f6132013-03-04 18:40:58 -0700784 int res = SNTI_TRANSLATION_SUCCESS;
785 int nvme_sc;
Vishal Verma5d0f6132013-03-04 18:40:58 -0700786 int xfer_len;
Vishal Verma8741ee42013-04-04 17:52:27 -0600787 __be32 tmp_id = cpu_to_be32(ns->ns_id);
Vishal Verma5d0f6132013-03-04 18:40:58 -0700788
Christoph Hellwige75ec752015-05-22 11:12:39 +0200789 mem = dma_alloc_coherent(dev->dev, sizeof(struct nvme_id_ns),
Vishal Verma5d0f6132013-03-04 18:40:58 -0700790 &dma_addr, GFP_KERNEL);
791 if (mem == NULL) {
792 res = -ENOMEM;
793 goto out_dma;
794 }
795
Keith Busch4f1982b2015-02-19 13:42:14 -0700796 memset(inq_response, 0, alloc_len);
Vishal Verma5d0f6132013-03-04 18:40:58 -0700797 inq_response[1] = INQ_DEVICE_IDENTIFICATION_PAGE; /* Page Code */
Keith Busch4f1982b2015-02-19 13:42:14 -0700798 if (readl(&dev->bar->vs) >= NVME_VS(1, 1)) {
799 struct nvme_id_ns *id_ns = mem;
800 void *eui = id_ns->eui64;
801 int len = sizeof(id_ns->eui64);
Vishal Verma5d0f6132013-03-04 18:40:58 -0700802
Keith Busch4f1982b2015-02-19 13:42:14 -0700803 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
804 res = nvme_trans_status_code(hdr, nvme_sc);
805 if (res)
806 goto out_free;
807 if (nvme_sc) {
808 res = nvme_sc;
809 goto out_free;
810 }
811
812 if (readl(&dev->bar->vs) >= NVME_VS(1, 2)) {
813 if (bitmap_empty(eui, len * 8)) {
814 eui = id_ns->nguid;
815 len = sizeof(id_ns->nguid);
816 }
817 }
818 if (bitmap_empty(eui, len * 8))
819 goto scsi_string;
820
821 inq_response[3] = 4 + len; /* Page Length */
822 /* Designation Descriptor start */
823 inq_response[4] = 0x01; /* Proto ID=0h | Code set=1h */
824 inq_response[5] = 0x02; /* PIV=0b | Asso=00b | Designator Type=2h */
825 inq_response[6] = 0x00; /* Rsvd */
826 inq_response[7] = len; /* Designator Length */
827 memcpy(&inq_response[8], eui, len);
828 } else {
829 scsi_string:
830 if (alloc_len < 72) {
831 res = nvme_trans_completion(hdr,
832 SAM_STAT_CHECK_CONDITION,
833 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
834 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
835 goto out_free;
836 }
837 inq_response[3] = 0x48; /* Page Length */
838 /* Designation Descriptor start */
839 inq_response[4] = 0x03; /* Proto ID=0h | Code set=3h */
840 inq_response[5] = 0x08; /* PIV=0b | Asso=00b | Designator Type=8h */
841 inq_response[6] = 0x00; /* Rsvd */
842 inq_response[7] = 0x44; /* Designator Length */
843
Christoph Hellwige75ec752015-05-22 11:12:39 +0200844 sprintf(&inq_response[8], "%04x", to_pci_dev(dev->dev)->vendor);
Keith Busch4f1982b2015-02-19 13:42:14 -0700845 memcpy(&inq_response[12], dev->model, sizeof(dev->model));
846 sprintf(&inq_response[52], "%04x", tmp_id);
847 memcpy(&inq_response[56], dev->serial, sizeof(dev->serial));
848 }
849 xfer_len = alloc_len;
Vishal Verma5d0f6132013-03-04 18:40:58 -0700850 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
851
852 out_free:
Christoph Hellwige75ec752015-05-22 11:12:39 +0200853 dma_free_coherent(dev->dev, sizeof(struct nvme_id_ns), mem, dma_addr);
Vishal Verma5d0f6132013-03-04 18:40:58 -0700854 out_dma:
855 return res;
856}
857
858static int nvme_trans_ext_inq_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
859 int alloc_len)
860{
861 u8 *inq_response;
862 int res = SNTI_TRANSLATION_SUCCESS;
863 int nvme_sc;
864 struct nvme_dev *dev = ns->dev;
865 dma_addr_t dma_addr;
866 void *mem;
867 struct nvme_id_ctrl *id_ctrl;
868 struct nvme_id_ns *id_ns;
869 int xfer_len;
870 u8 microcode = 0x80;
871 u8 spt;
872 u8 spt_lut[8] = {0, 0, 2, 1, 4, 6, 5, 7};
873 u8 grd_chk, app_chk, ref_chk, protect;
874 u8 uask_sup = 0x20;
875 u8 v_sup;
876 u8 luiclr = 0x01;
877
878 inq_response = kmalloc(EXTENDED_INQUIRY_DATA_PAGE_LENGTH, GFP_KERNEL);
879 if (inq_response == NULL) {
880 res = -ENOMEM;
881 goto out_mem;
882 }
883
Christoph Hellwige75ec752015-05-22 11:12:39 +0200884 mem = dma_alloc_coherent(dev->dev, sizeof(struct nvme_id_ns),
Vishal Verma5d0f6132013-03-04 18:40:58 -0700885 &dma_addr, GFP_KERNEL);
886 if (mem == NULL) {
887 res = -ENOMEM;
888 goto out_dma;
889 }
890
891 /* nvme ns identify */
892 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
893 res = nvme_trans_status_code(hdr, nvme_sc);
894 if (res)
895 goto out_free;
896 if (nvme_sc) {
897 res = nvme_sc;
898 goto out_free;
899 }
900 id_ns = mem;
901 spt = spt_lut[(id_ns->dpc) & 0x07] << 3;
902 (id_ns->dps) ? (protect = 0x01) : (protect = 0);
903 grd_chk = protect << 2;
904 app_chk = protect << 1;
905 ref_chk = protect;
906
907 /* nvme controller identify */
908 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
909 res = nvme_trans_status_code(hdr, nvme_sc);
910 if (res)
911 goto out_free;
912 if (nvme_sc) {
913 res = nvme_sc;
914 goto out_free;
915 }
916 id_ctrl = mem;
917 v_sup = id_ctrl->vwc;
918
919 memset(inq_response, 0, EXTENDED_INQUIRY_DATA_PAGE_LENGTH);
920 inq_response[1] = INQ_EXTENDED_INQUIRY_DATA_PAGE; /* Page Code */
921 inq_response[2] = 0x00; /* Page Length MSB */
922 inq_response[3] = 0x3C; /* Page Length LSB */
923 inq_response[4] = microcode | spt | grd_chk | app_chk | ref_chk;
924 inq_response[5] = uask_sup;
925 inq_response[6] = v_sup;
926 inq_response[7] = luiclr;
927 inq_response[8] = 0;
928 inq_response[9] = 0;
929
930 xfer_len = min(alloc_len, EXTENDED_INQUIRY_DATA_PAGE_LENGTH);
931 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
932
933 out_free:
Christoph Hellwige75ec752015-05-22 11:12:39 +0200934 dma_free_coherent(dev->dev, sizeof(struct nvme_id_ns), mem, dma_addr);
Vishal Verma5d0f6132013-03-04 18:40:58 -0700935 out_dma:
936 kfree(inq_response);
937 out_mem:
938 return res;
939}
940
Keith Busch7f749d92015-04-07 15:34:18 -0600941static int nvme_trans_bdev_limits_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
942 u8 *inq_response, int alloc_len)
943{
944 __be32 max_sectors = cpu_to_be32(queue_max_hw_sectors(ns->queue));
945 __be32 max_discard = cpu_to_be32(ns->queue->limits.max_discard_sectors);
946 __be32 discard_desc_count = cpu_to_be32(0x100);
947
948 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
949 inq_response[1] = VPD_BLOCK_LIMITS;
950 inq_response[3] = 0x3c; /* Page Length */
951 memcpy(&inq_response[8], &max_sectors, sizeof(u32));
952 memcpy(&inq_response[20], &max_discard, sizeof(u32));
953
954 if (max_discard)
955 memcpy(&inq_response[24], &discard_desc_count, sizeof(u32));
956
957 return nvme_trans_copy_to_user(hdr, inq_response, 0x3c);
958}
959
Vishal Verma5d0f6132013-03-04 18:40:58 -0700960static int nvme_trans_bdev_char_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
961 int alloc_len)
962{
963 u8 *inq_response;
964 int res = SNTI_TRANSLATION_SUCCESS;
965 int xfer_len;
966
Tushar Behera03ea83e2013-06-10 10:20:55 +0530967 inq_response = kzalloc(EXTENDED_INQUIRY_DATA_PAGE_LENGTH, GFP_KERNEL);
Vishal Verma5d0f6132013-03-04 18:40:58 -0700968 if (inq_response == NULL) {
969 res = -ENOMEM;
970 goto out_mem;
971 }
972
Vishal Verma5d0f6132013-03-04 18:40:58 -0700973 inq_response[1] = INQ_BDEV_CHARACTERISTICS_PAGE; /* Page Code */
974 inq_response[2] = 0x00; /* Page Length MSB */
975 inq_response[3] = 0x3C; /* Page Length LSB */
976 inq_response[4] = 0x00; /* Medium Rotation Rate MSB */
977 inq_response[5] = 0x01; /* Medium Rotation Rate LSB */
978 inq_response[6] = 0x00; /* Form Factor */
979
980 xfer_len = min(alloc_len, EXTENDED_INQUIRY_DATA_PAGE_LENGTH);
981 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
982
983 kfree(inq_response);
984 out_mem:
985 return res;
986}
987
988/* LOG SENSE Helper Functions */
989
990static int nvme_trans_log_supp_pages(struct nvme_ns *ns, struct sg_io_hdr *hdr,
991 int alloc_len)
992{
993 int res = SNTI_TRANSLATION_SUCCESS;
994 int xfer_len;
995 u8 *log_response;
996
Tushar Behera03ea83e2013-06-10 10:20:55 +0530997 log_response = kzalloc(LOG_PAGE_SUPPORTED_LOG_PAGES_LENGTH, GFP_KERNEL);
Vishal Verma5d0f6132013-03-04 18:40:58 -0700998 if (log_response == NULL) {
999 res = -ENOMEM;
1000 goto out_mem;
1001 }
Vishal Verma5d0f6132013-03-04 18:40:58 -07001002
1003 log_response[0] = LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE;
1004 /* Subpage=0x00, Page Length MSB=0 */
1005 log_response[3] = SUPPORTED_LOG_PAGES_PAGE_LENGTH;
1006 log_response[4] = LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE;
1007 log_response[5] = LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE;
1008 log_response[6] = LOG_PAGE_TEMPERATURE_PAGE;
1009
1010 xfer_len = min(alloc_len, LOG_PAGE_SUPPORTED_LOG_PAGES_LENGTH);
1011 res = nvme_trans_copy_to_user(hdr, log_response, xfer_len);
1012
1013 kfree(log_response);
1014 out_mem:
1015 return res;
1016}
1017
1018static int nvme_trans_log_info_exceptions(struct nvme_ns *ns,
1019 struct sg_io_hdr *hdr, int alloc_len)
1020{
1021 int res = SNTI_TRANSLATION_SUCCESS;
1022 int xfer_len;
1023 u8 *log_response;
1024 struct nvme_command c;
1025 struct nvme_dev *dev = ns->dev;
1026 struct nvme_smart_log *smart_log;
1027 dma_addr_t dma_addr;
1028 void *mem;
1029 u8 temp_c;
1030 u16 temp_k;
1031
Tushar Behera03ea83e2013-06-10 10:20:55 +05301032 log_response = kzalloc(LOG_INFO_EXCP_PAGE_LENGTH, GFP_KERNEL);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001033 if (log_response == NULL) {
1034 res = -ENOMEM;
1035 goto out_mem;
1036 }
Vishal Verma5d0f6132013-03-04 18:40:58 -07001037
Christoph Hellwige75ec752015-05-22 11:12:39 +02001038 mem = dma_alloc_coherent(dev->dev, sizeof(struct nvme_smart_log),
Vishal Verma5d0f6132013-03-04 18:40:58 -07001039 &dma_addr, GFP_KERNEL);
1040 if (mem == NULL) {
1041 res = -ENOMEM;
1042 goto out_dma;
1043 }
1044
1045 /* Get SMART Log Page */
1046 memset(&c, 0, sizeof(c));
1047 c.common.opcode = nvme_admin_get_log_page;
1048 c.common.nsid = cpu_to_le32(0xFFFFFFFF);
1049 c.common.prp1 = cpu_to_le64(dma_addr);
Indraneel Mukherjee4131f2f2014-05-29 12:02:03 +05301050 c.common.cdw10[0] = cpu_to_le32((((sizeof(struct nvme_smart_log) /
Matthew Wilcoxef351b92014-06-13 10:54:21 -04001051 BYTES_TO_DWORDS) - 1) << 16) | NVME_LOG_SMART);
Christoph Hellwigf705f832015-05-22 11:12:38 +02001052 res = nvme_submit_sync_cmd(dev->admin_q, &c);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001053 if (res != NVME_SC_SUCCESS) {
1054 temp_c = LOG_TEMP_UNKNOWN;
1055 } else {
1056 smart_log = mem;
1057 temp_k = (smart_log->temperature[1] << 8) +
1058 (smart_log->temperature[0]);
1059 temp_c = temp_k - KELVIN_TEMP_FACTOR;
1060 }
1061
1062 log_response[0] = LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE;
1063 /* Subpage=0x00, Page Length MSB=0 */
1064 log_response[3] = REMAINING_INFO_EXCP_PAGE_LENGTH;
1065 /* Informational Exceptions Log Parameter 1 Start */
1066 /* Parameter Code=0x0000 bytes 4,5 */
1067 log_response[6] = 0x23; /* DU=0, TSD=1, ETC=0, TMC=0, FMT_AND_LNK=11b */
1068 log_response[7] = 0x04; /* PARAMETER LENGTH */
1069 /* Add sense Code and qualifier = 0x00 each */
1070 /* Use Temperature from NVMe Get Log Page, convert to C from K */
1071 log_response[10] = temp_c;
1072
1073 xfer_len = min(alloc_len, LOG_INFO_EXCP_PAGE_LENGTH);
1074 res = nvme_trans_copy_to_user(hdr, log_response, xfer_len);
1075
Christoph Hellwige75ec752015-05-22 11:12:39 +02001076 dma_free_coherent(dev->dev, sizeof(struct nvme_smart_log),
Vishal Verma5d0f6132013-03-04 18:40:58 -07001077 mem, dma_addr);
1078 out_dma:
1079 kfree(log_response);
1080 out_mem:
1081 return res;
1082}
1083
1084static int nvme_trans_log_temperature(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1085 int alloc_len)
1086{
1087 int res = SNTI_TRANSLATION_SUCCESS;
1088 int xfer_len;
1089 u8 *log_response;
1090 struct nvme_command c;
1091 struct nvme_dev *dev = ns->dev;
1092 struct nvme_smart_log *smart_log;
1093 dma_addr_t dma_addr;
1094 void *mem;
1095 u32 feature_resp;
1096 u8 temp_c_cur, temp_c_thresh;
1097 u16 temp_k;
1098
Tushar Behera03ea83e2013-06-10 10:20:55 +05301099 log_response = kzalloc(LOG_TEMP_PAGE_LENGTH, GFP_KERNEL);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001100 if (log_response == NULL) {
1101 res = -ENOMEM;
1102 goto out_mem;
1103 }
Vishal Verma5d0f6132013-03-04 18:40:58 -07001104
Christoph Hellwige75ec752015-05-22 11:12:39 +02001105 mem = dma_alloc_coherent(dev->dev, sizeof(struct nvme_smart_log),
Vishal Verma5d0f6132013-03-04 18:40:58 -07001106 &dma_addr, GFP_KERNEL);
1107 if (mem == NULL) {
1108 res = -ENOMEM;
1109 goto out_dma;
1110 }
1111
1112 /* Get SMART Log Page */
1113 memset(&c, 0, sizeof(c));
1114 c.common.opcode = nvme_admin_get_log_page;
1115 c.common.nsid = cpu_to_le32(0xFFFFFFFF);
1116 c.common.prp1 = cpu_to_le64(dma_addr);
Indraneel Mukherjee4131f2f2014-05-29 12:02:03 +05301117 c.common.cdw10[0] = cpu_to_le32((((sizeof(struct nvme_smart_log) /
Matthew Wilcoxef351b92014-06-13 10:54:21 -04001118 BYTES_TO_DWORDS) - 1) << 16) | NVME_LOG_SMART);
Christoph Hellwigf705f832015-05-22 11:12:38 +02001119 res = nvme_submit_sync_cmd(dev->admin_q, &c);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001120 if (res != NVME_SC_SUCCESS) {
1121 temp_c_cur = LOG_TEMP_UNKNOWN;
1122 } else {
1123 smart_log = mem;
1124 temp_k = (smart_log->temperature[1] << 8) +
1125 (smart_log->temperature[0]);
1126 temp_c_cur = temp_k - KELVIN_TEMP_FACTOR;
1127 }
1128
1129 /* Get Features for Temp Threshold */
1130 res = nvme_get_features(dev, NVME_FEAT_TEMP_THRESH, 0, 0,
1131 &feature_resp);
1132 if (res != NVME_SC_SUCCESS)
1133 temp_c_thresh = LOG_TEMP_UNKNOWN;
1134 else
1135 temp_c_thresh = (feature_resp & 0xFFFF) - KELVIN_TEMP_FACTOR;
1136
1137 log_response[0] = LOG_PAGE_TEMPERATURE_PAGE;
1138 /* Subpage=0x00, Page Length MSB=0 */
1139 log_response[3] = REMAINING_TEMP_PAGE_LENGTH;
1140 /* Temperature Log Parameter 1 (Temperature) Start */
1141 /* Parameter Code = 0x0000 */
1142 log_response[6] = 0x01; /* Format and Linking = 01b */
1143 log_response[7] = 0x02; /* Parameter Length */
1144 /* Use Temperature from NVMe Get Log Page, convert to C from K */
1145 log_response[9] = temp_c_cur;
1146 /* Temperature Log Parameter 2 (Reference Temperature) Start */
1147 log_response[11] = 0x01; /* Parameter Code = 0x0001 */
1148 log_response[12] = 0x01; /* Format and Linking = 01b */
1149 log_response[13] = 0x02; /* Parameter Length */
1150 /* Use Temperature Thresh from NVMe Get Log Page, convert to C from K */
1151 log_response[15] = temp_c_thresh;
1152
1153 xfer_len = min(alloc_len, LOG_TEMP_PAGE_LENGTH);
1154 res = nvme_trans_copy_to_user(hdr, log_response, xfer_len);
1155
Christoph Hellwige75ec752015-05-22 11:12:39 +02001156 dma_free_coherent(dev->dev, sizeof(struct nvme_smart_log),
Vishal Verma5d0f6132013-03-04 18:40:58 -07001157 mem, dma_addr);
1158 out_dma:
1159 kfree(log_response);
1160 out_mem:
1161 return res;
1162}
1163
1164/* MODE SENSE Helper Functions */
1165
1166static int nvme_trans_fill_mode_parm_hdr(u8 *resp, int len, u8 cdb10, u8 llbaa,
1167 u16 mode_data_length, u16 blk_desc_len)
1168{
1169 /* Quick check to make sure I don't stomp on my own memory... */
1170 if ((cdb10 && len < 8) || (!cdb10 && len < 4))
1171 return SNTI_INTERNAL_ERROR;
1172
1173 if (cdb10) {
1174 resp[0] = (mode_data_length & 0xFF00) >> 8;
1175 resp[1] = (mode_data_length & 0x00FF);
1176 /* resp[2] and [3] are zero */
1177 resp[4] = llbaa;
1178 resp[5] = RESERVED_FIELD;
1179 resp[6] = (blk_desc_len & 0xFF00) >> 8;
1180 resp[7] = (blk_desc_len & 0x00FF);
1181 } else {
1182 resp[0] = (mode_data_length & 0x00FF);
1183 /* resp[1] and [2] are zero */
1184 resp[3] = (blk_desc_len & 0x00FF);
1185 }
1186
1187 return SNTI_TRANSLATION_SUCCESS;
1188}
1189
1190static int nvme_trans_fill_blk_desc(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1191 u8 *resp, int len, u8 llbaa)
1192{
1193 int res = SNTI_TRANSLATION_SUCCESS;
1194 int nvme_sc;
1195 struct nvme_dev *dev = ns->dev;
1196 dma_addr_t dma_addr;
1197 void *mem;
1198 struct nvme_id_ns *id_ns;
1199 u8 flbas;
1200 u32 lba_length;
1201
1202 if (llbaa == 0 && len < MODE_PAGE_BLK_DES_LEN)
1203 return SNTI_INTERNAL_ERROR;
1204 else if (llbaa > 0 && len < MODE_PAGE_LLBAA_BLK_DES_LEN)
1205 return SNTI_INTERNAL_ERROR;
1206
Christoph Hellwige75ec752015-05-22 11:12:39 +02001207 mem = dma_alloc_coherent(dev->dev, sizeof(struct nvme_id_ns),
Vishal Verma5d0f6132013-03-04 18:40:58 -07001208 &dma_addr, GFP_KERNEL);
1209 if (mem == NULL) {
1210 res = -ENOMEM;
1211 goto out;
1212 }
1213
1214 /* nvme ns identify */
1215 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
1216 res = nvme_trans_status_code(hdr, nvme_sc);
1217 if (res)
1218 goto out_dma;
1219 if (nvme_sc) {
1220 res = nvme_sc;
1221 goto out_dma;
1222 }
1223 id_ns = mem;
1224 flbas = (id_ns->flbas) & 0x0F;
1225 lba_length = (1 << (id_ns->lbaf[flbas].ds));
1226
1227 if (llbaa == 0) {
Vishal Verma8741ee42013-04-04 17:52:27 -06001228 __be32 tmp_cap = cpu_to_be32(le64_to_cpu(id_ns->ncap));
Vishal Verma5d0f6132013-03-04 18:40:58 -07001229 /* Byte 4 is reserved */
Vishal Verma8741ee42013-04-04 17:52:27 -06001230 __be32 tmp_len = cpu_to_be32(lba_length & 0x00FFFFFF);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001231
1232 memcpy(resp, &tmp_cap, sizeof(u32));
1233 memcpy(&resp[4], &tmp_len, sizeof(u32));
1234 } else {
Vishal Verma8741ee42013-04-04 17:52:27 -06001235 __be64 tmp_cap = cpu_to_be64(le64_to_cpu(id_ns->ncap));
1236 __be32 tmp_len = cpu_to_be32(lba_length);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001237
1238 memcpy(resp, &tmp_cap, sizeof(u64));
1239 /* Bytes 8, 9, 10, 11 are reserved */
1240 memcpy(&resp[12], &tmp_len, sizeof(u32));
1241 }
1242
1243 out_dma:
Christoph Hellwige75ec752015-05-22 11:12:39 +02001244 dma_free_coherent(dev->dev, sizeof(struct nvme_id_ns), mem, dma_addr);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001245 out:
1246 return res;
1247}
1248
1249static int nvme_trans_fill_control_page(struct nvme_ns *ns,
1250 struct sg_io_hdr *hdr, u8 *resp,
1251 int len)
1252{
1253 if (len < MODE_PAGE_CONTROL_LEN)
1254 return SNTI_INTERNAL_ERROR;
1255
1256 resp[0] = MODE_PAGE_CONTROL;
1257 resp[1] = MODE_PAGE_CONTROL_LEN_FIELD;
1258 resp[2] = 0x0E; /* TST=000b, TMF_ONLY=0, DPICZ=1,
1259 * D_SENSE=1, GLTSD=1, RLEC=0 */
1260 resp[3] = 0x12; /* Q_ALGO_MODIFIER=1h, NUAR=0, QERR=01b */
1261 /* Byte 4: VS=0, RAC=0, UA_INT=0, SWP=0 */
1262 resp[5] = 0x40; /* ATO=0, TAS=1, ATMPE=0, RWWP=0, AUTOLOAD=0 */
1263 /* resp[6] and [7] are obsolete, thus zero */
1264 resp[8] = 0xFF; /* Busy timeout period = 0xffff */
1265 resp[9] = 0xFF;
1266 /* Bytes 10,11: Extended selftest completion time = 0x0000 */
1267
1268 return SNTI_TRANSLATION_SUCCESS;
1269}
1270
1271static int nvme_trans_fill_caching_page(struct nvme_ns *ns,
1272 struct sg_io_hdr *hdr,
1273 u8 *resp, int len)
1274{
1275 int res = SNTI_TRANSLATION_SUCCESS;
1276 int nvme_sc;
1277 struct nvme_dev *dev = ns->dev;
1278 u32 feature_resp;
1279 u8 vwc;
1280
1281 if (len < MODE_PAGE_CACHING_LEN)
1282 return SNTI_INTERNAL_ERROR;
1283
1284 nvme_sc = nvme_get_features(dev, NVME_FEAT_VOLATILE_WC, 0, 0,
1285 &feature_resp);
1286 res = nvme_trans_status_code(hdr, nvme_sc);
1287 if (res)
1288 goto out;
1289 if (nvme_sc) {
1290 res = nvme_sc;
1291 goto out;
1292 }
1293 vwc = feature_resp & 0x00000001;
1294
1295 resp[0] = MODE_PAGE_CACHING;
1296 resp[1] = MODE_PAGE_CACHING_LEN_FIELD;
1297 resp[2] = vwc << 2;
1298
1299 out:
1300 return res;
1301}
1302
1303static int nvme_trans_fill_pow_cnd_page(struct nvme_ns *ns,
1304 struct sg_io_hdr *hdr, u8 *resp,
1305 int len)
1306{
1307 int res = SNTI_TRANSLATION_SUCCESS;
1308
1309 if (len < MODE_PAGE_POW_CND_LEN)
1310 return SNTI_INTERNAL_ERROR;
1311
1312 resp[0] = MODE_PAGE_POWER_CONDITION;
1313 resp[1] = MODE_PAGE_POW_CND_LEN_FIELD;
1314 /* All other bytes are zero */
1315
1316 return res;
1317}
1318
1319static int nvme_trans_fill_inf_exc_page(struct nvme_ns *ns,
1320 struct sg_io_hdr *hdr, u8 *resp,
1321 int len)
1322{
1323 int res = SNTI_TRANSLATION_SUCCESS;
1324
1325 if (len < MODE_PAGE_INF_EXC_LEN)
1326 return SNTI_INTERNAL_ERROR;
1327
1328 resp[0] = MODE_PAGE_INFO_EXCEP;
1329 resp[1] = MODE_PAGE_INF_EXC_LEN_FIELD;
1330 resp[2] = 0x88;
1331 /* All other bytes are zero */
1332
1333 return res;
1334}
1335
1336static int nvme_trans_fill_all_pages(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1337 u8 *resp, int len)
1338{
1339 int res = SNTI_TRANSLATION_SUCCESS;
1340 u16 mode_pages_offset_1 = 0;
1341 u16 mode_pages_offset_2, mode_pages_offset_3, mode_pages_offset_4;
1342
1343 mode_pages_offset_2 = mode_pages_offset_1 + MODE_PAGE_CACHING_LEN;
1344 mode_pages_offset_3 = mode_pages_offset_2 + MODE_PAGE_CONTROL_LEN;
1345 mode_pages_offset_4 = mode_pages_offset_3 + MODE_PAGE_POW_CND_LEN;
1346
1347 res = nvme_trans_fill_caching_page(ns, hdr, &resp[mode_pages_offset_1],
1348 MODE_PAGE_CACHING_LEN);
1349 if (res != SNTI_TRANSLATION_SUCCESS)
1350 goto out;
1351 res = nvme_trans_fill_control_page(ns, hdr, &resp[mode_pages_offset_2],
1352 MODE_PAGE_CONTROL_LEN);
1353 if (res != SNTI_TRANSLATION_SUCCESS)
1354 goto out;
1355 res = nvme_trans_fill_pow_cnd_page(ns, hdr, &resp[mode_pages_offset_3],
1356 MODE_PAGE_POW_CND_LEN);
1357 if (res != SNTI_TRANSLATION_SUCCESS)
1358 goto out;
1359 res = nvme_trans_fill_inf_exc_page(ns, hdr, &resp[mode_pages_offset_4],
1360 MODE_PAGE_INF_EXC_LEN);
1361 if (res != SNTI_TRANSLATION_SUCCESS)
1362 goto out;
1363
1364 out:
1365 return res;
1366}
1367
1368static inline int nvme_trans_get_blk_desc_len(u8 dbd, u8 llbaa)
1369{
1370 if (dbd == MODE_SENSE_BLK_DESC_ENABLED) {
1371 /* SPC-4: len = 8 x Num_of_descriptors if llbaa = 0, 16x if 1 */
1372 return 8 * (llbaa + 1) * MODE_SENSE_BLK_DESC_COUNT;
1373 } else {
1374 return 0;
1375 }
1376}
1377
1378static int nvme_trans_mode_page_create(struct nvme_ns *ns,
1379 struct sg_io_hdr *hdr, u8 *cmd,
1380 u16 alloc_len, u8 cdb10,
1381 int (*mode_page_fill_func)
1382 (struct nvme_ns *,
1383 struct sg_io_hdr *hdr, u8 *, int),
1384 u16 mode_pages_tot_len)
1385{
1386 int res = SNTI_TRANSLATION_SUCCESS;
1387 int xfer_len;
1388 u8 *response;
1389 u8 dbd, llbaa;
1390 u16 resp_size;
1391 int mph_size;
1392 u16 mode_pages_offset_1;
1393 u16 blk_desc_len, blk_desc_offset, mode_data_length;
1394
1395 dbd = GET_MODE_SENSE_DBD(cmd);
1396 llbaa = GET_MODE_SENSE_LLBAA(cmd);
1397 mph_size = GET_MODE_SENSE_MPH_SIZE(cdb10);
1398 blk_desc_len = nvme_trans_get_blk_desc_len(dbd, llbaa);
1399
1400 resp_size = mph_size + blk_desc_len + mode_pages_tot_len;
1401 /* Refer spc4r34 Table 440 for calculation of Mode data Length field */
1402 mode_data_length = 3 + (3 * cdb10) + blk_desc_len + mode_pages_tot_len;
1403
1404 blk_desc_offset = mph_size;
1405 mode_pages_offset_1 = blk_desc_offset + blk_desc_len;
1406
Tushar Behera03ea83e2013-06-10 10:20:55 +05301407 response = kzalloc(resp_size, GFP_KERNEL);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001408 if (response == NULL) {
1409 res = -ENOMEM;
1410 goto out_mem;
1411 }
Vishal Verma5d0f6132013-03-04 18:40:58 -07001412
1413 res = nvme_trans_fill_mode_parm_hdr(&response[0], mph_size, cdb10,
1414 llbaa, mode_data_length, blk_desc_len);
1415 if (res != SNTI_TRANSLATION_SUCCESS)
1416 goto out_free;
1417 if (blk_desc_len > 0) {
1418 res = nvme_trans_fill_blk_desc(ns, hdr,
1419 &response[blk_desc_offset],
1420 blk_desc_len, llbaa);
1421 if (res != SNTI_TRANSLATION_SUCCESS)
1422 goto out_free;
1423 }
1424 res = mode_page_fill_func(ns, hdr, &response[mode_pages_offset_1],
1425 mode_pages_tot_len);
1426 if (res != SNTI_TRANSLATION_SUCCESS)
1427 goto out_free;
1428
1429 xfer_len = min(alloc_len, resp_size);
1430 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
1431
1432 out_free:
1433 kfree(response);
1434 out_mem:
1435 return res;
1436}
1437
1438/* Read Capacity Helper Functions */
1439
1440static void nvme_trans_fill_read_cap(u8 *response, struct nvme_id_ns *id_ns,
1441 u8 cdb16)
1442{
1443 u8 flbas;
1444 u32 lba_length;
1445 u64 rlba;
1446 u8 prot_en;
1447 u8 p_type_lut[4] = {0, 0, 1, 2};
Vishal Verma8741ee42013-04-04 17:52:27 -06001448 __be64 tmp_rlba;
1449 __be32 tmp_rlba_32;
1450 __be32 tmp_len;
Vishal Verma5d0f6132013-03-04 18:40:58 -07001451
1452 flbas = (id_ns->flbas) & 0x0F;
1453 lba_length = (1 << (id_ns->lbaf[flbas].ds));
1454 rlba = le64_to_cpup(&id_ns->nsze) - 1;
1455 (id_ns->dps) ? (prot_en = 0x01) : (prot_en = 0);
1456
1457 if (!cdb16) {
1458 if (rlba > 0xFFFFFFFF)
1459 rlba = 0xFFFFFFFF;
1460 tmp_rlba_32 = cpu_to_be32(rlba);
1461 tmp_len = cpu_to_be32(lba_length);
1462 memcpy(response, &tmp_rlba_32, sizeof(u32));
1463 memcpy(&response[4], &tmp_len, sizeof(u32));
1464 } else {
1465 tmp_rlba = cpu_to_be64(rlba);
1466 tmp_len = cpu_to_be32(lba_length);
1467 memcpy(response, &tmp_rlba, sizeof(u64));
1468 memcpy(&response[8], &tmp_len, sizeof(u32));
1469 response[12] = (p_type_lut[id_ns->dps & 0x3] << 1) | prot_en;
1470 /* P_I_Exponent = 0x0 | LBPPBE = 0x0 */
1471 /* LBPME = 0 | LBPRZ = 0 | LALBA = 0x00 */
1472 /* Bytes 16-31 - Reserved */
1473 }
1474}
1475
1476/* Start Stop Unit Helper Functions */
1477
1478static int nvme_trans_power_state(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1479 u8 pc, u8 pcmod, u8 start)
1480{
1481 int res = SNTI_TRANSLATION_SUCCESS;
1482 int nvme_sc;
1483 struct nvme_dev *dev = ns->dev;
1484 dma_addr_t dma_addr;
1485 void *mem;
1486 struct nvme_id_ctrl *id_ctrl;
1487 int lowest_pow_st; /* max npss = lowest power consumption */
1488 unsigned ps_desired = 0;
1489
1490 /* NVMe Controller Identify */
Christoph Hellwige75ec752015-05-22 11:12:39 +02001491 mem = dma_alloc_coherent(dev->dev, sizeof(struct nvme_id_ctrl),
Vishal Verma5d0f6132013-03-04 18:40:58 -07001492 &dma_addr, GFP_KERNEL);
1493 if (mem == NULL) {
1494 res = -ENOMEM;
1495 goto out;
1496 }
1497 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
1498 res = nvme_trans_status_code(hdr, nvme_sc);
1499 if (res)
1500 goto out_dma;
1501 if (nvme_sc) {
1502 res = nvme_sc;
1503 goto out_dma;
1504 }
1505 id_ctrl = mem;
Dan McLeranb8e08082014-06-06 08:27:27 -06001506 lowest_pow_st = max(POWER_STATE_0, (int)(id_ctrl->npss - 1));
Vishal Verma5d0f6132013-03-04 18:40:58 -07001507
1508 switch (pc) {
1509 case NVME_POWER_STATE_START_VALID:
1510 /* Action unspecified if POWER CONDITION MODIFIER != 0 */
1511 if (pcmod == 0 && start == 0x1)
1512 ps_desired = POWER_STATE_0;
1513 if (pcmod == 0 && start == 0x0)
1514 ps_desired = lowest_pow_st;
1515 break;
1516 case NVME_POWER_STATE_ACTIVE:
1517 /* Action unspecified if POWER CONDITION MODIFIER != 0 */
1518 if (pcmod == 0)
1519 ps_desired = POWER_STATE_0;
1520 break;
1521 case NVME_POWER_STATE_IDLE:
1522 /* Action unspecified if POWER CONDITION MODIFIER != [0,1,2] */
Vishal Verma5d0f6132013-03-04 18:40:58 -07001523 if (pcmod == 0x0)
Dan McLeranb8e08082014-06-06 08:27:27 -06001524 ps_desired = POWER_STATE_1;
Vishal Verma5d0f6132013-03-04 18:40:58 -07001525 else if (pcmod == 0x1)
Dan McLeranb8e08082014-06-06 08:27:27 -06001526 ps_desired = POWER_STATE_2;
Vishal Verma5d0f6132013-03-04 18:40:58 -07001527 else if (pcmod == 0x2)
Dan McLeranb8e08082014-06-06 08:27:27 -06001528 ps_desired = POWER_STATE_3;
Vishal Verma5d0f6132013-03-04 18:40:58 -07001529 break;
1530 case NVME_POWER_STATE_STANDBY:
1531 /* Action unspecified if POWER CONDITION MODIFIER != [0,1] */
1532 if (pcmod == 0x0)
Dan McLeranb8e08082014-06-06 08:27:27 -06001533 ps_desired = max(POWER_STATE_0, (lowest_pow_st - 2));
Vishal Verma5d0f6132013-03-04 18:40:58 -07001534 else if (pcmod == 0x1)
Dan McLeranb8e08082014-06-06 08:27:27 -06001535 ps_desired = max(POWER_STATE_0, (lowest_pow_st - 1));
Vishal Verma5d0f6132013-03-04 18:40:58 -07001536 break;
1537 case NVME_POWER_STATE_LU_CONTROL:
1538 default:
1539 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1540 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1541 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1542 break;
1543 }
1544 nvme_sc = nvme_set_features(dev, NVME_FEAT_POWER_MGMT, ps_desired, 0,
1545 NULL);
1546 res = nvme_trans_status_code(hdr, nvme_sc);
1547 if (res)
1548 goto out_dma;
1549 if (nvme_sc)
1550 res = nvme_sc;
1551 out_dma:
Christoph Hellwige75ec752015-05-22 11:12:39 +02001552 dma_free_coherent(dev->dev, sizeof(struct nvme_id_ctrl), mem, dma_addr);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001553 out:
1554 return res;
1555}
1556
Christoph Hellwigb90c48d2015-05-22 11:12:40 +02001557static int nvme_trans_send_activate_fw_cmd(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1558 u8 buffer_id)
1559{
1560 struct nvme_command c;
1561 int nvme_sc;
1562 int res;
Vishal Verma5d0f6132013-03-04 18:40:58 -07001563
Christoph Hellwigb90c48d2015-05-22 11:12:40 +02001564 memset(&c, 0, sizeof(c));
1565 c.common.opcode = nvme_admin_activate_fw;
1566 c.common.cdw10[0] = cpu_to_le32(buffer_id | NVME_FWACT_REPL_ACTV);
1567
1568 nvme_sc = nvme_submit_sync_cmd(ns->queue, &c);
1569 res = nvme_trans_status_code(hdr, nvme_sc);
1570 if (res)
1571 return res;
1572 return nvme_sc;
1573}
1574
1575static int nvme_trans_send_download_fw_cmd(struct nvme_ns *ns, struct sg_io_hdr *hdr,
Vishal Verma5d0f6132013-03-04 18:40:58 -07001576 u8 opcode, u32 tot_len, u32 offset,
1577 u8 buffer_id)
1578{
1579 int res = SNTI_TRANSLATION_SUCCESS;
1580 int nvme_sc;
1581 struct nvme_dev *dev = ns->dev;
1582 struct nvme_command c;
1583 struct nvme_iod *iod = NULL;
1584 unsigned length;
1585
1586 memset(&c, 0, sizeof(c));
Christoph Hellwigb90c48d2015-05-22 11:12:40 +02001587 c.common.opcode = nvme_admin_download_fw;
Vishal Verma5d0f6132013-03-04 18:40:58 -07001588
Christoph Hellwigb90c48d2015-05-22 11:12:40 +02001589 if (hdr->iovec_count > 0) {
1590 /* Assuming SGL is not allowed for this command */
1591 return nvme_trans_completion(hdr,
1592 SAM_STAT_CHECK_CONDITION,
1593 ILLEGAL_REQUEST,
1594 SCSI_ASC_INVALID_CDB,
1595 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001596 }
Christoph Hellwigb90c48d2015-05-22 11:12:40 +02001597 iod = nvme_map_user_pages(dev, DMA_TO_DEVICE,
1598 (unsigned long)hdr->dxferp, tot_len);
1599 if (IS_ERR(iod))
1600 return PTR_ERR(iod);
1601 length = nvme_setup_prps(dev, iod, tot_len, GFP_KERNEL);
1602 if (length != tot_len) {
1603 res = -ENOMEM;
1604 goto out_unmap;
1605 }
1606
1607 c.dlfw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
1608 c.dlfw.prp2 = cpu_to_le64(iod->first_dma);
1609 c.dlfw.numd = cpu_to_le32((tot_len/BYTES_TO_DWORDS) - 1);
1610 c.dlfw.offset = cpu_to_le32(offset/BYTES_TO_DWORDS);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001611
Christoph Hellwigf705f832015-05-22 11:12:38 +02001612 nvme_sc = nvme_submit_sync_cmd(dev->admin_q, &c);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001613 res = nvme_trans_status_code(hdr, nvme_sc);
1614 if (res)
1615 goto out_unmap;
1616 if (nvme_sc)
1617 res = nvme_sc;
1618
1619 out_unmap:
Christoph Hellwigb90c48d2015-05-22 11:12:40 +02001620 nvme_unmap_user_pages(dev, DMA_TO_DEVICE, iod);
1621 nvme_free_iod(dev, iod);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001622 return res;
1623}
1624
1625/* Mode Select Helper Functions */
1626
1627static inline void nvme_trans_modesel_get_bd_len(u8 *parm_list, u8 cdb10,
1628 u16 *bd_len, u8 *llbaa)
1629{
1630 if (cdb10) {
1631 /* 10 Byte CDB */
1632 *bd_len = (parm_list[MODE_SELECT_10_BD_OFFSET] << 8) +
1633 parm_list[MODE_SELECT_10_BD_OFFSET + 1];
Keith Busch9ac16932015-01-09 16:52:08 -07001634 *llbaa = parm_list[MODE_SELECT_10_LLBAA_OFFSET] &
Vishal Verma5d0f6132013-03-04 18:40:58 -07001635 MODE_SELECT_10_LLBAA_MASK;
1636 } else {
1637 /* 6 Byte CDB */
1638 *bd_len = parm_list[MODE_SELECT_6_BD_OFFSET];
1639 }
1640}
1641
1642static void nvme_trans_modesel_save_bd(struct nvme_ns *ns, u8 *parm_list,
1643 u16 idx, u16 bd_len, u8 llbaa)
1644{
1645 u16 bd_num;
1646
1647 bd_num = bd_len / ((llbaa == 0) ?
1648 SHORT_DESC_BLOCK : LONG_DESC_BLOCK);
1649 /* Store block descriptor info if a FORMAT UNIT comes later */
1650 /* TODO Saving 1st BD info; what to do if multiple BD received? */
1651 if (llbaa == 0) {
1652 /* Standard Block Descriptor - spc4r34 7.5.5.1 */
1653 ns->mode_select_num_blocks =
1654 (parm_list[idx + 1] << 16) +
1655 (parm_list[idx + 2] << 8) +
1656 (parm_list[idx + 3]);
1657
1658 ns->mode_select_block_len =
1659 (parm_list[idx + 5] << 16) +
1660 (parm_list[idx + 6] << 8) +
1661 (parm_list[idx + 7]);
1662 } else {
1663 /* Long LBA Block Descriptor - sbc3r27 6.4.2.3 */
1664 ns->mode_select_num_blocks =
1665 (((u64)parm_list[idx + 0]) << 56) +
1666 (((u64)parm_list[idx + 1]) << 48) +
1667 (((u64)parm_list[idx + 2]) << 40) +
1668 (((u64)parm_list[idx + 3]) << 32) +
1669 (((u64)parm_list[idx + 4]) << 24) +
1670 (((u64)parm_list[idx + 5]) << 16) +
1671 (((u64)parm_list[idx + 6]) << 8) +
1672 ((u64)parm_list[idx + 7]);
1673
1674 ns->mode_select_block_len =
1675 (parm_list[idx + 12] << 24) +
1676 (parm_list[idx + 13] << 16) +
1677 (parm_list[idx + 14] << 8) +
1678 (parm_list[idx + 15]);
1679 }
1680}
1681
Vishal Verma710a1432013-05-13 14:55:18 -06001682static int nvme_trans_modesel_get_mp(struct nvme_ns *ns, struct sg_io_hdr *hdr,
Vishal Verma5d0f6132013-03-04 18:40:58 -07001683 u8 *mode_page, u8 page_code)
1684{
1685 int res = SNTI_TRANSLATION_SUCCESS;
1686 int nvme_sc;
1687 struct nvme_dev *dev = ns->dev;
1688 unsigned dword11;
1689
1690 switch (page_code) {
1691 case MODE_PAGE_CACHING:
1692 dword11 = ((mode_page[2] & CACHING_MODE_PAGE_WCE_MASK) ? 1 : 0);
1693 nvme_sc = nvme_set_features(dev, NVME_FEAT_VOLATILE_WC, dword11,
1694 0, NULL);
1695 res = nvme_trans_status_code(hdr, nvme_sc);
1696 if (res)
1697 break;
1698 if (nvme_sc) {
1699 res = nvme_sc;
1700 break;
1701 }
1702 break;
1703 case MODE_PAGE_CONTROL:
1704 break;
1705 case MODE_PAGE_POWER_CONDITION:
1706 /* Verify the OS is not trying to set timers */
1707 if ((mode_page[2] & 0x01) != 0 || (mode_page[3] & 0x0F) != 0) {
1708 res = nvme_trans_completion(hdr,
1709 SAM_STAT_CHECK_CONDITION,
1710 ILLEGAL_REQUEST,
1711 SCSI_ASC_INVALID_PARAMETER,
1712 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1713 if (!res)
1714 res = SNTI_INTERNAL_ERROR;
1715 break;
1716 }
1717 break;
1718 default:
1719 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1720 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1721 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1722 if (!res)
1723 res = SNTI_INTERNAL_ERROR;
1724 break;
1725 }
1726
1727 return res;
1728}
1729
1730static int nvme_trans_modesel_data(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1731 u8 *cmd, u16 parm_list_len, u8 pf,
1732 u8 sp, u8 cdb10)
1733{
1734 int res = SNTI_TRANSLATION_SUCCESS;
1735 u8 *parm_list;
1736 u16 bd_len;
1737 u8 llbaa = 0;
1738 u16 index, saved_index;
1739 u8 page_code;
1740 u16 mp_size;
1741
1742 /* Get parm list from data-in/out buffer */
1743 parm_list = kmalloc(parm_list_len, GFP_KERNEL);
1744 if (parm_list == NULL) {
1745 res = -ENOMEM;
1746 goto out;
1747 }
1748
1749 res = nvme_trans_copy_from_user(hdr, parm_list, parm_list_len);
1750 if (res != SNTI_TRANSLATION_SUCCESS)
1751 goto out_mem;
1752
1753 nvme_trans_modesel_get_bd_len(parm_list, cdb10, &bd_len, &llbaa);
1754 index = (cdb10) ? (MODE_SELECT_10_MPH_SIZE) : (MODE_SELECT_6_MPH_SIZE);
1755
1756 if (bd_len != 0) {
1757 /* Block Descriptors present, parse */
1758 nvme_trans_modesel_save_bd(ns, parm_list, index, bd_len, llbaa);
1759 index += bd_len;
1760 }
1761 saved_index = index;
1762
1763 /* Multiple mode pages may be present; iterate through all */
1764 /* In 1st Iteration, don't do NVME Command, only check for CDB errors */
1765 do {
1766 page_code = parm_list[index] & MODE_SELECT_PAGE_CODE_MASK;
1767 mp_size = parm_list[index + 1] + 2;
1768 if ((page_code != MODE_PAGE_CACHING) &&
1769 (page_code != MODE_PAGE_CONTROL) &&
1770 (page_code != MODE_PAGE_POWER_CONDITION)) {
1771 res = nvme_trans_completion(hdr,
1772 SAM_STAT_CHECK_CONDITION,
1773 ILLEGAL_REQUEST,
1774 SCSI_ASC_INVALID_CDB,
1775 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1776 goto out_mem;
1777 }
1778 index += mp_size;
1779 } while (index < parm_list_len);
1780
1781 /* In 2nd Iteration, do the NVME Commands */
1782 index = saved_index;
1783 do {
1784 page_code = parm_list[index] & MODE_SELECT_PAGE_CODE_MASK;
1785 mp_size = parm_list[index + 1] + 2;
1786 res = nvme_trans_modesel_get_mp(ns, hdr, &parm_list[index],
1787 page_code);
1788 if (res != SNTI_TRANSLATION_SUCCESS)
1789 break;
1790 index += mp_size;
1791 } while (index < parm_list_len);
1792
1793 out_mem:
1794 kfree(parm_list);
1795 out:
1796 return res;
1797}
1798
1799/* Format Unit Helper Functions */
1800
1801static int nvme_trans_fmt_set_blk_size_count(struct nvme_ns *ns,
1802 struct sg_io_hdr *hdr)
1803{
1804 int res = SNTI_TRANSLATION_SUCCESS;
1805 int nvme_sc;
1806 struct nvme_dev *dev = ns->dev;
1807 dma_addr_t dma_addr;
1808 void *mem;
1809 struct nvme_id_ns *id_ns;
1810 u8 flbas;
1811
1812 /*
1813 * SCSI Expects a MODE SELECT would have been issued prior to
1814 * a FORMAT UNIT, and the block size and number would be used
1815 * from the block descriptor in it. If a MODE SELECT had not
1816 * been issued, FORMAT shall use the current values for both.
1817 */
1818
1819 if (ns->mode_select_num_blocks == 0 || ns->mode_select_block_len == 0) {
Christoph Hellwige75ec752015-05-22 11:12:39 +02001820 mem = dma_alloc_coherent(dev->dev,
Vishal Verma5d0f6132013-03-04 18:40:58 -07001821 sizeof(struct nvme_id_ns), &dma_addr, GFP_KERNEL);
1822 if (mem == NULL) {
1823 res = -ENOMEM;
1824 goto out;
1825 }
1826 /* nvme ns identify */
1827 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
1828 res = nvme_trans_status_code(hdr, nvme_sc);
1829 if (res)
1830 goto out_dma;
1831 if (nvme_sc) {
1832 res = nvme_sc;
1833 goto out_dma;
1834 }
1835 id_ns = mem;
1836
1837 if (ns->mode_select_num_blocks == 0)
Vishal Verma8741ee42013-04-04 17:52:27 -06001838 ns->mode_select_num_blocks = le64_to_cpu(id_ns->ncap);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001839 if (ns->mode_select_block_len == 0) {
1840 flbas = (id_ns->flbas) & 0x0F;
1841 ns->mode_select_block_len =
1842 (1 << (id_ns->lbaf[flbas].ds));
1843 }
1844 out_dma:
Christoph Hellwige75ec752015-05-22 11:12:39 +02001845 dma_free_coherent(dev->dev, sizeof(struct nvme_id_ns),
Vishal Verma5d0f6132013-03-04 18:40:58 -07001846 mem, dma_addr);
1847 }
1848 out:
1849 return res;
1850}
1851
1852static int nvme_trans_fmt_get_parm_header(struct sg_io_hdr *hdr, u8 len,
1853 u8 format_prot_info, u8 *nvme_pf_code)
1854{
1855 int res = SNTI_TRANSLATION_SUCCESS;
1856 u8 *parm_list;
1857 u8 pf_usage, pf_code;
1858
1859 parm_list = kmalloc(len, GFP_KERNEL);
1860 if (parm_list == NULL) {
1861 res = -ENOMEM;
1862 goto out;
1863 }
1864 res = nvme_trans_copy_from_user(hdr, parm_list, len);
1865 if (res != SNTI_TRANSLATION_SUCCESS)
1866 goto out_mem;
1867
1868 if ((parm_list[FORMAT_UNIT_IMMED_OFFSET] &
1869 FORMAT_UNIT_IMMED_MASK) != 0) {
1870 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1871 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1872 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1873 goto out_mem;
1874 }
1875
1876 if (len == FORMAT_UNIT_LONG_PARM_LIST_LEN &&
1877 (parm_list[FORMAT_UNIT_PROT_INT_OFFSET] & 0x0F) != 0) {
1878 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1879 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1880 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1881 goto out_mem;
1882 }
1883 pf_usage = parm_list[FORMAT_UNIT_PROT_FIELD_USAGE_OFFSET] &
1884 FORMAT_UNIT_PROT_FIELD_USAGE_MASK;
1885 pf_code = (pf_usage << 2) | format_prot_info;
1886 switch (pf_code) {
1887 case 0:
1888 *nvme_pf_code = 0;
1889 break;
1890 case 2:
1891 *nvme_pf_code = 1;
1892 break;
1893 case 3:
1894 *nvme_pf_code = 2;
1895 break;
1896 case 7:
1897 *nvme_pf_code = 3;
1898 break;
1899 default:
1900 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1901 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1902 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1903 break;
1904 }
1905
1906 out_mem:
1907 kfree(parm_list);
1908 out:
1909 return res;
1910}
1911
1912static int nvme_trans_fmt_send_cmd(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1913 u8 prot_info)
1914{
1915 int res = SNTI_TRANSLATION_SUCCESS;
1916 int nvme_sc;
1917 struct nvme_dev *dev = ns->dev;
1918 dma_addr_t dma_addr;
1919 void *mem;
1920 struct nvme_id_ns *id_ns;
1921 u8 i;
1922 u8 flbas, nlbaf;
1923 u8 selected_lbaf = 0xFF;
1924 u32 cdw10 = 0;
1925 struct nvme_command c;
1926
1927 /* Loop thru LBAF's in id_ns to match reqd lbaf, put in cdw10 */
Christoph Hellwige75ec752015-05-22 11:12:39 +02001928 mem = dma_alloc_coherent(dev->dev, sizeof(struct nvme_id_ns),
Vishal Verma5d0f6132013-03-04 18:40:58 -07001929 &dma_addr, GFP_KERNEL);
1930 if (mem == NULL) {
1931 res = -ENOMEM;
1932 goto out;
1933 }
1934 /* nvme ns identify */
1935 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
1936 res = nvme_trans_status_code(hdr, nvme_sc);
1937 if (res)
1938 goto out_dma;
1939 if (nvme_sc) {
1940 res = nvme_sc;
1941 goto out_dma;
1942 }
1943 id_ns = mem;
1944 flbas = (id_ns->flbas) & 0x0F;
1945 nlbaf = id_ns->nlbaf;
1946
1947 for (i = 0; i < nlbaf; i++) {
1948 if (ns->mode_select_block_len == (1 << (id_ns->lbaf[i].ds))) {
1949 selected_lbaf = i;
1950 break;
1951 }
1952 }
1953 if (selected_lbaf > 0x0F) {
1954 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1955 ILLEGAL_REQUEST, SCSI_ASC_INVALID_PARAMETER,
1956 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1957 }
Vishal Verma8741ee42013-04-04 17:52:27 -06001958 if (ns->mode_select_num_blocks != le64_to_cpu(id_ns->ncap)) {
Vishal Verma5d0f6132013-03-04 18:40:58 -07001959 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1960 ILLEGAL_REQUEST, SCSI_ASC_INVALID_PARAMETER,
1961 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1962 }
1963
1964 cdw10 |= prot_info << 5;
1965 cdw10 |= selected_lbaf & 0x0F;
1966 memset(&c, 0, sizeof(c));
1967 c.format.opcode = nvme_admin_format_nvm;
Vishal Verma8741ee42013-04-04 17:52:27 -06001968 c.format.nsid = cpu_to_le32(ns->ns_id);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001969 c.format.cdw10 = cpu_to_le32(cdw10);
1970
Christoph Hellwigf705f832015-05-22 11:12:38 +02001971 nvme_sc = nvme_submit_sync_cmd(dev->admin_q, &c);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001972 res = nvme_trans_status_code(hdr, nvme_sc);
1973 if (res)
1974 goto out_dma;
1975 if (nvme_sc)
1976 res = nvme_sc;
1977
1978 out_dma:
Christoph Hellwige75ec752015-05-22 11:12:39 +02001979 dma_free_coherent(dev->dev, sizeof(struct nvme_id_ns), mem, dma_addr);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001980 out:
1981 return res;
1982}
1983
1984/* Read/Write Helper Functions */
1985
1986static inline void nvme_trans_get_io_cdb6(u8 *cmd,
1987 struct nvme_trans_io_cdb *cdb_info)
1988{
1989 cdb_info->fua = 0;
1990 cdb_info->prot_info = 0;
1991 cdb_info->lba = GET_U32_FROM_CDB(cmd, IO_6_CDB_LBA_OFFSET) &
1992 IO_6_CDB_LBA_MASK;
1993 cdb_info->xfer_len = GET_U8_FROM_CDB(cmd, IO_6_CDB_TX_LEN_OFFSET);
1994
1995 /* sbc3r27 sec 5.32 - TRANSFER LEN of 0 implies a 256 Block transfer */
1996 if (cdb_info->xfer_len == 0)
1997 cdb_info->xfer_len = IO_6_DEFAULT_TX_LEN;
1998}
1999
2000static inline void nvme_trans_get_io_cdb10(u8 *cmd,
2001 struct nvme_trans_io_cdb *cdb_info)
2002{
2003 cdb_info->fua = GET_U8_FROM_CDB(cmd, IO_10_CDB_FUA_OFFSET) &
2004 IO_CDB_FUA_MASK;
2005 cdb_info->prot_info = GET_U8_FROM_CDB(cmd, IO_10_CDB_WP_OFFSET) &
2006 IO_CDB_WP_MASK >> IO_CDB_WP_SHIFT;
2007 cdb_info->lba = GET_U32_FROM_CDB(cmd, IO_10_CDB_LBA_OFFSET);
2008 cdb_info->xfer_len = GET_U16_FROM_CDB(cmd, IO_10_CDB_TX_LEN_OFFSET);
2009}
2010
2011static inline void nvme_trans_get_io_cdb12(u8 *cmd,
2012 struct nvme_trans_io_cdb *cdb_info)
2013{
2014 cdb_info->fua = GET_U8_FROM_CDB(cmd, IO_12_CDB_FUA_OFFSET) &
2015 IO_CDB_FUA_MASK;
2016 cdb_info->prot_info = GET_U8_FROM_CDB(cmd, IO_12_CDB_WP_OFFSET) &
2017 IO_CDB_WP_MASK >> IO_CDB_WP_SHIFT;
2018 cdb_info->lba = GET_U32_FROM_CDB(cmd, IO_12_CDB_LBA_OFFSET);
2019 cdb_info->xfer_len = GET_U32_FROM_CDB(cmd, IO_12_CDB_TX_LEN_OFFSET);
2020}
2021
2022static inline void nvme_trans_get_io_cdb16(u8 *cmd,
2023 struct nvme_trans_io_cdb *cdb_info)
2024{
2025 cdb_info->fua = GET_U8_FROM_CDB(cmd, IO_16_CDB_FUA_OFFSET) &
2026 IO_CDB_FUA_MASK;
2027 cdb_info->prot_info = GET_U8_FROM_CDB(cmd, IO_16_CDB_WP_OFFSET) &
2028 IO_CDB_WP_MASK >> IO_CDB_WP_SHIFT;
2029 cdb_info->lba = GET_U64_FROM_CDB(cmd, IO_16_CDB_LBA_OFFSET);
2030 cdb_info->xfer_len = GET_U32_FROM_CDB(cmd, IO_16_CDB_TX_LEN_OFFSET);
2031}
2032
2033static inline u32 nvme_trans_io_get_num_cmds(struct sg_io_hdr *hdr,
2034 struct nvme_trans_io_cdb *cdb_info,
2035 u32 max_blocks)
2036{
2037 /* If using iovecs, send one nvme command per vector */
2038 if (hdr->iovec_count > 0)
2039 return hdr->iovec_count;
2040 else if (cdb_info->xfer_len > max_blocks)
2041 return ((cdb_info->xfer_len - 1) / max_blocks) + 1;
2042 else
2043 return 1;
2044}
2045
2046static u16 nvme_trans_io_get_control(struct nvme_ns *ns,
2047 struct nvme_trans_io_cdb *cdb_info)
2048{
2049 u16 control = 0;
2050
2051 /* When Protection information support is added, implement here */
2052
2053 if (cdb_info->fua > 0)
2054 control |= NVME_RW_FUA;
2055
2056 return control;
2057}
2058
2059static int nvme_trans_do_nvme_io(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2060 struct nvme_trans_io_cdb *cdb_info, u8 is_write)
2061{
2062 int res = SNTI_TRANSLATION_SUCCESS;
2063 int nvme_sc;
2064 struct nvme_dev *dev = ns->dev;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002065 u32 num_cmds;
2066 struct nvme_iod *iod;
2067 u64 unit_len;
2068 u64 unit_num_blocks; /* Number of blocks to xfer in each nvme cmd */
2069 u32 retcode;
2070 u32 i = 0;
2071 u64 nvme_offset = 0;
Vishal Verma8741ee42013-04-04 17:52:27 -06002072 void __user *next_mapping_addr;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002073 struct nvme_command c;
2074 u8 opcode = (is_write ? nvme_cmd_write : nvme_cmd_read);
2075 u16 control;
Keith Buschddcb7762014-03-24 10:03:56 -04002076 u32 max_blocks = queue_max_hw_sectors(ns->queue);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002077
2078 num_cmds = nvme_trans_io_get_num_cmds(hdr, cdb_info, max_blocks);
2079
2080 /*
2081 * This loop handles two cases.
2082 * First, when an SGL is used in the form of an iovec list:
2083 * - Use iov_base as the next mapping address for the nvme command_id
2084 * - Use iov_len as the data transfer length for the command.
2085 * Second, when we have a single buffer
2086 * - If larger than max_blocks, split into chunks, offset
2087 * each nvme command accordingly.
2088 */
2089 for (i = 0; i < num_cmds; i++) {
2090 memset(&c, 0, sizeof(c));
2091 if (hdr->iovec_count > 0) {
Vishal Verma8741ee42013-04-04 17:52:27 -06002092 struct sg_iovec sgl;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002093
Vishal Verma8741ee42013-04-04 17:52:27 -06002094 retcode = copy_from_user(&sgl, hdr->dxferp +
2095 i * sizeof(struct sg_iovec),
2096 sizeof(struct sg_iovec));
2097 if (retcode)
2098 return -EFAULT;
2099 unit_len = sgl.iov_len;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002100 unit_num_blocks = unit_len >> ns->lba_shift;
Vishal Verma8741ee42013-04-04 17:52:27 -06002101 next_mapping_addr = sgl.iov_base;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002102 } else {
2103 unit_num_blocks = min((u64)max_blocks,
2104 (cdb_info->xfer_len - nvme_offset));
2105 unit_len = unit_num_blocks << ns->lba_shift;
2106 next_mapping_addr = hdr->dxferp +
2107 ((1 << ns->lba_shift) * nvme_offset);
2108 }
2109
2110 c.rw.opcode = opcode;
2111 c.rw.nsid = cpu_to_le32(ns->ns_id);
2112 c.rw.slba = cpu_to_le64(cdb_info->lba + nvme_offset);
2113 c.rw.length = cpu_to_le16(unit_num_blocks - 1);
2114 control = nvme_trans_io_get_control(ns, cdb_info);
2115 c.rw.control = cpu_to_le16(control);
2116
2117 iod = nvme_map_user_pages(dev,
2118 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
2119 (unsigned long)next_mapping_addr, unit_len);
2120 if (IS_ERR(iod)) {
2121 res = PTR_ERR(iod);
2122 goto out;
2123 }
Keith Buschedd10d32014-04-03 16:45:23 -06002124 retcode = nvme_setup_prps(dev, iod, unit_len, GFP_KERNEL);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002125 if (retcode != unit_len) {
2126 nvme_unmap_user_pages(dev,
2127 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
2128 iod);
2129 nvme_free_iod(dev, iod);
2130 res = -ENOMEM;
2131 goto out;
2132 }
Keith Buschedd10d32014-04-03 16:45:23 -06002133 c.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
2134 c.rw.prp2 = cpu_to_le64(iod->first_dma);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002135
2136 nvme_offset += unit_num_blocks;
2137
Christoph Hellwigf705f832015-05-22 11:12:38 +02002138 nvme_sc = nvme_submit_sync_cmd(ns->queue, &c);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002139 if (nvme_sc != NVME_SC_SUCCESS) {
2140 nvme_unmap_user_pages(dev,
2141 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
2142 iod);
2143 nvme_free_iod(dev, iod);
2144 res = nvme_trans_status_code(hdr, nvme_sc);
2145 goto out;
2146 }
2147 nvme_unmap_user_pages(dev,
2148 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
2149 iod);
2150 nvme_free_iod(dev, iod);
2151 }
2152 res = nvme_trans_status_code(hdr, NVME_SC_SUCCESS);
2153
2154 out:
2155 return res;
2156}
2157
2158
2159/* SCSI Command Translation Functions */
2160
2161static int nvme_trans_io(struct nvme_ns *ns, struct sg_io_hdr *hdr, u8 is_write,
2162 u8 *cmd)
2163{
2164 int res = SNTI_TRANSLATION_SUCCESS;
2165 struct nvme_trans_io_cdb cdb_info;
2166 u8 opcode = cmd[0];
2167 u64 xfer_bytes;
2168 u64 sum_iov_len = 0;
Vishal Verma8741ee42013-04-04 17:52:27 -06002169 struct sg_iovec sgl;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002170 int i;
Vishal Verma8741ee42013-04-04 17:52:27 -06002171 size_t not_copied;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002172
2173 /* Extract Fields from CDB */
2174 switch (opcode) {
2175 case WRITE_6:
2176 case READ_6:
2177 nvme_trans_get_io_cdb6(cmd, &cdb_info);
2178 break;
2179 case WRITE_10:
2180 case READ_10:
2181 nvme_trans_get_io_cdb10(cmd, &cdb_info);
2182 break;
2183 case WRITE_12:
2184 case READ_12:
2185 nvme_trans_get_io_cdb12(cmd, &cdb_info);
2186 break;
2187 case WRITE_16:
2188 case READ_16:
2189 nvme_trans_get_io_cdb16(cmd, &cdb_info);
2190 break;
2191 default:
2192 /* Will never really reach here */
2193 res = SNTI_INTERNAL_ERROR;
2194 goto out;
2195 }
2196
2197 /* Calculate total length of transfer (in bytes) */
2198 if (hdr->iovec_count > 0) {
Vishal Verma5d0f6132013-03-04 18:40:58 -07002199 for (i = 0; i < hdr->iovec_count; i++) {
Vishal Verma8741ee42013-04-04 17:52:27 -06002200 not_copied = copy_from_user(&sgl, hdr->dxferp +
2201 i * sizeof(struct sg_iovec),
2202 sizeof(struct sg_iovec));
2203 if (not_copied)
2204 return -EFAULT;
2205 sum_iov_len += sgl.iov_len;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002206 /* IO vector sizes should be multiples of block size */
Vishal Verma8741ee42013-04-04 17:52:27 -06002207 if (sgl.iov_len % (1 << ns->lba_shift) != 0) {
Vishal Verma5d0f6132013-03-04 18:40:58 -07002208 res = nvme_trans_completion(hdr,
2209 SAM_STAT_CHECK_CONDITION,
2210 ILLEGAL_REQUEST,
2211 SCSI_ASC_INVALID_PARAMETER,
2212 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2213 goto out;
2214 }
2215 }
2216 } else {
2217 sum_iov_len = hdr->dxfer_len;
2218 }
2219
2220 /* As Per sg ioctl howto, if the lengths differ, use the lower one */
2221 xfer_bytes = min(((u64)hdr->dxfer_len), sum_iov_len);
2222
2223 /* If block count and actual data buffer size dont match, error out */
2224 if (xfer_bytes != (cdb_info.xfer_len << ns->lba_shift)) {
2225 res = -EINVAL;
2226 goto out;
2227 }
2228
2229 /* Check for 0 length transfer - it is not illegal */
2230 if (cdb_info.xfer_len == 0)
2231 goto out;
2232
2233 /* Send NVMe IO Command(s) */
2234 res = nvme_trans_do_nvme_io(ns, hdr, &cdb_info, is_write);
2235 if (res != SNTI_TRANSLATION_SUCCESS)
2236 goto out;
2237
2238 out:
2239 return res;
2240}
2241
2242static int nvme_trans_inquiry(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2243 u8 *cmd)
2244{
2245 int res = SNTI_TRANSLATION_SUCCESS;
2246 u8 evpd;
2247 u8 page_code;
2248 int alloc_len;
2249 u8 *inq_response;
2250
2251 evpd = GET_INQ_EVPD_BIT(cmd);
2252 page_code = GET_INQ_PAGE_CODE(cmd);
2253 alloc_len = GET_INQ_ALLOC_LENGTH(cmd);
2254
Keith Busch4f1982b2015-02-19 13:42:14 -07002255 inq_response = kmalloc(alloc_len, GFP_KERNEL);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002256 if (inq_response == NULL) {
2257 res = -ENOMEM;
2258 goto out_mem;
2259 }
2260
2261 if (evpd == 0) {
2262 if (page_code == INQ_STANDARD_INQUIRY_PAGE) {
2263 res = nvme_trans_standard_inquiry_page(ns, hdr,
2264 inq_response, alloc_len);
2265 } else {
2266 res = nvme_trans_completion(hdr,
2267 SAM_STAT_CHECK_CONDITION,
2268 ILLEGAL_REQUEST,
2269 SCSI_ASC_INVALID_CDB,
2270 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2271 }
2272 } else {
2273 switch (page_code) {
2274 case VPD_SUPPORTED_PAGES:
2275 res = nvme_trans_supported_vpd_pages(ns, hdr,
2276 inq_response, alloc_len);
2277 break;
2278 case VPD_SERIAL_NUMBER:
2279 res = nvme_trans_unit_serial_page(ns, hdr, inq_response,
2280 alloc_len);
2281 break;
2282 case VPD_DEVICE_IDENTIFIERS:
2283 res = nvme_trans_device_id_page(ns, hdr, inq_response,
2284 alloc_len);
2285 break;
2286 case VPD_EXTENDED_INQUIRY:
2287 res = nvme_trans_ext_inq_page(ns, hdr, alloc_len);
2288 break;
Keith Busch7f749d92015-04-07 15:34:18 -06002289 case VPD_BLOCK_LIMITS:
2290 res = nvme_trans_bdev_limits_page(ns, hdr, inq_response,
2291 alloc_len);
2292 break;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002293 case VPD_BLOCK_DEV_CHARACTERISTICS:
2294 res = nvme_trans_bdev_char_page(ns, hdr, alloc_len);
2295 break;
2296 default:
2297 res = nvme_trans_completion(hdr,
2298 SAM_STAT_CHECK_CONDITION,
2299 ILLEGAL_REQUEST,
2300 SCSI_ASC_INVALID_CDB,
2301 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2302 break;
2303 }
2304 }
2305 kfree(inq_response);
2306 out_mem:
2307 return res;
2308}
2309
2310static int nvme_trans_log_sense(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2311 u8 *cmd)
2312{
2313 int res = SNTI_TRANSLATION_SUCCESS;
2314 u16 alloc_len;
2315 u8 sp;
2316 u8 pc;
2317 u8 page_code;
2318
2319 sp = GET_U8_FROM_CDB(cmd, LOG_SENSE_CDB_SP_OFFSET);
2320 if (sp != LOG_SENSE_CDB_SP_NOT_ENABLED) {
2321 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2322 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2323 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2324 goto out;
2325 }
2326 pc = GET_U8_FROM_CDB(cmd, LOG_SENSE_CDB_PC_OFFSET);
2327 page_code = pc & LOG_SENSE_CDB_PAGE_CODE_MASK;
2328 pc = (pc & LOG_SENSE_CDB_PC_MASK) >> LOG_SENSE_CDB_PC_SHIFT;
2329 if (pc != LOG_SENSE_CDB_PC_CUMULATIVE_VALUES) {
2330 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2331 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2332 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2333 goto out;
2334 }
2335 alloc_len = GET_U16_FROM_CDB(cmd, LOG_SENSE_CDB_ALLOC_LENGTH_OFFSET);
2336 switch (page_code) {
2337 case LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE:
2338 res = nvme_trans_log_supp_pages(ns, hdr, alloc_len);
2339 break;
2340 case LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE:
2341 res = nvme_trans_log_info_exceptions(ns, hdr, alloc_len);
2342 break;
2343 case LOG_PAGE_TEMPERATURE_PAGE:
2344 res = nvme_trans_log_temperature(ns, hdr, alloc_len);
2345 break;
2346 default:
2347 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2348 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2349 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2350 break;
2351 }
2352
2353 out:
2354 return res;
2355}
2356
2357static int nvme_trans_mode_select(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2358 u8 *cmd)
2359{
2360 int res = SNTI_TRANSLATION_SUCCESS;
2361 u8 cdb10 = 0;
2362 u16 parm_list_len;
2363 u8 page_format;
2364 u8 save_pages;
2365
2366 page_format = GET_U8_FROM_CDB(cmd, MODE_SELECT_CDB_PAGE_FORMAT_OFFSET);
2367 page_format &= MODE_SELECT_CDB_PAGE_FORMAT_MASK;
2368
2369 save_pages = GET_U8_FROM_CDB(cmd, MODE_SELECT_CDB_SAVE_PAGES_OFFSET);
2370 save_pages &= MODE_SELECT_CDB_SAVE_PAGES_MASK;
2371
2372 if (GET_OPCODE(cmd) == MODE_SELECT) {
2373 parm_list_len = GET_U8_FROM_CDB(cmd,
2374 MODE_SELECT_6_CDB_PARAM_LIST_LENGTH_OFFSET);
2375 } else {
2376 parm_list_len = GET_U16_FROM_CDB(cmd,
2377 MODE_SELECT_10_CDB_PARAM_LIST_LENGTH_OFFSET);
2378 cdb10 = 1;
2379 }
2380
2381 if (parm_list_len != 0) {
2382 /*
2383 * According to SPC-4 r24, a paramter list length field of 0
2384 * shall not be considered an error
2385 */
2386 res = nvme_trans_modesel_data(ns, hdr, cmd, parm_list_len,
2387 page_format, save_pages, cdb10);
2388 }
2389
2390 return res;
2391}
2392
2393static int nvme_trans_mode_sense(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2394 u8 *cmd)
2395{
2396 int res = SNTI_TRANSLATION_SUCCESS;
2397 u16 alloc_len;
2398 u8 cdb10 = 0;
2399 u8 page_code;
2400 u8 pc;
2401
2402 if (GET_OPCODE(cmd) == MODE_SENSE) {
2403 alloc_len = GET_U8_FROM_CDB(cmd, MODE_SENSE6_ALLOC_LEN_OFFSET);
2404 } else {
2405 alloc_len = GET_U16_FROM_CDB(cmd,
2406 MODE_SENSE10_ALLOC_LEN_OFFSET);
2407 cdb10 = 1;
2408 }
2409
2410 pc = GET_U8_FROM_CDB(cmd, MODE_SENSE_PAGE_CONTROL_OFFSET) &
2411 MODE_SENSE_PAGE_CONTROL_MASK;
2412 if (pc != MODE_SENSE_PC_CURRENT_VALUES) {
2413 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2414 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2415 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2416 goto out;
2417 }
2418
2419 page_code = GET_U8_FROM_CDB(cmd, MODE_SENSE_PAGE_CODE_OFFSET) &
2420 MODE_SENSE_PAGE_CODE_MASK;
2421 switch (page_code) {
2422 case MODE_PAGE_CACHING:
2423 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2424 cdb10,
2425 &nvme_trans_fill_caching_page,
2426 MODE_PAGE_CACHING_LEN);
2427 break;
2428 case MODE_PAGE_CONTROL:
2429 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2430 cdb10,
2431 &nvme_trans_fill_control_page,
2432 MODE_PAGE_CONTROL_LEN);
2433 break;
2434 case MODE_PAGE_POWER_CONDITION:
2435 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2436 cdb10,
2437 &nvme_trans_fill_pow_cnd_page,
2438 MODE_PAGE_POW_CND_LEN);
2439 break;
2440 case MODE_PAGE_INFO_EXCEP:
2441 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2442 cdb10,
2443 &nvme_trans_fill_inf_exc_page,
2444 MODE_PAGE_INF_EXC_LEN);
2445 break;
2446 case MODE_PAGE_RETURN_ALL:
2447 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2448 cdb10,
2449 &nvme_trans_fill_all_pages,
2450 MODE_PAGE_ALL_LEN);
2451 break;
2452 default:
2453 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2454 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2455 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2456 break;
2457 }
2458
2459 out:
2460 return res;
2461}
2462
2463static int nvme_trans_read_capacity(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2464 u8 *cmd)
2465{
2466 int res = SNTI_TRANSLATION_SUCCESS;
2467 int nvme_sc;
2468 u32 alloc_len = READ_CAP_10_RESP_SIZE;
2469 u32 resp_size = READ_CAP_10_RESP_SIZE;
2470 u32 xfer_len;
2471 u8 cdb16;
2472 struct nvme_dev *dev = ns->dev;
2473 dma_addr_t dma_addr;
2474 void *mem;
2475 struct nvme_id_ns *id_ns;
2476 u8 *response;
2477
2478 cdb16 = IS_READ_CAP_16(cmd);
2479 if (cdb16) {
2480 alloc_len = GET_READ_CAP_16_ALLOC_LENGTH(cmd);
2481 resp_size = READ_CAP_16_RESP_SIZE;
2482 }
2483
Christoph Hellwige75ec752015-05-22 11:12:39 +02002484 mem = dma_alloc_coherent(dev->dev, sizeof(struct nvme_id_ns),
Vishal Verma5d0f6132013-03-04 18:40:58 -07002485 &dma_addr, GFP_KERNEL);
2486 if (mem == NULL) {
2487 res = -ENOMEM;
2488 goto out;
2489 }
2490 /* nvme ns identify */
2491 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
2492 res = nvme_trans_status_code(hdr, nvme_sc);
2493 if (res)
2494 goto out_dma;
2495 if (nvme_sc) {
2496 res = nvme_sc;
2497 goto out_dma;
2498 }
2499 id_ns = mem;
2500
Tushar Behera03ea83e2013-06-10 10:20:55 +05302501 response = kzalloc(resp_size, GFP_KERNEL);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002502 if (response == NULL) {
2503 res = -ENOMEM;
2504 goto out_dma;
2505 }
Vishal Verma5d0f6132013-03-04 18:40:58 -07002506 nvme_trans_fill_read_cap(response, id_ns, cdb16);
2507
2508 xfer_len = min(alloc_len, resp_size);
2509 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
2510
2511 kfree(response);
2512 out_dma:
Christoph Hellwige75ec752015-05-22 11:12:39 +02002513 dma_free_coherent(dev->dev, sizeof(struct nvme_id_ns), mem, dma_addr);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002514 out:
2515 return res;
2516}
2517
2518static int nvme_trans_report_luns(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2519 u8 *cmd)
2520{
2521 int res = SNTI_TRANSLATION_SUCCESS;
2522 int nvme_sc;
2523 u32 alloc_len, xfer_len, resp_size;
2524 u8 select_report;
2525 u8 *response;
2526 struct nvme_dev *dev = ns->dev;
2527 dma_addr_t dma_addr;
2528 void *mem;
2529 struct nvme_id_ctrl *id_ctrl;
2530 u32 ll_length, lun_id;
2531 u8 lun_id_offset = REPORT_LUNS_FIRST_LUN_OFFSET;
Vishal Verma8741ee42013-04-04 17:52:27 -06002532 __be32 tmp_len;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002533
2534 alloc_len = GET_REPORT_LUNS_ALLOC_LENGTH(cmd);
2535 select_report = GET_U8_FROM_CDB(cmd, REPORT_LUNS_SR_OFFSET);
2536
2537 if ((select_report != ALL_LUNS_RETURNED) &&
2538 (select_report != ALL_WELL_KNOWN_LUNS_RETURNED) &&
2539 (select_report != RESTRICTED_LUNS_RETURNED)) {
2540 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2541 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2542 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2543 goto out;
2544 } else {
2545 /* NVMe Controller Identify */
Christoph Hellwige75ec752015-05-22 11:12:39 +02002546 mem = dma_alloc_coherent(dev->dev, sizeof(struct nvme_id_ctrl),
Vishal Verma5d0f6132013-03-04 18:40:58 -07002547 &dma_addr, GFP_KERNEL);
2548 if (mem == NULL) {
2549 res = -ENOMEM;
2550 goto out;
2551 }
2552 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
2553 res = nvme_trans_status_code(hdr, nvme_sc);
2554 if (res)
2555 goto out_dma;
2556 if (nvme_sc) {
2557 res = nvme_sc;
2558 goto out_dma;
2559 }
2560 id_ctrl = mem;
Vishal Verma8741ee42013-04-04 17:52:27 -06002561 ll_length = le32_to_cpu(id_ctrl->nn) * LUN_ENTRY_SIZE;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002562 resp_size = ll_length + LUN_DATA_HEADER_SIZE;
2563
2564 if (alloc_len < resp_size) {
2565 res = nvme_trans_completion(hdr,
2566 SAM_STAT_CHECK_CONDITION,
2567 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2568 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2569 goto out_dma;
2570 }
2571
Tushar Behera03ea83e2013-06-10 10:20:55 +05302572 response = kzalloc(resp_size, GFP_KERNEL);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002573 if (response == NULL) {
2574 res = -ENOMEM;
2575 goto out_dma;
2576 }
Vishal Verma5d0f6132013-03-04 18:40:58 -07002577
2578 /* The first LUN ID will always be 0 per the SAM spec */
Vishal Verma8741ee42013-04-04 17:52:27 -06002579 for (lun_id = 0; lun_id < le32_to_cpu(id_ctrl->nn); lun_id++) {
Vishal Verma5d0f6132013-03-04 18:40:58 -07002580 /*
2581 * Set the LUN Id and then increment to the next LUN
2582 * location in the parameter data.
2583 */
Vishal Verma8741ee42013-04-04 17:52:27 -06002584 __be64 tmp_id = cpu_to_be64(lun_id);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002585 memcpy(&response[lun_id_offset], &tmp_id, sizeof(u64));
2586 lun_id_offset += LUN_ENTRY_SIZE;
2587 }
2588 tmp_len = cpu_to_be32(ll_length);
2589 memcpy(response, &tmp_len, sizeof(u32));
2590 }
2591
2592 xfer_len = min(alloc_len, resp_size);
2593 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
2594
2595 kfree(response);
2596 out_dma:
Christoph Hellwige75ec752015-05-22 11:12:39 +02002597 dma_free_coherent(dev->dev, sizeof(struct nvme_id_ctrl), mem, dma_addr);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002598 out:
2599 return res;
2600}
2601
2602static int nvme_trans_request_sense(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2603 u8 *cmd)
2604{
2605 int res = SNTI_TRANSLATION_SUCCESS;
2606 u8 alloc_len, xfer_len, resp_size;
2607 u8 desc_format;
2608 u8 *response;
2609
2610 alloc_len = GET_REQUEST_SENSE_ALLOC_LENGTH(cmd);
2611 desc_format = GET_U8_FROM_CDB(cmd, REQUEST_SENSE_DESC_OFFSET);
2612 desc_format &= REQUEST_SENSE_DESC_MASK;
2613
2614 resp_size = ((desc_format) ? (DESC_FMT_SENSE_DATA_SIZE) :
2615 (FIXED_FMT_SENSE_DATA_SIZE));
Tushar Behera03ea83e2013-06-10 10:20:55 +05302616 response = kzalloc(resp_size, GFP_KERNEL);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002617 if (response == NULL) {
2618 res = -ENOMEM;
2619 goto out;
2620 }
Vishal Verma5d0f6132013-03-04 18:40:58 -07002621
2622 if (desc_format == DESCRIPTOR_FORMAT_SENSE_DATA_TYPE) {
2623 /* Descriptor Format Sense Data */
2624 response[0] = DESC_FORMAT_SENSE_DATA;
2625 response[1] = NO_SENSE;
2626 /* TODO How is LOW POWER CONDITION ON handled? (byte 2) */
2627 response[2] = SCSI_ASC_NO_SENSE;
2628 response[3] = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
2629 /* SDAT_OVFL = 0 | Additional Sense Length = 0 */
2630 } else {
2631 /* Fixed Format Sense Data */
2632 response[0] = FIXED_SENSE_DATA;
2633 /* Byte 1 = Obsolete */
2634 response[2] = NO_SENSE; /* FM, EOM, ILI, SDAT_OVFL = 0 */
2635 /* Bytes 3-6 - Information - set to zero */
2636 response[7] = FIXED_SENSE_DATA_ADD_LENGTH;
2637 /* Bytes 8-11 - Cmd Specific Information - set to zero */
2638 response[12] = SCSI_ASC_NO_SENSE;
2639 response[13] = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
2640 /* Byte 14 = Field Replaceable Unit Code = 0 */
2641 /* Bytes 15-17 - SKSV=0; Sense Key Specific = 0 */
2642 }
2643
2644 xfer_len = min(alloc_len, resp_size);
2645 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
2646
2647 kfree(response);
2648 out:
2649 return res;
2650}
2651
2652static int nvme_trans_security_protocol(struct nvme_ns *ns,
2653 struct sg_io_hdr *hdr,
2654 u8 *cmd)
2655{
2656 return nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2657 ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_COMMAND,
2658 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2659}
2660
2661static int nvme_trans_start_stop(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2662 u8 *cmd)
2663{
2664 int res = SNTI_TRANSLATION_SUCCESS;
2665 int nvme_sc;
Keith Busch14385de2013-04-25 14:39:27 -06002666 struct nvme_command c;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002667 u8 immed, pcmod, pc, no_flush, start;
2668
2669 immed = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_IMMED_OFFSET);
2670 pcmod = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_POWER_COND_MOD_OFFSET);
2671 pc = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_POWER_COND_OFFSET);
2672 no_flush = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_NO_FLUSH_OFFSET);
2673 start = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_START_OFFSET);
2674
2675 immed &= START_STOP_UNIT_CDB_IMMED_MASK;
2676 pcmod &= START_STOP_UNIT_CDB_POWER_COND_MOD_MASK;
2677 pc = (pc & START_STOP_UNIT_CDB_POWER_COND_MASK) >> NIBBLE_SHIFT;
2678 no_flush &= START_STOP_UNIT_CDB_NO_FLUSH_MASK;
2679 start &= START_STOP_UNIT_CDB_START_MASK;
2680
2681 if (immed != 0) {
2682 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2683 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2684 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2685 } else {
2686 if (no_flush == 0) {
2687 /* Issue NVME FLUSH command prior to START STOP UNIT */
Keith Busch14385de2013-04-25 14:39:27 -06002688 memset(&c, 0, sizeof(c));
2689 c.common.opcode = nvme_cmd_flush;
2690 c.common.nsid = cpu_to_le32(ns->ns_id);
2691
Christoph Hellwigf705f832015-05-22 11:12:38 +02002692 nvme_sc = nvme_submit_sync_cmd(ns->queue, &c);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002693 res = nvme_trans_status_code(hdr, nvme_sc);
2694 if (res)
2695 goto out;
2696 if (nvme_sc) {
2697 res = nvme_sc;
2698 goto out;
2699 }
2700 }
2701 /* Setup the expected power state transition */
2702 res = nvme_trans_power_state(ns, hdr, pc, pcmod, start);
2703 }
2704
2705 out:
2706 return res;
2707}
2708
2709static int nvme_trans_synchronize_cache(struct nvme_ns *ns,
2710 struct sg_io_hdr *hdr, u8 *cmd)
2711{
2712 int res = SNTI_TRANSLATION_SUCCESS;
2713 int nvme_sc;
Keith Busch14385de2013-04-25 14:39:27 -06002714 struct nvme_command c;
Keith Busch14385de2013-04-25 14:39:27 -06002715
2716 memset(&c, 0, sizeof(c));
2717 c.common.opcode = nvme_cmd_flush;
2718 c.common.nsid = cpu_to_le32(ns->ns_id);
2719
Christoph Hellwigf705f832015-05-22 11:12:38 +02002720 nvme_sc = nvme_submit_sync_cmd(ns->queue, &c);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002721 res = nvme_trans_status_code(hdr, nvme_sc);
2722 if (res)
2723 goto out;
2724 if (nvme_sc)
2725 res = nvme_sc;
2726
2727 out:
2728 return res;
2729}
2730
2731static int nvme_trans_format_unit(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2732 u8 *cmd)
2733{
2734 int res = SNTI_TRANSLATION_SUCCESS;
2735 u8 parm_hdr_len = 0;
2736 u8 nvme_pf_code = 0;
2737 u8 format_prot_info, long_list, format_data;
2738
2739 format_prot_info = GET_U8_FROM_CDB(cmd,
2740 FORMAT_UNIT_CDB_FORMAT_PROT_INFO_OFFSET);
2741 long_list = GET_U8_FROM_CDB(cmd, FORMAT_UNIT_CDB_LONG_LIST_OFFSET);
2742 format_data = GET_U8_FROM_CDB(cmd, FORMAT_UNIT_CDB_FORMAT_DATA_OFFSET);
2743
2744 format_prot_info = (format_prot_info &
2745 FORMAT_UNIT_CDB_FORMAT_PROT_INFO_MASK) >>
2746 FORMAT_UNIT_CDB_FORMAT_PROT_INFO_SHIFT;
2747 long_list &= FORMAT_UNIT_CDB_LONG_LIST_MASK;
2748 format_data &= FORMAT_UNIT_CDB_FORMAT_DATA_MASK;
2749
2750 if (format_data != 0) {
2751 if (format_prot_info != 0) {
2752 if (long_list == 0)
2753 parm_hdr_len = FORMAT_UNIT_SHORT_PARM_LIST_LEN;
2754 else
2755 parm_hdr_len = FORMAT_UNIT_LONG_PARM_LIST_LEN;
2756 }
2757 } else if (format_data == 0 && format_prot_info != 0) {
2758 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2759 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2760 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2761 goto out;
2762 }
2763
2764 /* Get parm header from data-in/out buffer */
2765 /*
2766 * According to the translation spec, the only fields in the parameter
2767 * list we are concerned with are in the header. So allocate only that.
2768 */
2769 if (parm_hdr_len > 0) {
2770 res = nvme_trans_fmt_get_parm_header(hdr, parm_hdr_len,
2771 format_prot_info, &nvme_pf_code);
2772 if (res != SNTI_TRANSLATION_SUCCESS)
2773 goto out;
2774 }
2775
2776 /* Attempt to activate any previously downloaded firmware image */
Christoph Hellwigb90c48d2015-05-22 11:12:40 +02002777 res = nvme_trans_send_activate_fw_cmd(ns, hdr, 0);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002778
2779 /* Determine Block size and count and send format command */
2780 res = nvme_trans_fmt_set_blk_size_count(ns, hdr);
2781 if (res != SNTI_TRANSLATION_SUCCESS)
2782 goto out;
2783
2784 res = nvme_trans_fmt_send_cmd(ns, hdr, nvme_pf_code);
2785
2786 out:
2787 return res;
2788}
2789
2790static int nvme_trans_test_unit_ready(struct nvme_ns *ns,
2791 struct sg_io_hdr *hdr,
2792 u8 *cmd)
2793{
2794 int res = SNTI_TRANSLATION_SUCCESS;
2795 struct nvme_dev *dev = ns->dev;
2796
2797 if (!(readl(&dev->bar->csts) & NVME_CSTS_RDY))
2798 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2799 NOT_READY, SCSI_ASC_LUN_NOT_READY,
2800 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2801 else
2802 res = nvme_trans_completion(hdr, SAM_STAT_GOOD, NO_SENSE, 0, 0);
2803
2804 return res;
2805}
2806
2807static int nvme_trans_write_buffer(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2808 u8 *cmd)
2809{
2810 int res = SNTI_TRANSLATION_SUCCESS;
2811 u32 buffer_offset, parm_list_length;
2812 u8 buffer_id, mode;
2813
2814 parm_list_length =
2815 GET_U24_FROM_CDB(cmd, WRITE_BUFFER_CDB_PARM_LIST_LENGTH_OFFSET);
2816 if (parm_list_length % BYTES_TO_DWORDS != 0) {
2817 /* NVMe expects Firmware file to be a whole number of DWORDS */
2818 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2819 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2820 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2821 goto out;
2822 }
2823 buffer_id = GET_U8_FROM_CDB(cmd, WRITE_BUFFER_CDB_BUFFER_ID_OFFSET);
2824 if (buffer_id > NVME_MAX_FIRMWARE_SLOT) {
2825 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2826 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2827 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2828 goto out;
2829 }
2830 mode = GET_U8_FROM_CDB(cmd, WRITE_BUFFER_CDB_MODE_OFFSET) &
2831 WRITE_BUFFER_CDB_MODE_MASK;
2832 buffer_offset =
2833 GET_U24_FROM_CDB(cmd, WRITE_BUFFER_CDB_BUFFER_OFFSET_OFFSET);
2834
2835 switch (mode) {
2836 case DOWNLOAD_SAVE_ACTIVATE:
Christoph Hellwigb90c48d2015-05-22 11:12:40 +02002837 res = nvme_trans_send_download_fw_cmd(ns, hdr, nvme_admin_download_fw,
Vishal Verma5d0f6132013-03-04 18:40:58 -07002838 parm_list_length, buffer_offset,
2839 buffer_id);
2840 if (res != SNTI_TRANSLATION_SUCCESS)
2841 goto out;
Christoph Hellwigb90c48d2015-05-22 11:12:40 +02002842 res = nvme_trans_send_activate_fw_cmd(ns, hdr, buffer_id);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002843 break;
2844 case DOWNLOAD_SAVE_DEFER_ACTIVATE:
Christoph Hellwigb90c48d2015-05-22 11:12:40 +02002845 res = nvme_trans_send_download_fw_cmd(ns, hdr, nvme_admin_download_fw,
Vishal Verma5d0f6132013-03-04 18:40:58 -07002846 parm_list_length, buffer_offset,
2847 buffer_id);
2848 break;
2849 case ACTIVATE_DEFERRED_MICROCODE:
Christoph Hellwigb90c48d2015-05-22 11:12:40 +02002850 res = nvme_trans_send_activate_fw_cmd(ns, hdr, buffer_id);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002851 break;
2852 default:
2853 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2854 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2855 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2856 break;
2857 }
2858
2859 out:
2860 return res;
2861}
2862
Keith Buschec503732013-04-24 15:44:24 -06002863struct scsi_unmap_blk_desc {
2864 __be64 slba;
2865 __be32 nlb;
2866 u32 resv;
2867};
2868
2869struct scsi_unmap_parm_list {
2870 __be16 unmap_data_len;
2871 __be16 unmap_blk_desc_data_len;
2872 u32 resv;
2873 struct scsi_unmap_blk_desc desc[0];
2874};
2875
2876static int nvme_trans_unmap(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2877 u8 *cmd)
2878{
2879 struct nvme_dev *dev = ns->dev;
2880 struct scsi_unmap_parm_list *plist;
2881 struct nvme_dsm_range *range;
Keith Buschec503732013-04-24 15:44:24 -06002882 struct nvme_command c;
2883 int i, nvme_sc, res = -ENOMEM;
2884 u16 ndesc, list_len;
2885 dma_addr_t dma_addr;
2886
2887 list_len = GET_U16_FROM_CDB(cmd, UNMAP_CDB_PARAM_LIST_LENGTH_OFFSET);
2888 if (!list_len)
2889 return -EINVAL;
2890
2891 plist = kmalloc(list_len, GFP_KERNEL);
2892 if (!plist)
2893 return -ENOMEM;
2894
2895 res = nvme_trans_copy_from_user(hdr, plist, list_len);
2896 if (res != SNTI_TRANSLATION_SUCCESS)
2897 goto out;
2898
2899 ndesc = be16_to_cpu(plist->unmap_blk_desc_data_len) >> 4;
2900 if (!ndesc || ndesc > 256) {
2901 res = -EINVAL;
2902 goto out;
2903 }
2904
Christoph Hellwige75ec752015-05-22 11:12:39 +02002905 range = dma_alloc_coherent(dev->dev, ndesc * sizeof(*range),
Keith Buschec503732013-04-24 15:44:24 -06002906 &dma_addr, GFP_KERNEL);
2907 if (!range)
2908 goto out;
2909
2910 for (i = 0; i < ndesc; i++) {
2911 range[i].nlb = cpu_to_le32(be32_to_cpu(plist->desc[i].nlb));
2912 range[i].slba = cpu_to_le64(be64_to_cpu(plist->desc[i].slba));
2913 range[i].cattr = 0;
2914 }
2915
2916 memset(&c, 0, sizeof(c));
2917 c.dsm.opcode = nvme_cmd_dsm;
2918 c.dsm.nsid = cpu_to_le32(ns->ns_id);
2919 c.dsm.prp1 = cpu_to_le64(dma_addr);
2920 c.dsm.nr = cpu_to_le32(ndesc - 1);
2921 c.dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
2922
Christoph Hellwigf705f832015-05-22 11:12:38 +02002923 nvme_sc = nvme_submit_sync_cmd(ns->queue, &c);
Keith Buschec503732013-04-24 15:44:24 -06002924 res = nvme_trans_status_code(hdr, nvme_sc);
2925
Christoph Hellwige75ec752015-05-22 11:12:39 +02002926 dma_free_coherent(dev->dev, ndesc * sizeof(*range), range, dma_addr);
Keith Buschec503732013-04-24 15:44:24 -06002927 out:
2928 kfree(plist);
2929 return res;
2930}
2931
Vishal Verma5d0f6132013-03-04 18:40:58 -07002932static int nvme_scsi_translate(struct nvme_ns *ns, struct sg_io_hdr *hdr)
2933{
2934 u8 cmd[BLK_MAX_CDB];
2935 int retcode;
2936 unsigned int opcode;
2937
2938 if (hdr->cmdp == NULL)
2939 return -EMSGSIZE;
2940 if (copy_from_user(cmd, hdr->cmdp, hdr->cmd_len))
2941 return -EFAULT;
2942
Keith Busch695a4fe2014-08-27 13:55:39 -06002943 /*
2944 * Prime the hdr with good status for scsi commands that don't require
2945 * an nvme command for translation.
2946 */
2947 retcode = nvme_trans_status_code(hdr, NVME_SC_SUCCESS);
2948 if (retcode)
2949 return retcode;
2950
Vishal Verma5d0f6132013-03-04 18:40:58 -07002951 opcode = cmd[0];
2952
2953 switch (opcode) {
2954 case READ_6:
2955 case READ_10:
2956 case READ_12:
2957 case READ_16:
2958 retcode = nvme_trans_io(ns, hdr, 0, cmd);
2959 break;
2960 case WRITE_6:
2961 case WRITE_10:
2962 case WRITE_12:
2963 case WRITE_16:
2964 retcode = nvme_trans_io(ns, hdr, 1, cmd);
2965 break;
2966 case INQUIRY:
2967 retcode = nvme_trans_inquiry(ns, hdr, cmd);
2968 break;
2969 case LOG_SENSE:
2970 retcode = nvme_trans_log_sense(ns, hdr, cmd);
2971 break;
2972 case MODE_SELECT:
2973 case MODE_SELECT_10:
2974 retcode = nvme_trans_mode_select(ns, hdr, cmd);
2975 break;
2976 case MODE_SENSE:
2977 case MODE_SENSE_10:
2978 retcode = nvme_trans_mode_sense(ns, hdr, cmd);
2979 break;
2980 case READ_CAPACITY:
2981 retcode = nvme_trans_read_capacity(ns, hdr, cmd);
2982 break;
Hannes Reineckeeb846d92014-11-17 14:25:19 +01002983 case SERVICE_ACTION_IN_16:
Vishal Verma5d0f6132013-03-04 18:40:58 -07002984 if (IS_READ_CAP_16(cmd))
2985 retcode = nvme_trans_read_capacity(ns, hdr, cmd);
2986 else
2987 goto out;
2988 break;
2989 case REPORT_LUNS:
2990 retcode = nvme_trans_report_luns(ns, hdr, cmd);
2991 break;
2992 case REQUEST_SENSE:
2993 retcode = nvme_trans_request_sense(ns, hdr, cmd);
2994 break;
2995 case SECURITY_PROTOCOL_IN:
2996 case SECURITY_PROTOCOL_OUT:
2997 retcode = nvme_trans_security_protocol(ns, hdr, cmd);
2998 break;
2999 case START_STOP:
3000 retcode = nvme_trans_start_stop(ns, hdr, cmd);
3001 break;
3002 case SYNCHRONIZE_CACHE:
3003 retcode = nvme_trans_synchronize_cache(ns, hdr, cmd);
3004 break;
3005 case FORMAT_UNIT:
3006 retcode = nvme_trans_format_unit(ns, hdr, cmd);
3007 break;
3008 case TEST_UNIT_READY:
3009 retcode = nvme_trans_test_unit_ready(ns, hdr, cmd);
3010 break;
3011 case WRITE_BUFFER:
3012 retcode = nvme_trans_write_buffer(ns, hdr, cmd);
3013 break;
Keith Buschec503732013-04-24 15:44:24 -06003014 case UNMAP:
3015 retcode = nvme_trans_unmap(ns, hdr, cmd);
3016 break;
Vishal Verma5d0f6132013-03-04 18:40:58 -07003017 default:
3018 out:
3019 retcode = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
3020 ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_COMMAND,
3021 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
3022 break;
3023 }
3024 return retcode;
3025}
3026
3027int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr)
3028{
3029 struct sg_io_hdr hdr;
3030 int retcode;
3031
3032 if (!capable(CAP_SYS_ADMIN))
3033 return -EACCES;
3034 if (copy_from_user(&hdr, u_hdr, sizeof(hdr)))
3035 return -EFAULT;
3036 if (hdr.interface_id != 'S')
3037 return -EINVAL;
3038 if (hdr.cmd_len > BLK_MAX_CDB)
3039 return -EINVAL;
3040
3041 retcode = nvme_scsi_translate(ns, &hdr);
3042 if (retcode < 0)
3043 return retcode;
3044 if (retcode > 0)
3045 retcode = SNTI_TRANSLATION_SUCCESS;
Vishal Verma8741ee42013-04-04 17:52:27 -06003046 if (copy_to_user(u_hdr, &hdr, sizeof(sg_io_hdr_t)) > 0)
Vishal Verma5d0f6132013-03-04 18:40:58 -07003047 return -EFAULT;
3048
3049 return retcode;
3050}
3051
Vishal Verma5d0f6132013-03-04 18:40:58 -07003052int nvme_sg_get_version_num(int __user *ip)
3053{
3054 return put_user(sg_version_num, ip);
3055}