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Shawn Guobf985962010-12-20 22:57:43 +08001/*
2 * Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH,
3 * <armlinux@phytec.de>
4 * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
18 * MA 02110-1301, USA.
19 */
20
21#ifndef __MACH_MXS_IOMUX_H__
22#define __MACH_MXS_IOMUX_H__
23
24/*
25 * IOMUX/PAD Bit field definitions
26 *
27 * PAD_BANK: 0..2 (3)
28 * PAD_PIN: 3..7 (5)
29 * PAD_MUXSEL: 8..9 (2)
30 * PAD_MA: 10..11 (2)
31 * PAD_MA_VALID: 12 (1)
32 * PAD_VOL: 13 (1)
33 * PAD_VOL_VALID: 14 (1)
34 * PAD_PULL: 15 (1)
35 * PAD_PULL_VALID: 16 (1)
36 * RESERVED: 17..31 (15)
37 */
38typedef u32 iomux_cfg_t;
39
40#define MXS_PAD_BANK_SHIFT 0
41#define MXS_PAD_BANK_MASK ((iomux_cfg_t)0x7 << MXS_PAD_BANK_SHIFT)
42#define MXS_PAD_PIN_SHIFT 3
43#define MXS_PAD_PIN_MASK ((iomux_cfg_t)0x1f << MXS_PAD_PIN_SHIFT)
44#define MXS_PAD_MUXSEL_SHIFT 8
45#define MXS_PAD_MUXSEL_MASK ((iomux_cfg_t)0x3 << MXS_PAD_MUXSEL_SHIFT)
46#define MXS_PAD_MA_SHIFT 10
47#define MXS_PAD_MA_MASK ((iomux_cfg_t)0x3 << MXS_PAD_MA_SHIFT)
48#define MXS_PAD_MA_VALID_SHIFT 12
49#define MXS_PAD_MA_VALID_MASK ((iomux_cfg_t)0x1 << MXS_PAD_MA_VALID_SHIFT)
50#define MXS_PAD_VOL_SHIFT 13
51#define MXS_PAD_VOL_MASK ((iomux_cfg_t)0x1 << MXS_PAD_VOL_SHIFT)
52#define MXS_PAD_VOL_VALID_SHIFT 14
53#define MXS_PAD_VOL_VALID_MASK ((iomux_cfg_t)0x1 << MXS_PAD_VOL_VALID_SHIFT)
54#define MXS_PAD_PULL_SHIFT 15
55#define MXS_PAD_PULL_MASK ((iomux_cfg_t)0x1 << MXS_PAD_PULL_SHIFT)
56#define MXS_PAD_PULL_VALID_SHIFT 16
57#define MXS_PAD_PULL_VALID_MASK ((iomux_cfg_t)0x1 << MXS_PAD_PULL_VALID_SHIFT)
58
59#define PAD_MUXSEL_0 0
60#define PAD_MUXSEL_1 1
61#define PAD_MUXSEL_2 2
62#define PAD_MUXSEL_GPIO 3
63
64#define PAD_4MA 0
65#define PAD_8MA 1
66#define PAD_12MA 2
67#define PAD_16MA 3
68
69#define PAD_1V8 0
70#define PAD_3V3 1
71
72#define PAD_NOPULL 0
73#define PAD_PULLUP 1
74
75#define MXS_PAD_4MA ((PAD_4MA << MXS_PAD_MA_SHIFT) | \
76 MXS_PAD_MA_VALID_MASK)
77#define MXS_PAD_8MA ((PAD_8MA << MXS_PAD_MA_SHIFT) | \
78 MXS_PAD_MA_VALID_MASK)
79#define MXS_PAD_12MA ((PAD_12MA << MXS_PAD_MA_SHIFT) | \
80 MXS_PAD_MA_VALID_MASK)
81#define MXS_PAD_16MA ((PAD_16MA << MXS_PAD_MA_SHIFT) | \
82 MXS_PAD_MA_VALID_MASK)
83
84#define MXS_PAD_1V8 ((PAD_1V8 << MXS_PAD_VOL_SHIFT) | \
85 MXS_PAD_VOL_VALID_MASK)
86#define MXS_PAD_3V3 ((PAD_3V3 << MXS_PAD_VOL_SHIFT) | \
87 MXS_PAD_VOL_VALID_MASK)
88
89#define MXS_PAD_NOPULL ((PAD_NOPULL << MXS_PAD_PULL_SHIFT) | \
90 MXS_PAD_PULL_VALID_MASK)
91#define MXS_PAD_PULLUP ((PAD_PULLUP << MXS_PAD_PULL_SHIFT) | \
92 MXS_PAD_PULL_VALID_MASK)
93
94#define MXS_IOMUX_PAD(_bank, _pin, _muxsel, _ma, _vol, _pull) \
95 (((iomux_cfg_t)(_bank) << MXS_PAD_BANK_SHIFT) | \
96 ((iomux_cfg_t)(_pin) << MXS_PAD_PIN_SHIFT) | \
97 ((iomux_cfg_t)(_muxsel) << MXS_PAD_MUXSEL_SHIFT) | \
98 ((iomux_cfg_t)(_ma) << MXS_PAD_MA_SHIFT) | \
99 ((iomux_cfg_t)(_vol) << MXS_PAD_VOL_SHIFT) | \
100 ((iomux_cfg_t)(_pull) << MXS_PAD_PULL_SHIFT))
101
102/*
103 * A pad becomes naked, when none of mA, vol or pull
104 * validity bits is set.
105 */
106#define MXS_IOMUX_PAD_NAKED(_bank, _pin, _muxsel) \
107 MXS_IOMUX_PAD(_bank, _pin, _muxsel, 0, 0, 0)
108
109static inline unsigned int PAD_BANK(iomux_cfg_t pad)
110{
111 return (pad & MXS_PAD_BANK_MASK) >> MXS_PAD_BANK_SHIFT;
112}
113
114static inline unsigned int PAD_PIN(iomux_cfg_t pad)
115{
116 return (pad & MXS_PAD_PIN_MASK) >> MXS_PAD_PIN_SHIFT;
117}
118
119static inline unsigned int PAD_MUXSEL(iomux_cfg_t pad)
120{
121 return (pad & MXS_PAD_MUXSEL_MASK) >> MXS_PAD_MUXSEL_SHIFT;
122}
123
124static inline unsigned int PAD_MA(iomux_cfg_t pad)
125{
126 return (pad & MXS_PAD_MA_MASK) >> MXS_PAD_MA_SHIFT;
127}
128
129static inline unsigned int PAD_MA_VALID(iomux_cfg_t pad)
130{
131 return (pad & MXS_PAD_MA_VALID_MASK) >> MXS_PAD_MA_VALID_SHIFT;
132}
133
134static inline unsigned int PAD_VOL(iomux_cfg_t pad)
135{
136 return (pad & MXS_PAD_VOL_MASK) >> MXS_PAD_VOL_SHIFT;
137}
138
139static inline unsigned int PAD_VOL_VALID(iomux_cfg_t pad)
140{
141 return (pad & MXS_PAD_VOL_VALID_MASK) >> MXS_PAD_VOL_VALID_SHIFT;
142}
143
144static inline unsigned int PAD_PULL(iomux_cfg_t pad)
145{
146 return (pad & MXS_PAD_PULL_MASK) >> MXS_PAD_PULL_SHIFT;
147}
148
149static inline unsigned int PAD_PULL_VALID(iomux_cfg_t pad)
150{
151 return (pad & MXS_PAD_PULL_VALID_MASK) >> MXS_PAD_PULL_VALID_SHIFT;
152}
153
154/*
155 * configures a single pad in the iomuxer
156 */
157int mxs_iomux_setup_pad(iomux_cfg_t pad);
158
159/*
160 * configures multiple pads
161 * convenient way to call the above function with tables
162 */
163int mxs_iomux_setup_multiple_pads(const iomux_cfg_t *pad_list, unsigned count);
164
165#endif /* __MACH_MXS_IOMUX_H__*/