| Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 1 | /* |
| 2 | * arch/arm/mach-mv78xx0/include/mach/irqs.h |
| 3 | * |
| 4 | * IRQ definitions for Marvell MV78xx0 SoCs |
| 5 | * |
| 6 | * This file is licensed under the terms of the GNU General Public |
| 7 | * License version 2. This program is licensed "as is" without any |
| 8 | * warranty of any kind, whether express or implied. |
| 9 | */ |
| 10 | |
| 11 | #ifndef __ASM_ARCH_IRQS_H |
| 12 | #define __ASM_ARCH_IRQS_H |
| 13 | |
| Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 14 | /* |
| 15 | * MV78xx0 Low Interrupt Controller |
| 16 | */ |
| 17 | #define IRQ_MV78XX0_ERR 0 |
| 18 | #define IRQ_MV78XX0_SPI 1 |
| 19 | #define IRQ_MV78XX0_I2C_0 2 |
| 20 | #define IRQ_MV78XX0_I2C_1 3 |
| 21 | #define IRQ_MV78XX0_IDMA_0 4 |
| 22 | #define IRQ_MV78XX0_IDMA_1 5 |
| 23 | #define IRQ_MV78XX0_IDMA_2 6 |
| 24 | #define IRQ_MV78XX0_IDMA_3 7 |
| 25 | #define IRQ_MV78XX0_TIMER_0 8 |
| 26 | #define IRQ_MV78XX0_TIMER_1 9 |
| 27 | #define IRQ_MV78XX0_TIMER_2 10 |
| 28 | #define IRQ_MV78XX0_TIMER_3 11 |
| 29 | #define IRQ_MV78XX0_UART_0 12 |
| 30 | #define IRQ_MV78XX0_UART_1 13 |
| 31 | #define IRQ_MV78XX0_UART_2 14 |
| 32 | #define IRQ_MV78XX0_UART_3 15 |
| 33 | #define IRQ_MV78XX0_USB_0 16 |
| 34 | #define IRQ_MV78XX0_USB_1 17 |
| 35 | #define IRQ_MV78XX0_USB_2 18 |
| 36 | #define IRQ_MV78XX0_CRYPTO 19 |
| 37 | #define IRQ_MV78XX0_SDIO_0 20 |
| 38 | #define IRQ_MV78XX0_SDIO_1 21 |
| 39 | #define IRQ_MV78XX0_XOR_0 22 |
| 40 | #define IRQ_MV78XX0_XOR_1 23 |
| 41 | #define IRQ_MV78XX0_I2S_0 24 |
| 42 | #define IRQ_MV78XX0_I2S_1 25 |
| 43 | #define IRQ_MV78XX0_SATA 26 |
| 44 | #define IRQ_MV78XX0_TDMI 27 |
| 45 | |
| 46 | /* |
| 47 | * MV78xx0 High Interrupt Controller |
| 48 | */ |
| 49 | #define IRQ_MV78XX0_PCIE_00 32 |
| 50 | #define IRQ_MV78XX0_PCIE_01 33 |
| 51 | #define IRQ_MV78XX0_PCIE_02 34 |
| 52 | #define IRQ_MV78XX0_PCIE_03 35 |
| 53 | #define IRQ_MV78XX0_PCIE_10 36 |
| 54 | #define IRQ_MV78XX0_PCIE_11 37 |
| 55 | #define IRQ_MV78XX0_PCIE_12 38 |
| 56 | #define IRQ_MV78XX0_PCIE_13 39 |
| 57 | #define IRQ_MV78XX0_GE00_SUM 40 |
| 58 | #define IRQ_MV78XX0_GE00_RX 41 |
| 59 | #define IRQ_MV78XX0_GE00_TX 42 |
| 60 | #define IRQ_MV78XX0_GE00_MISC 43 |
| 61 | #define IRQ_MV78XX0_GE01_SUM 44 |
| 62 | #define IRQ_MV78XX0_GE01_RX 45 |
| 63 | #define IRQ_MV78XX0_GE01_TX 46 |
| 64 | #define IRQ_MV78XX0_GE01_MISC 47 |
| 65 | #define IRQ_MV78XX0_GE10_SUM 48 |
| 66 | #define IRQ_MV78XX0_GE10_RX 49 |
| 67 | #define IRQ_MV78XX0_GE10_TX 50 |
| 68 | #define IRQ_MV78XX0_GE10_MISC 51 |
| 69 | #define IRQ_MV78XX0_GE11_SUM 52 |
| 70 | #define IRQ_MV78XX0_GE11_RX 53 |
| 71 | #define IRQ_MV78XX0_GE11_TX 54 |
| 72 | #define IRQ_MV78XX0_GE11_MISC 55 |
| 73 | #define IRQ_MV78XX0_GPIO_0_7 56 |
| 74 | #define IRQ_MV78XX0_GPIO_8_15 57 |
| 75 | #define IRQ_MV78XX0_GPIO_16_23 58 |
| 76 | #define IRQ_MV78XX0_GPIO_24_31 59 |
| 77 | #define IRQ_MV78XX0_DB_IN 60 |
| 78 | #define IRQ_MV78XX0_DB_OUT 61 |
| 79 | |
| 80 | /* |
| Lennert Buytenhek | 1f8081f | 2008-08-26 16:04:05 +0200 | [diff] [blame] | 81 | * MV78xx0 Error Interrupt Controller |
| 82 | */ |
| 83 | #define IRQ_MV78XX0_GE_ERR 70 |
| 84 | |
| 85 | /* |
| Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 86 | * MV78XX0 General Purpose Pins |
| 87 | */ |
| Lennert Buytenhek | 1f8081f | 2008-08-26 16:04:05 +0200 | [diff] [blame] | 88 | #define IRQ_MV78XX0_GPIO_START 96 |
| Lennert Buytenhek | b95a13d | 2008-10-20 01:51:04 +0200 | [diff] [blame^] | 89 | #define NR_GPIO_IRQS 32 |
| Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 90 | |
| 91 | #define NR_IRQS (IRQ_MV78XX0_GPIO_START + NR_GPIO_IRQS) |
| 92 | |
| 93 | |
| 94 | #endif |