AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1 | /* |
| 2 | * QTI CE device driver. |
| 3 | * |
| 4 | * Copyright (c) 2010-2017, The Linux Foundation. All rights reserved. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 and |
| 8 | * only version 2 as published by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | */ |
| 15 | #include <linux/mman.h> |
| 16 | #include <linux/types.h> |
| 17 | #include <linux/platform_device.h> |
| 18 | #include <linux/dma-mapping.h> |
| 19 | #include <linux/kernel.h> |
| 20 | #include <linux/dmapool.h> |
| 21 | #include <linux/interrupt.h> |
| 22 | #include <linux/spinlock.h> |
| 23 | #include <linux/init.h> |
| 24 | #include <linux/module.h> |
| 25 | #include <linux/fs.h> |
| 26 | #include <linux/miscdevice.h> |
| 27 | #include <linux/uaccess.h> |
| 28 | #include <linux/debugfs.h> |
| 29 | #include <linux/scatterlist.h> |
| 30 | #include <linux/crypto.h> |
| 31 | #include <linux/platform_data/qcom_crypto_device.h> |
| 32 | #include <linux/msm-bus.h> |
| 33 | #include <linux/qcedev.h> |
| 34 | |
| 35 | #include <crypto/hash.h> |
| 36 | #include "qcedevi.h" |
| 37 | #include "qce.h" |
| 38 | |
| 39 | #include <linux/compat.h> |
| 40 | #include "compat_qcedev.h" |
| 41 | |
| 42 | #define CACHE_LINE_SIZE 32 |
| 43 | #define CE_SHA_BLOCK_SIZE SHA256_BLOCK_SIZE |
| 44 | |
| 45 | static uint8_t _std_init_vector_sha1_uint8[] = { |
| 46 | 0x67, 0x45, 0x23, 0x01, 0xEF, 0xCD, 0xAB, 0x89, |
| 47 | 0x98, 0xBA, 0xDC, 0xFE, 0x10, 0x32, 0x54, 0x76, |
| 48 | 0xC3, 0xD2, 0xE1, 0xF0 |
| 49 | }; |
| 50 | /* standard initialization vector for SHA-256, source: FIPS 180-2 */ |
| 51 | static uint8_t _std_init_vector_sha256_uint8[] = { |
| 52 | 0x6A, 0x09, 0xE6, 0x67, 0xBB, 0x67, 0xAE, 0x85, |
| 53 | 0x3C, 0x6E, 0xF3, 0x72, 0xA5, 0x4F, 0xF5, 0x3A, |
| 54 | 0x51, 0x0E, 0x52, 0x7F, 0x9B, 0x05, 0x68, 0x8C, |
| 55 | 0x1F, 0x83, 0xD9, 0xAB, 0x5B, 0xE0, 0xCD, 0x19 |
| 56 | }; |
| 57 | |
| 58 | static DEFINE_MUTEX(send_cmd_lock); |
| 59 | static DEFINE_MUTEX(qcedev_sent_bw_req); |
AnilKumar Chimata | b9805a3 | 2017-03-13 16:13:47 +0530 | [diff] [blame^] | 60 | static DEFINE_MUTEX(hash_access_lock); |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 61 | |
AnilKumar Chimata | e5e6051 | 2017-05-03 14:06:59 -0700 | [diff] [blame] | 62 | static int qcedev_control_clocks(struct qcedev_control *podev, bool enable) |
| 63 | { |
| 64 | unsigned int control_flag; |
| 65 | int ret = 0; |
| 66 | |
| 67 | if (podev->ce_support.req_bw_before_clk) { |
| 68 | if (enable) |
| 69 | control_flag = QCE_BW_REQUEST_FIRST; |
| 70 | else |
| 71 | control_flag = QCE_CLK_DISABLE_FIRST; |
| 72 | } else { |
| 73 | if (enable) |
| 74 | control_flag = QCE_CLK_ENABLE_FIRST; |
| 75 | else |
| 76 | control_flag = QCE_BW_REQUEST_RESET_FIRST; |
| 77 | } |
| 78 | |
| 79 | switch (control_flag) { |
| 80 | case QCE_CLK_ENABLE_FIRST: |
| 81 | ret = qce_enable_clk(podev->qce); |
| 82 | if (ret) { |
| 83 | pr_err("%s Unable enable clk\n", __func__); |
| 84 | return ret; |
| 85 | } |
| 86 | ret = msm_bus_scale_client_update_request( |
| 87 | podev->bus_scale_handle, 1); |
| 88 | if (ret) { |
| 89 | pr_err("%s Unable to set high bw\n", __func__); |
| 90 | ret = qce_disable_clk(podev->qce); |
| 91 | if (ret) |
| 92 | pr_err("%s Unable disable clk\n", __func__); |
| 93 | return ret; |
| 94 | } |
| 95 | break; |
| 96 | case QCE_BW_REQUEST_FIRST: |
| 97 | ret = msm_bus_scale_client_update_request( |
| 98 | podev->bus_scale_handle, 1); |
| 99 | if (ret) { |
| 100 | pr_err("%s Unable to set high bw\n", __func__); |
| 101 | return ret; |
| 102 | } |
| 103 | ret = qce_enable_clk(podev->qce); |
| 104 | if (ret) { |
| 105 | pr_err("%s Unable enable clk\n", __func__); |
| 106 | ret = msm_bus_scale_client_update_request( |
| 107 | podev->bus_scale_handle, 0); |
| 108 | if (ret) |
| 109 | pr_err("%s Unable to set low bw\n", __func__); |
| 110 | return ret; |
| 111 | } |
| 112 | break; |
| 113 | case QCE_CLK_DISABLE_FIRST: |
| 114 | ret = qce_disable_clk(podev->qce); |
| 115 | if (ret) { |
| 116 | pr_err("%s Unable to disable clk\n", __func__); |
| 117 | return ret; |
| 118 | } |
| 119 | ret = msm_bus_scale_client_update_request( |
| 120 | podev->bus_scale_handle, 0); |
| 121 | if (ret) { |
| 122 | pr_err("%s Unable to set low bw\n", __func__); |
| 123 | ret = qce_enable_clk(podev->qce); |
| 124 | if (ret) |
| 125 | pr_err("%s Unable enable clk\n", __func__); |
| 126 | return ret; |
| 127 | } |
| 128 | break; |
| 129 | case QCE_BW_REQUEST_RESET_FIRST: |
| 130 | ret = msm_bus_scale_client_update_request( |
| 131 | podev->bus_scale_handle, 0); |
| 132 | if (ret) { |
| 133 | pr_err("%s Unable to set low bw\n", __func__); |
| 134 | return ret; |
| 135 | } |
| 136 | ret = qce_disable_clk(podev->qce); |
| 137 | if (ret) { |
| 138 | pr_err("%s Unable to disable clk\n", __func__); |
| 139 | ret = msm_bus_scale_client_update_request( |
| 140 | podev->bus_scale_handle, 1); |
| 141 | if (ret) |
| 142 | pr_err("%s Unable to set high bw\n", __func__); |
| 143 | return ret; |
| 144 | } |
| 145 | break; |
| 146 | default: |
| 147 | return -ENOENT; |
| 148 | } |
| 149 | |
| 150 | return 0; |
| 151 | } |
| 152 | |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 153 | static void qcedev_ce_high_bw_req(struct qcedev_control *podev, |
| 154 | bool high_bw_req) |
| 155 | { |
| 156 | int ret = 0; |
| 157 | |
| 158 | mutex_lock(&qcedev_sent_bw_req); |
| 159 | if (high_bw_req) { |
| 160 | if (podev->high_bw_req_count == 0) { |
AnilKumar Chimata | e5e6051 | 2017-05-03 14:06:59 -0700 | [diff] [blame] | 161 | ret = qcedev_control_clocks(podev, true); |
| 162 | if (ret) |
| 163 | goto exit_unlock_mutex; |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 164 | } |
| 165 | podev->high_bw_req_count++; |
| 166 | } else { |
| 167 | if (podev->high_bw_req_count == 1) { |
AnilKumar Chimata | e5e6051 | 2017-05-03 14:06:59 -0700 | [diff] [blame] | 168 | ret = qcedev_control_clocks(podev, false); |
| 169 | if (ret) |
| 170 | goto exit_unlock_mutex; |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 171 | } |
| 172 | podev->high_bw_req_count--; |
| 173 | } |
AnilKumar Chimata | e5e6051 | 2017-05-03 14:06:59 -0700 | [diff] [blame] | 174 | |
| 175 | exit_unlock_mutex: |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 176 | mutex_unlock(&qcedev_sent_bw_req); |
| 177 | } |
| 178 | |
| 179 | #define QCEDEV_MAGIC 0x56434544 /* "qced" */ |
| 180 | |
| 181 | static int qcedev_open(struct inode *inode, struct file *file); |
| 182 | static int qcedev_release(struct inode *inode, struct file *file); |
| 183 | static int start_cipher_req(struct qcedev_control *podev); |
| 184 | static int start_sha_req(struct qcedev_control *podev); |
| 185 | static inline long qcedev_ioctl(struct file *file, |
| 186 | unsigned int cmd, unsigned long arg); |
| 187 | |
| 188 | #ifdef CONFIG_COMPAT |
| 189 | #include "compat_qcedev.c" |
| 190 | #else |
| 191 | #define compat_qcedev_ioctl NULL |
| 192 | #endif |
| 193 | |
| 194 | static const struct file_operations qcedev_fops = { |
| 195 | .owner = THIS_MODULE, |
| 196 | .unlocked_ioctl = qcedev_ioctl, |
| 197 | .compat_ioctl = compat_qcedev_ioctl, |
| 198 | .open = qcedev_open, |
| 199 | .release = qcedev_release, |
| 200 | }; |
| 201 | |
| 202 | static struct qcedev_control qce_dev[] = { |
| 203 | { |
| 204 | .miscdevice = { |
| 205 | .minor = MISC_DYNAMIC_MINOR, |
| 206 | .name = "qce", |
| 207 | .fops = &qcedev_fops, |
| 208 | }, |
| 209 | .magic = QCEDEV_MAGIC, |
| 210 | }, |
| 211 | }; |
| 212 | |
| 213 | #define MAX_QCE_DEVICE ARRAY_SIZE(qce_dev) |
| 214 | #define DEBUG_MAX_FNAME 16 |
| 215 | #define DEBUG_MAX_RW_BUF 1024 |
| 216 | |
| 217 | struct qcedev_stat { |
| 218 | u32 qcedev_dec_success; |
| 219 | u32 qcedev_dec_fail; |
| 220 | u32 qcedev_enc_success; |
| 221 | u32 qcedev_enc_fail; |
| 222 | u32 qcedev_sha_success; |
| 223 | u32 qcedev_sha_fail; |
| 224 | }; |
| 225 | |
| 226 | static struct qcedev_stat _qcedev_stat; |
| 227 | static struct dentry *_debug_dent; |
| 228 | static char _debug_read_buf[DEBUG_MAX_RW_BUF]; |
| 229 | static int _debug_qcedev; |
| 230 | |
| 231 | static struct qcedev_control *qcedev_minor_to_control(unsigned int n) |
| 232 | { |
| 233 | int i; |
| 234 | |
| 235 | for (i = 0; i < MAX_QCE_DEVICE; i++) { |
| 236 | if (qce_dev[i].miscdevice.minor == n) |
| 237 | return &qce_dev[i]; |
| 238 | } |
| 239 | return NULL; |
| 240 | } |
| 241 | |
| 242 | static int qcedev_open(struct inode *inode, struct file *file) |
| 243 | { |
| 244 | struct qcedev_handle *handle; |
| 245 | struct qcedev_control *podev; |
| 246 | |
| 247 | podev = qcedev_minor_to_control(MINOR(inode->i_rdev)); |
| 248 | if (podev == NULL) { |
| 249 | pr_err("%s: no such device %d\n", __func__, |
| 250 | MINOR(inode->i_rdev)); |
| 251 | return -ENOENT; |
| 252 | } |
| 253 | |
| 254 | handle = kzalloc(sizeof(struct qcedev_handle), GFP_KERNEL); |
| 255 | if (handle == NULL) |
| 256 | return -ENOMEM; |
| 257 | |
| 258 | handle->cntl = podev; |
| 259 | file->private_data = handle; |
| 260 | if (podev->platform_support.bus_scale_table != NULL) |
| 261 | qcedev_ce_high_bw_req(podev, true); |
| 262 | return 0; |
| 263 | } |
| 264 | |
| 265 | static int qcedev_release(struct inode *inode, struct file *file) |
| 266 | { |
| 267 | struct qcedev_control *podev; |
| 268 | struct qcedev_handle *handle; |
| 269 | |
| 270 | handle = file->private_data; |
| 271 | podev = handle->cntl; |
| 272 | if (podev != NULL && podev->magic != QCEDEV_MAGIC) { |
| 273 | pr_err("%s: invalid handle %p\n", |
| 274 | __func__, podev); |
| 275 | } |
| 276 | kzfree(handle); |
| 277 | file->private_data = NULL; |
| 278 | if (podev != NULL && podev->platform_support.bus_scale_table != NULL) |
| 279 | qcedev_ce_high_bw_req(podev, false); |
| 280 | return 0; |
| 281 | } |
| 282 | |
| 283 | static void req_done(unsigned long data) |
| 284 | { |
| 285 | struct qcedev_control *podev = (struct qcedev_control *)data; |
| 286 | struct qcedev_async_req *areq; |
| 287 | unsigned long flags = 0; |
| 288 | struct qcedev_async_req *new_req = NULL; |
| 289 | int ret = 0; |
| 290 | |
| 291 | spin_lock_irqsave(&podev->lock, flags); |
| 292 | areq = podev->active_command; |
| 293 | podev->active_command = NULL; |
| 294 | |
| 295 | again: |
| 296 | if (!list_empty(&podev->ready_commands)) { |
| 297 | new_req = container_of(podev->ready_commands.next, |
| 298 | struct qcedev_async_req, list); |
| 299 | list_del(&new_req->list); |
| 300 | podev->active_command = new_req; |
| 301 | new_req->err = 0; |
| 302 | if (new_req->op_type == QCEDEV_CRYPTO_OPER_CIPHER) |
| 303 | ret = start_cipher_req(podev); |
| 304 | else |
| 305 | ret = start_sha_req(podev); |
| 306 | } |
| 307 | |
| 308 | spin_unlock_irqrestore(&podev->lock, flags); |
| 309 | |
| 310 | if (areq) |
| 311 | complete(&areq->complete); |
| 312 | |
| 313 | if (new_req && ret) { |
| 314 | complete(&new_req->complete); |
| 315 | spin_lock_irqsave(&podev->lock, flags); |
| 316 | podev->active_command = NULL; |
| 317 | areq = NULL; |
| 318 | ret = 0; |
| 319 | new_req = NULL; |
| 320 | goto again; |
| 321 | } |
| 322 | } |
| 323 | |
| 324 | void qcedev_sha_req_cb(void *cookie, unsigned char *digest, |
| 325 | unsigned char *authdata, int ret) |
| 326 | { |
| 327 | struct qcedev_sha_req *areq; |
| 328 | struct qcedev_control *pdev; |
| 329 | struct qcedev_handle *handle; |
| 330 | |
| 331 | uint32_t *auth32 = (uint32_t *)authdata; |
| 332 | |
| 333 | areq = (struct qcedev_sha_req *) cookie; |
| 334 | handle = (struct qcedev_handle *) areq->cookie; |
| 335 | pdev = handle->cntl; |
| 336 | |
| 337 | if (digest) |
| 338 | memcpy(&handle->sha_ctxt.digest[0], digest, 32); |
| 339 | |
| 340 | if (authdata) { |
| 341 | handle->sha_ctxt.auth_data[0] = auth32[0]; |
| 342 | handle->sha_ctxt.auth_data[1] = auth32[1]; |
| 343 | handle->sha_ctxt.auth_data[2] = auth32[2]; |
| 344 | handle->sha_ctxt.auth_data[3] = auth32[3]; |
| 345 | } |
| 346 | |
| 347 | tasklet_schedule(&pdev->done_tasklet); |
| 348 | }; |
| 349 | |
| 350 | |
| 351 | void qcedev_cipher_req_cb(void *cookie, unsigned char *icv, |
| 352 | unsigned char *iv, int ret) |
| 353 | { |
| 354 | struct qcedev_cipher_req *areq; |
| 355 | struct qcedev_handle *handle; |
| 356 | struct qcedev_control *podev; |
| 357 | struct qcedev_async_req *qcedev_areq; |
| 358 | |
| 359 | areq = (struct qcedev_cipher_req *) cookie; |
| 360 | handle = (struct qcedev_handle *) areq->cookie; |
| 361 | podev = handle->cntl; |
| 362 | qcedev_areq = podev->active_command; |
| 363 | |
| 364 | if (iv) |
| 365 | memcpy(&qcedev_areq->cipher_op_req.iv[0], iv, |
| 366 | qcedev_areq->cipher_op_req.ivlen); |
| 367 | tasklet_schedule(&podev->done_tasklet); |
| 368 | }; |
| 369 | |
| 370 | static int start_cipher_req(struct qcedev_control *podev) |
| 371 | { |
| 372 | struct qcedev_async_req *qcedev_areq; |
| 373 | struct qce_req creq; |
| 374 | int ret = 0; |
| 375 | |
| 376 | /* start the command on the podev->active_command */ |
| 377 | qcedev_areq = podev->active_command; |
| 378 | qcedev_areq->cipher_req.cookie = qcedev_areq->handle; |
| 379 | if (qcedev_areq->cipher_op_req.use_pmem == QCEDEV_USE_PMEM) { |
| 380 | pr_err("%s: Use of PMEM is not supported\n", __func__); |
| 381 | goto unsupported; |
| 382 | } |
| 383 | creq.pmem = NULL; |
| 384 | switch (qcedev_areq->cipher_op_req.alg) { |
| 385 | case QCEDEV_ALG_DES: |
| 386 | creq.alg = CIPHER_ALG_DES; |
| 387 | break; |
| 388 | case QCEDEV_ALG_3DES: |
| 389 | creq.alg = CIPHER_ALG_3DES; |
| 390 | break; |
| 391 | case QCEDEV_ALG_AES: |
| 392 | creq.alg = CIPHER_ALG_AES; |
| 393 | break; |
| 394 | default: |
| 395 | return -EINVAL; |
| 396 | }; |
| 397 | |
| 398 | switch (qcedev_areq->cipher_op_req.mode) { |
| 399 | case QCEDEV_AES_MODE_CBC: |
| 400 | case QCEDEV_DES_MODE_CBC: |
| 401 | creq.mode = QCE_MODE_CBC; |
| 402 | break; |
| 403 | case QCEDEV_AES_MODE_ECB: |
| 404 | case QCEDEV_DES_MODE_ECB: |
| 405 | creq.mode = QCE_MODE_ECB; |
| 406 | break; |
| 407 | case QCEDEV_AES_MODE_CTR: |
| 408 | creq.mode = QCE_MODE_CTR; |
| 409 | break; |
| 410 | case QCEDEV_AES_MODE_XTS: |
| 411 | creq.mode = QCE_MODE_XTS; |
| 412 | break; |
| 413 | default: |
| 414 | return -EINVAL; |
| 415 | }; |
| 416 | |
| 417 | if ((creq.alg == CIPHER_ALG_AES) && |
| 418 | (creq.mode == QCE_MODE_CTR)) { |
| 419 | creq.dir = QCE_ENCRYPT; |
| 420 | } else { |
| 421 | if (qcedev_areq->cipher_op_req.op == QCEDEV_OPER_ENC) |
| 422 | creq.dir = QCE_ENCRYPT; |
| 423 | else |
| 424 | creq.dir = QCE_DECRYPT; |
| 425 | } |
| 426 | |
| 427 | creq.iv = &qcedev_areq->cipher_op_req.iv[0]; |
| 428 | creq.ivsize = qcedev_areq->cipher_op_req.ivlen; |
| 429 | |
| 430 | creq.enckey = &qcedev_areq->cipher_op_req.enckey[0]; |
| 431 | creq.encklen = qcedev_areq->cipher_op_req.encklen; |
| 432 | |
| 433 | creq.cryptlen = qcedev_areq->cipher_op_req.data_len; |
| 434 | |
| 435 | if (qcedev_areq->cipher_op_req.encklen == 0) { |
| 436 | if ((qcedev_areq->cipher_op_req.op == QCEDEV_OPER_ENC_NO_KEY) |
| 437 | || (qcedev_areq->cipher_op_req.op == |
| 438 | QCEDEV_OPER_DEC_NO_KEY)) |
| 439 | creq.op = QCE_REQ_ABLK_CIPHER_NO_KEY; |
| 440 | else { |
| 441 | int i; |
| 442 | |
| 443 | for (i = 0; i < QCEDEV_MAX_KEY_SIZE; i++) { |
| 444 | if (qcedev_areq->cipher_op_req.enckey[i] != 0) |
| 445 | break; |
| 446 | } |
| 447 | |
| 448 | if ((podev->platform_support.hw_key_support == 1) && |
| 449 | (i == QCEDEV_MAX_KEY_SIZE)) |
| 450 | creq.op = QCE_REQ_ABLK_CIPHER; |
| 451 | else { |
| 452 | ret = -EINVAL; |
| 453 | goto unsupported; |
| 454 | } |
| 455 | } |
| 456 | } else { |
| 457 | creq.op = QCE_REQ_ABLK_CIPHER; |
| 458 | } |
| 459 | |
| 460 | creq.qce_cb = qcedev_cipher_req_cb; |
| 461 | creq.areq = (void *)&qcedev_areq->cipher_req; |
| 462 | creq.flags = 0; |
| 463 | ret = qce_ablk_cipher_req(podev->qce, &creq); |
| 464 | unsupported: |
| 465 | if (ret) |
| 466 | qcedev_areq->err = -ENXIO; |
| 467 | else |
| 468 | qcedev_areq->err = 0; |
| 469 | return ret; |
| 470 | }; |
| 471 | |
| 472 | static int start_sha_req(struct qcedev_control *podev) |
| 473 | { |
| 474 | struct qcedev_async_req *qcedev_areq; |
| 475 | struct qce_sha_req sreq; |
| 476 | int ret = 0; |
| 477 | struct qcedev_handle *handle; |
| 478 | |
| 479 | /* start the command on the podev->active_command */ |
| 480 | qcedev_areq = podev->active_command; |
| 481 | handle = qcedev_areq->handle; |
| 482 | |
| 483 | switch (qcedev_areq->sha_op_req.alg) { |
| 484 | case QCEDEV_ALG_SHA1: |
| 485 | sreq.alg = QCE_HASH_SHA1; |
| 486 | break; |
| 487 | case QCEDEV_ALG_SHA256: |
| 488 | sreq.alg = QCE_HASH_SHA256; |
| 489 | break; |
| 490 | case QCEDEV_ALG_SHA1_HMAC: |
| 491 | if (podev->ce_support.sha_hmac) { |
| 492 | sreq.alg = QCE_HASH_SHA1_HMAC; |
| 493 | sreq.authkey = &handle->sha_ctxt.authkey[0]; |
| 494 | sreq.authklen = QCEDEV_MAX_SHA_BLOCK_SIZE; |
| 495 | |
| 496 | } else { |
| 497 | sreq.alg = QCE_HASH_SHA1; |
| 498 | sreq.authkey = NULL; |
| 499 | } |
| 500 | break; |
| 501 | case QCEDEV_ALG_SHA256_HMAC: |
| 502 | if (podev->ce_support.sha_hmac) { |
| 503 | sreq.alg = QCE_HASH_SHA256_HMAC; |
| 504 | sreq.authkey = &handle->sha_ctxt.authkey[0]; |
| 505 | sreq.authklen = QCEDEV_MAX_SHA_BLOCK_SIZE; |
| 506 | } else { |
| 507 | sreq.alg = QCE_HASH_SHA256; |
| 508 | sreq.authkey = NULL; |
| 509 | } |
| 510 | break; |
| 511 | case QCEDEV_ALG_AES_CMAC: |
| 512 | sreq.alg = QCE_HASH_AES_CMAC; |
| 513 | sreq.authkey = &handle->sha_ctxt.authkey[0]; |
| 514 | sreq.authklen = qcedev_areq->sha_op_req.authklen; |
| 515 | break; |
| 516 | default: |
| 517 | pr_err("Algorithm %d not supported, exiting\n", |
| 518 | qcedev_areq->sha_op_req.alg); |
| 519 | return -EINVAL; |
| 520 | }; |
| 521 | |
| 522 | qcedev_areq->sha_req.cookie = handle; |
| 523 | |
| 524 | sreq.qce_cb = qcedev_sha_req_cb; |
| 525 | if (qcedev_areq->sha_op_req.alg != QCEDEV_ALG_AES_CMAC) { |
| 526 | sreq.auth_data[0] = handle->sha_ctxt.auth_data[0]; |
| 527 | sreq.auth_data[1] = handle->sha_ctxt.auth_data[1]; |
| 528 | sreq.auth_data[2] = handle->sha_ctxt.auth_data[2]; |
| 529 | sreq.auth_data[3] = handle->sha_ctxt.auth_data[3]; |
| 530 | sreq.digest = &handle->sha_ctxt.digest[0]; |
| 531 | sreq.first_blk = handle->sha_ctxt.first_blk; |
| 532 | sreq.last_blk = handle->sha_ctxt.last_blk; |
| 533 | } |
| 534 | sreq.size = qcedev_areq->sha_req.sreq.nbytes; |
| 535 | sreq.src = qcedev_areq->sha_req.sreq.src; |
| 536 | sreq.areq = (void *)&qcedev_areq->sha_req; |
| 537 | sreq.flags = 0; |
| 538 | |
| 539 | ret = qce_process_sha_req(podev->qce, &sreq); |
| 540 | |
| 541 | if (ret) |
| 542 | qcedev_areq->err = -ENXIO; |
| 543 | else |
| 544 | qcedev_areq->err = 0; |
| 545 | return ret; |
| 546 | }; |
| 547 | |
| 548 | static int submit_req(struct qcedev_async_req *qcedev_areq, |
| 549 | struct qcedev_handle *handle) |
| 550 | { |
| 551 | struct qcedev_control *podev; |
| 552 | unsigned long flags = 0; |
| 553 | int ret = 0; |
| 554 | struct qcedev_stat *pstat; |
| 555 | |
| 556 | qcedev_areq->err = 0; |
| 557 | podev = handle->cntl; |
| 558 | |
| 559 | spin_lock_irqsave(&podev->lock, flags); |
| 560 | |
| 561 | if (podev->active_command == NULL) { |
| 562 | podev->active_command = qcedev_areq; |
| 563 | if (qcedev_areq->op_type == QCEDEV_CRYPTO_OPER_CIPHER) |
| 564 | ret = start_cipher_req(podev); |
| 565 | else |
| 566 | ret = start_sha_req(podev); |
| 567 | } else { |
| 568 | list_add_tail(&qcedev_areq->list, &podev->ready_commands); |
| 569 | } |
| 570 | |
| 571 | if (ret != 0) |
| 572 | podev->active_command = NULL; |
| 573 | |
| 574 | spin_unlock_irqrestore(&podev->lock, flags); |
| 575 | |
| 576 | if (ret == 0) |
| 577 | wait_for_completion(&qcedev_areq->complete); |
| 578 | |
| 579 | if (ret) |
| 580 | qcedev_areq->err = -EIO; |
| 581 | |
| 582 | pstat = &_qcedev_stat; |
| 583 | if (qcedev_areq->op_type == QCEDEV_CRYPTO_OPER_CIPHER) { |
| 584 | switch (qcedev_areq->cipher_op_req.op) { |
| 585 | case QCEDEV_OPER_DEC: |
| 586 | if (qcedev_areq->err) |
| 587 | pstat->qcedev_dec_fail++; |
| 588 | else |
| 589 | pstat->qcedev_dec_success++; |
| 590 | break; |
| 591 | case QCEDEV_OPER_ENC: |
| 592 | if (qcedev_areq->err) |
| 593 | pstat->qcedev_enc_fail++; |
| 594 | else |
| 595 | pstat->qcedev_enc_success++; |
| 596 | break; |
| 597 | default: |
| 598 | break; |
| 599 | }; |
| 600 | } else { |
| 601 | if (qcedev_areq->err) |
| 602 | pstat->qcedev_sha_fail++; |
| 603 | else |
| 604 | pstat->qcedev_sha_success++; |
| 605 | } |
| 606 | |
| 607 | return qcedev_areq->err; |
| 608 | } |
| 609 | |
| 610 | static int qcedev_sha_init(struct qcedev_async_req *areq, |
| 611 | struct qcedev_handle *handle) |
| 612 | { |
| 613 | struct qcedev_sha_ctxt *sha_ctxt = &handle->sha_ctxt; |
| 614 | |
| 615 | memset(sha_ctxt, 0, sizeof(struct qcedev_sha_ctxt)); |
| 616 | sha_ctxt->first_blk = 1; |
| 617 | |
| 618 | if ((areq->sha_op_req.alg == QCEDEV_ALG_SHA1) || |
| 619 | (areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC)) { |
| 620 | memcpy(&sha_ctxt->digest[0], |
| 621 | &_std_init_vector_sha1_uint8[0], SHA1_DIGEST_SIZE); |
| 622 | sha_ctxt->diglen = SHA1_DIGEST_SIZE; |
| 623 | } else { |
| 624 | if ((areq->sha_op_req.alg == QCEDEV_ALG_SHA256) || |
| 625 | (areq->sha_op_req.alg == QCEDEV_ALG_SHA256_HMAC)) { |
| 626 | memcpy(&sha_ctxt->digest[0], |
| 627 | &_std_init_vector_sha256_uint8[0], |
| 628 | SHA256_DIGEST_SIZE); |
| 629 | sha_ctxt->diglen = SHA256_DIGEST_SIZE; |
| 630 | } |
| 631 | } |
| 632 | sha_ctxt->init_done = true; |
| 633 | return 0; |
| 634 | } |
| 635 | |
| 636 | |
| 637 | static int qcedev_sha_update_max_xfer(struct qcedev_async_req *qcedev_areq, |
| 638 | struct qcedev_handle *handle, |
| 639 | struct scatterlist *sg_src) |
| 640 | { |
| 641 | int err = 0; |
| 642 | int i = 0; |
| 643 | uint32_t total; |
| 644 | |
| 645 | uint8_t *user_src = NULL; |
| 646 | uint8_t *k_src = NULL; |
| 647 | uint8_t *k_buf_src = NULL; |
| 648 | uint8_t *k_align_src = NULL; |
| 649 | |
| 650 | uint32_t sha_pad_len = 0; |
| 651 | uint32_t trailing_buf_len = 0; |
| 652 | uint32_t t_buf = handle->sha_ctxt.trailing_buf_len; |
| 653 | uint32_t sha_block_size; |
| 654 | |
| 655 | total = qcedev_areq->sha_op_req.data_len + t_buf; |
| 656 | |
| 657 | if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA1) |
| 658 | sha_block_size = SHA1_BLOCK_SIZE; |
| 659 | else |
| 660 | sha_block_size = SHA256_BLOCK_SIZE; |
| 661 | |
| 662 | if (total <= sha_block_size) { |
| 663 | uint32_t len = qcedev_areq->sha_op_req.data_len; |
| 664 | |
| 665 | i = 0; |
| 666 | |
| 667 | k_src = &handle->sha_ctxt.trailing_buf[t_buf]; |
| 668 | |
| 669 | /* Copy data from user src(s) */ |
| 670 | while (len > 0) { |
| 671 | user_src = |
| 672 | (void __user *)qcedev_areq->sha_op_req.data[i].vaddr; |
| 673 | if (user_src && copy_from_user(k_src, |
| 674 | (void __user *)user_src, |
| 675 | qcedev_areq->sha_op_req.data[i].len)) |
| 676 | return -EFAULT; |
| 677 | |
| 678 | len -= qcedev_areq->sha_op_req.data[i].len; |
| 679 | k_src += qcedev_areq->sha_op_req.data[i].len; |
| 680 | i++; |
| 681 | } |
| 682 | handle->sha_ctxt.trailing_buf_len = total; |
| 683 | |
| 684 | return 0; |
| 685 | } |
| 686 | |
| 687 | |
| 688 | k_buf_src = kmalloc(total + CACHE_LINE_SIZE * 2, |
| 689 | GFP_KERNEL); |
| 690 | if (k_buf_src == NULL) |
| 691 | return -ENOMEM; |
| 692 | |
| 693 | k_align_src = (uint8_t *)ALIGN(((uintptr_t)k_buf_src), |
| 694 | CACHE_LINE_SIZE); |
| 695 | k_src = k_align_src; |
| 696 | |
| 697 | /* check for trailing buffer from previous updates and append it */ |
| 698 | if (t_buf > 0) { |
| 699 | memcpy(k_src, &handle->sha_ctxt.trailing_buf[0], |
| 700 | t_buf); |
| 701 | k_src += t_buf; |
| 702 | } |
| 703 | |
| 704 | /* Copy data from user src(s) */ |
| 705 | user_src = (void __user *)qcedev_areq->sha_op_req.data[0].vaddr; |
| 706 | if (user_src && copy_from_user(k_src, |
| 707 | (void __user *)user_src, |
| 708 | qcedev_areq->sha_op_req.data[0].len)) { |
| 709 | kzfree(k_buf_src); |
| 710 | return -EFAULT; |
| 711 | } |
| 712 | k_src += qcedev_areq->sha_op_req.data[0].len; |
| 713 | for (i = 1; i < qcedev_areq->sha_op_req.entries; i++) { |
| 714 | user_src = (void __user *)qcedev_areq->sha_op_req.data[i].vaddr; |
| 715 | if (user_src && copy_from_user(k_src, |
| 716 | (void __user *)user_src, |
| 717 | qcedev_areq->sha_op_req.data[i].len)) { |
| 718 | kzfree(k_buf_src); |
| 719 | return -EFAULT; |
| 720 | } |
| 721 | k_src += qcedev_areq->sha_op_req.data[i].len; |
| 722 | } |
| 723 | |
| 724 | /* get new trailing buffer */ |
| 725 | sha_pad_len = ALIGN(total, CE_SHA_BLOCK_SIZE) - total; |
| 726 | trailing_buf_len = CE_SHA_BLOCK_SIZE - sha_pad_len; |
| 727 | |
| 728 | qcedev_areq->sha_req.sreq.src = sg_src; |
| 729 | sg_set_buf(qcedev_areq->sha_req.sreq.src, k_align_src, |
| 730 | total-trailing_buf_len); |
| 731 | sg_mark_end(qcedev_areq->sha_req.sreq.src); |
| 732 | |
| 733 | qcedev_areq->sha_req.sreq.nbytes = total - trailing_buf_len; |
| 734 | |
| 735 | /* update sha_ctxt trailing buf content to new trailing buf */ |
| 736 | if (trailing_buf_len > 0) { |
| 737 | memset(&handle->sha_ctxt.trailing_buf[0], 0, 64); |
| 738 | memcpy(&handle->sha_ctxt.trailing_buf[0], |
| 739 | (k_src - trailing_buf_len), |
| 740 | trailing_buf_len); |
| 741 | } |
| 742 | handle->sha_ctxt.trailing_buf_len = trailing_buf_len; |
| 743 | |
| 744 | err = submit_req(qcedev_areq, handle); |
| 745 | |
| 746 | handle->sha_ctxt.last_blk = 0; |
| 747 | handle->sha_ctxt.first_blk = 0; |
| 748 | |
| 749 | kzfree(k_buf_src); |
| 750 | return err; |
| 751 | } |
| 752 | |
| 753 | static int qcedev_sha_update(struct qcedev_async_req *qcedev_areq, |
| 754 | struct qcedev_handle *handle, |
| 755 | struct scatterlist *sg_src) |
| 756 | { |
| 757 | int err = 0; |
| 758 | int i = 0; |
| 759 | int j = 0; |
| 760 | int k = 0; |
| 761 | int num_entries = 0; |
| 762 | uint32_t total = 0; |
| 763 | |
| 764 | if (handle->sha_ctxt.init_done == false) { |
| 765 | pr_err("%s Init was not called\n", __func__); |
| 766 | return -EINVAL; |
| 767 | } |
| 768 | |
| 769 | if (qcedev_areq->sha_op_req.data_len > QCE_MAX_OPER_DATA) { |
| 770 | |
| 771 | struct qcedev_sha_op_req *saved_req; |
| 772 | struct qcedev_sha_op_req req; |
| 773 | struct qcedev_sha_op_req *sreq = &qcedev_areq->sha_op_req; |
| 774 | |
| 775 | /* save the original req structure */ |
| 776 | saved_req = |
| 777 | kmalloc(sizeof(struct qcedev_sha_op_req), GFP_KERNEL); |
| 778 | if (saved_req == NULL) { |
| 779 | pr_err("%s:Can't Allocate mem:saved_req 0x%lx\n", |
| 780 | __func__, (uintptr_t)saved_req); |
| 781 | return -ENOMEM; |
| 782 | } |
| 783 | memcpy(&req, sreq, sizeof(struct qcedev_sha_op_req)); |
| 784 | memcpy(saved_req, sreq, sizeof(struct qcedev_sha_op_req)); |
| 785 | |
| 786 | i = 0; |
| 787 | /* Address 32 KB at a time */ |
| 788 | while ((i < req.entries) && (err == 0)) { |
| 789 | if (sreq->data[i].len > QCE_MAX_OPER_DATA) { |
| 790 | sreq->data[0].len = QCE_MAX_OPER_DATA; |
| 791 | if (i > 0) { |
| 792 | sreq->data[0].vaddr = |
| 793 | sreq->data[i].vaddr; |
| 794 | } |
| 795 | |
| 796 | sreq->data_len = QCE_MAX_OPER_DATA; |
| 797 | sreq->entries = 1; |
| 798 | |
| 799 | err = qcedev_sha_update_max_xfer(qcedev_areq, |
| 800 | handle, sg_src); |
| 801 | |
| 802 | sreq->data[i].len = req.data[i].len - |
| 803 | QCE_MAX_OPER_DATA; |
| 804 | sreq->data[i].vaddr = req.data[i].vaddr + |
| 805 | QCE_MAX_OPER_DATA; |
| 806 | req.data[i].vaddr = sreq->data[i].vaddr; |
| 807 | req.data[i].len = sreq->data[i].len; |
| 808 | } else { |
| 809 | total = 0; |
| 810 | for (j = i; j < req.entries; j++) { |
| 811 | num_entries++; |
| 812 | if ((total + sreq->data[j].len) >= |
| 813 | QCE_MAX_OPER_DATA) { |
| 814 | sreq->data[j].len = |
| 815 | (QCE_MAX_OPER_DATA - total); |
| 816 | total = QCE_MAX_OPER_DATA; |
| 817 | break; |
| 818 | } |
| 819 | total += sreq->data[j].len; |
| 820 | } |
| 821 | |
| 822 | sreq->data_len = total; |
| 823 | if (i > 0) |
| 824 | for (k = 0; k < num_entries; k++) { |
| 825 | sreq->data[k].len = |
| 826 | sreq->data[i+k].len; |
| 827 | sreq->data[k].vaddr = |
| 828 | sreq->data[i+k].vaddr; |
| 829 | } |
| 830 | sreq->entries = num_entries; |
| 831 | |
| 832 | i = j; |
| 833 | err = qcedev_sha_update_max_xfer(qcedev_areq, |
| 834 | handle, sg_src); |
| 835 | num_entries = 0; |
| 836 | |
| 837 | sreq->data[i].vaddr = req.data[i].vaddr + |
| 838 | sreq->data[i].len; |
| 839 | sreq->data[i].len = req.data[i].len - |
| 840 | sreq->data[i].len; |
| 841 | req.data[i].vaddr = sreq->data[i].vaddr; |
| 842 | req.data[i].len = sreq->data[i].len; |
| 843 | |
| 844 | if (sreq->data[i].len == 0) |
| 845 | i++; |
| 846 | } |
| 847 | } /* end of while ((i < req.entries) && (err == 0)) */ |
| 848 | |
| 849 | /* Restore the original req structure */ |
| 850 | for (i = 0; i < saved_req->entries; i++) { |
| 851 | sreq->data[i].len = saved_req->data[i].len; |
| 852 | sreq->data[i].vaddr = saved_req->data[i].vaddr; |
| 853 | } |
| 854 | sreq->entries = saved_req->entries; |
| 855 | sreq->data_len = saved_req->data_len; |
| 856 | kzfree(saved_req); |
| 857 | } else |
| 858 | err = qcedev_sha_update_max_xfer(qcedev_areq, handle, sg_src); |
| 859 | |
| 860 | return err; |
| 861 | } |
| 862 | |
| 863 | static int qcedev_sha_final(struct qcedev_async_req *qcedev_areq, |
| 864 | struct qcedev_handle *handle) |
| 865 | { |
| 866 | int err = 0; |
| 867 | struct scatterlist sg_src; |
| 868 | uint32_t total; |
| 869 | uint8_t *k_buf_src = NULL; |
| 870 | uint8_t *k_align_src = NULL; |
| 871 | |
| 872 | if (handle->sha_ctxt.init_done == false) { |
| 873 | pr_err("%s Init was not called\n", __func__); |
| 874 | return -EINVAL; |
| 875 | } |
| 876 | |
| 877 | handle->sha_ctxt.last_blk = 1; |
| 878 | |
| 879 | total = handle->sha_ctxt.trailing_buf_len; |
| 880 | |
| 881 | if (total) { |
| 882 | k_buf_src = kmalloc(total + CACHE_LINE_SIZE * 2, |
| 883 | GFP_KERNEL); |
| 884 | if (k_buf_src == NULL) |
| 885 | return -ENOMEM; |
| 886 | |
| 887 | k_align_src = (uint8_t *)ALIGN(((uintptr_t)k_buf_src), |
| 888 | CACHE_LINE_SIZE); |
| 889 | memcpy(k_align_src, &handle->sha_ctxt.trailing_buf[0], total); |
| 890 | } |
| 891 | qcedev_areq->sha_req.sreq.src = (struct scatterlist *) &sg_src; |
| 892 | sg_set_buf(qcedev_areq->sha_req.sreq.src, k_align_src, total); |
| 893 | sg_mark_end(qcedev_areq->sha_req.sreq.src); |
| 894 | |
| 895 | qcedev_areq->sha_req.sreq.nbytes = total; |
| 896 | |
| 897 | err = submit_req(qcedev_areq, handle); |
| 898 | |
| 899 | handle->sha_ctxt.first_blk = 0; |
| 900 | handle->sha_ctxt.last_blk = 0; |
| 901 | handle->sha_ctxt.auth_data[0] = 0; |
| 902 | handle->sha_ctxt.auth_data[1] = 0; |
| 903 | handle->sha_ctxt.trailing_buf_len = 0; |
| 904 | handle->sha_ctxt.init_done = false; |
| 905 | memset(&handle->sha_ctxt.trailing_buf[0], 0, 64); |
| 906 | |
| 907 | kzfree(k_buf_src); |
| 908 | return err; |
| 909 | } |
| 910 | |
| 911 | static int qcedev_hash_cmac(struct qcedev_async_req *qcedev_areq, |
| 912 | struct qcedev_handle *handle, |
| 913 | struct scatterlist *sg_src) |
| 914 | { |
| 915 | int err = 0; |
| 916 | int i = 0; |
| 917 | uint32_t total; |
| 918 | |
| 919 | uint8_t *user_src = NULL; |
| 920 | uint8_t *k_src = NULL; |
| 921 | uint8_t *k_buf_src = NULL; |
| 922 | |
| 923 | total = qcedev_areq->sha_op_req.data_len; |
| 924 | |
| 925 | if (copy_from_user(&handle->sha_ctxt.authkey[0], |
| 926 | (void __user *)qcedev_areq->sha_op_req.authkey, |
| 927 | qcedev_areq->sha_op_req.authklen)) |
| 928 | return -EFAULT; |
| 929 | |
| 930 | |
| 931 | k_buf_src = kmalloc(total, GFP_KERNEL); |
| 932 | if (k_buf_src == NULL) |
| 933 | return -ENOMEM; |
| 934 | |
| 935 | k_src = k_buf_src; |
| 936 | |
| 937 | /* Copy data from user src(s) */ |
| 938 | user_src = (void __user *)qcedev_areq->sha_op_req.data[0].vaddr; |
| 939 | for (i = 0; i < qcedev_areq->sha_op_req.entries; i++) { |
| 940 | user_src = |
| 941 | (void __user *)qcedev_areq->sha_op_req.data[i].vaddr; |
| 942 | if (user_src && copy_from_user(k_src, (void __user *)user_src, |
| 943 | qcedev_areq->sha_op_req.data[i].len)) { |
| 944 | kzfree(k_buf_src); |
| 945 | return -EFAULT; |
| 946 | } |
| 947 | k_src += qcedev_areq->sha_op_req.data[i].len; |
| 948 | } |
| 949 | |
| 950 | qcedev_areq->sha_req.sreq.src = sg_src; |
| 951 | sg_set_buf(qcedev_areq->sha_req.sreq.src, k_buf_src, total); |
| 952 | sg_mark_end(qcedev_areq->sha_req.sreq.src); |
| 953 | |
| 954 | qcedev_areq->sha_req.sreq.nbytes = total; |
| 955 | handle->sha_ctxt.diglen = qcedev_areq->sha_op_req.diglen; |
| 956 | err = submit_req(qcedev_areq, handle); |
| 957 | |
| 958 | kzfree(k_buf_src); |
| 959 | return err; |
| 960 | } |
| 961 | |
| 962 | static int qcedev_set_hmac_auth_key(struct qcedev_async_req *areq, |
| 963 | struct qcedev_handle *handle, |
| 964 | struct scatterlist *sg_src) |
| 965 | { |
| 966 | int err = 0; |
| 967 | |
| 968 | if (areq->sha_op_req.authklen <= QCEDEV_MAX_KEY_SIZE) { |
| 969 | qcedev_sha_init(areq, handle); |
| 970 | if (copy_from_user(&handle->sha_ctxt.authkey[0], |
| 971 | (void __user *)areq->sha_op_req.authkey, |
| 972 | areq->sha_op_req.authklen)) |
| 973 | return -EFAULT; |
| 974 | } else { |
| 975 | struct qcedev_async_req authkey_areq; |
| 976 | uint8_t authkey[QCEDEV_MAX_SHA_BLOCK_SIZE]; |
| 977 | |
| 978 | init_completion(&authkey_areq.complete); |
| 979 | |
| 980 | authkey_areq.sha_op_req.entries = 1; |
| 981 | authkey_areq.sha_op_req.data[0].vaddr = |
| 982 | areq->sha_op_req.authkey; |
| 983 | authkey_areq.sha_op_req.data[0].len = areq->sha_op_req.authklen; |
| 984 | authkey_areq.sha_op_req.data_len = areq->sha_op_req.authklen; |
| 985 | authkey_areq.sha_op_req.diglen = 0; |
| 986 | authkey_areq.handle = handle; |
| 987 | |
| 988 | memset(&authkey_areq.sha_op_req.digest[0], 0, |
| 989 | QCEDEV_MAX_SHA_DIGEST); |
| 990 | if (areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC) |
| 991 | authkey_areq.sha_op_req.alg = QCEDEV_ALG_SHA1; |
| 992 | if (areq->sha_op_req.alg == QCEDEV_ALG_SHA256_HMAC) |
| 993 | authkey_areq.sha_op_req.alg = QCEDEV_ALG_SHA256; |
| 994 | |
| 995 | authkey_areq.op_type = QCEDEV_CRYPTO_OPER_SHA; |
| 996 | |
| 997 | qcedev_sha_init(&authkey_areq, handle); |
| 998 | err = qcedev_sha_update(&authkey_areq, handle, sg_src); |
| 999 | if (!err) |
| 1000 | err = qcedev_sha_final(&authkey_areq, handle); |
| 1001 | else |
| 1002 | return err; |
| 1003 | memcpy(&authkey[0], &handle->sha_ctxt.digest[0], |
| 1004 | handle->sha_ctxt.diglen); |
| 1005 | qcedev_sha_init(areq, handle); |
| 1006 | |
| 1007 | memcpy(&handle->sha_ctxt.authkey[0], &authkey[0], |
| 1008 | handle->sha_ctxt.diglen); |
| 1009 | } |
| 1010 | return err; |
| 1011 | } |
| 1012 | |
| 1013 | static int qcedev_hmac_get_ohash(struct qcedev_async_req *qcedev_areq, |
| 1014 | struct qcedev_handle *handle) |
| 1015 | { |
| 1016 | int err = 0; |
| 1017 | struct scatterlist sg_src; |
| 1018 | uint8_t *k_src = NULL; |
| 1019 | uint32_t sha_block_size = 0; |
| 1020 | uint32_t sha_digest_size = 0; |
| 1021 | |
| 1022 | if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC) { |
| 1023 | sha_digest_size = SHA1_DIGEST_SIZE; |
| 1024 | sha_block_size = SHA1_BLOCK_SIZE; |
| 1025 | } else { |
| 1026 | if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA256_HMAC) { |
| 1027 | sha_digest_size = SHA256_DIGEST_SIZE; |
| 1028 | sha_block_size = SHA256_BLOCK_SIZE; |
| 1029 | } |
| 1030 | } |
| 1031 | k_src = kmalloc(sha_block_size, GFP_KERNEL); |
| 1032 | if (k_src == NULL) |
| 1033 | return -ENOMEM; |
| 1034 | |
| 1035 | /* check for trailing buffer from previous updates and append it */ |
| 1036 | memcpy(k_src, &handle->sha_ctxt.trailing_buf[0], |
| 1037 | handle->sha_ctxt.trailing_buf_len); |
| 1038 | |
| 1039 | qcedev_areq->sha_req.sreq.src = (struct scatterlist *) &sg_src; |
| 1040 | sg_set_buf(qcedev_areq->sha_req.sreq.src, k_src, sha_block_size); |
| 1041 | sg_mark_end(qcedev_areq->sha_req.sreq.src); |
| 1042 | |
| 1043 | qcedev_areq->sha_req.sreq.nbytes = sha_block_size; |
| 1044 | memset(&handle->sha_ctxt.trailing_buf[0], 0, sha_block_size); |
| 1045 | memcpy(&handle->sha_ctxt.trailing_buf[0], &handle->sha_ctxt.digest[0], |
| 1046 | sha_digest_size); |
| 1047 | handle->sha_ctxt.trailing_buf_len = sha_digest_size; |
| 1048 | |
| 1049 | handle->sha_ctxt.first_blk = 1; |
| 1050 | handle->sha_ctxt.last_blk = 0; |
| 1051 | handle->sha_ctxt.auth_data[0] = 0; |
| 1052 | handle->sha_ctxt.auth_data[1] = 0; |
| 1053 | |
| 1054 | if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC) { |
| 1055 | memcpy(&handle->sha_ctxt.digest[0], |
| 1056 | &_std_init_vector_sha1_uint8[0], SHA1_DIGEST_SIZE); |
| 1057 | handle->sha_ctxt.diglen = SHA1_DIGEST_SIZE; |
| 1058 | } |
| 1059 | |
| 1060 | if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA256_HMAC) { |
| 1061 | memcpy(&handle->sha_ctxt.digest[0], |
| 1062 | &_std_init_vector_sha256_uint8[0], SHA256_DIGEST_SIZE); |
| 1063 | handle->sha_ctxt.diglen = SHA256_DIGEST_SIZE; |
| 1064 | } |
| 1065 | err = submit_req(qcedev_areq, handle); |
| 1066 | |
| 1067 | handle->sha_ctxt.last_blk = 0; |
| 1068 | handle->sha_ctxt.first_blk = 0; |
| 1069 | |
| 1070 | kzfree(k_src); |
| 1071 | return err; |
| 1072 | } |
| 1073 | |
| 1074 | static int qcedev_hmac_update_iokey(struct qcedev_async_req *areq, |
| 1075 | struct qcedev_handle *handle, bool ikey) |
| 1076 | { |
| 1077 | int i; |
| 1078 | uint32_t constant; |
| 1079 | uint32_t sha_block_size; |
| 1080 | |
| 1081 | if (ikey) |
| 1082 | constant = 0x36; |
| 1083 | else |
| 1084 | constant = 0x5c; |
| 1085 | |
| 1086 | if (areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC) |
| 1087 | sha_block_size = SHA1_BLOCK_SIZE; |
| 1088 | else |
| 1089 | sha_block_size = SHA256_BLOCK_SIZE; |
| 1090 | |
| 1091 | memset(&handle->sha_ctxt.trailing_buf[0], 0, sha_block_size); |
| 1092 | for (i = 0; i < sha_block_size; i++) |
| 1093 | handle->sha_ctxt.trailing_buf[i] = |
| 1094 | (handle->sha_ctxt.authkey[i] ^ constant); |
| 1095 | |
| 1096 | handle->sha_ctxt.trailing_buf_len = sha_block_size; |
| 1097 | return 0; |
| 1098 | } |
| 1099 | |
| 1100 | static int qcedev_hmac_init(struct qcedev_async_req *areq, |
| 1101 | struct qcedev_handle *handle, |
| 1102 | struct scatterlist *sg_src) |
| 1103 | { |
| 1104 | int err; |
| 1105 | struct qcedev_control *podev = handle->cntl; |
| 1106 | |
| 1107 | err = qcedev_set_hmac_auth_key(areq, handle, sg_src); |
| 1108 | if (err) |
| 1109 | return err; |
| 1110 | if (!podev->ce_support.sha_hmac) |
| 1111 | qcedev_hmac_update_iokey(areq, handle, true); |
| 1112 | return 0; |
| 1113 | } |
| 1114 | |
| 1115 | static int qcedev_hmac_final(struct qcedev_async_req *areq, |
| 1116 | struct qcedev_handle *handle) |
| 1117 | { |
| 1118 | int err; |
| 1119 | struct qcedev_control *podev = handle->cntl; |
| 1120 | |
| 1121 | err = qcedev_sha_final(areq, handle); |
| 1122 | if (podev->ce_support.sha_hmac) |
| 1123 | return err; |
| 1124 | |
| 1125 | qcedev_hmac_update_iokey(areq, handle, false); |
| 1126 | err = qcedev_hmac_get_ohash(areq, handle); |
| 1127 | if (err) |
| 1128 | return err; |
| 1129 | err = qcedev_sha_final(areq, handle); |
| 1130 | |
| 1131 | return err; |
| 1132 | } |
| 1133 | |
| 1134 | static int qcedev_hash_init(struct qcedev_async_req *areq, |
| 1135 | struct qcedev_handle *handle, |
| 1136 | struct scatterlist *sg_src) |
| 1137 | { |
| 1138 | if ((areq->sha_op_req.alg == QCEDEV_ALG_SHA1) || |
| 1139 | (areq->sha_op_req.alg == QCEDEV_ALG_SHA256)) |
| 1140 | return qcedev_sha_init(areq, handle); |
| 1141 | else |
| 1142 | return qcedev_hmac_init(areq, handle, sg_src); |
| 1143 | } |
| 1144 | |
| 1145 | static int qcedev_hash_update(struct qcedev_async_req *qcedev_areq, |
| 1146 | struct qcedev_handle *handle, |
| 1147 | struct scatterlist *sg_src) |
| 1148 | { |
| 1149 | return qcedev_sha_update(qcedev_areq, handle, sg_src); |
| 1150 | } |
| 1151 | |
| 1152 | static int qcedev_hash_final(struct qcedev_async_req *areq, |
| 1153 | struct qcedev_handle *handle) |
| 1154 | { |
| 1155 | if ((areq->sha_op_req.alg == QCEDEV_ALG_SHA1) || |
| 1156 | (areq->sha_op_req.alg == QCEDEV_ALG_SHA256)) |
| 1157 | return qcedev_sha_final(areq, handle); |
| 1158 | else |
| 1159 | return qcedev_hmac_final(areq, handle); |
| 1160 | } |
| 1161 | |
| 1162 | static int qcedev_vbuf_ablk_cipher_max_xfer(struct qcedev_async_req *areq, |
| 1163 | int *di, struct qcedev_handle *handle, |
| 1164 | uint8_t *k_align_src) |
| 1165 | { |
| 1166 | int err = 0; |
| 1167 | int i = 0; |
| 1168 | int dst_i = *di; |
| 1169 | struct scatterlist sg_src; |
| 1170 | uint32_t byteoffset = 0; |
| 1171 | uint8_t *user_src = NULL; |
| 1172 | uint8_t *k_align_dst = k_align_src; |
| 1173 | struct qcedev_cipher_op_req *creq = &areq->cipher_op_req; |
| 1174 | |
| 1175 | |
| 1176 | if (areq->cipher_op_req.mode == QCEDEV_AES_MODE_CTR) |
| 1177 | byteoffset = areq->cipher_op_req.byteoffset; |
| 1178 | |
| 1179 | user_src = (void __user *)areq->cipher_op_req.vbuf.src[0].vaddr; |
| 1180 | if (user_src && copy_from_user((k_align_src + byteoffset), |
| 1181 | (void __user *)user_src, |
| 1182 | areq->cipher_op_req.vbuf.src[0].len)) |
| 1183 | return -EFAULT; |
| 1184 | |
| 1185 | k_align_src += byteoffset + areq->cipher_op_req.vbuf.src[0].len; |
| 1186 | |
| 1187 | for (i = 1; i < areq->cipher_op_req.entries; i++) { |
| 1188 | user_src = |
| 1189 | (void __user *)areq->cipher_op_req.vbuf.src[i].vaddr; |
| 1190 | if (user_src && copy_from_user(k_align_src, |
| 1191 | (void __user *)user_src, |
| 1192 | areq->cipher_op_req.vbuf.src[i].len)) { |
| 1193 | return -EFAULT; |
| 1194 | } |
| 1195 | k_align_src += areq->cipher_op_req.vbuf.src[i].len; |
| 1196 | } |
| 1197 | |
| 1198 | /* restore src beginning */ |
| 1199 | k_align_src = k_align_dst; |
| 1200 | areq->cipher_op_req.data_len += byteoffset; |
| 1201 | |
| 1202 | areq->cipher_req.creq.src = (struct scatterlist *) &sg_src; |
| 1203 | areq->cipher_req.creq.dst = (struct scatterlist *) &sg_src; |
| 1204 | |
| 1205 | /* In place encryption/decryption */ |
| 1206 | sg_set_buf(areq->cipher_req.creq.src, |
| 1207 | k_align_dst, |
| 1208 | areq->cipher_op_req.data_len); |
| 1209 | sg_mark_end(areq->cipher_req.creq.src); |
| 1210 | |
| 1211 | areq->cipher_req.creq.nbytes = areq->cipher_op_req.data_len; |
| 1212 | areq->cipher_req.creq.info = areq->cipher_op_req.iv; |
| 1213 | areq->cipher_op_req.entries = 1; |
| 1214 | |
| 1215 | err = submit_req(areq, handle); |
| 1216 | |
| 1217 | /* copy data to destination buffer*/ |
| 1218 | creq->data_len -= byteoffset; |
| 1219 | |
| 1220 | while (creq->data_len > 0) { |
| 1221 | if (creq->vbuf.dst[dst_i].len <= creq->data_len) { |
| 1222 | if (err == 0 && copy_to_user( |
| 1223 | (void __user *)creq->vbuf.dst[dst_i].vaddr, |
| 1224 | (k_align_dst + byteoffset), |
| 1225 | creq->vbuf.dst[dst_i].len)) |
| 1226 | return -EFAULT; |
| 1227 | |
| 1228 | k_align_dst += creq->vbuf.dst[dst_i].len + |
| 1229 | byteoffset; |
| 1230 | creq->data_len -= creq->vbuf.dst[dst_i].len; |
| 1231 | dst_i++; |
| 1232 | } else { |
| 1233 | if (err == 0 && copy_to_user( |
| 1234 | (void __user *)creq->vbuf.dst[dst_i].vaddr, |
| 1235 | (k_align_dst + byteoffset), |
| 1236 | creq->data_len)) |
| 1237 | return -EFAULT; |
| 1238 | |
| 1239 | k_align_dst += creq->data_len; |
| 1240 | creq->vbuf.dst[dst_i].len -= creq->data_len; |
| 1241 | creq->vbuf.dst[dst_i].vaddr += creq->data_len; |
| 1242 | creq->data_len = 0; |
| 1243 | } |
| 1244 | } |
| 1245 | *di = dst_i; |
| 1246 | |
| 1247 | return err; |
| 1248 | }; |
| 1249 | |
| 1250 | static int qcedev_vbuf_ablk_cipher(struct qcedev_async_req *areq, |
| 1251 | struct qcedev_handle *handle) |
| 1252 | { |
| 1253 | int err = 0; |
| 1254 | int di = 0; |
| 1255 | int i = 0; |
| 1256 | int j = 0; |
| 1257 | int k = 0; |
| 1258 | uint32_t byteoffset = 0; |
| 1259 | int num_entries = 0; |
| 1260 | uint32_t total = 0; |
| 1261 | uint32_t len; |
| 1262 | uint8_t *k_buf_src = NULL; |
| 1263 | uint8_t *k_align_src = NULL; |
| 1264 | uint32_t max_data_xfer; |
| 1265 | struct qcedev_cipher_op_req *saved_req; |
| 1266 | struct qcedev_cipher_op_req *creq = &areq->cipher_op_req; |
| 1267 | |
| 1268 | total = 0; |
| 1269 | |
| 1270 | if (areq->cipher_op_req.mode == QCEDEV_AES_MODE_CTR) |
| 1271 | byteoffset = areq->cipher_op_req.byteoffset; |
| 1272 | k_buf_src = kmalloc(QCE_MAX_OPER_DATA + CACHE_LINE_SIZE * 2, |
| 1273 | GFP_KERNEL); |
| 1274 | if (k_buf_src == NULL) |
| 1275 | return -ENOMEM; |
| 1276 | k_align_src = (uint8_t *)ALIGN(((uintptr_t)k_buf_src), |
| 1277 | CACHE_LINE_SIZE); |
| 1278 | max_data_xfer = QCE_MAX_OPER_DATA - byteoffset; |
| 1279 | |
| 1280 | saved_req = kmalloc(sizeof(struct qcedev_cipher_op_req), GFP_KERNEL); |
| 1281 | if (saved_req == NULL) { |
| 1282 | kzfree(k_buf_src); |
| 1283 | return -ENOMEM; |
| 1284 | |
| 1285 | } |
| 1286 | memcpy(saved_req, creq, sizeof(struct qcedev_cipher_op_req)); |
| 1287 | |
| 1288 | if (areq->cipher_op_req.data_len > max_data_xfer) { |
| 1289 | struct qcedev_cipher_op_req req; |
| 1290 | |
| 1291 | /* save the original req structure */ |
| 1292 | memcpy(&req, creq, sizeof(struct qcedev_cipher_op_req)); |
| 1293 | |
| 1294 | i = 0; |
| 1295 | /* Address 32 KB at a time */ |
| 1296 | while ((i < req.entries) && (err == 0)) { |
| 1297 | if (creq->vbuf.src[i].len > max_data_xfer) { |
| 1298 | creq->vbuf.src[0].len = max_data_xfer; |
| 1299 | if (i > 0) { |
| 1300 | creq->vbuf.src[0].vaddr = |
| 1301 | creq->vbuf.src[i].vaddr; |
| 1302 | } |
| 1303 | |
| 1304 | creq->data_len = max_data_xfer; |
| 1305 | creq->entries = 1; |
| 1306 | |
| 1307 | err = qcedev_vbuf_ablk_cipher_max_xfer(areq, |
| 1308 | &di, handle, k_align_src); |
| 1309 | if (err < 0) { |
| 1310 | kzfree(k_buf_src); |
| 1311 | kzfree(saved_req); |
| 1312 | return err; |
| 1313 | } |
| 1314 | |
| 1315 | creq->vbuf.src[i].len = req.vbuf.src[i].len - |
| 1316 | max_data_xfer; |
| 1317 | creq->vbuf.src[i].vaddr = |
| 1318 | req.vbuf.src[i].vaddr + |
| 1319 | max_data_xfer; |
| 1320 | req.vbuf.src[i].vaddr = |
| 1321 | creq->vbuf.src[i].vaddr; |
| 1322 | req.vbuf.src[i].len = creq->vbuf.src[i].len; |
| 1323 | |
| 1324 | } else { |
| 1325 | total = areq->cipher_op_req.byteoffset; |
| 1326 | for (j = i; j < req.entries; j++) { |
| 1327 | num_entries++; |
| 1328 | if ((total + creq->vbuf.src[j].len) |
| 1329 | >= max_data_xfer) { |
| 1330 | creq->vbuf.src[j].len = |
| 1331 | max_data_xfer - total; |
| 1332 | total = max_data_xfer; |
| 1333 | break; |
| 1334 | } |
| 1335 | total += creq->vbuf.src[j].len; |
| 1336 | } |
| 1337 | |
| 1338 | creq->data_len = total; |
| 1339 | if (i > 0) |
| 1340 | for (k = 0; k < num_entries; k++) { |
| 1341 | creq->vbuf.src[k].len = |
| 1342 | creq->vbuf.src[i+k].len; |
| 1343 | creq->vbuf.src[k].vaddr = |
| 1344 | creq->vbuf.src[i+k].vaddr; |
| 1345 | } |
| 1346 | creq->entries = num_entries; |
| 1347 | |
| 1348 | i = j; |
| 1349 | err = qcedev_vbuf_ablk_cipher_max_xfer(areq, |
| 1350 | &di, handle, k_align_src); |
| 1351 | if (err < 0) { |
| 1352 | kzfree(k_buf_src); |
| 1353 | kzfree(saved_req); |
| 1354 | return err; |
| 1355 | } |
| 1356 | |
| 1357 | num_entries = 0; |
| 1358 | areq->cipher_op_req.byteoffset = 0; |
| 1359 | |
| 1360 | creq->vbuf.src[i].vaddr = req.vbuf.src[i].vaddr |
| 1361 | + creq->vbuf.src[i].len; |
| 1362 | creq->vbuf.src[i].len = req.vbuf.src[i].len - |
| 1363 | creq->vbuf.src[i].len; |
| 1364 | |
| 1365 | req.vbuf.src[i].vaddr = |
| 1366 | creq->vbuf.src[i].vaddr; |
| 1367 | req.vbuf.src[i].len = creq->vbuf.src[i].len; |
| 1368 | |
| 1369 | if (creq->vbuf.src[i].len == 0) |
| 1370 | i++; |
| 1371 | } |
| 1372 | |
| 1373 | areq->cipher_op_req.byteoffset = 0; |
| 1374 | max_data_xfer = QCE_MAX_OPER_DATA; |
| 1375 | byteoffset = 0; |
| 1376 | |
| 1377 | } /* end of while ((i < req.entries) && (err == 0)) */ |
| 1378 | } else |
| 1379 | err = qcedev_vbuf_ablk_cipher_max_xfer(areq, &di, handle, |
| 1380 | k_align_src); |
| 1381 | |
| 1382 | /* Restore the original req structure */ |
| 1383 | for (i = 0; i < saved_req->entries; i++) { |
| 1384 | creq->vbuf.src[i].len = saved_req->vbuf.src[i].len; |
| 1385 | creq->vbuf.src[i].vaddr = saved_req->vbuf.src[i].vaddr; |
| 1386 | } |
| 1387 | for (len = 0, i = 0; len < saved_req->data_len; i++) { |
| 1388 | creq->vbuf.dst[i].len = saved_req->vbuf.dst[i].len; |
| 1389 | creq->vbuf.dst[i].vaddr = saved_req->vbuf.dst[i].vaddr; |
| 1390 | len += saved_req->vbuf.dst[i].len; |
| 1391 | } |
| 1392 | creq->entries = saved_req->entries; |
| 1393 | creq->data_len = saved_req->data_len; |
| 1394 | creq->byteoffset = saved_req->byteoffset; |
| 1395 | |
| 1396 | kzfree(saved_req); |
| 1397 | kzfree(k_buf_src); |
| 1398 | return err; |
| 1399 | |
| 1400 | } |
| 1401 | |
| 1402 | static int qcedev_check_cipher_key(struct qcedev_cipher_op_req *req, |
| 1403 | struct qcedev_control *podev) |
| 1404 | { |
| 1405 | /* if intending to use HW key make sure key fields are set |
| 1406 | * correctly and HW key is indeed supported in target |
| 1407 | */ |
| 1408 | if (req->encklen == 0) { |
| 1409 | int i; |
| 1410 | |
| 1411 | for (i = 0; i < QCEDEV_MAX_KEY_SIZE; i++) { |
| 1412 | if (req->enckey[i]) { |
| 1413 | pr_err("%s: Invalid key: non-zero key input\n", |
| 1414 | __func__); |
| 1415 | goto error; |
| 1416 | } |
| 1417 | } |
| 1418 | if ((req->op != QCEDEV_OPER_ENC_NO_KEY) && |
| 1419 | (req->op != QCEDEV_OPER_DEC_NO_KEY)) |
| 1420 | if (!podev->platform_support.hw_key_support) { |
| 1421 | pr_err("%s: Invalid op %d\n", __func__, |
| 1422 | (uint32_t)req->op); |
| 1423 | goto error; |
| 1424 | } |
| 1425 | } else { |
| 1426 | if (req->encklen == QCEDEV_AES_KEY_192) { |
| 1427 | if (!podev->ce_support.aes_key_192) { |
| 1428 | pr_err("%s: AES-192 not supported\n", __func__); |
| 1429 | goto error; |
| 1430 | } |
| 1431 | } else { |
| 1432 | /* if not using HW key make sure key |
| 1433 | * length is valid |
| 1434 | */ |
| 1435 | if (req->mode == QCEDEV_AES_MODE_XTS) { |
| 1436 | if ((req->encklen != QCEDEV_AES_KEY_128*2) && |
| 1437 | (req->encklen != QCEDEV_AES_KEY_256*2)) { |
| 1438 | pr_err("%s: unsupported key size: %d\n", |
| 1439 | __func__, req->encklen); |
| 1440 | goto error; |
| 1441 | } |
| 1442 | } else { |
| 1443 | if ((req->encklen != QCEDEV_AES_KEY_128) && |
| 1444 | (req->encklen != QCEDEV_AES_KEY_256)) { |
| 1445 | pr_err("%s: unsupported key size %d\n", |
| 1446 | __func__, req->encklen); |
| 1447 | goto error; |
| 1448 | } |
| 1449 | } |
| 1450 | } |
| 1451 | } |
| 1452 | return 0; |
| 1453 | error: |
| 1454 | return -EINVAL; |
| 1455 | } |
| 1456 | |
| 1457 | static int qcedev_check_cipher_params(struct qcedev_cipher_op_req *req, |
| 1458 | struct qcedev_control *podev) |
| 1459 | { |
| 1460 | uint32_t total = 0; |
| 1461 | uint32_t i; |
| 1462 | |
| 1463 | if (req->use_pmem) { |
| 1464 | pr_err("%s: Use of PMEM is not supported\n", __func__); |
| 1465 | goto error; |
| 1466 | } |
| 1467 | if ((req->entries == 0) || (req->data_len == 0) || |
| 1468 | (req->entries > QCEDEV_MAX_BUFFERS)) { |
| 1469 | pr_err("%s: Invalid cipher length/entries\n", __func__); |
| 1470 | goto error; |
| 1471 | } |
| 1472 | if ((req->alg >= QCEDEV_ALG_LAST) || |
| 1473 | (req->mode >= QCEDEV_AES_DES_MODE_LAST)) { |
| 1474 | pr_err("%s: Invalid algorithm %d\n", __func__, |
| 1475 | (uint32_t)req->alg); |
| 1476 | goto error; |
| 1477 | } |
| 1478 | if ((req->mode == QCEDEV_AES_MODE_XTS) && |
| 1479 | (!podev->ce_support.aes_xts)) { |
| 1480 | pr_err("%s: XTS algorithm is not supported\n", __func__); |
| 1481 | goto error; |
| 1482 | } |
| 1483 | if (req->alg == QCEDEV_ALG_AES) { |
| 1484 | if (qcedev_check_cipher_key(req, podev)) |
| 1485 | goto error; |
| 1486 | |
| 1487 | } |
| 1488 | /* if using a byteoffset, make sure it is CTR mode using vbuf */ |
| 1489 | if (req->byteoffset) { |
| 1490 | if (req->mode != QCEDEV_AES_MODE_CTR) { |
| 1491 | pr_err("%s: Operation on byte offset not supported\n", |
| 1492 | __func__); |
| 1493 | goto error; |
| 1494 | } |
| 1495 | if (req->byteoffset >= AES_CE_BLOCK_SIZE) { |
| 1496 | pr_err("%s: Invalid byte offset\n", __func__); |
| 1497 | goto error; |
| 1498 | } |
| 1499 | total = req->byteoffset; |
| 1500 | for (i = 0; i < req->entries; i++) { |
| 1501 | if (total > U32_MAX - req->vbuf.src[i].len) { |
| 1502 | pr_err("%s:Integer overflow on total src len\n", |
| 1503 | __func__); |
| 1504 | goto error; |
| 1505 | } |
| 1506 | total += req->vbuf.src[i].len; |
| 1507 | } |
| 1508 | } |
| 1509 | |
| 1510 | if (req->data_len < req->byteoffset) { |
| 1511 | pr_err("%s: req data length %u is less than byteoffset %u\n", |
| 1512 | __func__, req->data_len, req->byteoffset); |
| 1513 | goto error; |
| 1514 | } |
| 1515 | |
| 1516 | /* Ensure IV size */ |
| 1517 | if (req->ivlen > QCEDEV_MAX_IV_SIZE) { |
| 1518 | pr_err("%s: ivlen is not correct: %u\n", __func__, req->ivlen); |
| 1519 | goto error; |
| 1520 | } |
| 1521 | |
| 1522 | /* Ensure Key size */ |
| 1523 | if (req->encklen > QCEDEV_MAX_KEY_SIZE) { |
| 1524 | pr_err("%s: Klen is not correct: %u\n", __func__, req->encklen); |
| 1525 | goto error; |
| 1526 | } |
| 1527 | |
| 1528 | /* Ensure zer ivlen for ECB mode */ |
| 1529 | if (req->ivlen > 0) { |
| 1530 | if ((req->mode == QCEDEV_AES_MODE_ECB) || |
| 1531 | (req->mode == QCEDEV_DES_MODE_ECB)) { |
| 1532 | pr_err("%s: Expecting a zero length IV\n", __func__); |
| 1533 | goto error; |
| 1534 | } |
| 1535 | } else { |
| 1536 | if ((req->mode != QCEDEV_AES_MODE_ECB) && |
| 1537 | (req->mode != QCEDEV_DES_MODE_ECB)) { |
| 1538 | pr_err("%s: Expecting a non-zero ength IV\n", __func__); |
| 1539 | goto error; |
| 1540 | } |
| 1541 | } |
| 1542 | /* Check for sum of all dst length is equal to data_len */ |
| 1543 | for (i = 0, total = 0; i < req->entries; i++) { |
| 1544 | if (!req->vbuf.dst[i].vaddr && req->vbuf.dst[i].len) { |
| 1545 | pr_err("%s: NULL req dst vbuf[%d] with length %d\n", |
| 1546 | __func__, i, req->vbuf.dst[i].len); |
| 1547 | goto error; |
| 1548 | } |
| 1549 | if (req->vbuf.dst[i].len >= U32_MAX - total) { |
| 1550 | pr_err("%s: Integer overflow on total req dst vbuf length\n", |
| 1551 | __func__); |
| 1552 | goto error; |
| 1553 | } |
| 1554 | total += req->vbuf.dst[i].len; |
| 1555 | } |
| 1556 | if (total != req->data_len) { |
| 1557 | pr_err("%s: Total (i=%d) dst(%d) buf size != data_len (%d)\n", |
| 1558 | __func__, i, total, req->data_len); |
| 1559 | goto error; |
| 1560 | } |
| 1561 | /* Check for sum of all src length is equal to data_len */ |
| 1562 | for (i = 0, total = 0; i < req->entries; i++) { |
| 1563 | if (!req->vbuf.src[i].vaddr && req->vbuf.src[i].len) { |
| 1564 | pr_err("%s: NULL req src vbuf[%d] with length %d\n", |
| 1565 | __func__, i, req->vbuf.src[i].len); |
| 1566 | goto error; |
| 1567 | } |
| 1568 | if (req->vbuf.src[i].len > U32_MAX - total) { |
| 1569 | pr_err("%s: Integer overflow on total req src vbuf length\n", |
| 1570 | __func__); |
| 1571 | goto error; |
| 1572 | } |
| 1573 | total += req->vbuf.src[i].len; |
| 1574 | } |
| 1575 | if (total != req->data_len) { |
| 1576 | pr_err("%s: Total src(%d) buf size != data_len (%d)\n", |
| 1577 | __func__, total, req->data_len); |
| 1578 | goto error; |
| 1579 | } |
| 1580 | return 0; |
| 1581 | error: |
| 1582 | return -EINVAL; |
| 1583 | |
| 1584 | } |
| 1585 | |
| 1586 | static int qcedev_check_sha_params(struct qcedev_sha_op_req *req, |
| 1587 | struct qcedev_control *podev) |
| 1588 | { |
| 1589 | uint32_t total = 0; |
| 1590 | uint32_t i; |
| 1591 | |
| 1592 | if ((req->alg == QCEDEV_ALG_AES_CMAC) && |
| 1593 | (!podev->ce_support.cmac)) { |
| 1594 | pr_err("%s: CMAC not supported\n", __func__); |
| 1595 | goto sha_error; |
| 1596 | } |
| 1597 | if ((!req->entries) || (req->entries > QCEDEV_MAX_BUFFERS)) { |
| 1598 | pr_err("%s: Invalid num entries (%d)\n", |
| 1599 | __func__, req->entries); |
| 1600 | goto sha_error; |
| 1601 | } |
| 1602 | |
| 1603 | if (req->alg >= QCEDEV_ALG_SHA_ALG_LAST) { |
| 1604 | pr_err("%s: Invalid algorithm (%d)\n", __func__, req->alg); |
| 1605 | goto sha_error; |
| 1606 | } |
| 1607 | if ((req->alg == QCEDEV_ALG_SHA1_HMAC) || |
| 1608 | (req->alg == QCEDEV_ALG_SHA1_HMAC)) { |
| 1609 | if (req->authkey == NULL) { |
| 1610 | pr_err("%s: Invalid authkey pointer\n", __func__); |
| 1611 | goto sha_error; |
| 1612 | } |
| 1613 | if (req->authklen <= 0) { |
| 1614 | pr_err("%s: Invalid authkey length (%d)\n", |
| 1615 | __func__, req->authklen); |
| 1616 | goto sha_error; |
| 1617 | } |
| 1618 | } |
| 1619 | |
| 1620 | if (req->alg == QCEDEV_ALG_AES_CMAC) { |
| 1621 | if ((req->authklen != QCEDEV_AES_KEY_128) && |
| 1622 | (req->authklen != QCEDEV_AES_KEY_256)) { |
| 1623 | pr_err("%s: unsupported key length\n", __func__); |
| 1624 | goto sha_error; |
| 1625 | } |
| 1626 | } |
| 1627 | |
| 1628 | /* Check for sum of all src length is equal to data_len */ |
| 1629 | for (i = 0, total = 0; i < req->entries; i++) { |
| 1630 | if (req->data[i].len > U32_MAX - total) { |
| 1631 | pr_err("%s: Integer overflow on total req buf length\n", |
| 1632 | __func__); |
| 1633 | goto sha_error; |
| 1634 | } |
| 1635 | total += req->data[i].len; |
| 1636 | } |
| 1637 | |
| 1638 | if (total != req->data_len) { |
| 1639 | pr_err("%s: Total src(%d) buf size != data_len (%d)\n", |
| 1640 | __func__, total, req->data_len); |
| 1641 | goto sha_error; |
| 1642 | } |
| 1643 | return 0; |
| 1644 | sha_error: |
| 1645 | return -EINVAL; |
| 1646 | } |
| 1647 | |
| 1648 | static inline long qcedev_ioctl(struct file *file, |
| 1649 | unsigned int cmd, unsigned long arg) |
| 1650 | { |
| 1651 | int err = 0; |
| 1652 | struct qcedev_handle *handle; |
| 1653 | struct qcedev_control *podev; |
| 1654 | struct qcedev_async_req qcedev_areq; |
| 1655 | struct qcedev_stat *pstat; |
| 1656 | |
| 1657 | handle = file->private_data; |
| 1658 | podev = handle->cntl; |
| 1659 | qcedev_areq.handle = handle; |
| 1660 | if (podev == NULL || podev->magic != QCEDEV_MAGIC) { |
| 1661 | pr_err("%s: invalid handle %p\n", |
| 1662 | __func__, podev); |
| 1663 | return -ENOENT; |
| 1664 | } |
| 1665 | |
| 1666 | /* Verify user arguments. */ |
| 1667 | if (_IOC_TYPE(cmd) != QCEDEV_IOC_MAGIC) |
| 1668 | return -ENOTTY; |
| 1669 | |
| 1670 | init_completion(&qcedev_areq.complete); |
| 1671 | pstat = &_qcedev_stat; |
| 1672 | |
| 1673 | switch (cmd) { |
| 1674 | case QCEDEV_IOCTL_ENC_REQ: |
| 1675 | case QCEDEV_IOCTL_DEC_REQ: |
| 1676 | if (copy_from_user(&qcedev_areq.cipher_op_req, |
| 1677 | (void __user *)arg, |
| 1678 | sizeof(struct qcedev_cipher_op_req))) |
| 1679 | return -EFAULT; |
| 1680 | qcedev_areq.op_type = QCEDEV_CRYPTO_OPER_CIPHER; |
| 1681 | |
| 1682 | if (qcedev_check_cipher_params(&qcedev_areq.cipher_op_req, |
| 1683 | podev)) |
| 1684 | return -EINVAL; |
| 1685 | |
| 1686 | err = qcedev_vbuf_ablk_cipher(&qcedev_areq, handle); |
| 1687 | if (err) |
| 1688 | return err; |
| 1689 | if (copy_to_user((void __user *)arg, |
| 1690 | &qcedev_areq.cipher_op_req, |
| 1691 | sizeof(struct qcedev_cipher_op_req))) |
| 1692 | return -EFAULT; |
| 1693 | break; |
| 1694 | |
| 1695 | case QCEDEV_IOCTL_SHA_INIT_REQ: |
| 1696 | { |
| 1697 | struct scatterlist sg_src; |
| 1698 | |
| 1699 | if (copy_from_user(&qcedev_areq.sha_op_req, |
| 1700 | (void __user *)arg, |
| 1701 | sizeof(struct qcedev_sha_op_req))) |
| 1702 | return -EFAULT; |
AnilKumar Chimata | b9805a3 | 2017-03-13 16:13:47 +0530 | [diff] [blame^] | 1703 | mutex_lock(&hash_access_lock); |
| 1704 | if (qcedev_check_sha_params(&qcedev_areq.sha_op_req, podev)) { |
| 1705 | mutex_unlock(&hash_access_lock); |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1706 | return -EINVAL; |
AnilKumar Chimata | b9805a3 | 2017-03-13 16:13:47 +0530 | [diff] [blame^] | 1707 | } |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1708 | qcedev_areq.op_type = QCEDEV_CRYPTO_OPER_SHA; |
| 1709 | err = qcedev_hash_init(&qcedev_areq, handle, &sg_src); |
AnilKumar Chimata | b9805a3 | 2017-03-13 16:13:47 +0530 | [diff] [blame^] | 1710 | if (err) { |
| 1711 | mutex_unlock(&hash_access_lock); |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1712 | return err; |
AnilKumar Chimata | b9805a3 | 2017-03-13 16:13:47 +0530 | [diff] [blame^] | 1713 | } |
| 1714 | mutex_unlock(&hash_access_lock); |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1715 | if (copy_to_user((void __user *)arg, &qcedev_areq.sha_op_req, |
| 1716 | sizeof(struct qcedev_sha_op_req))) |
| 1717 | return -EFAULT; |
| 1718 | } |
| 1719 | handle->sha_ctxt.init_done = true; |
| 1720 | break; |
| 1721 | case QCEDEV_IOCTL_GET_CMAC_REQ: |
| 1722 | if (!podev->ce_support.cmac) |
| 1723 | return -ENOTTY; |
| 1724 | case QCEDEV_IOCTL_SHA_UPDATE_REQ: |
| 1725 | { |
| 1726 | struct scatterlist sg_src; |
| 1727 | |
| 1728 | if (copy_from_user(&qcedev_areq.sha_op_req, |
| 1729 | (void __user *)arg, |
| 1730 | sizeof(struct qcedev_sha_op_req))) |
| 1731 | return -EFAULT; |
AnilKumar Chimata | b9805a3 | 2017-03-13 16:13:47 +0530 | [diff] [blame^] | 1732 | mutex_lock(&hash_access_lock); |
| 1733 | if (qcedev_check_sha_params(&qcedev_areq.sha_op_req, podev)) { |
| 1734 | mutex_unlock(&hash_access_lock); |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1735 | return -EINVAL; |
AnilKumar Chimata | b9805a3 | 2017-03-13 16:13:47 +0530 | [diff] [blame^] | 1736 | } |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1737 | qcedev_areq.op_type = QCEDEV_CRYPTO_OPER_SHA; |
| 1738 | |
| 1739 | if (qcedev_areq.sha_op_req.alg == QCEDEV_ALG_AES_CMAC) { |
| 1740 | err = qcedev_hash_cmac(&qcedev_areq, handle, &sg_src); |
AnilKumar Chimata | b9805a3 | 2017-03-13 16:13:47 +0530 | [diff] [blame^] | 1741 | if (err) { |
| 1742 | mutex_unlock(&hash_access_lock); |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1743 | return err; |
AnilKumar Chimata | b9805a3 | 2017-03-13 16:13:47 +0530 | [diff] [blame^] | 1744 | } |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1745 | } else { |
| 1746 | if (handle->sha_ctxt.init_done == false) { |
| 1747 | pr_err("%s Init was not called\n", __func__); |
AnilKumar Chimata | b9805a3 | 2017-03-13 16:13:47 +0530 | [diff] [blame^] | 1748 | mutex_unlock(&hash_access_lock); |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1749 | return -EINVAL; |
| 1750 | } |
| 1751 | err = qcedev_hash_update(&qcedev_areq, handle, &sg_src); |
AnilKumar Chimata | b9805a3 | 2017-03-13 16:13:47 +0530 | [diff] [blame^] | 1752 | if (err) { |
| 1753 | mutex_unlock(&hash_access_lock); |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1754 | return err; |
AnilKumar Chimata | b9805a3 | 2017-03-13 16:13:47 +0530 | [diff] [blame^] | 1755 | } |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1756 | } |
| 1757 | |
| 1758 | if (handle->sha_ctxt.diglen > QCEDEV_MAX_SHA_DIGEST) { |
| 1759 | pr_err("Invalid sha_ctxt.diglen %d\n", |
| 1760 | handle->sha_ctxt.diglen); |
AnilKumar Chimata | b9805a3 | 2017-03-13 16:13:47 +0530 | [diff] [blame^] | 1761 | mutex_unlock(&hash_access_lock); |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1762 | return -EINVAL; |
| 1763 | } |
| 1764 | memcpy(&qcedev_areq.sha_op_req.digest[0], |
| 1765 | &handle->sha_ctxt.digest[0], |
| 1766 | handle->sha_ctxt.diglen); |
AnilKumar Chimata | b9805a3 | 2017-03-13 16:13:47 +0530 | [diff] [blame^] | 1767 | mutex_unlock(&hash_access_lock); |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1768 | if (copy_to_user((void __user *)arg, &qcedev_areq.sha_op_req, |
| 1769 | sizeof(struct qcedev_sha_op_req))) |
| 1770 | return -EFAULT; |
| 1771 | } |
| 1772 | break; |
| 1773 | |
| 1774 | case QCEDEV_IOCTL_SHA_FINAL_REQ: |
| 1775 | |
| 1776 | if (handle->sha_ctxt.init_done == false) { |
| 1777 | pr_err("%s Init was not called\n", __func__); |
| 1778 | return -EINVAL; |
| 1779 | } |
| 1780 | if (copy_from_user(&qcedev_areq.sha_op_req, |
| 1781 | (void __user *)arg, |
| 1782 | sizeof(struct qcedev_sha_op_req))) |
| 1783 | return -EFAULT; |
AnilKumar Chimata | b9805a3 | 2017-03-13 16:13:47 +0530 | [diff] [blame^] | 1784 | mutex_lock(&hash_access_lock); |
| 1785 | if (qcedev_check_sha_params(&qcedev_areq.sha_op_req, podev)) { |
| 1786 | mutex_unlock(&hash_access_lock); |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1787 | return -EINVAL; |
AnilKumar Chimata | b9805a3 | 2017-03-13 16:13:47 +0530 | [diff] [blame^] | 1788 | } |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1789 | qcedev_areq.op_type = QCEDEV_CRYPTO_OPER_SHA; |
| 1790 | err = qcedev_hash_final(&qcedev_areq, handle); |
AnilKumar Chimata | b9805a3 | 2017-03-13 16:13:47 +0530 | [diff] [blame^] | 1791 | if (err) { |
| 1792 | mutex_unlock(&hash_access_lock); |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1793 | return err; |
AnilKumar Chimata | b9805a3 | 2017-03-13 16:13:47 +0530 | [diff] [blame^] | 1794 | } |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1795 | qcedev_areq.sha_op_req.diglen = handle->sha_ctxt.diglen; |
| 1796 | memcpy(&qcedev_areq.sha_op_req.digest[0], |
| 1797 | &handle->sha_ctxt.digest[0], |
| 1798 | handle->sha_ctxt.diglen); |
AnilKumar Chimata | b9805a3 | 2017-03-13 16:13:47 +0530 | [diff] [blame^] | 1799 | mutex_unlock(&hash_access_lock); |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1800 | if (copy_to_user((void __user *)arg, &qcedev_areq.sha_op_req, |
| 1801 | sizeof(struct qcedev_sha_op_req))) |
| 1802 | return -EFAULT; |
| 1803 | handle->sha_ctxt.init_done = false; |
| 1804 | break; |
| 1805 | |
| 1806 | case QCEDEV_IOCTL_GET_SHA_REQ: |
| 1807 | { |
| 1808 | struct scatterlist sg_src; |
| 1809 | |
| 1810 | if (copy_from_user(&qcedev_areq.sha_op_req, |
| 1811 | (void __user *)arg, |
| 1812 | sizeof(struct qcedev_sha_op_req))) |
| 1813 | return -EFAULT; |
AnilKumar Chimata | b9805a3 | 2017-03-13 16:13:47 +0530 | [diff] [blame^] | 1814 | mutex_lock(&hash_access_lock); |
| 1815 | if (qcedev_check_sha_params(&qcedev_areq.sha_op_req, podev)) { |
| 1816 | mutex_unlock(&hash_access_lock); |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1817 | return -EINVAL; |
AnilKumar Chimata | b9805a3 | 2017-03-13 16:13:47 +0530 | [diff] [blame^] | 1818 | } |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1819 | qcedev_areq.op_type = QCEDEV_CRYPTO_OPER_SHA; |
| 1820 | qcedev_hash_init(&qcedev_areq, handle, &sg_src); |
| 1821 | err = qcedev_hash_update(&qcedev_areq, handle, &sg_src); |
AnilKumar Chimata | b9805a3 | 2017-03-13 16:13:47 +0530 | [diff] [blame^] | 1822 | if (err) { |
| 1823 | mutex_unlock(&hash_access_lock); |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1824 | return err; |
AnilKumar Chimata | b9805a3 | 2017-03-13 16:13:47 +0530 | [diff] [blame^] | 1825 | } |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1826 | err = qcedev_hash_final(&qcedev_areq, handle); |
AnilKumar Chimata | b9805a3 | 2017-03-13 16:13:47 +0530 | [diff] [blame^] | 1827 | if (err) { |
| 1828 | mutex_unlock(&hash_access_lock); |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1829 | return err; |
AnilKumar Chimata | b9805a3 | 2017-03-13 16:13:47 +0530 | [diff] [blame^] | 1830 | } |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1831 | qcedev_areq.sha_op_req.diglen = handle->sha_ctxt.diglen; |
| 1832 | memcpy(&qcedev_areq.sha_op_req.digest[0], |
| 1833 | &handle->sha_ctxt.digest[0], |
| 1834 | handle->sha_ctxt.diglen); |
AnilKumar Chimata | b9805a3 | 2017-03-13 16:13:47 +0530 | [diff] [blame^] | 1835 | mutex_unlock(&hash_access_lock); |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1836 | if (copy_to_user((void __user *)arg, &qcedev_areq.sha_op_req, |
| 1837 | sizeof(struct qcedev_sha_op_req))) |
| 1838 | return -EFAULT; |
| 1839 | } |
| 1840 | break; |
| 1841 | |
| 1842 | default: |
| 1843 | return -ENOTTY; |
| 1844 | } |
| 1845 | |
| 1846 | return err; |
| 1847 | } |
| 1848 | |
| 1849 | static int qcedev_probe(struct platform_device *pdev) |
| 1850 | { |
| 1851 | void *handle = NULL; |
| 1852 | int rc = 0; |
| 1853 | struct qcedev_control *podev; |
| 1854 | struct msm_ce_hw_support *platform_support; |
| 1855 | |
| 1856 | podev = &qce_dev[0]; |
| 1857 | |
| 1858 | podev->high_bw_req_count = 0; |
| 1859 | INIT_LIST_HEAD(&podev->ready_commands); |
| 1860 | podev->active_command = NULL; |
| 1861 | |
| 1862 | spin_lock_init(&podev->lock); |
| 1863 | |
| 1864 | tasklet_init(&podev->done_tasklet, req_done, (unsigned long)podev); |
| 1865 | |
AnilKumar Chimata | e5e6051 | 2017-05-03 14:06:59 -0700 | [diff] [blame] | 1866 | podev->platform_support.bus_scale_table = (struct msm_bus_scale_pdata *) |
| 1867 | msm_bus_cl_get_pdata(pdev); |
| 1868 | if (!podev->platform_support.bus_scale_table) { |
| 1869 | pr_err("bus_scale_table is NULL\n"); |
| 1870 | return -ENODATA; |
| 1871 | } |
| 1872 | podev->bus_scale_handle = msm_bus_scale_register_client( |
| 1873 | (struct msm_bus_scale_pdata *) |
| 1874 | podev->platform_support.bus_scale_table); |
| 1875 | if (!podev->bus_scale_handle) { |
| 1876 | pr_err("%s not able to get bus scale\n", __func__); |
| 1877 | return -ENOMEM; |
| 1878 | } |
| 1879 | |
| 1880 | rc = msm_bus_scale_client_update_request(podev->bus_scale_handle, 1); |
| 1881 | if (rc) { |
| 1882 | pr_err("%s Unable to set to high bandwidth\n", __func__); |
| 1883 | goto exit_unregister_bus_scale; |
| 1884 | } |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1885 | handle = qce_open(pdev, &rc); |
| 1886 | if (handle == NULL) { |
AnilKumar Chimata | e5e6051 | 2017-05-03 14:06:59 -0700 | [diff] [blame] | 1887 | rc = -ENODEV; |
| 1888 | goto exit_scale_busbandwidth; |
| 1889 | } |
| 1890 | rc = msm_bus_scale_client_update_request(podev->bus_scale_handle, 0); |
| 1891 | if (rc) { |
| 1892 | pr_err("%s Unable to set to low bandwidth\n", __func__); |
| 1893 | goto exit_qce_close; |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1894 | } |
| 1895 | |
| 1896 | podev->qce = handle; |
| 1897 | podev->pdev = pdev; |
| 1898 | platform_set_drvdata(pdev, podev); |
| 1899 | |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1900 | qce_hw_support(podev->qce, &podev->ce_support); |
| 1901 | if (podev->ce_support.bam) { |
| 1902 | podev->platform_support.ce_shared = 0; |
| 1903 | podev->platform_support.shared_ce_resource = 0; |
| 1904 | podev->platform_support.hw_key_support = |
| 1905 | podev->ce_support.hw_key; |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1906 | podev->platform_support.sha_hmac = 1; |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1907 | } else { |
| 1908 | platform_support = |
| 1909 | (struct msm_ce_hw_support *)pdev->dev.platform_data; |
| 1910 | podev->platform_support.ce_shared = platform_support->ce_shared; |
| 1911 | podev->platform_support.shared_ce_resource = |
| 1912 | platform_support->shared_ce_resource; |
| 1913 | podev->platform_support.hw_key_support = |
| 1914 | platform_support->hw_key_support; |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1915 | podev->platform_support.sha_hmac = platform_support->sha_hmac; |
| 1916 | } |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1917 | |
AnilKumar Chimata | e5e6051 | 2017-05-03 14:06:59 -0700 | [diff] [blame] | 1918 | rc = misc_register(&podev->miscdevice); |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1919 | if (rc >= 0) |
| 1920 | return 0; |
| 1921 | |
AnilKumar Chimata | e5e6051 | 2017-05-03 14:06:59 -0700 | [diff] [blame] | 1922 | misc_deregister(&podev->miscdevice); |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1923 | |
AnilKumar Chimata | e5e6051 | 2017-05-03 14:06:59 -0700 | [diff] [blame] | 1924 | exit_qce_close: |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1925 | if (handle) |
| 1926 | qce_close(handle); |
AnilKumar Chimata | e5e6051 | 2017-05-03 14:06:59 -0700 | [diff] [blame] | 1927 | exit_scale_busbandwidth: |
| 1928 | msm_bus_scale_client_update_request(podev->bus_scale_handle, 0); |
| 1929 | exit_unregister_bus_scale: |
| 1930 | if (podev->platform_support.bus_scale_table != NULL) |
| 1931 | msm_bus_scale_unregister_client(podev->bus_scale_handle); |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1932 | platform_set_drvdata(pdev, NULL); |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1933 | podev->pdev = NULL; |
AnilKumar Chimata | e5e6051 | 2017-05-03 14:06:59 -0700 | [diff] [blame] | 1934 | podev->qce = NULL; |
| 1935 | |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1936 | return rc; |
| 1937 | }; |
| 1938 | |
| 1939 | static int qcedev_remove(struct platform_device *pdev) |
| 1940 | { |
| 1941 | struct qcedev_control *podev; |
| 1942 | |
| 1943 | podev = platform_get_drvdata(pdev); |
| 1944 | if (!podev) |
| 1945 | return 0; |
| 1946 | if (podev->qce) |
| 1947 | qce_close(podev->qce); |
| 1948 | |
| 1949 | if (podev->platform_support.bus_scale_table != NULL) |
| 1950 | msm_bus_scale_unregister_client(podev->bus_scale_handle); |
| 1951 | |
| 1952 | if (podev->miscdevice.minor != MISC_DYNAMIC_MINOR) |
| 1953 | misc_deregister(&podev->miscdevice); |
| 1954 | tasklet_kill(&podev->done_tasklet); |
| 1955 | return 0; |
| 1956 | }; |
| 1957 | |
| 1958 | static int qcedev_suspend(struct platform_device *pdev, pm_message_t state) |
| 1959 | { |
| 1960 | struct qcedev_control *podev; |
| 1961 | int ret; |
| 1962 | |
| 1963 | podev = platform_get_drvdata(pdev); |
| 1964 | |
| 1965 | if (!podev || !podev->platform_support.bus_scale_table) |
| 1966 | return 0; |
| 1967 | |
| 1968 | mutex_lock(&qcedev_sent_bw_req); |
| 1969 | if (podev->high_bw_req_count) { |
AnilKumar Chimata | e5e6051 | 2017-05-03 14:06:59 -0700 | [diff] [blame] | 1970 | ret = qcedev_control_clocks(podev, false); |
| 1971 | if (ret) |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1972 | goto suspend_exit; |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1973 | } |
| 1974 | |
| 1975 | suspend_exit: |
| 1976 | mutex_unlock(&qcedev_sent_bw_req); |
| 1977 | return 0; |
| 1978 | } |
| 1979 | |
| 1980 | static int qcedev_resume(struct platform_device *pdev) |
| 1981 | { |
| 1982 | struct qcedev_control *podev; |
| 1983 | int ret; |
| 1984 | |
| 1985 | podev = platform_get_drvdata(pdev); |
| 1986 | |
| 1987 | if (!podev || !podev->platform_support.bus_scale_table) |
| 1988 | return 0; |
| 1989 | |
| 1990 | mutex_lock(&qcedev_sent_bw_req); |
| 1991 | if (podev->high_bw_req_count) { |
AnilKumar Chimata | e5e6051 | 2017-05-03 14:06:59 -0700 | [diff] [blame] | 1992 | ret = qcedev_control_clocks(podev, true); |
| 1993 | if (ret) |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1994 | goto resume_exit; |
AnilKumar Chimata | e78789a | 2017-04-07 12:18:46 -0700 | [diff] [blame] | 1995 | } |
| 1996 | |
| 1997 | resume_exit: |
| 1998 | mutex_unlock(&qcedev_sent_bw_req); |
| 1999 | return 0; |
| 2000 | } |
| 2001 | |
| 2002 | static const struct of_device_id qcedev_match[] = { |
| 2003 | { .compatible = "qcom,qcedev", |
| 2004 | }, |
| 2005 | {} |
| 2006 | }; |
| 2007 | |
| 2008 | static struct platform_driver qcedev_plat_driver = { |
| 2009 | .probe = qcedev_probe, |
| 2010 | .remove = qcedev_remove, |
| 2011 | .suspend = qcedev_suspend, |
| 2012 | .resume = qcedev_resume, |
| 2013 | .driver = { |
| 2014 | .name = "qce", |
| 2015 | .owner = THIS_MODULE, |
| 2016 | .of_match_table = qcedev_match, |
| 2017 | }, |
| 2018 | }; |
| 2019 | |
| 2020 | static int _disp_stats(int id) |
| 2021 | { |
| 2022 | struct qcedev_stat *pstat; |
| 2023 | int len = 0; |
| 2024 | |
| 2025 | pstat = &_qcedev_stat; |
| 2026 | len = scnprintf(_debug_read_buf, DEBUG_MAX_RW_BUF - 1, |
| 2027 | "\nQTI QCE dev driver %d Statistics:\n", |
| 2028 | id + 1); |
| 2029 | |
| 2030 | len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1, |
| 2031 | " Encryption operation success : %d\n", |
| 2032 | pstat->qcedev_enc_success); |
| 2033 | len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1, |
| 2034 | " Encryption operation fail : %d\n", |
| 2035 | pstat->qcedev_enc_fail); |
| 2036 | len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1, |
| 2037 | " Decryption operation success : %d\n", |
| 2038 | pstat->qcedev_dec_success); |
| 2039 | |
| 2040 | len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1, |
| 2041 | " Encryption operation fail : %d\n", |
| 2042 | pstat->qcedev_dec_fail); |
| 2043 | |
| 2044 | return len; |
| 2045 | } |
| 2046 | |
| 2047 | static int _debug_stats_open(struct inode *inode, struct file *file) |
| 2048 | { |
| 2049 | file->private_data = inode->i_private; |
| 2050 | return 0; |
| 2051 | } |
| 2052 | |
| 2053 | static ssize_t _debug_stats_read(struct file *file, char __user *buf, |
| 2054 | size_t count, loff_t *ppos) |
| 2055 | { |
| 2056 | ssize_t rc = -EINVAL; |
| 2057 | int qcedev = *((int *) file->private_data); |
| 2058 | int len; |
| 2059 | |
| 2060 | len = _disp_stats(qcedev); |
| 2061 | |
| 2062 | if (len <= count) |
| 2063 | rc = simple_read_from_buffer((void __user *) buf, len, |
| 2064 | ppos, (void *) _debug_read_buf, len); |
| 2065 | return rc; |
| 2066 | } |
| 2067 | |
| 2068 | static ssize_t _debug_stats_write(struct file *file, const char __user *buf, |
| 2069 | size_t count, loff_t *ppos) |
| 2070 | { |
| 2071 | memset((char *)&_qcedev_stat, 0, sizeof(struct qcedev_stat)); |
| 2072 | return count; |
| 2073 | }; |
| 2074 | |
| 2075 | static const struct file_operations _debug_stats_ops = { |
| 2076 | .open = _debug_stats_open, |
| 2077 | .read = _debug_stats_read, |
| 2078 | .write = _debug_stats_write, |
| 2079 | }; |
| 2080 | |
| 2081 | static int _qcedev_debug_init(void) |
| 2082 | { |
| 2083 | int rc; |
| 2084 | char name[DEBUG_MAX_FNAME]; |
| 2085 | struct dentry *dent; |
| 2086 | |
| 2087 | _debug_dent = debugfs_create_dir("qcedev", NULL); |
| 2088 | if (IS_ERR(_debug_dent)) { |
| 2089 | pr_err("qcedev debugfs_create_dir fail, error %ld\n", |
| 2090 | PTR_ERR(_debug_dent)); |
| 2091 | return PTR_ERR(_debug_dent); |
| 2092 | } |
| 2093 | |
| 2094 | snprintf(name, DEBUG_MAX_FNAME-1, "stats-%d", 1); |
| 2095 | _debug_qcedev = 0; |
| 2096 | dent = debugfs_create_file(name, 0644, _debug_dent, |
| 2097 | &_debug_qcedev, &_debug_stats_ops); |
| 2098 | if (dent == NULL) { |
| 2099 | pr_err("qcedev debugfs_create_file fail, error %ld\n", |
| 2100 | PTR_ERR(dent)); |
| 2101 | rc = PTR_ERR(dent); |
| 2102 | goto err; |
| 2103 | } |
| 2104 | return 0; |
| 2105 | err: |
| 2106 | debugfs_remove_recursive(_debug_dent); |
| 2107 | return rc; |
| 2108 | } |
| 2109 | |
| 2110 | static int qcedev_init(void) |
| 2111 | { |
| 2112 | int rc; |
| 2113 | |
| 2114 | rc = _qcedev_debug_init(); |
| 2115 | if (rc) |
| 2116 | return rc; |
| 2117 | return platform_driver_register(&qcedev_plat_driver); |
| 2118 | } |
| 2119 | |
| 2120 | static void qcedev_exit(void) |
| 2121 | { |
| 2122 | debugfs_remove_recursive(_debug_dent); |
| 2123 | platform_driver_unregister(&qcedev_plat_driver); |
| 2124 | } |
| 2125 | |
| 2126 | MODULE_LICENSE("GPL v2"); |
| 2127 | MODULE_DESCRIPTION("QTI DEV Crypto driver"); |
| 2128 | |
| 2129 | module_init(qcedev_init); |
| 2130 | module_exit(qcedev_exit); |