Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 1 | /* |
| 2 | * MPC83xx SPI controller driver. |
| 3 | * |
| 4 | * Maintainer: Kumar Gala |
| 5 | * |
| 6 | * Copyright (C) 2006 Polycom, Inc. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify it |
| 9 | * under the terms of the GNU General Public License as published by the |
| 10 | * Free Software Foundation; either version 2 of the License, or (at your |
| 11 | * option) any later version. |
| 12 | */ |
| 13 | #include <linux/module.h> |
| 14 | #include <linux/init.h> |
| 15 | #include <linux/types.h> |
| 16 | #include <linux/kernel.h> |
Anton Vorontsov | fd8a11e | 2009-06-18 16:49:01 -0700 | [diff] [blame] | 17 | #include <linux/bug.h> |
Anton Vorontsov | 35b4b3c | 2009-03-31 15:24:37 -0700 | [diff] [blame] | 18 | #include <linux/errno.h> |
| 19 | #include <linux/err.h> |
Anton Vorontsov | 9effb95 | 2009-06-18 16:49:05 -0700 | [diff] [blame] | 20 | #include <linux/io.h> |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 21 | #include <linux/completion.h> |
| 22 | #include <linux/interrupt.h> |
| 23 | #include <linux/delay.h> |
| 24 | #include <linux/irq.h> |
| 25 | #include <linux/device.h> |
| 26 | #include <linux/spi/spi.h> |
| 27 | #include <linux/spi/spi_bitbang.h> |
| 28 | #include <linux/platform_device.h> |
| 29 | #include <linux/fsl_devices.h> |
Anton Vorontsov | 35b4b3c | 2009-03-31 15:24:37 -0700 | [diff] [blame] | 30 | #include <linux/of.h> |
| 31 | #include <linux/of_platform.h> |
| 32 | #include <linux/gpio.h> |
| 33 | #include <linux/of_gpio.h> |
| 34 | #include <linux/of_spi.h> |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 35 | |
Anton Vorontsov | 35b4b3c | 2009-03-31 15:24:37 -0700 | [diff] [blame] | 36 | #include <sysdev/fsl_soc.h> |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 37 | #include <asm/irq.h> |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 38 | |
| 39 | /* SPI Controller registers */ |
| 40 | struct mpc83xx_spi_reg { |
| 41 | u8 res1[0x20]; |
| 42 | __be32 mode; |
| 43 | __be32 event; |
| 44 | __be32 mask; |
| 45 | __be32 command; |
| 46 | __be32 transmit; |
| 47 | __be32 receive; |
| 48 | }; |
| 49 | |
| 50 | /* SPI Controller mode register definitions */ |
Anton Vorontsov | 2a485d7 | 2007-07-31 00:38:45 -0700 | [diff] [blame] | 51 | #define SPMODE_LOOP (1 << 30) |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 52 | #define SPMODE_CI_INACTIVEHIGH (1 << 29) |
| 53 | #define SPMODE_CP_BEGIN_EDGECLK (1 << 28) |
| 54 | #define SPMODE_DIV16 (1 << 27) |
| 55 | #define SPMODE_REV (1 << 26) |
| 56 | #define SPMODE_MS (1 << 25) |
| 57 | #define SPMODE_ENABLE (1 << 24) |
| 58 | #define SPMODE_LEN(x) ((x) << 20) |
| 59 | #define SPMODE_PM(x) ((x) << 16) |
Joakim Tjernlund | f29ba28 | 2007-07-17 04:04:12 -0700 | [diff] [blame] | 60 | #define SPMODE_OP (1 << 14) |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 61 | #define SPMODE_CG(x) ((x) << 7) |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 62 | |
| 63 | /* |
| 64 | * Default for SPI Mode: |
| 65 | * SPI MODE 0 (inactive low, phase middle, MSB, 8-bit length, slow clk |
| 66 | */ |
| 67 | #define SPMODE_INIT_VAL (SPMODE_CI_INACTIVEHIGH | SPMODE_DIV16 | SPMODE_REV | \ |
| 68 | SPMODE_MS | SPMODE_LEN(7) | SPMODE_PM(0xf)) |
| 69 | |
| 70 | /* SPIE register values */ |
| 71 | #define SPIE_NE 0x00000200 /* Not empty */ |
| 72 | #define SPIE_NF 0x00000100 /* Not full */ |
| 73 | |
| 74 | /* SPIM register values */ |
| 75 | #define SPIM_NE 0x00000200 /* Not empty */ |
| 76 | #define SPIM_NF 0x00000100 /* Not full */ |
| 77 | |
| 78 | /* SPI Controller driver's private data. */ |
| 79 | struct mpc83xx_spi { |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 80 | struct mpc83xx_spi_reg __iomem *base; |
| 81 | |
| 82 | /* rx & tx bufs from the spi_transfer */ |
| 83 | const void *tx; |
| 84 | void *rx; |
| 85 | |
| 86 | /* functions to deal with different sized buffers */ |
| 87 | void (*get_rx) (u32 rx_data, struct mpc83xx_spi *); |
| 88 | u32(*get_tx) (struct mpc83xx_spi *); |
| 89 | |
| 90 | unsigned int count; |
Anton Vorontsov | 35b4b3c | 2009-03-31 15:24:37 -0700 | [diff] [blame] | 91 | unsigned int irq; |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 92 | |
| 93 | unsigned nsecs; /* (clock cycle time)/2 */ |
| 94 | |
Anton Vorontsov | e24a4d1 | 2007-08-10 13:01:01 -0700 | [diff] [blame] | 95 | u32 spibrg; /* SPIBRG input clock */ |
Joakim Tjernlund | f29ba28 | 2007-07-17 04:04:12 -0700 | [diff] [blame] | 96 | u32 rx_shift; /* RX data reg shift when in qe mode */ |
| 97 | u32 tx_shift; /* TX data reg shift when in qe mode */ |
| 98 | |
| 99 | bool qe_mode; |
| 100 | |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 101 | u8 busy; |
| 102 | |
| 103 | struct workqueue_struct *workqueue; |
| 104 | struct work_struct work; |
| 105 | |
| 106 | struct list_head queue; |
| 107 | spinlock_t lock; |
| 108 | |
| 109 | struct completion done; |
| 110 | }; |
| 111 | |
| 112 | struct spi_mpc83xx_cs { |
| 113 | /* functions to deal with different sized buffers */ |
| 114 | void (*get_rx) (u32 rx_data, struct mpc83xx_spi *); |
| 115 | u32 (*get_tx) (struct mpc83xx_spi *); |
| 116 | u32 rx_shift; /* RX data reg shift when in qe mode */ |
| 117 | u32 tx_shift; /* TX data reg shift when in qe mode */ |
| 118 | u32 hw_mode; /* Holds HW mode register settings */ |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 119 | }; |
| 120 | |
Anton Vorontsov | 9effb95 | 2009-06-18 16:49:05 -0700 | [diff] [blame] | 121 | static inline void mpc83xx_spi_write_reg(__be32 __iomem *reg, u32 val) |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 122 | { |
| 123 | out_be32(reg, val); |
| 124 | } |
| 125 | |
Anton Vorontsov | 9effb95 | 2009-06-18 16:49:05 -0700 | [diff] [blame] | 126 | static inline u32 mpc83xx_spi_read_reg(__be32 __iomem *reg) |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 127 | { |
| 128 | return in_be32(reg); |
| 129 | } |
| 130 | |
| 131 | #define MPC83XX_SPI_RX_BUF(type) \ |
Anton Vorontsov | 34c8a20 | 2009-03-31 15:24:35 -0700 | [diff] [blame] | 132 | static \ |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 133 | void mpc83xx_spi_rx_buf_##type(u32 data, struct mpc83xx_spi *mpc83xx_spi) \ |
| 134 | { \ |
Anton Vorontsov | 9effb95 | 2009-06-18 16:49:05 -0700 | [diff] [blame] | 135 | type *rx = mpc83xx_spi->rx; \ |
Joakim Tjernlund | f29ba28 | 2007-07-17 04:04:12 -0700 | [diff] [blame] | 136 | *rx++ = (type)(data >> mpc83xx_spi->rx_shift); \ |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 137 | mpc83xx_spi->rx = rx; \ |
| 138 | } |
| 139 | |
| 140 | #define MPC83XX_SPI_TX_BUF(type) \ |
Anton Vorontsov | 34c8a20 | 2009-03-31 15:24:35 -0700 | [diff] [blame] | 141 | static \ |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 142 | u32 mpc83xx_spi_tx_buf_##type(struct mpc83xx_spi *mpc83xx_spi) \ |
| 143 | { \ |
| 144 | u32 data; \ |
Anton Vorontsov | 9effb95 | 2009-06-18 16:49:05 -0700 | [diff] [blame] | 145 | const type *tx = mpc83xx_spi->tx; \ |
David Brownell | 4b1badf | 2006-12-29 16:48:39 -0800 | [diff] [blame] | 146 | if (!tx) \ |
| 147 | return 0; \ |
Joakim Tjernlund | f29ba28 | 2007-07-17 04:04:12 -0700 | [diff] [blame] | 148 | data = *tx++ << mpc83xx_spi->tx_shift; \ |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 149 | mpc83xx_spi->tx = tx; \ |
| 150 | return data; \ |
| 151 | } |
| 152 | |
| 153 | MPC83XX_SPI_RX_BUF(u8) |
| 154 | MPC83XX_SPI_RX_BUF(u16) |
| 155 | MPC83XX_SPI_RX_BUF(u32) |
| 156 | MPC83XX_SPI_TX_BUF(u8) |
| 157 | MPC83XX_SPI_TX_BUF(u16) |
| 158 | MPC83XX_SPI_TX_BUF(u32) |
| 159 | |
| 160 | static void mpc83xx_spi_chipselect(struct spi_device *spi, int value) |
| 161 | { |
Anton Vorontsov | 364fdbc | 2009-03-31 15:24:36 -0700 | [diff] [blame] | 162 | struct mpc83xx_spi *mpc83xx_spi = spi_master_get_devdata(spi->master); |
| 163 | struct fsl_spi_platform_data *pdata = spi->dev.parent->platform_data; |
| 164 | bool pol = spi->mode & SPI_CS_HIGH; |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 165 | struct spi_mpc83xx_cs *cs = spi->controller_state; |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 166 | |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 167 | if (value == BITBANG_CS_INACTIVE) { |
Anton Vorontsov | 364fdbc | 2009-03-31 15:24:36 -0700 | [diff] [blame] | 168 | if (pdata->cs_control) |
| 169 | pdata->cs_control(spi, !pol); |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 170 | } |
| 171 | |
| 172 | if (value == BITBANG_CS_ACTIVE) { |
| 173 | u32 regval = mpc83xx_spi_read_reg(&mpc83xx_spi->base->mode); |
Anton Vorontsov | a44648b | 2007-08-10 13:01:02 -0700 | [diff] [blame] | 174 | |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 175 | mpc83xx_spi->rx_shift = cs->rx_shift; |
| 176 | mpc83xx_spi->tx_shift = cs->tx_shift; |
| 177 | mpc83xx_spi->get_rx = cs->get_rx; |
| 178 | mpc83xx_spi->get_tx = cs->get_tx; |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 179 | |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 180 | if (cs->hw_mode != regval) { |
| 181 | unsigned long flags; |
Anton Vorontsov | 34c8a20 | 2009-03-31 15:24:35 -0700 | [diff] [blame] | 182 | __be32 __iomem *mode = &mpc83xx_spi->base->mode; |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 183 | |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 184 | regval = cs->hw_mode; |
| 185 | /* Turn off IRQs locally to minimize time that |
| 186 | * SPI is disabled |
| 187 | */ |
| 188 | local_irq_save(flags); |
| 189 | /* Turn off SPI unit prior changing mode */ |
Anton Vorontsov | 34c8a20 | 2009-03-31 15:24:35 -0700 | [diff] [blame] | 190 | mpc83xx_spi_write_reg(mode, regval & ~SPMODE_ENABLE); |
| 191 | mpc83xx_spi_write_reg(mode, regval); |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 192 | local_irq_restore(flags); |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 193 | } |
Anton Vorontsov | 364fdbc | 2009-03-31 15:24:36 -0700 | [diff] [blame] | 194 | if (pdata->cs_control) |
| 195 | pdata->cs_control(spi, pol); |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 196 | } |
| 197 | } |
| 198 | |
| 199 | static |
| 200 | int mpc83xx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t) |
| 201 | { |
| 202 | struct mpc83xx_spi *mpc83xx_spi; |
| 203 | u32 regval; |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 204 | u8 bits_per_word, pm; |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 205 | u32 hz; |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 206 | struct spi_mpc83xx_cs *cs = spi->controller_state; |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 207 | |
| 208 | mpc83xx_spi = spi_master_get_devdata(spi->master); |
| 209 | |
| 210 | if (t) { |
| 211 | bits_per_word = t->bits_per_word; |
| 212 | hz = t->speed_hz; |
| 213 | } else { |
| 214 | bits_per_word = 0; |
| 215 | hz = 0; |
| 216 | } |
| 217 | |
| 218 | /* spi_transfer level calls that work per-word */ |
| 219 | if (!bits_per_word) |
| 220 | bits_per_word = spi->bits_per_word; |
| 221 | |
| 222 | /* Make sure its a bit width we support [4..16, 32] */ |
| 223 | if ((bits_per_word < 4) |
| 224 | || ((bits_per_word > 16) && (bits_per_word != 32))) |
| 225 | return -EINVAL; |
| 226 | |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 227 | if (!hz) |
| 228 | hz = spi->max_speed_hz; |
| 229 | |
| 230 | cs->rx_shift = 0; |
| 231 | cs->tx_shift = 0; |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 232 | if (bits_per_word <= 8) { |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 233 | cs->get_rx = mpc83xx_spi_rx_buf_u8; |
| 234 | cs->get_tx = mpc83xx_spi_tx_buf_u8; |
Joakim Tjernlund | f29ba28 | 2007-07-17 04:04:12 -0700 | [diff] [blame] | 235 | if (mpc83xx_spi->qe_mode) { |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 236 | cs->rx_shift = 16; |
| 237 | cs->tx_shift = 24; |
Joakim Tjernlund | f29ba28 | 2007-07-17 04:04:12 -0700 | [diff] [blame] | 238 | } |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 239 | } else if (bits_per_word <= 16) { |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 240 | cs->get_rx = mpc83xx_spi_rx_buf_u16; |
| 241 | cs->get_tx = mpc83xx_spi_tx_buf_u16; |
Joakim Tjernlund | f29ba28 | 2007-07-17 04:04:12 -0700 | [diff] [blame] | 242 | if (mpc83xx_spi->qe_mode) { |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 243 | cs->rx_shift = 16; |
| 244 | cs->tx_shift = 16; |
Joakim Tjernlund | f29ba28 | 2007-07-17 04:04:12 -0700 | [diff] [blame] | 245 | } |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 246 | } else if (bits_per_word <= 32) { |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 247 | cs->get_rx = mpc83xx_spi_rx_buf_u32; |
| 248 | cs->get_tx = mpc83xx_spi_tx_buf_u32; |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 249 | } else |
| 250 | return -EINVAL; |
| 251 | |
Anton Vorontsov | 35cc0b9 | 2007-07-31 00:38:42 -0700 | [diff] [blame] | 252 | if (mpc83xx_spi->qe_mode && spi->mode & SPI_LSB_FIRST) { |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 253 | cs->tx_shift = 0; |
Anton Vorontsov | 35cc0b9 | 2007-07-31 00:38:42 -0700 | [diff] [blame] | 254 | if (bits_per_word <= 8) |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 255 | cs->rx_shift = 8; |
Anton Vorontsov | 35cc0b9 | 2007-07-31 00:38:42 -0700 | [diff] [blame] | 256 | else |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 257 | cs->rx_shift = 0; |
Anton Vorontsov | 35cc0b9 | 2007-07-31 00:38:42 -0700 | [diff] [blame] | 258 | } |
| 259 | |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 260 | mpc83xx_spi->rx_shift = cs->rx_shift; |
| 261 | mpc83xx_spi->tx_shift = cs->tx_shift; |
| 262 | mpc83xx_spi->get_rx = cs->get_rx; |
| 263 | mpc83xx_spi->get_tx = cs->get_tx; |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 264 | |
| 265 | if (bits_per_word == 32) |
| 266 | bits_per_word = 0; |
| 267 | else |
| 268 | bits_per_word = bits_per_word - 1; |
| 269 | |
Anton Vorontsov | 32421da | 2007-07-31 00:38:41 -0700 | [diff] [blame] | 270 | /* mask out bits we are going to set */ |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 271 | cs->hw_mode &= ~(SPMODE_LEN(0xF) | SPMODE_DIV16 |
| 272 | | SPMODE_PM(0xF)); |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 273 | |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 274 | cs->hw_mode |= SPMODE_LEN(bits_per_word); |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 275 | |
Chen Gong | a61f534 | 2008-07-23 21:29:52 -0700 | [diff] [blame] | 276 | if ((mpc83xx_spi->spibrg / hz) > 64) { |
Peter Korsgaard | 53604db | 2008-09-13 02:33:14 -0700 | [diff] [blame] | 277 | cs->hw_mode |= SPMODE_DIV16; |
Chen Gong | a61f534 | 2008-07-23 21:29:52 -0700 | [diff] [blame] | 278 | pm = mpc83xx_spi->spibrg / (hz * 64); |
Anton Vorontsov | fd8a11e | 2009-06-18 16:49:01 -0700 | [diff] [blame] | 279 | |
| 280 | WARN_ONCE(pm > 16, "%s: Requested speed is too low: %d Hz. " |
| 281 | "Will use %d Hz instead.\n", dev_name(&spi->dev), |
| 282 | hz, mpc83xx_spi->spibrg / 1024); |
| 283 | if (pm > 16) |
Peter Korsgaard | 53604db | 2008-09-13 02:33:14 -0700 | [diff] [blame] | 284 | pm = 16; |
Chen Gong | a61f534 | 2008-07-23 21:29:52 -0700 | [diff] [blame] | 285 | } else |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 286 | pm = mpc83xx_spi->spibrg / (hz * 4); |
Chen Gong | a61f534 | 2008-07-23 21:29:52 -0700 | [diff] [blame] | 287 | if (pm) |
| 288 | pm--; |
| 289 | |
| 290 | cs->hw_mode |= SPMODE_PM(pm); |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 291 | regval = mpc83xx_spi_read_reg(&mpc83xx_spi->base->mode); |
| 292 | if (cs->hw_mode != regval) { |
| 293 | unsigned long flags; |
Anton Vorontsov | 34c8a20 | 2009-03-31 15:24:35 -0700 | [diff] [blame] | 294 | __be32 __iomem *mode = &mpc83xx_spi->base->mode; |
David Brownell | dccd573 | 2007-07-17 04:04:02 -0700 | [diff] [blame] | 295 | |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 296 | regval = cs->hw_mode; |
| 297 | /* Turn off IRQs locally to minimize time |
| 298 | * that SPI is disabled |
| 299 | */ |
| 300 | local_irq_save(flags); |
| 301 | /* Turn off SPI unit prior changing mode */ |
Anton Vorontsov | 34c8a20 | 2009-03-31 15:24:35 -0700 | [diff] [blame] | 302 | mpc83xx_spi_write_reg(mode, regval & ~SPMODE_ENABLE); |
| 303 | mpc83xx_spi_write_reg(mode, regval); |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 304 | local_irq_restore(flags); |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 305 | } |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 306 | return 0; |
| 307 | } |
| 308 | |
| 309 | static int mpc83xx_spi_bufs(struct spi_device *spi, struct spi_transfer *t) |
| 310 | { |
| 311 | struct mpc83xx_spi *mpc83xx_spi; |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 312 | u32 word, len, bits_per_word; |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 313 | |
| 314 | mpc83xx_spi = spi_master_get_devdata(spi->master); |
| 315 | |
| 316 | mpc83xx_spi->tx = t->tx_buf; |
| 317 | mpc83xx_spi->rx = t->rx_buf; |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 318 | bits_per_word = spi->bits_per_word; |
| 319 | if (t->bits_per_word) |
| 320 | bits_per_word = t->bits_per_word; |
| 321 | len = t->len; |
Peter Korsgaard | aa77d96 | 2008-09-13 02:33:15 -0700 | [diff] [blame] | 322 | if (bits_per_word > 8) { |
| 323 | /* invalid length? */ |
| 324 | if (len & 1) |
| 325 | return -EINVAL; |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 326 | len /= 2; |
Peter Korsgaard | aa77d96 | 2008-09-13 02:33:15 -0700 | [diff] [blame] | 327 | } |
| 328 | if (bits_per_word > 16) { |
| 329 | /* invalid length? */ |
| 330 | if (len & 1) |
| 331 | return -EINVAL; |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 332 | len /= 2; |
Peter Korsgaard | aa77d96 | 2008-09-13 02:33:15 -0700 | [diff] [blame] | 333 | } |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 334 | mpc83xx_spi->count = len; |
Peter Korsgaard | aa77d96 | 2008-09-13 02:33:15 -0700 | [diff] [blame] | 335 | |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 336 | INIT_COMPLETION(mpc83xx_spi->done); |
| 337 | |
| 338 | /* enable rx ints */ |
| 339 | mpc83xx_spi_write_reg(&mpc83xx_spi->base->mask, SPIM_NE); |
| 340 | |
| 341 | /* transmit word */ |
| 342 | word = mpc83xx_spi->get_tx(mpc83xx_spi); |
| 343 | mpc83xx_spi_write_reg(&mpc83xx_spi->base->transmit, word); |
| 344 | |
| 345 | wait_for_completion(&mpc83xx_spi->done); |
| 346 | |
| 347 | /* disable rx ints */ |
| 348 | mpc83xx_spi_write_reg(&mpc83xx_spi->base->mask, 0); |
| 349 | |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 350 | return mpc83xx_spi->count; |
| 351 | } |
| 352 | |
Anton Vorontsov | b9b9af1 | 2009-06-18 16:49:06 -0700 | [diff] [blame^] | 353 | static void mpc83xx_spi_do_one_msg(struct spi_message *m) |
| 354 | { |
| 355 | struct spi_device *spi = m->spi; |
| 356 | struct spi_transfer *t; |
| 357 | unsigned int cs_change; |
| 358 | const int nsecs = 50; |
| 359 | int status; |
| 360 | |
| 361 | cs_change = 1; |
| 362 | status = 0; |
| 363 | list_for_each_entry(t, &m->transfers, transfer_list) { |
| 364 | if (t->bits_per_word || t->speed_hz) { |
| 365 | /* Don't allow changes if CS is active */ |
| 366 | status = -EINVAL; |
| 367 | |
| 368 | if (cs_change) |
| 369 | status = mpc83xx_spi_setup_transfer(spi, t); |
| 370 | if (status < 0) |
| 371 | break; |
| 372 | } |
| 373 | |
| 374 | if (cs_change) { |
| 375 | mpc83xx_spi_chipselect(spi, BITBANG_CS_ACTIVE); |
| 376 | ndelay(nsecs); |
| 377 | } |
| 378 | cs_change = t->cs_change; |
| 379 | if (t->len) |
| 380 | status = mpc83xx_spi_bufs(spi, t); |
| 381 | if (status) { |
| 382 | status = -EMSGSIZE; |
| 383 | break; |
| 384 | } |
| 385 | m->actual_length += t->len; |
| 386 | |
| 387 | if (t->delay_usecs) |
| 388 | udelay(t->delay_usecs); |
| 389 | |
| 390 | if (cs_change) { |
| 391 | ndelay(nsecs); |
| 392 | mpc83xx_spi_chipselect(spi, BITBANG_CS_INACTIVE); |
| 393 | ndelay(nsecs); |
| 394 | } |
| 395 | } |
| 396 | |
| 397 | m->status = status; |
| 398 | m->complete(m->context); |
| 399 | |
| 400 | if (status || !cs_change) { |
| 401 | ndelay(nsecs); |
| 402 | mpc83xx_spi_chipselect(spi, BITBANG_CS_INACTIVE); |
| 403 | } |
| 404 | |
| 405 | mpc83xx_spi_setup_transfer(spi, NULL); |
| 406 | } |
| 407 | |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 408 | static void mpc83xx_spi_work(struct work_struct *work) |
| 409 | { |
Anton Vorontsov | b9b9af1 | 2009-06-18 16:49:06 -0700 | [diff] [blame^] | 410 | struct mpc83xx_spi *mpc83xx_spi = container_of(work, struct mpc83xx_spi, |
| 411 | work); |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 412 | |
| 413 | spin_lock_irq(&mpc83xx_spi->lock); |
| 414 | mpc83xx_spi->busy = 1; |
| 415 | while (!list_empty(&mpc83xx_spi->queue)) { |
Anton Vorontsov | b9b9af1 | 2009-06-18 16:49:06 -0700 | [diff] [blame^] | 416 | struct spi_message *m = container_of(mpc83xx_spi->queue.next, |
| 417 | struct spi_message, queue); |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 418 | |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 419 | list_del_init(&m->queue); |
| 420 | spin_unlock_irq(&mpc83xx_spi->lock); |
| 421 | |
Anton Vorontsov | b9b9af1 | 2009-06-18 16:49:06 -0700 | [diff] [blame^] | 422 | mpc83xx_spi_do_one_msg(m); |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 423 | |
| 424 | spin_lock_irq(&mpc83xx_spi->lock); |
| 425 | } |
| 426 | mpc83xx_spi->busy = 0; |
| 427 | spin_unlock_irq(&mpc83xx_spi->lock); |
| 428 | } |
| 429 | |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 430 | static int mpc83xx_spi_setup(struct spi_device *spi) |
| 431 | { |
| 432 | struct mpc83xx_spi *mpc83xx_spi; |
| 433 | int retval; |
| 434 | u32 hw_mode; |
| 435 | struct spi_mpc83xx_cs *cs = spi->controller_state; |
| 436 | |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 437 | if (!spi->max_speed_hz) |
| 438 | return -EINVAL; |
| 439 | |
| 440 | if (!cs) { |
| 441 | cs = kzalloc(sizeof *cs, GFP_KERNEL); |
| 442 | if (!cs) |
| 443 | return -ENOMEM; |
| 444 | spi->controller_state = cs; |
| 445 | } |
| 446 | mpc83xx_spi = spi_master_get_devdata(spi->master); |
| 447 | |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 448 | hw_mode = cs->hw_mode; /* Save orginal settings */ |
| 449 | cs->hw_mode = mpc83xx_spi_read_reg(&mpc83xx_spi->base->mode); |
| 450 | /* mask out bits we are going to set */ |
| 451 | cs->hw_mode &= ~(SPMODE_CP_BEGIN_EDGECLK | SPMODE_CI_INACTIVEHIGH |
| 452 | | SPMODE_REV | SPMODE_LOOP); |
| 453 | |
| 454 | if (spi->mode & SPI_CPHA) |
| 455 | cs->hw_mode |= SPMODE_CP_BEGIN_EDGECLK; |
| 456 | if (spi->mode & SPI_CPOL) |
| 457 | cs->hw_mode |= SPMODE_CI_INACTIVEHIGH; |
| 458 | if (!(spi->mode & SPI_LSB_FIRST)) |
| 459 | cs->hw_mode |= SPMODE_REV; |
| 460 | if (spi->mode & SPI_LOOP) |
| 461 | cs->hw_mode |= SPMODE_LOOP; |
| 462 | |
| 463 | retval = mpc83xx_spi_setup_transfer(spi, NULL); |
| 464 | if (retval < 0) { |
| 465 | cs->hw_mode = hw_mode; /* Restore settings */ |
| 466 | return retval; |
| 467 | } |
| 468 | |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 469 | #if 0 /* Don't think this is needed */ |
| 470 | /* NOTE we _need_ to call chipselect() early, ideally with adapter |
| 471 | * setup, unless the hardware defaults cooperate to avoid confusion |
| 472 | * between normal (active low) and inverted chipselects. |
| 473 | */ |
| 474 | |
| 475 | /* deselect chip (low or high) */ |
| 476 | spin_lock(&mpc83xx_spi->lock); |
| 477 | if (!mpc83xx_spi->busy) |
| 478 | mpc83xx_spi_chipselect(spi, BITBANG_CS_INACTIVE); |
| 479 | spin_unlock(&mpc83xx_spi->lock); |
| 480 | #endif |
| 481 | return 0; |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 482 | } |
| 483 | |
Anton Vorontsov | 34c8a20 | 2009-03-31 15:24:35 -0700 | [diff] [blame] | 484 | static irqreturn_t mpc83xx_spi_irq(s32 irq, void *context_data) |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 485 | { |
| 486 | struct mpc83xx_spi *mpc83xx_spi = context_data; |
| 487 | u32 event; |
| 488 | irqreturn_t ret = IRQ_NONE; |
| 489 | |
| 490 | /* Get interrupt events(tx/rx) */ |
| 491 | event = mpc83xx_spi_read_reg(&mpc83xx_spi->base->event); |
| 492 | |
| 493 | /* We need handle RX first */ |
| 494 | if (event & SPIE_NE) { |
| 495 | u32 rx_data = mpc83xx_spi_read_reg(&mpc83xx_spi->base->receive); |
| 496 | |
| 497 | if (mpc83xx_spi->rx) |
| 498 | mpc83xx_spi->get_rx(rx_data, mpc83xx_spi); |
| 499 | |
| 500 | ret = IRQ_HANDLED; |
| 501 | } |
| 502 | |
| 503 | if ((event & SPIE_NF) == 0) |
| 504 | /* spin until TX is done */ |
| 505 | while (((event = |
| 506 | mpc83xx_spi_read_reg(&mpc83xx_spi->base->event)) & |
| 507 | SPIE_NF) == 0) |
Anton Vorontsov | 9effb95 | 2009-06-18 16:49:05 -0700 | [diff] [blame] | 508 | cpu_relax(); |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 509 | |
| 510 | mpc83xx_spi->count -= 1; |
| 511 | if (mpc83xx_spi->count) { |
Jan Andersson | 65e213c | 2007-09-11 15:23:30 -0700 | [diff] [blame] | 512 | u32 word = mpc83xx_spi->get_tx(mpc83xx_spi); |
| 513 | mpc83xx_spi_write_reg(&mpc83xx_spi->base->transmit, word); |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 514 | } else { |
| 515 | complete(&mpc83xx_spi->done); |
| 516 | } |
| 517 | |
| 518 | /* Clear the events */ |
| 519 | mpc83xx_spi_write_reg(&mpc83xx_spi->base->event, event); |
| 520 | |
| 521 | return ret; |
| 522 | } |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 523 | static int mpc83xx_spi_transfer(struct spi_device *spi, |
| 524 | struct spi_message *m) |
| 525 | { |
| 526 | struct mpc83xx_spi *mpc83xx_spi = spi_master_get_devdata(spi->master); |
| 527 | unsigned long flags; |
| 528 | |
| 529 | m->actual_length = 0; |
| 530 | m->status = -EINPROGRESS; |
| 531 | |
| 532 | spin_lock_irqsave(&mpc83xx_spi->lock, flags); |
| 533 | list_add_tail(&m->queue, &mpc83xx_spi->queue); |
| 534 | queue_work(mpc83xx_spi->workqueue, &mpc83xx_spi->work); |
| 535 | spin_unlock_irqrestore(&mpc83xx_spi->lock, flags); |
| 536 | |
| 537 | return 0; |
| 538 | } |
| 539 | |
| 540 | |
| 541 | static void mpc83xx_spi_cleanup(struct spi_device *spi) |
| 542 | { |
| 543 | kfree(spi->controller_state); |
| 544 | } |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 545 | |
Anton Vorontsov | 35b4b3c | 2009-03-31 15:24:37 -0700 | [diff] [blame] | 546 | static struct spi_master * __devinit |
| 547 | mpc83xx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq) |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 548 | { |
Anton Vorontsov | 35b4b3c | 2009-03-31 15:24:37 -0700 | [diff] [blame] | 549 | struct fsl_spi_platform_data *pdata = dev->platform_data; |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 550 | struct spi_master *master; |
| 551 | struct mpc83xx_spi *mpc83xx_spi; |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 552 | u32 regval; |
| 553 | int ret = 0; |
| 554 | |
Anton Vorontsov | 35b4b3c | 2009-03-31 15:24:37 -0700 | [diff] [blame] | 555 | master = spi_alloc_master(dev, sizeof(struct mpc83xx_spi)); |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 556 | if (master == NULL) { |
| 557 | ret = -ENOMEM; |
| 558 | goto err; |
| 559 | } |
| 560 | |
Anton Vorontsov | 35b4b3c | 2009-03-31 15:24:37 -0700 | [diff] [blame] | 561 | dev_set_drvdata(dev, master); |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 562 | |
David Brownell | e7db06b | 2009-06-17 16:26:04 -0700 | [diff] [blame] | 563 | /* the spi->mode bits understood by this driver: */ |
| 564 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH |
| 565 | | SPI_LSB_FIRST | SPI_LOOP; |
| 566 | |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 567 | master->setup = mpc83xx_spi_setup; |
| 568 | master->transfer = mpc83xx_spi_transfer; |
| 569 | master->cleanup = mpc83xx_spi_cleanup; |
| 570 | |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 571 | mpc83xx_spi = spi_master_get_devdata(master); |
Joakim Tjernlund | f29ba28 | 2007-07-17 04:04:12 -0700 | [diff] [blame] | 572 | mpc83xx_spi->qe_mode = pdata->qe_mode; |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 573 | mpc83xx_spi->get_rx = mpc83xx_spi_rx_buf_u8; |
| 574 | mpc83xx_spi->get_tx = mpc83xx_spi_tx_buf_u8; |
Anton Vorontsov | 59a0ea5 | 2008-01-24 18:40:03 +0300 | [diff] [blame] | 575 | mpc83xx_spi->spibrg = pdata->sysclk; |
Anton Vorontsov | e24a4d1 | 2007-08-10 13:01:01 -0700 | [diff] [blame] | 576 | |
Joakim Tjernlund | f29ba28 | 2007-07-17 04:04:12 -0700 | [diff] [blame] | 577 | mpc83xx_spi->rx_shift = 0; |
| 578 | mpc83xx_spi->tx_shift = 0; |
| 579 | if (mpc83xx_spi->qe_mode) { |
| 580 | mpc83xx_spi->rx_shift = 16; |
| 581 | mpc83xx_spi->tx_shift = 24; |
| 582 | } |
| 583 | |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 584 | init_completion(&mpc83xx_spi->done); |
| 585 | |
Anton Vorontsov | 35b4b3c | 2009-03-31 15:24:37 -0700 | [diff] [blame] | 586 | mpc83xx_spi->base = ioremap(mem->start, mem->end - mem->start + 1); |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 587 | if (mpc83xx_spi->base == NULL) { |
| 588 | ret = -ENOMEM; |
| 589 | goto put_master; |
| 590 | } |
| 591 | |
Anton Vorontsov | 35b4b3c | 2009-03-31 15:24:37 -0700 | [diff] [blame] | 592 | mpc83xx_spi->irq = irq; |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 593 | |
| 594 | /* Register for SPI Interrupt */ |
| 595 | ret = request_irq(mpc83xx_spi->irq, mpc83xx_spi_irq, |
| 596 | 0, "mpc83xx_spi", mpc83xx_spi); |
| 597 | |
| 598 | if (ret != 0) |
| 599 | goto unmap_io; |
| 600 | |
| 601 | master->bus_num = pdata->bus_num; |
| 602 | master->num_chipselect = pdata->max_chipselect; |
| 603 | |
| 604 | /* SPI controller initializations */ |
| 605 | mpc83xx_spi_write_reg(&mpc83xx_spi->base->mode, 0); |
| 606 | mpc83xx_spi_write_reg(&mpc83xx_spi->base->mask, 0); |
| 607 | mpc83xx_spi_write_reg(&mpc83xx_spi->base->command, 0); |
| 608 | mpc83xx_spi_write_reg(&mpc83xx_spi->base->event, 0xffffffff); |
| 609 | |
| 610 | /* Enable SPI interface */ |
| 611 | regval = pdata->initial_spmode | SPMODE_INIT_VAL | SPMODE_ENABLE; |
Joakim Tjernlund | f29ba28 | 2007-07-17 04:04:12 -0700 | [diff] [blame] | 612 | if (pdata->qe_mode) |
| 613 | regval |= SPMODE_OP; |
| 614 | |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 615 | mpc83xx_spi_write_reg(&mpc83xx_spi->base->mode, regval); |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 616 | spin_lock_init(&mpc83xx_spi->lock); |
| 617 | init_completion(&mpc83xx_spi->done); |
| 618 | INIT_WORK(&mpc83xx_spi->work, mpc83xx_spi_work); |
| 619 | INIT_LIST_HEAD(&mpc83xx_spi->queue); |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 620 | |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 621 | mpc83xx_spi->workqueue = create_singlethread_workqueue( |
Kay Sievers | 6c7377a | 2009-03-24 16:38:21 -0700 | [diff] [blame] | 622 | dev_name(master->dev.parent)); |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 623 | if (mpc83xx_spi->workqueue == NULL) { |
| 624 | ret = -EBUSY; |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 625 | goto free_irq; |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 626 | } |
| 627 | |
| 628 | ret = spi_register_master(master); |
| 629 | if (ret < 0) |
| 630 | goto unreg_master; |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 631 | |
| 632 | printk(KERN_INFO |
| 633 | "%s: MPC83xx SPI Controller driver at 0x%p (irq = %d)\n", |
Anton Vorontsov | 35b4b3c | 2009-03-31 15:24:37 -0700 | [diff] [blame] | 634 | dev_name(dev), mpc83xx_spi->base, mpc83xx_spi->irq); |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 635 | |
Anton Vorontsov | 35b4b3c | 2009-03-31 15:24:37 -0700 | [diff] [blame] | 636 | return master; |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 637 | |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 638 | unreg_master: |
| 639 | destroy_workqueue(mpc83xx_spi->workqueue); |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 640 | free_irq: |
| 641 | free_irq(mpc83xx_spi->irq, mpc83xx_spi); |
| 642 | unmap_io: |
| 643 | iounmap(mpc83xx_spi->base); |
| 644 | put_master: |
| 645 | spi_master_put(master); |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 646 | err: |
Anton Vorontsov | 35b4b3c | 2009-03-31 15:24:37 -0700 | [diff] [blame] | 647 | return ERR_PTR(ret); |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 648 | } |
| 649 | |
Anton Vorontsov | 35b4b3c | 2009-03-31 15:24:37 -0700 | [diff] [blame] | 650 | static int __devexit mpc83xx_spi_remove(struct device *dev) |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 651 | { |
| 652 | struct mpc83xx_spi *mpc83xx_spi; |
| 653 | struct spi_master *master; |
| 654 | |
Anton Vorontsov | 35b4b3c | 2009-03-31 15:24:37 -0700 | [diff] [blame] | 655 | master = dev_get_drvdata(dev); |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 656 | mpc83xx_spi = spi_master_get_devdata(master); |
| 657 | |
Joakim Tjernlund | c9bfcb3 | 2008-05-12 14:02:30 -0700 | [diff] [blame] | 658 | flush_workqueue(mpc83xx_spi->workqueue); |
| 659 | destroy_workqueue(mpc83xx_spi->workqueue); |
| 660 | spi_unregister_master(master); |
| 661 | |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 662 | free_irq(mpc83xx_spi->irq, mpc83xx_spi); |
| 663 | iounmap(mpc83xx_spi->base); |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 664 | |
| 665 | return 0; |
| 666 | } |
| 667 | |
Anton Vorontsov | 35b4b3c | 2009-03-31 15:24:37 -0700 | [diff] [blame] | 668 | struct mpc83xx_spi_probe_info { |
| 669 | struct fsl_spi_platform_data pdata; |
| 670 | int *gpios; |
| 671 | bool *alow_flags; |
| 672 | }; |
| 673 | |
| 674 | static struct mpc83xx_spi_probe_info * |
| 675 | to_of_pinfo(struct fsl_spi_platform_data *pdata) |
| 676 | { |
| 677 | return container_of(pdata, struct mpc83xx_spi_probe_info, pdata); |
| 678 | } |
| 679 | |
| 680 | static void mpc83xx_spi_cs_control(struct spi_device *spi, bool on) |
| 681 | { |
| 682 | struct device *dev = spi->dev.parent; |
| 683 | struct mpc83xx_spi_probe_info *pinfo = to_of_pinfo(dev->platform_data); |
| 684 | u16 cs = spi->chip_select; |
| 685 | int gpio = pinfo->gpios[cs]; |
| 686 | bool alow = pinfo->alow_flags[cs]; |
| 687 | |
| 688 | gpio_set_value(gpio, on ^ alow); |
| 689 | } |
| 690 | |
| 691 | static int of_mpc83xx_spi_get_chipselects(struct device *dev) |
| 692 | { |
| 693 | struct device_node *np = dev_archdata_get_node(&dev->archdata); |
| 694 | struct fsl_spi_platform_data *pdata = dev->platform_data; |
| 695 | struct mpc83xx_spi_probe_info *pinfo = to_of_pinfo(pdata); |
| 696 | unsigned int ngpios; |
| 697 | int i = 0; |
| 698 | int ret; |
| 699 | |
| 700 | ngpios = of_gpio_count(np); |
| 701 | if (!ngpios) { |
| 702 | /* |
| 703 | * SPI w/o chip-select line. One SPI device is still permitted |
| 704 | * though. |
| 705 | */ |
| 706 | pdata->max_chipselect = 1; |
| 707 | return 0; |
| 708 | } |
| 709 | |
Roel Kluin | 0214154 | 2009-06-16 15:31:15 -0700 | [diff] [blame] | 710 | pinfo->gpios = kmalloc(ngpios * sizeof(*pinfo->gpios), GFP_KERNEL); |
Anton Vorontsov | 35b4b3c | 2009-03-31 15:24:37 -0700 | [diff] [blame] | 711 | if (!pinfo->gpios) |
| 712 | return -ENOMEM; |
Roel Kluin | 0214154 | 2009-06-16 15:31:15 -0700 | [diff] [blame] | 713 | memset(pinfo->gpios, -1, ngpios * sizeof(*pinfo->gpios)); |
Anton Vorontsov | 35b4b3c | 2009-03-31 15:24:37 -0700 | [diff] [blame] | 714 | |
Roel Kluin | 0214154 | 2009-06-16 15:31:15 -0700 | [diff] [blame] | 715 | pinfo->alow_flags = kzalloc(ngpios * sizeof(*pinfo->alow_flags), |
Anton Vorontsov | 35b4b3c | 2009-03-31 15:24:37 -0700 | [diff] [blame] | 716 | GFP_KERNEL); |
| 717 | if (!pinfo->alow_flags) { |
| 718 | ret = -ENOMEM; |
| 719 | goto err_alloc_flags; |
| 720 | } |
| 721 | |
| 722 | for (; i < ngpios; i++) { |
| 723 | int gpio; |
| 724 | enum of_gpio_flags flags; |
| 725 | |
| 726 | gpio = of_get_gpio_flags(np, i, &flags); |
| 727 | if (!gpio_is_valid(gpio)) { |
| 728 | dev_err(dev, "invalid gpio #%d: %d\n", i, gpio); |
| 729 | goto err_loop; |
| 730 | } |
| 731 | |
| 732 | ret = gpio_request(gpio, dev_name(dev)); |
| 733 | if (ret) { |
| 734 | dev_err(dev, "can't request gpio #%d: %d\n", i, ret); |
| 735 | goto err_loop; |
| 736 | } |
| 737 | |
| 738 | pinfo->gpios[i] = gpio; |
| 739 | pinfo->alow_flags[i] = flags & OF_GPIO_ACTIVE_LOW; |
| 740 | |
| 741 | ret = gpio_direction_output(pinfo->gpios[i], |
| 742 | pinfo->alow_flags[i]); |
| 743 | if (ret) { |
| 744 | dev_err(dev, "can't set output direction for gpio " |
| 745 | "#%d: %d\n", i, ret); |
| 746 | goto err_loop; |
| 747 | } |
| 748 | } |
| 749 | |
| 750 | pdata->max_chipselect = ngpios; |
| 751 | pdata->cs_control = mpc83xx_spi_cs_control; |
| 752 | |
| 753 | return 0; |
| 754 | |
| 755 | err_loop: |
| 756 | while (i >= 0) { |
| 757 | if (gpio_is_valid(pinfo->gpios[i])) |
| 758 | gpio_free(pinfo->gpios[i]); |
| 759 | i--; |
| 760 | } |
| 761 | |
| 762 | kfree(pinfo->alow_flags); |
| 763 | pinfo->alow_flags = NULL; |
| 764 | err_alloc_flags: |
| 765 | kfree(pinfo->gpios); |
| 766 | pinfo->gpios = NULL; |
| 767 | return ret; |
| 768 | } |
| 769 | |
| 770 | static int of_mpc83xx_spi_free_chipselects(struct device *dev) |
| 771 | { |
| 772 | struct fsl_spi_platform_data *pdata = dev->platform_data; |
| 773 | struct mpc83xx_spi_probe_info *pinfo = to_of_pinfo(pdata); |
| 774 | int i; |
| 775 | |
| 776 | if (!pinfo->gpios) |
| 777 | return 0; |
| 778 | |
| 779 | for (i = 0; i < pdata->max_chipselect; i++) { |
| 780 | if (gpio_is_valid(pinfo->gpios[i])) |
| 781 | gpio_free(pinfo->gpios[i]); |
| 782 | } |
| 783 | |
| 784 | kfree(pinfo->gpios); |
| 785 | kfree(pinfo->alow_flags); |
| 786 | return 0; |
| 787 | } |
| 788 | |
| 789 | static int __devinit of_mpc83xx_spi_probe(struct of_device *ofdev, |
| 790 | const struct of_device_id *ofid) |
| 791 | { |
| 792 | struct device *dev = &ofdev->dev; |
| 793 | struct device_node *np = ofdev->node; |
| 794 | struct mpc83xx_spi_probe_info *pinfo; |
| 795 | struct fsl_spi_platform_data *pdata; |
| 796 | struct spi_master *master; |
| 797 | struct resource mem; |
| 798 | struct resource irq; |
| 799 | const void *prop; |
| 800 | int ret = -ENOMEM; |
| 801 | |
| 802 | pinfo = kzalloc(sizeof(*pinfo), GFP_KERNEL); |
| 803 | if (!pinfo) |
| 804 | return -ENOMEM; |
| 805 | |
| 806 | pdata = &pinfo->pdata; |
| 807 | dev->platform_data = pdata; |
| 808 | |
| 809 | /* Allocate bus num dynamically. */ |
| 810 | pdata->bus_num = -1; |
| 811 | |
| 812 | /* SPI controller is either clocked from QE or SoC clock. */ |
| 813 | pdata->sysclk = get_brgfreq(); |
| 814 | if (pdata->sysclk == -1) { |
| 815 | pdata->sysclk = fsl_get_sys_freq(); |
| 816 | if (pdata->sysclk == -1) { |
| 817 | ret = -ENODEV; |
| 818 | goto err_clk; |
| 819 | } |
| 820 | } |
| 821 | |
| 822 | prop = of_get_property(np, "mode", NULL); |
| 823 | if (prop && !strcmp(prop, "cpu-qe")) |
| 824 | pdata->qe_mode = 1; |
| 825 | |
| 826 | ret = of_mpc83xx_spi_get_chipselects(dev); |
| 827 | if (ret) |
| 828 | goto err; |
| 829 | |
| 830 | ret = of_address_to_resource(np, 0, &mem); |
| 831 | if (ret) |
| 832 | goto err; |
| 833 | |
| 834 | ret = of_irq_to_resource(np, 0, &irq); |
| 835 | if (!ret) { |
| 836 | ret = -EINVAL; |
| 837 | goto err; |
| 838 | } |
| 839 | |
| 840 | master = mpc83xx_spi_probe(dev, &mem, irq.start); |
| 841 | if (IS_ERR(master)) { |
| 842 | ret = PTR_ERR(master); |
| 843 | goto err; |
| 844 | } |
| 845 | |
| 846 | of_register_spi_devices(master, np); |
| 847 | |
| 848 | return 0; |
| 849 | |
| 850 | err: |
| 851 | of_mpc83xx_spi_free_chipselects(dev); |
| 852 | err_clk: |
| 853 | kfree(pinfo); |
| 854 | return ret; |
| 855 | } |
| 856 | |
| 857 | static int __devexit of_mpc83xx_spi_remove(struct of_device *ofdev) |
| 858 | { |
| 859 | int ret; |
| 860 | |
| 861 | ret = mpc83xx_spi_remove(&ofdev->dev); |
| 862 | if (ret) |
| 863 | return ret; |
| 864 | of_mpc83xx_spi_free_chipselects(&ofdev->dev); |
| 865 | return 0; |
| 866 | } |
| 867 | |
| 868 | static const struct of_device_id of_mpc83xx_spi_match[] = { |
| 869 | { .compatible = "fsl,spi" }, |
| 870 | {}, |
| 871 | }; |
| 872 | MODULE_DEVICE_TABLE(of, of_mpc83xx_spi_match); |
| 873 | |
| 874 | static struct of_platform_driver of_mpc83xx_spi_driver = { |
| 875 | .name = "mpc83xx_spi", |
| 876 | .match_table = of_mpc83xx_spi_match, |
| 877 | .probe = of_mpc83xx_spi_probe, |
| 878 | .remove = __devexit_p(of_mpc83xx_spi_remove), |
| 879 | }; |
| 880 | |
| 881 | #ifdef CONFIG_MPC832x_RDB |
| 882 | /* |
| 883 | * XXX XXX XXX |
| 884 | * This is "legacy" platform driver, was used by the MPC8323E-RDB boards |
| 885 | * only. The driver should go away soon, since newer MPC8323E-RDB's device |
| 886 | * tree can work with OpenFirmware driver. But for now we support old trees |
| 887 | * as well. |
| 888 | */ |
| 889 | static int __devinit plat_mpc83xx_spi_probe(struct platform_device *pdev) |
| 890 | { |
| 891 | struct resource *mem; |
| 892 | unsigned int irq; |
| 893 | struct spi_master *master; |
| 894 | |
| 895 | if (!pdev->dev.platform_data) |
| 896 | return -EINVAL; |
| 897 | |
| 898 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 899 | if (!mem) |
| 900 | return -EINVAL; |
| 901 | |
| 902 | irq = platform_get_irq(pdev, 0); |
| 903 | if (!irq) |
| 904 | return -EINVAL; |
| 905 | |
| 906 | master = mpc83xx_spi_probe(&pdev->dev, mem, irq); |
| 907 | if (IS_ERR(master)) |
| 908 | return PTR_ERR(master); |
| 909 | return 0; |
| 910 | } |
| 911 | |
| 912 | static int __devexit plat_mpc83xx_spi_remove(struct platform_device *pdev) |
| 913 | { |
| 914 | return mpc83xx_spi_remove(&pdev->dev); |
| 915 | } |
| 916 | |
Kay Sievers | 7e38c3c | 2008-04-10 21:29:20 -0700 | [diff] [blame] | 917 | MODULE_ALIAS("platform:mpc83xx_spi"); |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 918 | static struct platform_driver mpc83xx_spi_driver = { |
Anton Vorontsov | 35b4b3c | 2009-03-31 15:24:37 -0700 | [diff] [blame] | 919 | .probe = plat_mpc83xx_spi_probe, |
| 920 | .remove = __exit_p(plat_mpc83xx_spi_remove), |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 921 | .driver = { |
Kay Sievers | 7e38c3c | 2008-04-10 21:29:20 -0700 | [diff] [blame] | 922 | .name = "mpc83xx_spi", |
| 923 | .owner = THIS_MODULE, |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 924 | }, |
| 925 | }; |
| 926 | |
Anton Vorontsov | 35b4b3c | 2009-03-31 15:24:37 -0700 | [diff] [blame] | 927 | static bool legacy_driver_failed; |
| 928 | |
| 929 | static void __init legacy_driver_register(void) |
| 930 | { |
| 931 | legacy_driver_failed = platform_driver_register(&mpc83xx_spi_driver); |
| 932 | } |
| 933 | |
| 934 | static void __exit legacy_driver_unregister(void) |
| 935 | { |
| 936 | if (legacy_driver_failed) |
| 937 | return; |
| 938 | platform_driver_unregister(&mpc83xx_spi_driver); |
| 939 | } |
| 940 | #else |
| 941 | static void __init legacy_driver_register(void) {} |
| 942 | static void __exit legacy_driver_unregister(void) {} |
| 943 | #endif /* CONFIG_MPC832x_RDB */ |
| 944 | |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 945 | static int __init mpc83xx_spi_init(void) |
| 946 | { |
Anton Vorontsov | 35b4b3c | 2009-03-31 15:24:37 -0700 | [diff] [blame] | 947 | legacy_driver_register(); |
| 948 | return of_register_platform_driver(&of_mpc83xx_spi_driver); |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 949 | } |
| 950 | |
| 951 | static void __exit mpc83xx_spi_exit(void) |
| 952 | { |
Anton Vorontsov | 35b4b3c | 2009-03-31 15:24:37 -0700 | [diff] [blame] | 953 | of_unregister_platform_driver(&of_mpc83xx_spi_driver); |
| 954 | legacy_driver_unregister(); |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 955 | } |
| 956 | |
| 957 | module_init(mpc83xx_spi_init); |
| 958 | module_exit(mpc83xx_spi_exit); |
| 959 | |
| 960 | MODULE_AUTHOR("Kumar Gala"); |
| 961 | MODULE_DESCRIPTION("Simple MPC83xx SPI Driver"); |
| 962 | MODULE_LICENSE("GPL"); |