blob: 5b3d8b157b336eafd58511500e87a4d9076828af [file] [log] [blame]
Thierry Reding307e28e2012-09-20 17:06:06 +02001/include/ "tegra20.dtsi"
2
3/ {
4 model = "Avionic Design Tamonten SOM";
5 compatible = "ad,tamonten", "nvidia,tegra20";
6
7 memory {
8 reg = <0x00000000 0x20000000>;
9 };
10
11 pinmux {
12 pinctrl-names = "default";
13 pinctrl-0 = <&state_default>;
14
15 state_default: pinmux {
16 ata {
17 nvidia,pins = "ata";
18 nvidia,function = "ide";
19 };
20 atb {
21 nvidia,pins = "atb", "gma", "gme";
22 nvidia,function = "sdio4";
23 };
24 atc {
25 nvidia,pins = "atc";
26 nvidia,function = "nand";
27 };
28 atd {
29 nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu",
30 "spia", "spib", "spic";
31 nvidia,function = "gmi";
32 };
33 cdev1 {
34 nvidia,pins = "cdev1";
35 nvidia,function = "plla_out";
36 };
37 cdev2 {
38 nvidia,pins = "cdev2";
39 nvidia,function = "pllp_out4";
40 };
41 crtp {
42 nvidia,pins = "crtp";
43 nvidia,function = "crt";
44 };
45 csus {
46 nvidia,pins = "csus";
47 nvidia,function = "vi_sensor_clk";
48 };
49 dap1 {
50 nvidia,pins = "dap1";
51 nvidia,function = "dap1";
52 };
53 dap2 {
54 nvidia,pins = "dap2";
55 nvidia,function = "dap2";
56 };
57 dap3 {
58 nvidia,pins = "dap3";
59 nvidia,function = "dap3";
60 };
61 dap4 {
62 nvidia,pins = "dap4";
63 nvidia,function = "dap4";
64 };
65 ddc {
66 nvidia,pins = "ddc";
67 nvidia,function = "i2c2";
68 };
69 dta {
70 nvidia,pins = "dta", "dtd";
71 nvidia,function = "sdio2";
72 };
73 dtb {
74 nvidia,pins = "dtb", "dtc", "dte";
75 nvidia,function = "rsvd1";
76 };
77 dtf {
78 nvidia,pins = "dtf";
79 nvidia,function = "i2c3";
80 };
81 gmc {
82 nvidia,pins = "gmc";
83 nvidia,function = "uartd";
84 };
85 gpu7 {
86 nvidia,pins = "gpu7";
87 nvidia,function = "rtck";
88 };
89 gpv {
90 nvidia,pins = "gpv", "slxa", "slxk";
91 nvidia,function = "pcie";
92 };
93 hdint {
94 nvidia,pins = "hdint", "pta";
95 nvidia,function = "hdmi";
96 };
97 i2cp {
98 nvidia,pins = "i2cp";
99 nvidia,function = "i2cp";
100 };
101 irrx {
102 nvidia,pins = "irrx", "irtx";
103 nvidia,function = "uarta";
104 };
105 kbca {
106 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
107 "kbce", "kbcf";
108 nvidia,function = "kbc";
109 };
110 lcsn {
111 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
112 "ld3", "ld4", "ld5", "ld6", "ld7",
113 "ld8", "ld9", "ld10", "ld11", "ld12",
114 "ld13", "ld14", "ld15", "ld16", "ld17",
115 "ldc", "ldi", "lhp0", "lhp1", "lhp2",
116 "lhs", "lm0", "lm1", "lpp", "lpw0",
117 "lpw1", "lpw2", "lsc0", "lsc1", "lsck",
118 "lsda", "lsdi", "lspi", "lvp0", "lvp1",
119 "lvs";
120 nvidia,function = "displaya";
121 };
122 owc {
123 nvidia,pins = "owc", "spdi", "spdo", "uac";
124 nvidia,function = "rsvd2";
125 };
126 pmc {
127 nvidia,pins = "pmc";
128 nvidia,function = "pwr_on";
129 };
130 rm {
131 nvidia,pins = "rm";
132 nvidia,function = "i2c1";
133 };
134 sdb {
135 nvidia,pins = "sdb", "sdc", "sdd";
136 nvidia,function = "pwm";
137 };
138 sdio1 {
139 nvidia,pins = "sdio1";
140 nvidia,function = "sdio1";
141 };
142 slxc {
143 nvidia,pins = "slxc", "slxd";
144 nvidia,function = "spdif";
145 };
146 spid {
147 nvidia,pins = "spid", "spie", "spif";
148 nvidia,function = "spi1";
149 };
150 spig {
151 nvidia,pins = "spig", "spih";
152 nvidia,function = "spi2_alt";
153 };
154 uaa {
155 nvidia,pins = "uaa", "uab", "uda";
156 nvidia,function = "ulpi";
157 };
158 uad {
159 nvidia,pins = "uad";
160 nvidia,function = "irda";
161 };
162 uca {
163 nvidia,pins = "uca", "ucb";
164 nvidia,function = "uartc";
165 };
166 conf_ata {
167 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
168 "cdev1", "cdev2", "dap1", "dtb", "gma",
169 "gmb", "gmc", "gmd", "gme", "gpu7",
170 "gpv", "i2cp", "pta", "rm", "slxa",
171 "slxk", "spia", "spib", "uac";
172 nvidia,pull = <0>;
173 nvidia,tristate = <0>;
174 };
175 conf_ck32 {
176 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
177 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
178 nvidia,pull = <0>;
179 };
180 conf_csus {
181 nvidia,pins = "csus", "spid", "spif";
182 nvidia,pull = <1>;
183 nvidia,tristate = <1>;
184 };
185 conf_crtp {
186 nvidia,pins = "crtp", "dap2", "dap3", "dap4",
187 "dtc", "dte", "dtf", "gpu", "sdio1",
188 "slxc", "slxd", "spdi", "spdo", "spig",
189 "uda";
190 nvidia,pull = <0>;
191 nvidia,tristate = <1>;
192 };
193 conf_ddc {
194 nvidia,pins = "ddc", "dta", "dtd", "kbca",
195 "kbcb", "kbcc", "kbcd", "kbce", "kbcf",
196 "sdc";
197 nvidia,pull = <2>;
198 nvidia,tristate = <0>;
199 };
200 conf_hdint {
201 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
202 "lpw1", "lsc1", "lsck", "lsda", "lsdi",
203 "lvp0", "owc", "sdb";
204 nvidia,tristate = <1>;
205 };
206 conf_irrx {
207 nvidia,pins = "irrx", "irtx", "sdd", "spic",
208 "spie", "spih", "uaa", "uab", "uad",
209 "uca", "ucb";
210 nvidia,pull = <2>;
211 nvidia,tristate = <1>;
212 };
213 conf_lc {
214 nvidia,pins = "lc", "ls";
215 nvidia,pull = <2>;
216 };
217 conf_ld0 {
218 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
219 "ld5", "ld6", "ld7", "ld8", "ld9",
220 "ld10", "ld11", "ld12", "ld13", "ld14",
221 "ld15", "ld16", "ld17", "ldi", "lhp0",
222 "lhp1", "lhp2", "lhs", "lm0", "lpp",
223 "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
224 "lvs", "pmc";
225 nvidia,tristate = <0>;
226 };
227 conf_ld17_0 {
228 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
229 "ld23_22";
230 nvidia,pull = <1>;
231 };
232 };
233 };
234
235 i2s@70002800 {
236 status = "okay";
237 };
238
239 serial@70006300 {
240 clock-frequency = <216000000>;
241 status = "okay";
242 };
243
244 i2c@7000c000 {
245 clock-frequency = <400000>;
246 status = "okay";
247 };
248
249 i2c@7000d000 {
250 clock-frequency = <400000>;
251 status = "okay";
252
253 pmic: tps6586x@34 {
254 compatible = "ti,tps6586x";
255 reg = <0x34>;
256 interrupts = <0 86 0x4>;
257
258 ti,system-power-controller;
259
260 #gpio-cells = <2>;
261 gpio-controller;
262
263 sys-supply = <&vdd_5v0_reg>;
264 vin-sm0-supply = <&sys_reg>;
265 vin-sm1-supply = <&sys_reg>;
266 vin-sm2-supply = <&sys_reg>;
267 vinldo01-supply = <&sm2_reg>;
268 vinldo23-supply = <&sm2_reg>;
269 vinldo4-supply = <&sm2_reg>;
270 vinldo678-supply = <&sm2_reg>;
271 vinldo9-supply = <&sm2_reg>;
272
273 regulators {
Stephen Warrenb9c665d2012-09-20 17:04:06 -0600274 sys_reg: sys {
Thierry Reding307e28e2012-09-20 17:06:06 +0200275 regulator-name = "vdd_sys";
276 regulator-always-on;
277 };
278
Stephen Warrenb9c665d2012-09-20 17:04:06 -0600279 sm0 {
Thierry Reding307e28e2012-09-20 17:06:06 +0200280 regulator-name = "vdd_sys_sm0,vdd_core";
281 regulator-min-microvolt = <1200000>;
282 regulator-max-microvolt = <1200000>;
283 regulator-always-on;
284 };
285
Stephen Warrenb9c665d2012-09-20 17:04:06 -0600286 sm1 {
Thierry Reding307e28e2012-09-20 17:06:06 +0200287 regulator-name = "vdd_sys_sm1,vdd_cpu";
288 regulator-min-microvolt = <1000000>;
289 regulator-max-microvolt = <1000000>;
290 regulator-always-on;
291 };
292
Stephen Warrenb9c665d2012-09-20 17:04:06 -0600293 sm2_reg: sm2 {
Thierry Reding307e28e2012-09-20 17:06:06 +0200294 regulator-name = "vdd_sys_sm2,vin_ldo*";
295 regulator-min-microvolt = <3700000>;
296 regulator-max-microvolt = <3700000>;
297 regulator-always-on;
298 };
299
Stephen Warrenb9c665d2012-09-20 17:04:06 -0600300 ldo0 {
Thierry Reding307e28e2012-09-20 17:06:06 +0200301 regulator-name = "vdd_ldo0,vddio_pex_clk";
302 regulator-min-microvolt = <3300000>;
303 regulator-max-microvolt = <3300000>;
304 };
305
Stephen Warrenb9c665d2012-09-20 17:04:06 -0600306 ldo1 {
Thierry Reding307e28e2012-09-20 17:06:06 +0200307 regulator-name = "vdd_ldo1,avdd_pll*";
308 regulator-min-microvolt = <1100000>;
309 regulator-max-microvolt = <1100000>;
310 regulator-always-on;
311 };
312
Stephen Warrenb9c665d2012-09-20 17:04:06 -0600313 ldo2 {
Thierry Reding307e28e2012-09-20 17:06:06 +0200314 regulator-name = "vdd_ldo2,vdd_rtc";
315 regulator-min-microvolt = <1200000>;
316 regulator-max-microvolt = <1200000>;
317 };
318
Stephen Warrenb9c665d2012-09-20 17:04:06 -0600319 ldo3 {
Thierry Reding307e28e2012-09-20 17:06:06 +0200320 regulator-name = "vdd_ldo3,avdd_usb*";
321 regulator-min-microvolt = <3300000>;
322 regulator-max-microvolt = <3300000>;
323 regulator-always-on;
324 };
325
Stephen Warrenb9c665d2012-09-20 17:04:06 -0600326 ldo4 {
Thierry Reding307e28e2012-09-20 17:06:06 +0200327 regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
328 regulator-min-microvolt = <1800000>;
329 regulator-max-microvolt = <1800000>;
330 regulator-always-on;
331 };
332
Stephen Warrenb9c665d2012-09-20 17:04:06 -0600333 ldo5 {
Thierry Reding307e28e2012-09-20 17:06:06 +0200334 regulator-name = "vdd_ldo5,vcore_mmc";
335 regulator-min-microvolt = <2850000>;
336 regulator-max-microvolt = <2850000>;
337 };
338
Stephen Warrenb9c665d2012-09-20 17:04:06 -0600339 ldo6 {
Thierry Reding307e28e2012-09-20 17:06:06 +0200340 regulator-name = "vdd_ldo6,avdd_vdac";
341 /*
342 * According to the Tegra 2 Automotive
343 * DataSheet, a typical value for this
344 * would be 2.8V, but the PMIC only
345 * supports 2.85V.
346 */
347 regulator-min-microvolt = <2850000>;
348 regulator-max-microvolt = <2850000>;
349 };
350
Stephen Warrenb9c665d2012-09-20 17:04:06 -0600351 ldo7 {
Thierry Reding307e28e2012-09-20 17:06:06 +0200352 regulator-name = "vdd_ldo7,avdd_hdmi";
353 regulator-min-microvolt = <3300000>;
354 regulator-max-microvolt = <3300000>;
355 };
356
Stephen Warrenb9c665d2012-09-20 17:04:06 -0600357 ldo8 {
Thierry Reding307e28e2012-09-20 17:06:06 +0200358 regulator-name = "vdd_ldo8,avdd_hdmi_pll";
359 regulator-min-microvolt = <1800000>;
360 regulator-max-microvolt = <1800000>;
361 };
362
Stephen Warrenb9c665d2012-09-20 17:04:06 -0600363 ldo9 {
Thierry Reding307e28e2012-09-20 17:06:06 +0200364 regulator-name = "vdd_ldo9,vdd_ddr_rx,avdd_cam";
365 /*
366 * According to the Tegra 2 Automotive
367 * DataSheet, a typical value for this
368 * would be 2.8V, but the PMIC only
369 * supports 2.85V.
370 */
371 regulator-min-microvolt = <2850000>;
372 regulator-max-microvolt = <2850000>;
373 regulator-always-on;
374 };
375
Stephen Warrenb9c665d2012-09-20 17:04:06 -0600376 ldo_rtc {
Thierry Reding307e28e2012-09-20 17:06:06 +0200377 regulator-name = "vdd_rtc_out";
378 regulator-min-microvolt = <3300000>;
379 regulator-max-microvolt = <3300000>;
380 regulator-always-on;
381 };
382 };
383 };
384 };
385
386 pmc {
387 nvidia,invert-interrupt;
388 };
389
390 usb@c5008000 {
391 status = "okay";
392 };
393
394 sdhci@c8000600 {
395 cd-gpios = <&gpio 58 0>; /* gpio PH2 */
396 wp-gpios = <&gpio 59 0>; /* gpio PH3 */
397 bus-width = <4>;
398 status = "okay";
399 };
400
401 regulators {
402 compatible = "simple-bus";
403
404 #address-cells = <1>;
405 #size-cells = <0>;
406
407 vdd_5v0_reg: regulator@0 {
408 compatible = "regulator-fixed";
409 reg = <0>;
410 regulator-name = "vdd_5v0";
411 regulator-min-microvolt = <5000000>;
412 regulator-max-microvolt = <5000000>;
413 regulator-always-on;
414 };
415 };
416};