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Paul Mackerras14cf11a2005-09-26 16:04:21 +10001/*
Kumar Gala4c8d3d92005-11-13 16:06:30 -08002 * Modifications by Kumar Gala (galak@kernel.crashing.org) to support
Paul Mackerras14cf11a2005-09-26 16:04:21 +10003 * E500 Book E processors.
4 *
Kumar Gala78f62232010-05-13 14:38:21 -05005 * Copyright 2004,2010 Freescale Semiconductor, Inc.
Paul Mackerras14cf11a2005-09-26 16:04:21 +10006 *
7 * This file contains the routines for initializing the MMU
8 * on the 4xx series of chips.
9 * -- paulus
10 *
11 * Derived from arch/ppc/mm/init.c:
12 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
13 *
14 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
15 * and Cort Dougan (PReP) (cort@cs.nmt.edu)
16 * Copyright (C) 1996 Paul Mackerras
Paul Mackerras14cf11a2005-09-26 16:04:21 +100017 *
18 * Derived from "arch/i386/mm/init.c"
19 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
20 *
21 * This program is free software; you can redistribute it and/or
22 * modify it under the terms of the GNU General Public License
23 * as published by the Free Software Foundation; either version
24 * 2 of the License, or (at your option) any later version.
25 *
26 */
27
Paul Mackerras14cf11a2005-09-26 16:04:21 +100028#include <linux/signal.h>
29#include <linux/sched.h>
30#include <linux/kernel.h>
31#include <linux/errno.h>
32#include <linux/string.h>
33#include <linux/types.h>
34#include <linux/ptrace.h>
35#include <linux/mman.h>
36#include <linux/mm.h>
37#include <linux/swap.h>
38#include <linux/stddef.h>
39#include <linux/vmalloc.h>
40#include <linux/init.h>
41#include <linux/delay.h>
42#include <linux/highmem.h>
Benjamin Herrenschmidte63075a2010-07-06 15:39:01 -070043#include <linux/memblock.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100044
45#include <asm/pgalloc.h>
46#include <asm/prom.h>
47#include <asm/io.h>
48#include <asm/mmu_context.h>
49#include <asm/pgtable.h>
50#include <asm/mmu.h>
51#include <asm/uaccess.h>
52#include <asm/smp.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100053#include <asm/machdep.h>
54#include <asm/setup.h>
55
Kumar Gala99c62dd72008-04-16 05:52:21 +100056#include "mmu_decl.h"
57
Paul Mackerras14cf11a2005-09-26 16:04:21 +100058unsigned int tlbcam_index;
Paul Mackerras14cf11a2005-09-26 16:04:21 +100059
Kumar Gala78f62232010-05-13 14:38:21 -050060#define NUM_TLBCAMS (64)
61struct tlbcam TLBCAM[NUM_TLBCAMS];
Paul Mackerras14cf11a2005-09-26 16:04:21 +100062
63struct tlbcamrange {
Kumar Gala8b27f0b2009-10-15 12:49:01 -050064 unsigned long start;
Paul Mackerras14cf11a2005-09-26 16:04:21 +100065 unsigned long limit;
66 phys_addr_t phys;
67} tlbcam_addrs[NUM_TLBCAMS];
68
69extern unsigned int tlbcam_index;
70
Kumar Gala8b27f0b2009-10-15 12:49:01 -050071unsigned long tlbcam_sz(int idx)
72{
73 return tlbcam_addrs[idx].limit - tlbcam_addrs[idx].start + 1;
74}
75
Paul Mackerras14cf11a2005-09-26 16:04:21 +100076/*
77 * Return PA for this VA if it is mapped by a CAM, or 0
78 */
Kumar Gala6c24b172009-02-09 21:08:07 -060079phys_addr_t v_mapped_by_tlbcam(unsigned long va)
Paul Mackerras14cf11a2005-09-26 16:04:21 +100080{
81 int b;
82 for (b = 0; b < tlbcam_index; ++b)
83 if (va >= tlbcam_addrs[b].start && va < tlbcam_addrs[b].limit)
84 return tlbcam_addrs[b].phys + (va - tlbcam_addrs[b].start);
85 return 0;
86}
87
88/*
89 * Return VA for a given PA or 0 if not mapped
90 */
Kumar Gala6c24b172009-02-09 21:08:07 -060091unsigned long p_mapped_by_tlbcam(phys_addr_t pa)
Paul Mackerras14cf11a2005-09-26 16:04:21 +100092{
93 int b;
94 for (b = 0; b < tlbcam_index; ++b)
95 if (pa >= tlbcam_addrs[b].phys
Kumar Gala8b27f0b2009-10-15 12:49:01 -050096 && pa < (tlbcam_addrs[b].limit-tlbcam_addrs[b].start)
Paul Mackerras14cf11a2005-09-26 16:04:21 +100097 +tlbcam_addrs[b].phys)
98 return tlbcam_addrs[b].start+(pa-tlbcam_addrs[b].phys);
99 return 0;
100}
101
102/*
Becky Bruced10ac372010-06-30 10:23:31 +0000103 * Set up a variable-size TLB entry (tlbcam). The parameters are not checked;
Becky Bruce45594242011-10-12 16:17:02 -0500104 * in particular size must be a power of 4 between 4k and the max supported by
105 * an implementation; max may further be limited by what can be represented in
106 * an unsigned long (for example, 32-bit implementations cannot support a 4GB
107 * size).
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000108 */
Kumar Gala8b27f0b2009-10-15 12:49:01 -0500109static void settlbcam(int index, unsigned long virt, phys_addr_t phys,
110 unsigned long size, unsigned long flags, unsigned int pid)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000111{
Becky Bruce45594242011-10-12 16:17:02 -0500112 unsigned int tsize;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000113
Becky Bruce45594242011-10-12 16:17:02 -0500114 tsize = __ilog2(size) - 10;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000115
116#ifdef CONFIG_SMP
117 if ((flags & _PAGE_NO_CACHE) == 0)
118 flags |= _PAGE_COHERENT;
119#endif
120
121 TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index) | MAS0_NV(index+1);
122 TLBCAM[index].MAS1 = MAS1_VALID | MAS1_IPROT | MAS1_TSIZE(tsize) | MAS1_TID(pid);
123 TLBCAM[index].MAS2 = virt & PAGE_MASK;
124
125 TLBCAM[index].MAS2 |= (flags & _PAGE_WRITETHRU) ? MAS2_W : 0;
126 TLBCAM[index].MAS2 |= (flags & _PAGE_NO_CACHE) ? MAS2_I : 0;
127 TLBCAM[index].MAS2 |= (flags & _PAGE_COHERENT) ? MAS2_M : 0;
128 TLBCAM[index].MAS2 |= (flags & _PAGE_GUARDED) ? MAS2_G : 0;
129 TLBCAM[index].MAS2 |= (flags & _PAGE_ENDIAN) ? MAS2_E : 0;
130
Kumar Gala8b27f0b2009-10-15 12:49:01 -0500131 TLBCAM[index].MAS3 = (phys & MAS3_RPN) | MAS3_SX | MAS3_SR;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000132 TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_SW : 0);
Becky Brucee8137342010-04-12 11:21:50 -0500133 if (mmu_has_feature(MMU_FTR_BIG_PHYS))
Kumar Gala8b27f0b2009-10-15 12:49:01 -0500134 TLBCAM[index].MAS7 = (u64)phys >> 32;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000135
Paul Gortmaker92437d42010-09-24 12:44:52 -0400136 /* Below is unlikely -- only for large user pages or similar */
137 if (pte_user(flags)) {
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000138 TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR;
139 TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0);
140 }
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000141
142 tlbcam_addrs[index].start = virt;
143 tlbcam_addrs[index].limit = virt + size - 1;
144 tlbcam_addrs[index].phys = phys;
145
146 loadcam_entry(index);
147}
148
Kumar Gala1dc91c32011-09-16 10:39:59 -0500149unsigned long calc_cam_sz(unsigned long ram, unsigned long virt,
150 phys_addr_t phys)
151{
Kumar Galaf0b8b342012-01-05 12:37:16 -0600152 unsigned int camsize = __ilog2(ram);
153 unsigned int align = __ffs(virt | phys);
154 unsigned long max_cam;
Kumar Gala1dc91c32011-09-16 10:39:59 -0500155
Kumar Galaf0b8b342012-01-05 12:37:16 -0600156 if ((mfspr(SPRN_MMUCFG) & MMUCFG_MAVN) == MMUCFG_MAVN_V1) {
157 /* Convert (4^max) kB to (2^max) bytes */
158 max_cam = ((mfspr(SPRN_TLB1CFG) >> 16) & 0xf) * 2 + 10;
159 camsize &= ~1U;
160 align &= ~1U;
161 } else {
162 /* Convert (2^max) kB to (2^max) bytes */
163 max_cam = __ilog2(mfspr(SPRN_TLB1PS)) + 10;
164 }
Kumar Gala1dc91c32011-09-16 10:39:59 -0500165
166 if (camsize > align)
167 camsize = align;
168 if (camsize > max_cam)
169 camsize = max_cam;
170
171 return 1UL << camsize;
172}
173
Kumar Gala8b27f0b2009-10-15 12:49:01 -0500174unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000175{
Kumar Gala8b27f0b2009-10-15 12:49:01 -0500176 int i;
177 unsigned long virt = PAGE_OFFSET;
178 phys_addr_t phys = memstart_addr;
179 unsigned long amount_mapped = 0;
Kumar Gala8b27f0b2009-10-15 12:49:01 -0500180
181 /* Calculate CAM values */
182 for (i = 0; ram && i < max_cam_idx; i++) {
Kumar Gala8b27f0b2009-10-15 12:49:01 -0500183 unsigned long cam_sz;
184
Kumar Gala1dc91c32011-09-16 10:39:59 -0500185 cam_sz = calc_cam_sz(ram, virt, phys);
Kumar Gala8b27f0b2009-10-15 12:49:01 -0500186 settlbcam(i, virt, phys, cam_sz, PAGE_KERNEL_X, 0);
187
188 ram -= cam_sz;
189 amount_mapped += cam_sz;
190 virt += cam_sz;
191 phys += cam_sz;
192 }
193 tlbcam_index = i;
194
195 return amount_mapped;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000196}
197
Kumar Gala55fd7662009-10-16 18:48:40 -0500198#ifdef CONFIG_PPC32
199
200#if defined(CONFIG_LOWMEM_CAM_NUM_BOOL) && (CONFIG_LOWMEM_CAM_NUM >= NUM_TLBCAMS)
201#error "LOWMEM_CAM_NUM must be less than NUM_TLBCAMS"
202#endif
203
Stephen Rothwellae4cec42009-12-14 09:04:24 -0700204unsigned long __init mmu_mapin_ram(unsigned long top)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000205{
Kumar Gala8b27f0b2009-10-15 12:49:01 -0500206 return tlbcam_addrs[tlbcam_index - 1].limit - PAGE_OFFSET + 1;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000207}
208
209/*
210 * MMU_init_hw does the chip-specific initialization of the MMU hardware.
211 */
212void __init MMU_init_hw(void)
213{
214 flush_instruction_cache();
215}
216
Kumar Gala8b27f0b2009-10-15 12:49:01 -0500217void __init adjust_total_lowmem(void)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000218{
Kumar Gala8b27f0b2009-10-15 12:49:01 -0500219 unsigned long ram;
Trent Piephof88747e2008-12-08 19:34:57 -0800220 int i;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000221
Trent Piephof88747e2008-12-08 19:34:57 -0800222 /* adjust lowmem size to __max_low_memory */
223 ram = min((phys_addr_t)__max_low_memory, (phys_addr_t)total_lowmem);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000224
Kumar Gala8b27f0b2009-10-15 12:49:01 -0500225 __max_low_memory = map_mem_in_cams(ram, CONFIG_LOWMEM_CAM_NUM);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000226
Kumar Gala8b27f0b2009-10-15 12:49:01 -0500227 pr_info("Memory CAM mapping: ");
228 for (i = 0; i < tlbcam_index - 1; i++)
229 pr_cont("%lu/", tlbcam_sz(i) >> 20);
230 pr_cont("%lu Mb, residual: %dMb\n", tlbcam_sz(tlbcam_index - 1) >> 20,
Kumar Gala96a8bac2009-02-12 09:39:23 -0600231 (unsigned int)((total_lowmem - __max_low_memory) >> 20));
Kumar Gala8b27f0b2009-10-15 12:49:01 -0500232
Benjamin Herrenschmidte63075a2010-07-06 15:39:01 -0700233 memblock_set_current_limit(memstart_addr + __max_low_memory);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000234}
Benjamin Herrenschmidtcd3db0c2010-07-06 15:39:02 -0700235
236void setup_initial_memory_limit(phys_addr_t first_memblock_base,
237 phys_addr_t first_memblock_size)
238{
239 phys_addr_t limit = first_memblock_base + first_memblock_size;
240
241 /* 64M mapped initially according to head_fsl_booke.S */
242 memblock_set_current_limit(min_t(u64, limit, 0x04000000));
243}
Kumar Gala55fd7662009-10-16 18:48:40 -0500244#endif