blob: 0fe7fb11124bc6f24cd3f841556592934b432901 [file] [log] [blame]
Steve Tothb79cb652006-01-09 15:25:07 -02001/*
Patrick Boettcherca06fa72008-03-29 21:01:12 -03002 * Conexant cx24123/cx24109 - DVB QPSK Satellite demod/tuner driver
3 *
Steven Toth6d897612008-09-03 17:12:12 -03004 * Copyright (C) 2005 Steven Toth <stoth@linuxtv.org>
Patrick Boettcherca06fa72008-03-29 21:01:12 -03005 *
6 * Support for KWorld DVB-S 100 by Vadim Catana <skystar@moldova.cc>
7 *
8 * Support for CX24123/CX24113-NIM by Patrick Boettcher <pb@linuxtv.org>
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
Steve Tothb79cb652006-01-09 15:25:07 -020024
25#include <linux/slab.h>
26#include <linux/kernel.h>
27#include <linux/module.h>
Steve Tothb79cb652006-01-09 15:25:07 -020028#include <linux/init.h>
Mauro Carvalho Chehab752a62b2013-04-07 21:11:53 -030029#include <asm/div64.h>
Steve Tothb79cb652006-01-09 15:25:07 -020030
31#include "dvb_frontend.h"
32#include "cx24123.h"
33
Vadim Catanaa74b51f2006-04-13 10:19:52 -030034#define XTAL 10111000
35
Yeasah Pell70047f92006-04-13 17:26:22 -030036static int force_band;
Steven Toth93504ab2008-10-16 20:28:32 -030037module_param(force_band, int, 0644);
38MODULE_PARM_DESC(force_band, "Force a specific band select "\
39 "(1-9, default:off).");
40
Steve Tothb79cb652006-01-09 15:25:07 -020041static int debug;
Steven Toth93504ab2008-10-16 20:28:32 -030042module_param(debug, int, 0644);
43MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)");
Patrick Boettcherca06fa72008-03-29 21:01:12 -030044
45#define info(args...) do { printk(KERN_INFO "CX24123: " args); } while (0)
46#define err(args...) do { printk(KERN_ERR "CX24123: " args); } while (0)
47
Steve Tothb79cb652006-01-09 15:25:07 -020048#define dprintk(args...) \
49 do { \
Patrick Boettcherca06fa72008-03-29 21:01:12 -030050 if (debug) { \
51 printk(KERN_DEBUG "CX24123: %s: ", __func__); \
52 printk(args); \
53 } \
Steve Tothb79cb652006-01-09 15:25:07 -020054 } while (0)
55
Steven Toth93504ab2008-10-16 20:28:32 -030056struct cx24123_state {
57 struct i2c_adapter *i2c;
58 const struct cx24123_config *config;
Steve Tothb79cb652006-01-09 15:25:07 -020059
60 struct dvb_frontend frontend;
61
Steve Tothb79cb652006-01-09 15:25:07 -020062 /* Some PLL specifics for tuning */
63 u32 VCAarg;
64 u32 VGAarg;
65 u32 bandselectarg;
66 u32 pllarg;
Vadim Catanaa74b51f2006-04-13 10:19:52 -030067 u32 FILTune;
Steve Tothb79cb652006-01-09 15:25:07 -020068
Patrick Boettcherca06fa72008-03-29 21:01:12 -030069 struct i2c_adapter tuner_i2c_adapter;
70
71 u8 demod_rev;
72
Steve Tothb79cb652006-01-09 15:25:07 -020073 /* The Demod/Tuner can't easily provide these, we cache them */
74 u32 currentfreq;
75 u32 currentsymbolrate;
76};
77
Johannes Stezenbache3b152b2006-01-09 15:25:08 -020078/* Various tuner defaults need to be established for a given symbol rate Sps */
Steven Toth93504ab2008-10-16 20:28:32 -030079static struct cx24123_AGC_val {
Johannes Stezenbache3b152b2006-01-09 15:25:08 -020080 u32 symbolrate_low;
81 u32 symbolrate_high;
Johannes Stezenbache3b152b2006-01-09 15:25:08 -020082 u32 VCAprogdata;
83 u32 VGAprogdata;
Vadim Catanaa74b51f2006-04-13 10:19:52 -030084 u32 FILTune;
Johannes Stezenbache3b152b2006-01-09 15:25:08 -020085} cx24123_AGC_vals[] =
86{
87 {
88 .symbolrate_low = 1000000,
89 .symbolrate_high = 4999999,
Vadim Catanaa74b51f2006-04-13 10:19:52 -030090 /* the specs recommend other values for VGA offsets,
91 but tests show they are wrong */
Yeasah Pell0e4558a2006-04-13 17:24:13 -030092 .VGAprogdata = (1 << 19) | (0x180 << 9) | 0x1e0,
93 .VCAprogdata = (2 << 19) | (0x07 << 9) | 0x07,
94 .FILTune = 0x27f /* 0.41 V */
Johannes Stezenbache3b152b2006-01-09 15:25:08 -020095 },
96 {
97 .symbolrate_low = 5000000,
98 .symbolrate_high = 14999999,
Yeasah Pell0e4558a2006-04-13 17:24:13 -030099 .VGAprogdata = (1 << 19) | (0x180 << 9) | 0x1e0,
100 .VCAprogdata = (2 << 19) | (0x07 << 9) | 0x1f,
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300101 .FILTune = 0x317 /* 0.90 V */
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200102 },
103 {
104 .symbolrate_low = 15000000,
105 .symbolrate_high = 45000000,
Yeasah Pell0e4558a2006-04-13 17:24:13 -0300106 .VGAprogdata = (1 << 19) | (0x100 << 9) | 0x180,
107 .VCAprogdata = (2 << 19) | (0x07 << 9) | 0x3f,
108 .FILTune = 0x145 /* 2.70 V */
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200109 },
110};
111
112/*
113 * Various tuner defaults need to be established for a given frequency kHz.
114 * fixme: The bounds on the bands do not match the doc in real life.
115 * fixme: Some of them have been moved, other might need adjustment.
116 */
Steven Toth93504ab2008-10-16 20:28:32 -0300117static struct cx24123_bandselect_val {
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200118 u32 freq_low;
119 u32 freq_high;
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200120 u32 VCOdivider;
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200121 u32 progdata;
122} cx24123_bandselect_vals[] =
123{
Yeasah Pell70047f92006-04-13 17:26:22 -0300124 /* band 1 */
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200125 {
126 .freq_low = 950000,
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200127 .freq_high = 1074999,
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200128 .VCOdivider = 4,
Yeasah Pell70047f92006-04-13 17:26:22 -0300129 .progdata = (0 << 19) | (0 << 9) | 0x40,
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200130 },
Yeasah Pell70047f92006-04-13 17:26:22 -0300131
132 /* band 2 */
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200133 {
134 .freq_low = 1075000,
Yeasah Pell70047f92006-04-13 17:26:22 -0300135 .freq_high = 1177999,
136 .VCOdivider = 4,
137 .progdata = (0 << 19) | (0 << 9) | 0x80,
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200138 },
Yeasah Pell70047f92006-04-13 17:26:22 -0300139
140 /* band 3 */
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200141 {
Yeasah Pell70047f92006-04-13 17:26:22 -0300142 .freq_low = 1178000,
143 .freq_high = 1295999,
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200144 .VCOdivider = 2,
Yeasah Pell70047f92006-04-13 17:26:22 -0300145 .progdata = (0 << 19) | (1 << 9) | 0x01,
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200146 },
Yeasah Pell70047f92006-04-13 17:26:22 -0300147
148 /* band 4 */
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200149 {
Yeasah Pell70047f92006-04-13 17:26:22 -0300150 .freq_low = 1296000,
151 .freq_high = 1431999,
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200152 .VCOdivider = 2,
Yeasah Pell70047f92006-04-13 17:26:22 -0300153 .progdata = (0 << 19) | (1 << 9) | 0x02,
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200154 },
Yeasah Pell70047f92006-04-13 17:26:22 -0300155
156 /* band 5 */
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200157 {
Yeasah Pell70047f92006-04-13 17:26:22 -0300158 .freq_low = 1432000,
159 .freq_high = 1575999,
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200160 .VCOdivider = 2,
Yeasah Pell70047f92006-04-13 17:26:22 -0300161 .progdata = (0 << 19) | (1 << 9) | 0x04,
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200162 },
Yeasah Pell70047f92006-04-13 17:26:22 -0300163
164 /* band 6 */
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200165 {
Yeasah Pell70047f92006-04-13 17:26:22 -0300166 .freq_low = 1576000,
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200167 .freq_high = 1717999,
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200168 .VCOdivider = 2,
Yeasah Pell70047f92006-04-13 17:26:22 -0300169 .progdata = (0 << 19) | (1 << 9) | 0x08,
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200170 },
Yeasah Pell70047f92006-04-13 17:26:22 -0300171
172 /* band 7 */
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200173 {
174 .freq_low = 1718000,
175 .freq_high = 1855999,
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200176 .VCOdivider = 2,
Yeasah Pell70047f92006-04-13 17:26:22 -0300177 .progdata = (0 << 19) | (1 << 9) | 0x10,
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200178 },
Yeasah Pell70047f92006-04-13 17:26:22 -0300179
180 /* band 8 */
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200181 {
182 .freq_low = 1856000,
183 .freq_high = 2035999,
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200184 .VCOdivider = 2,
Yeasah Pell70047f92006-04-13 17:26:22 -0300185 .progdata = (0 << 19) | (1 << 9) | 0x20,
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200186 },
Yeasah Pell70047f92006-04-13 17:26:22 -0300187
188 /* band 9 */
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200189 {
190 .freq_low = 2036000,
Yeasah Pell70047f92006-04-13 17:26:22 -0300191 .freq_high = 2150000,
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200192 .VCOdivider = 2,
Yeasah Pell70047f92006-04-13 17:26:22 -0300193 .progdata = (0 << 19) | (1 << 9) | 0x40,
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200194 },
195};
196
Steve Tothb79cb652006-01-09 15:25:07 -0200197static struct {
198 u8 reg;
199 u8 data;
200} cx24123_regdata[] =
201{
202 {0x00, 0x03}, /* Reset system */
203 {0x00, 0x00}, /* Clear reset */
Yeasah Pell0e4558a2006-04-13 17:24:13 -0300204 {0x03, 0x07}, /* QPSK, DVB, Auto Acquisition (default) */
205 {0x04, 0x10}, /* MPEG */
206 {0x05, 0x04}, /* MPEG */
207 {0x06, 0x31}, /* MPEG (default) */
208 {0x0b, 0x00}, /* Freq search start point (default) */
209 {0x0c, 0x00}, /* Demodulator sample gain (default) */
Mauro Carvalho Chehabd93f8862006-08-06 17:03:50 -0300210 {0x0d, 0x7f}, /* Force driver to shift until the maximum (+-10 MHz) */
Yeasah Pell0e4558a2006-04-13 17:24:13 -0300211 {0x0e, 0x03}, /* Default non-inverted, FEC 3/4 (default) */
212 {0x0f, 0xfe}, /* FEC search mask (all supported codes) */
213 {0x10, 0x01}, /* Default search inversion, no repeat (default) */
214 {0x16, 0x00}, /* Enable reading of frequency */
215 {0x17, 0x01}, /* Enable EsNO Ready Counter */
216 {0x1c, 0x80}, /* Enable error counter */
217 {0x20, 0x00}, /* Tuner burst clock rate = 500KHz */
218 {0x21, 0x15}, /* Tuner burst mode, word length = 0x15 */
219 {0x28, 0x00}, /* Enable FILTERV with positive pol., DiSEqC 2.x off */
220 {0x29, 0x00}, /* DiSEqC LNB_DC off */
221 {0x2a, 0xb0}, /* DiSEqC Parameters (default) */
222 {0x2b, 0x73}, /* DiSEqC Tone Frequency (default) */
223 {0x2c, 0x00}, /* DiSEqC Message (0x2c - 0x31) */
Steve Tothb79cb652006-01-09 15:25:07 -0200224 {0x2d, 0x00},
225 {0x2e, 0x00},
226 {0x2f, 0x00},
227 {0x30, 0x00},
228 {0x31, 0x00},
Yeasah Pell0e4558a2006-04-13 17:24:13 -0300229 {0x32, 0x8c}, /* DiSEqC Parameters (default) */
230 {0x33, 0x00}, /* Interrupts off (0x33 - 0x34) */
Steve Tothb79cb652006-01-09 15:25:07 -0200231 {0x34, 0x00},
Yeasah Pell0e4558a2006-04-13 17:24:13 -0300232 {0x35, 0x03}, /* DiSEqC Tone Amplitude (default) */
233 {0x36, 0x02}, /* DiSEqC Parameters (default) */
234 {0x37, 0x3a}, /* DiSEqC Parameters (default) */
235 {0x3a, 0x00}, /* Enable AGC accumulator (for signal strength) */
236 {0x44, 0x00}, /* Constellation (default) */
237 {0x45, 0x00}, /* Symbol count (default) */
238 {0x46, 0x0d}, /* Symbol rate estimator on (default) */
Yeasah Pell18c053b2006-08-08 15:48:08 -0300239 {0x56, 0xc1}, /* Error Counter = Viterbi BER */
Yeasah Pell0e4558a2006-04-13 17:24:13 -0300240 {0x57, 0xff}, /* Error Counter Window (default) */
Mauro Carvalho Chehabd93f8862006-08-06 17:03:50 -0300241 {0x5c, 0x20}, /* Acquisition AFC Expiration window (default is 0x10) */
Yeasah Pell0e4558a2006-04-13 17:24:13 -0300242 {0x67, 0x83}, /* Non-DCII symbol clock */
Steve Tothb79cb652006-01-09 15:25:07 -0200243};
244
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300245static int cx24123_i2c_writereg(struct cx24123_state *state,
246 u8 i2c_addr, int reg, int data)
Steve Tothb79cb652006-01-09 15:25:07 -0200247{
248 u8 buf[] = { reg, data };
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300249 struct i2c_msg msg = {
250 .addr = i2c_addr, .flags = 0, .buf = buf, .len = 2
251 };
Steve Tothb79cb652006-01-09 15:25:07 -0200252 int err;
253
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300254 /* printk(KERN_DEBUG "wr(%02x): %02x %02x\n", i2c_addr, reg, data); */
Mauro Carvalho Chehabcaf970e2006-04-13 11:29:13 -0300255
Steven Toth93504ab2008-10-16 20:28:32 -0300256 err = i2c_transfer(state->i2c, &msg, 1);
257 if (err != 1) {
Steve Tothb79cb652006-01-09 15:25:07 -0200258 printk("%s: writereg error(err == %i, reg == 0x%02x,"
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300259 " data == 0x%02x)\n", __func__, err, reg, data);
260 return err;
Steve Tothb79cb652006-01-09 15:25:07 -0200261 }
262
263 return 0;
264}
265
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300266static int cx24123_i2c_readreg(struct cx24123_state *state, u8 i2c_addr, u8 reg)
Steve Tothb79cb652006-01-09 15:25:07 -0200267{
268 int ret;
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300269 u8 b = 0;
Steve Tothb79cb652006-01-09 15:25:07 -0200270 struct i2c_msg msg[] = {
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300271 { .addr = i2c_addr, .flags = 0, .buf = &reg, .len = 1 },
272 { .addr = i2c_addr, .flags = I2C_M_RD, .buf = &b, .len = 1 }
Steve Tothb79cb652006-01-09 15:25:07 -0200273 };
274
275 ret = i2c_transfer(state->i2c, msg, 2);
276
277 if (ret != 2) {
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300278 err("%s: reg=0x%x (error=%d)\n", __func__, reg, ret);
Steve Tothb79cb652006-01-09 15:25:07 -0200279 return ret;
280 }
281
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300282 /* printk(KERN_DEBUG "rd(%02x): %02x %02x\n", i2c_addr, reg, b); */
Mauro Carvalho Chehabcaf970e2006-04-13 11:29:13 -0300283
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300284 return b;
Steve Tothb79cb652006-01-09 15:25:07 -0200285}
286
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300287#define cx24123_readreg(state, reg) \
288 cx24123_i2c_readreg(state, state->config->demod_address, reg)
289#define cx24123_writereg(state, reg, val) \
290 cx24123_i2c_writereg(state, state->config->demod_address, reg, val)
291
Steven Toth93504ab2008-10-16 20:28:32 -0300292static int cx24123_set_inversion(struct cx24123_state *state,
Mauro Carvalho Chehab0df289a2015-06-07 14:53:52 -0300293 enum fe_spectral_inversion inversion)
Steve Tothb79cb652006-01-09 15:25:07 -0200294{
Yeasah Pell0e4558a2006-04-13 17:24:13 -0300295 u8 nom_reg = cx24123_readreg(state, 0x0e);
296 u8 auto_reg = cx24123_readreg(state, 0x10);
297
Steve Tothb79cb652006-01-09 15:25:07 -0200298 switch (inversion) {
299 case INVERSION_OFF:
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300300 dprintk("inversion off\n");
Yeasah Pell0e4558a2006-04-13 17:24:13 -0300301 cx24123_writereg(state, 0x0e, nom_reg & ~0x80);
302 cx24123_writereg(state, 0x10, auto_reg | 0x80);
Steve Tothb79cb652006-01-09 15:25:07 -0200303 break;
304 case INVERSION_ON:
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300305 dprintk("inversion on\n");
Yeasah Pell0e4558a2006-04-13 17:24:13 -0300306 cx24123_writereg(state, 0x0e, nom_reg | 0x80);
307 cx24123_writereg(state, 0x10, auto_reg | 0x80);
Steve Tothb79cb652006-01-09 15:25:07 -0200308 break;
309 case INVERSION_AUTO:
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300310 dprintk("inversion auto\n");
Yeasah Pell0e4558a2006-04-13 17:24:13 -0300311 cx24123_writereg(state, 0x10, auto_reg & ~0x80);
Steve Tothb79cb652006-01-09 15:25:07 -0200312 break;
313 default:
314 return -EINVAL;
315 }
316
317 return 0;
318}
319
Steven Toth93504ab2008-10-16 20:28:32 -0300320static int cx24123_get_inversion(struct cx24123_state *state,
Mauro Carvalho Chehab0df289a2015-06-07 14:53:52 -0300321 enum fe_spectral_inversion *inversion)
Steve Tothb79cb652006-01-09 15:25:07 -0200322{
323 u8 val;
324
325 val = cx24123_readreg(state, 0x1b) >> 7;
326
Mauro Carvalho Chehabcaf970e2006-04-13 11:29:13 -0300327 if (val == 0) {
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300328 dprintk("read inversion off\n");
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200329 *inversion = INVERSION_OFF;
Mauro Carvalho Chehabcaf970e2006-04-13 11:29:13 -0300330 } else {
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300331 dprintk("read inversion on\n");
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200332 *inversion = INVERSION_ON;
Mauro Carvalho Chehabcaf970e2006-04-13 11:29:13 -0300333 }
Steve Tothb79cb652006-01-09 15:25:07 -0200334
335 return 0;
336}
337
Mauro Carvalho Chehab0df289a2015-06-07 14:53:52 -0300338static int cx24123_set_fec(struct cx24123_state *state, enum fe_code_rate fec)
Steve Tothb79cb652006-01-09 15:25:07 -0200339{
Yeasah Pell0e4558a2006-04-13 17:24:13 -0300340 u8 nom_reg = cx24123_readreg(state, 0x0e) & ~0x07;
341
Mauro Carvalho Chehab830e4b52012-10-27 16:14:01 -0300342 if (((int)fec < FEC_NONE) || (fec > FEC_AUTO))
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200343 fec = FEC_AUTO;
Steve Tothb79cb652006-01-09 15:25:07 -0200344
Yeasah Pelld12a9b92006-08-08 15:48:08 -0300345 /* Set the soft decision threshold */
Steven Toth93504ab2008-10-16 20:28:32 -0300346 if (fec == FEC_1_2)
347 cx24123_writereg(state, 0x43,
348 cx24123_readreg(state, 0x43) | 0x01);
Yeasah Pelld12a9b92006-08-08 15:48:08 -0300349 else
Steven Toth93504ab2008-10-16 20:28:32 -0300350 cx24123_writereg(state, 0x43,
351 cx24123_readreg(state, 0x43) & ~0x01);
Yeasah Pelld12a9b92006-08-08 15:48:08 -0300352
Steve Tothb79cb652006-01-09 15:25:07 -0200353 switch (fec) {
Steve Tothb79cb652006-01-09 15:25:07 -0200354 case FEC_1_2:
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300355 dprintk("set FEC to 1/2\n");
Yeasah Pell0e4558a2006-04-13 17:24:13 -0300356 cx24123_writereg(state, 0x0e, nom_reg | 0x01);
357 cx24123_writereg(state, 0x0f, 0x02);
358 break;
Steve Tothb79cb652006-01-09 15:25:07 -0200359 case FEC_2_3:
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300360 dprintk("set FEC to 2/3\n");
Yeasah Pell0e4558a2006-04-13 17:24:13 -0300361 cx24123_writereg(state, 0x0e, nom_reg | 0x02);
362 cx24123_writereg(state, 0x0f, 0x04);
363 break;
Steve Tothb79cb652006-01-09 15:25:07 -0200364 case FEC_3_4:
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300365 dprintk("set FEC to 3/4\n");
Yeasah Pell0e4558a2006-04-13 17:24:13 -0300366 cx24123_writereg(state, 0x0e, nom_reg | 0x03);
367 cx24123_writereg(state, 0x0f, 0x08);
368 break;
369 case FEC_4_5:
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300370 dprintk("set FEC to 4/5\n");
Yeasah Pell0e4558a2006-04-13 17:24:13 -0300371 cx24123_writereg(state, 0x0e, nom_reg | 0x04);
372 cx24123_writereg(state, 0x0f, 0x10);
373 break;
374 case FEC_5_6:
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300375 dprintk("set FEC to 5/6\n");
Yeasah Pell0e4558a2006-04-13 17:24:13 -0300376 cx24123_writereg(state, 0x0e, nom_reg | 0x05);
377 cx24123_writereg(state, 0x0f, 0x20);
378 break;
379 case FEC_6_7:
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300380 dprintk("set FEC to 6/7\n");
Yeasah Pell0e4558a2006-04-13 17:24:13 -0300381 cx24123_writereg(state, 0x0e, nom_reg | 0x06);
382 cx24123_writereg(state, 0x0f, 0x40);
383 break;
384 case FEC_7_8:
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300385 dprintk("set FEC to 7/8\n");
Yeasah Pell0e4558a2006-04-13 17:24:13 -0300386 cx24123_writereg(state, 0x0e, nom_reg | 0x07);
387 cx24123_writereg(state, 0x0f, 0x80);
388 break;
Steve Tothb79cb652006-01-09 15:25:07 -0200389 case FEC_AUTO:
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300390 dprintk("set FEC to auto\n");
Yeasah Pell0e4558a2006-04-13 17:24:13 -0300391 cx24123_writereg(state, 0x0f, 0xfe);
392 break;
Steve Tothb79cb652006-01-09 15:25:07 -0200393 default:
394 return -EOPNOTSUPP;
395 }
Yeasah Pell0e4558a2006-04-13 17:24:13 -0300396
397 return 0;
Steve Tothb79cb652006-01-09 15:25:07 -0200398}
399
Mauro Carvalho Chehab0df289a2015-06-07 14:53:52 -0300400static int cx24123_get_fec(struct cx24123_state *state, enum fe_code_rate *fec)
Steve Tothb79cb652006-01-09 15:25:07 -0200401{
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200402 int ret;
Steve Tothb79cb652006-01-09 15:25:07 -0200403
Steven Toth93504ab2008-10-16 20:28:32 -0300404 ret = cx24123_readreg(state, 0x1b);
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200405 if (ret < 0)
406 return ret;
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300407 ret = ret & 0x07;
408
409 switch (ret) {
Steve Tothb79cb652006-01-09 15:25:07 -0200410 case 1:
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200411 *fec = FEC_1_2;
412 break;
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300413 case 2:
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200414 *fec = FEC_2_3;
415 break;
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300416 case 3:
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200417 *fec = FEC_3_4;
418 break;
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300419 case 4:
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200420 *fec = FEC_4_5;
421 break;
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300422 case 5:
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200423 *fec = FEC_5_6;
424 break;
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300425 case 6:
426 *fec = FEC_6_7;
427 break;
Steve Tothb79cb652006-01-09 15:25:07 -0200428 case 7:
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200429 *fec = FEC_7_8;
430 break;
Steve Tothb79cb652006-01-09 15:25:07 -0200431 default:
Yeasah Pell0e4558a2006-04-13 17:24:13 -0300432 /* this can happen when there's no lock */
433 *fec = FEC_NONE;
Steve Tothb79cb652006-01-09 15:25:07 -0200434 }
435
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200436 return 0;
Steve Tothb79cb652006-01-09 15:25:07 -0200437}
438
Yeasah Pell0e4558a2006-04-13 17:24:13 -0300439/* Approximation of closest integer of log2(a/b). It actually gives the
440 lowest integer i such that 2^i >= round(a/b) */
441static u32 cx24123_int_log2(u32 a, u32 b)
442{
443 u32 exp, nearest = 0;
444 u32 div = a / b;
Steven Toth93504ab2008-10-16 20:28:32 -0300445 if (a % b >= b / 2)
446 ++div;
447 if (div < (1 << 31)) {
448 for (exp = 1; div > exp; nearest++)
Yeasah Pell0e4558a2006-04-13 17:24:13 -0300449 exp += exp;
450 }
451 return nearest;
452}
453
Steven Toth93504ab2008-10-16 20:28:32 -0300454static int cx24123_set_symbolrate(struct cx24123_state *state, u32 srate)
Steve Tothb79cb652006-01-09 15:25:07 -0200455{
Mauro Carvalho Chehab752a62b2013-04-07 21:11:53 -0300456 u64 tmp;
457 u32 sample_rate, ratio, sample_gain;
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300458 u8 pll_mult;
Steve Tothb79cb652006-01-09 15:25:07 -0200459
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300460 /* check if symbol rate is within limits */
Patrick Boettcherdea74862006-05-14 05:01:31 -0300461 if ((srate > state->frontend.ops.info.symbol_rate_max) ||
462 (srate < state->frontend.ops.info.symbol_rate_min))
Joe Perches1ebcad72009-07-02 15:57:09 -0300463 return -EOPNOTSUPP;
Steve Tothb79cb652006-01-09 15:25:07 -0200464
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300465 /* choose the sampling rate high enough for the required operation,
466 while optimizing the power consumed by the demodulator */
467 if (srate < (XTAL*2)/2)
468 pll_mult = 2;
469 else if (srate < (XTAL*3)/2)
470 pll_mult = 3;
471 else if (srate < (XTAL*4)/2)
472 pll_mult = 4;
473 else if (srate < (XTAL*5)/2)
474 pll_mult = 5;
475 else if (srate < (XTAL*6)/2)
476 pll_mult = 6;
477 else if (srate < (XTAL*7)/2)
478 pll_mult = 7;
479 else if (srate < (XTAL*8)/2)
480 pll_mult = 8;
481 else
482 pll_mult = 9;
Steve Tothb79cb652006-01-09 15:25:07 -0200483
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300484
485 sample_rate = pll_mult * XTAL;
486
Mauro Carvalho Chehab752a62b2013-04-07 21:11:53 -0300487 /* SYSSymbolRate[21:0] = (srate << 23) / sample_rate */
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300488
Mauro Carvalho Chehab752a62b2013-04-07 21:11:53 -0300489 tmp = ((u64)srate) << 23;
490 do_div(tmp, sample_rate);
491 ratio = (u32) tmp;
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300492
493 cx24123_writereg(state, 0x01, pll_mult * 6);
494
Steven Toth93504ab2008-10-16 20:28:32 -0300495 cx24123_writereg(state, 0x08, (ratio >> 16) & 0x3f);
496 cx24123_writereg(state, 0x09, (ratio >> 8) & 0xff);
497 cx24123_writereg(state, 0x0a, ratio & 0xff);
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300498
Yeasah Pell0e4558a2006-04-13 17:24:13 -0300499 /* also set the demodulator sample gain */
500 sample_gain = cx24123_int_log2(sample_rate, srate);
501 tmp = cx24123_readreg(state, 0x0c) & ~0xe0;
502 cx24123_writereg(state, 0x0c, tmp | sample_gain << 5);
503
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300504 dprintk("srate=%d, ratio=0x%08x, sample_rate=%i sample_gain=%d\n",
505 srate, ratio, sample_rate, sample_gain);
Steve Tothb79cb652006-01-09 15:25:07 -0200506
507 return 0;
508}
509
510/*
Steven Toth93504ab2008-10-16 20:28:32 -0300511 * Based on the required frequency and symbolrate, the tuner AGC has
512 * to be configured and the correct band selected.
513 * Calculate those values.
Steve Tothb79cb652006-01-09 15:25:07 -0200514 */
Mauro Carvalho Chehaba73efc02011-12-22 17:54:00 -0300515static int cx24123_pll_calculate(struct dvb_frontend *fe)
Steve Tothb79cb652006-01-09 15:25:07 -0200516{
Mauro Carvalho Chehaba73efc02011-12-22 17:54:00 -0300517 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
Steve Tothb79cb652006-01-09 15:25:07 -0200518 struct cx24123_state *state = fe->demodulator_priv;
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200519 u32 ndiv = 0, adiv = 0, vco_div = 0;
520 int i = 0;
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300521 int pump = 2;
Yeasah Pell70047f92006-04-13 17:26:22 -0300522 int band = 0;
Ahmed S. Darwish0496daa72007-02-14 22:57:42 -0200523 int num_bands = ARRAY_SIZE(cx24123_bandselect_vals);
Steven Toth93504ab2008-10-16 20:28:32 -0300524 struct cx24123_bandselect_val *bsv = NULL;
525 struct cx24123_AGC_val *agcv = NULL;
Steve Tothb79cb652006-01-09 15:25:07 -0200526
527 /* Defaults for low freq, low rate */
528 state->VCAarg = cx24123_AGC_vals[0].VCAprogdata;
529 state->VGAarg = cx24123_AGC_vals[0].VGAprogdata;
530 state->bandselectarg = cx24123_bandselect_vals[0].progdata;
531 vco_div = cx24123_bandselect_vals[0].VCOdivider;
532
Steven Toth93504ab2008-10-16 20:28:32 -0300533 /* For the given symbol rate, determine the VCA, VGA and
534 * FILTUNE programming bits */
535 for (i = 0; i < ARRAY_SIZE(cx24123_AGC_vals); i++) {
536 agcv = &cx24123_AGC_vals[i];
Mauro Carvalho Chehaba73efc02011-12-22 17:54:00 -0300537 if ((agcv->symbolrate_low <= p->symbol_rate) &&
538 (agcv->symbolrate_high >= p->symbol_rate)) {
Steven Toth93504ab2008-10-16 20:28:32 -0300539 state->VCAarg = agcv->VCAprogdata;
540 state->VGAarg = agcv->VGAprogdata;
541 state->FILTune = agcv->FILTune;
Steve Tothb79cb652006-01-09 15:25:07 -0200542 }
543 }
544
Yeasah Pell70047f92006-04-13 17:26:22 -0300545 /* determine the band to use */
Steven Toth93504ab2008-10-16 20:28:32 -0300546 if (force_band < 1 || force_band > num_bands) {
547 for (i = 0; i < num_bands; i++) {
548 bsv = &cx24123_bandselect_vals[i];
549 if ((bsv->freq_low <= p->frequency) &&
550 (bsv->freq_high >= p->frequency))
Yeasah Pell70047f92006-04-13 17:26:22 -0300551 band = i;
Steve Tothb79cb652006-01-09 15:25:07 -0200552 }
Steven Toth93504ab2008-10-16 20:28:32 -0300553 } else
Yeasah Pell70047f92006-04-13 17:26:22 -0300554 band = force_band - 1;
555
556 state->bandselectarg = cx24123_bandselect_vals[band].progdata;
557 vco_div = cx24123_bandselect_vals[band].VCOdivider;
558
559 /* determine the charge pump current */
Steven Toth93504ab2008-10-16 20:28:32 -0300560 if (p->frequency < (cx24123_bandselect_vals[band].freq_low +
561 cx24123_bandselect_vals[band].freq_high) / 2)
Yeasah Pell70047f92006-04-13 17:26:22 -0300562 pump = 0x01;
563 else
564 pump = 0x02;
Steve Tothb79cb652006-01-09 15:25:07 -0200565
566 /* Determine the N/A dividers for the requested lband freq (in kHz). */
Steven Toth93504ab2008-10-16 20:28:32 -0300567 /* Note: the reference divider R=10, frequency is in KHz,
568 * XTAL is in Hz */
569 ndiv = (((p->frequency * vco_div * 10) /
570 (2 * XTAL / 1000)) / 32) & 0x1ff;
571 adiv = (((p->frequency * vco_div * 10) /
572 (2 * XTAL / 1000)) % 32) & 0x1f;
Steve Tothb79cb652006-01-09 15:25:07 -0200573
Steven Toth9b5a4a62006-10-02 21:35:40 -0300574 if (adiv == 0 && ndiv > 0)
575 ndiv--;
Steve Tothb79cb652006-01-09 15:25:07 -0200576
Steven Toth93504ab2008-10-16 20:28:32 -0300577 /* control bits 11, refdiv 11, charge pump polarity 1,
578 * charge pump current, ndiv, adiv */
579 state->pllarg = (3 << 19) | (3 << 17) | (1 << 16) |
580 (pump << 14) | (ndiv << 5) | adiv;
Steve Tothb79cb652006-01-09 15:25:07 -0200581
582 return 0;
583}
584
585/*
586 * Tuner data is 21 bits long, must be left-aligned in data.
Steven Toth93504ab2008-10-16 20:28:32 -0300587 * Tuner cx24109 is written through a dedicated 3wire interface
588 * on the demod chip.
Steve Tothb79cb652006-01-09 15:25:07 -0200589 */
Mauro Carvalho Chehab31b4f322011-12-22 17:44:43 -0300590static int cx24123_pll_writereg(struct dvb_frontend *fe, u32 data)
Steve Tothb79cb652006-01-09 15:25:07 -0200591{
592 struct cx24123_state *state = fe->demodulator_priv;
Steven Toth0144f3142006-01-09 15:25:22 -0200593 unsigned long timeout;
Steve Tothb79cb652006-01-09 15:25:07 -0200594
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300595 dprintk("pll writereg called, data=0x%08x\n", data);
Mauro Carvalho Chehabcaf970e2006-04-13 11:29:13 -0300596
Steve Tothb79cb652006-01-09 15:25:07 -0200597 /* align the 21 bytes into to bit23 boundary */
598 data = data << 3;
599
600 /* Reset the demod pll word length to 0x15 bits */
601 cx24123_writereg(state, 0x21, 0x15);
602
Steve Tothb79cb652006-01-09 15:25:07 -0200603 /* write the msb 8 bits, wait for the send to be completed */
Steven Toth0144f3142006-01-09 15:25:22 -0200604 timeout = jiffies + msecs_to_jiffies(40);
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200605 cx24123_writereg(state, 0x22, (data >> 16) & 0xff);
Steven Toth0144f3142006-01-09 15:25:22 -0200606 while ((cx24123_readreg(state, 0x20) & 0x40) == 0) {
607 if (time_after(jiffies, timeout)) {
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300608 err("%s: demodulator is not responding, "\
609 "possibly hung, aborting.\n", __func__);
Steve Tothb79cb652006-01-09 15:25:07 -0200610 return -EREMOTEIO;
611 }
Steven Toth0144f3142006-01-09 15:25:22 -0200612 msleep(10);
Steve Tothb79cb652006-01-09 15:25:07 -0200613 }
614
Steve Tothb79cb652006-01-09 15:25:07 -0200615 /* send another 8 bytes, wait for the send to be completed */
Steven Toth0144f3142006-01-09 15:25:22 -0200616 timeout = jiffies + msecs_to_jiffies(40);
Steven Toth93504ab2008-10-16 20:28:32 -0300617 cx24123_writereg(state, 0x22, (data >> 8) & 0xff);
Steven Toth0144f3142006-01-09 15:25:22 -0200618 while ((cx24123_readreg(state, 0x20) & 0x40) == 0) {
619 if (time_after(jiffies, timeout)) {
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300620 err("%s: demodulator is not responding, "\
621 "possibly hung, aborting.\n", __func__);
Steve Tothb79cb652006-01-09 15:25:07 -0200622 return -EREMOTEIO;
623 }
Steven Toth0144f3142006-01-09 15:25:22 -0200624 msleep(10);
Steve Tothb79cb652006-01-09 15:25:07 -0200625 }
626
Steven Toth93504ab2008-10-16 20:28:32 -0300627 /* send the lower 5 bits of this byte, padded with 3 LBB,
628 * wait for the send to be completed */
Steven Toth0144f3142006-01-09 15:25:22 -0200629 timeout = jiffies + msecs_to_jiffies(40);
Steven Toth93504ab2008-10-16 20:28:32 -0300630 cx24123_writereg(state, 0x22, (data) & 0xff);
Steven Toth0144f3142006-01-09 15:25:22 -0200631 while ((cx24123_readreg(state, 0x20) & 0x80)) {
632 if (time_after(jiffies, timeout)) {
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300633 err("%s: demodulator is not responding," \
634 "possibly hung, aborting.\n", __func__);
Steve Tothb79cb652006-01-09 15:25:07 -0200635 return -EREMOTEIO;
636 }
Steven Toth0144f3142006-01-09 15:25:22 -0200637 msleep(10);
Steve Tothb79cb652006-01-09 15:25:07 -0200638 }
639
640 /* Trigger the demod to configure the tuner */
641 cx24123_writereg(state, 0x20, cx24123_readreg(state, 0x20) | 2);
642 cx24123_writereg(state, 0x20, cx24123_readreg(state, 0x20) & 0xfd);
643
644 return 0;
645}
646
Mauro Carvalho Chehaba73efc02011-12-22 17:54:00 -0300647static int cx24123_pll_tune(struct dvb_frontend *fe)
Steve Tothb79cb652006-01-09 15:25:07 -0200648{
Mauro Carvalho Chehaba73efc02011-12-22 17:54:00 -0300649 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
Steve Tothb79cb652006-01-09 15:25:07 -0200650 struct cx24123_state *state = fe->demodulator_priv;
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300651 u8 val;
652
653 dprintk("frequency=%i\n", p->frequency);
Steve Tothb79cb652006-01-09 15:25:07 -0200654
Mauro Carvalho Chehaba73efc02011-12-22 17:54:00 -0300655 if (cx24123_pll_calculate(fe) != 0) {
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300656 err("%s: cx24123_pll_calcutate failed\n", __func__);
Steve Tothb79cb652006-01-09 15:25:07 -0200657 return -EINVAL;
658 }
659
660 /* Write the new VCO/VGA */
Mauro Carvalho Chehab31b4f322011-12-22 17:44:43 -0300661 cx24123_pll_writereg(fe, state->VCAarg);
662 cx24123_pll_writereg(fe, state->VGAarg);
Steve Tothb79cb652006-01-09 15:25:07 -0200663
664 /* Write the new bandselect and pll args */
Mauro Carvalho Chehab31b4f322011-12-22 17:44:43 -0300665 cx24123_pll_writereg(fe, state->bandselectarg);
666 cx24123_pll_writereg(fe, state->pllarg);
Steve Tothb79cb652006-01-09 15:25:07 -0200667
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300668 /* set the FILTUNE voltage */
669 val = cx24123_readreg(state, 0x28) & ~0x3;
670 cx24123_writereg(state, 0x27, state->FILTune >> 2);
671 cx24123_writereg(state, 0x28, val | (state->FILTune & 0x3));
672
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300673 dprintk("pll tune VCA=%d, band=%d, pll=%d\n", state->VCAarg,
674 state->bandselectarg, state->pllarg);
Mauro Carvalho Chehabcaf970e2006-04-13 11:29:13 -0300675
Steve Tothb79cb652006-01-09 15:25:07 -0200676 return 0;
677}
678
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300679
680/*
681 * 0x23:
682 * [7:7] = BTI enabled
683 * [6:6] = I2C repeater enabled
684 * [5:5] = I2C repeater start
685 * [0:0] = BTI start
686 */
687
688/* mode == 1 -> i2c-repeater, 0 -> bti */
689static int cx24123_repeater_mode(struct cx24123_state *state, u8 mode, u8 start)
690{
691 u8 r = cx24123_readreg(state, 0x23) & 0x1e;
692 if (mode)
693 r |= (1 << 6) | (start << 5);
694 else
695 r |= (1 << 7) | (start);
696 return cx24123_writereg(state, 0x23, r);
697}
698
Steven Toth93504ab2008-10-16 20:28:32 -0300699static int cx24123_initfe(struct dvb_frontend *fe)
Steve Tothb79cb652006-01-09 15:25:07 -0200700{
701 struct cx24123_state *state = fe->demodulator_priv;
702 int i;
703
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300704 dprintk("init frontend\n");
Mauro Carvalho Chehabcaf970e2006-04-13 11:29:13 -0300705
Steve Tothb79cb652006-01-09 15:25:07 -0200706 /* Configure the demod to a good set of defaults */
Ahmed S. Darwish0496daa72007-02-14 22:57:42 -0200707 for (i = 0; i < ARRAY_SIZE(cx24123_regdata); i++)
Steven Toth93504ab2008-10-16 20:28:32 -0300708 cx24123_writereg(state, cx24123_regdata[i].reg,
709 cx24123_regdata[i].data);
Steve Tothb79cb652006-01-09 15:25:07 -0200710
Yeasah Pellef768562006-09-26 12:30:14 -0300711 /* Set the LNB polarity */
Steven Toth93504ab2008-10-16 20:28:32 -0300712 if (state->config->lnb_polarity)
713 cx24123_writereg(state, 0x32,
714 cx24123_readreg(state, 0x32) | 0x02);
Yeasah Pellef768562006-09-26 12:30:14 -0300715
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300716 if (state->config->dont_use_pll)
Steven Toth93504ab2008-10-16 20:28:32 -0300717 cx24123_repeater_mode(state, 1, 0);
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300718
Steve Tothb79cb652006-01-09 15:25:07 -0200719 return 0;
720}
721
Steven Toth93504ab2008-10-16 20:28:32 -0300722static int cx24123_set_voltage(struct dvb_frontend *fe,
Mauro Carvalho Chehab0df289a2015-06-07 14:53:52 -0300723 enum fe_sec_voltage voltage)
Steve Tothb79cb652006-01-09 15:25:07 -0200724{
725 struct cx24123_state *state = fe->demodulator_priv;
726 u8 val;
727
Andrew de Quinceycd20ca92006-05-12 20:31:51 -0300728 val = cx24123_readreg(state, 0x29) & ~0x40;
Steve Tothb79cb652006-01-09 15:25:07 -0200729
Andrew de Quinceycd20ca92006-05-12 20:31:51 -0300730 switch (voltage) {
731 case SEC_VOLTAGE_13:
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300732 dprintk("setting voltage 13V\n");
Saqeb Akhterccd214b2006-06-29 20:29:29 -0300733 return cx24123_writereg(state, 0x29, val & 0x7f);
Andrew de Quinceycd20ca92006-05-12 20:31:51 -0300734 case SEC_VOLTAGE_18:
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300735 dprintk("setting voltage 18V\n");
Saqeb Akhterccd214b2006-06-29 20:29:29 -0300736 return cx24123_writereg(state, 0x29, val | 0x80);
Yeasah Pellef768562006-09-26 12:30:14 -0300737 case SEC_VOLTAGE_OFF:
738 /* already handled in cx88-dvb */
739 return 0;
Andrew de Quinceycd20ca92006-05-12 20:31:51 -0300740 default:
741 return -EINVAL;
Joe Perches2028c712013-10-08 20:29:08 -0300742 }
Vadim Catana1c956a32006-01-09 15:25:08 -0200743
744 return 0;
Steve Tothb79cb652006-01-09 15:25:07 -0200745}
746
Yeasah Pelldce1dfc2006-04-13 11:40:59 -0300747/* wait for diseqc queue to become ready (or timeout) */
748static void cx24123_wait_for_diseqc(struct cx24123_state *state)
749{
750 unsigned long timeout = jiffies + msecs_to_jiffies(200);
751 while (!(cx24123_readreg(state, 0x29) & 0x40)) {
Steven Toth93504ab2008-10-16 20:28:32 -0300752 if (time_after(jiffies, timeout)) {
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300753 err("%s: diseqc queue not ready, " \
754 "command may be lost.\n", __func__);
Yeasah Pelldce1dfc2006-04-13 11:40:59 -0300755 break;
756 }
757 msleep(10);
758 }
759}
760
Steven Toth93504ab2008-10-16 20:28:32 -0300761static int cx24123_send_diseqc_msg(struct dvb_frontend *fe,
762 struct dvb_diseqc_master_cmd *cmd)
Steve Tothb79cb652006-01-09 15:25:07 -0200763{
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300764 struct cx24123_state *state = fe->demodulator_priv;
Andrew de Quinceycd20ca92006-05-12 20:31:51 -0300765 int i, val, tone;
Steve Tothb79cb652006-01-09 15:25:07 -0200766
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300767 dprintk("\n");
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300768
Andrew de Quinceycd20ca92006-05-12 20:31:51 -0300769 /* stop continuous tone if enabled */
770 tone = cx24123_readreg(state, 0x29);
771 if (tone & 0x10)
772 cx24123_writereg(state, 0x29, tone & ~0x50);
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300773
Yeasah Pelldce1dfc2006-04-13 11:40:59 -0300774 /* wait for diseqc queue ready */
775 cx24123_wait_for_diseqc(state);
776
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300777 /* select tone mode */
Andrew de Quinceycd20ca92006-05-12 20:31:51 -0300778 cx24123_writereg(state, 0x2a, cx24123_readreg(state, 0x2a) & 0xfb);
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300779
780 for (i = 0; i < cmd->msg_len; i++)
781 cx24123_writereg(state, 0x2C + i, cmd->msg[i]);
782
783 val = cx24123_readreg(state, 0x29);
Steven Toth93504ab2008-10-16 20:28:32 -0300784 cx24123_writereg(state, 0x29, ((val & 0x90) | 0x40) |
785 ((cmd->msg_len-3) & 3));
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300786
Yeasah Pelldce1dfc2006-04-13 11:40:59 -0300787 /* wait for diseqc message to finish sending */
788 cx24123_wait_for_diseqc(state);
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300789
Andrew de Quinceycd20ca92006-05-12 20:31:51 -0300790 /* restart continuous tone if enabled */
Steven Toth93504ab2008-10-16 20:28:32 -0300791 if (tone & 0x10)
Andrew de Quinceycd20ca92006-05-12 20:31:51 -0300792 cx24123_writereg(state, 0x29, tone & ~0x40);
Andrew de Quinceycd20ca92006-05-12 20:31:51 -0300793
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300794 return 0;
795}
796
Steven Toth93504ab2008-10-16 20:28:32 -0300797static int cx24123_diseqc_send_burst(struct dvb_frontend *fe,
Mauro Carvalho Chehab0df289a2015-06-07 14:53:52 -0300798 enum fe_sec_mini_cmd burst)
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300799{
800 struct cx24123_state *state = fe->demodulator_priv;
Andrew de Quinceycd20ca92006-05-12 20:31:51 -0300801 int val, tone;
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300802
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300803 dprintk("\n");
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300804
Andrew de Quinceycd20ca92006-05-12 20:31:51 -0300805 /* stop continuous tone if enabled */
806 tone = cx24123_readreg(state, 0x29);
807 if (tone & 0x10)
808 cx24123_writereg(state, 0x29, tone & ~0x50);
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300809
Andrew de Quinceycd20ca92006-05-12 20:31:51 -0300810 /* wait for diseqc queue ready */
Yeasah Pelldce1dfc2006-04-13 11:40:59 -0300811 cx24123_wait_for_diseqc(state);
812
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300813 /* select tone mode */
Andrew de Quinceycd20ca92006-05-12 20:31:51 -0300814 cx24123_writereg(state, 0x2a, cx24123_readreg(state, 0x2a) | 0x4);
815 msleep(30);
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300816 val = cx24123_readreg(state, 0x29);
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300817 if (burst == SEC_MINI_A)
818 cx24123_writereg(state, 0x29, ((val & 0x90) | 0x40 | 0x00));
819 else if (burst == SEC_MINI_B)
820 cx24123_writereg(state, 0x29, ((val & 0x90) | 0x40 | 0x08));
821 else
822 return -EINVAL;
823
Yeasah Pelldce1dfc2006-04-13 11:40:59 -0300824 cx24123_wait_for_diseqc(state);
Andrew de Quinceycd20ca92006-05-12 20:31:51 -0300825 cx24123_writereg(state, 0x2a, cx24123_readreg(state, 0x2a) & 0xfb);
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300826
Andrew de Quinceycd20ca92006-05-12 20:31:51 -0300827 /* restart continuous tone if enabled */
Steven Toth93504ab2008-10-16 20:28:32 -0300828 if (tone & 0x10)
Andrew de Quinceycd20ca92006-05-12 20:31:51 -0300829 cx24123_writereg(state, 0x29, tone & ~0x40);
Steven Toth93504ab2008-10-16 20:28:32 -0300830
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300831 return 0;
Steve Tothb79cb652006-01-09 15:25:07 -0200832}
833
Mauro Carvalho Chehab0df289a2015-06-07 14:53:52 -0300834static int cx24123_read_status(struct dvb_frontend *fe, enum fe_status *status)
Steve Tothb79cb652006-01-09 15:25:07 -0200835{
836 struct cx24123_state *state = fe->demodulator_priv;
Steve Tothb79cb652006-01-09 15:25:07 -0200837 int sync = cx24123_readreg(state, 0x14);
Steve Tothb79cb652006-01-09 15:25:07 -0200838
839 *status = 0;
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300840 if (state->config->dont_use_pll) {
841 u32 tun_status = 0;
842 if (fe->ops.tuner_ops.get_status)
843 fe->ops.tuner_ops.get_status(fe, &tun_status);
844 if (tun_status & TUNER_STATUS_LOCKED)
845 *status |= FE_HAS_SIGNAL;
846 } else {
847 int lock = cx24123_readreg(state, 0x20);
848 if (lock & 0x01)
849 *status |= FE_HAS_SIGNAL;
850 }
851
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300852 if (sync & 0x02)
Mauro Carvalho Chehabd93f8862006-08-06 17:03:50 -0300853 *status |= FE_HAS_CARRIER; /* Phase locked */
Steve Tothb79cb652006-01-09 15:25:07 -0200854 if (sync & 0x04)
855 *status |= FE_HAS_VITERBI;
Mauro Carvalho Chehabd93f8862006-08-06 17:03:50 -0300856
857 /* Reed-Solomon Status */
Steve Tothb79cb652006-01-09 15:25:07 -0200858 if (sync & 0x08)
Vadim Catanaa74b51f2006-04-13 10:19:52 -0300859 *status |= FE_HAS_SYNC;
Steve Tothb79cb652006-01-09 15:25:07 -0200860 if (sync & 0x80)
Mauro Carvalho Chehabd93f8862006-08-06 17:03:50 -0300861 *status |= FE_HAS_LOCK; /*Full Sync */
Steve Tothb79cb652006-01-09 15:25:07 -0200862
863 return 0;
864}
865
866/*
Steven Toth93504ab2008-10-16 20:28:32 -0300867 * Configured to return the measurement of errors in blocks,
868 * because no UCBLOCKS value is available, so this value doubles up
869 * to satisfy both measurements.
Steve Tothb79cb652006-01-09 15:25:07 -0200870 */
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300871static int cx24123_read_ber(struct dvb_frontend *fe, u32 *ber)
Steve Tothb79cb652006-01-09 15:25:07 -0200872{
873 struct cx24123_state *state = fe->demodulator_priv;
874
Yeasah Pell18c053b2006-08-08 15:48:08 -0300875 /* The true bit error rate is this value divided by
876 the window size (set as 256 * 255) */
877 *ber = ((cx24123_readreg(state, 0x1c) & 0x3f) << 16) |
Steve Tothb79cb652006-01-09 15:25:07 -0200878 (cx24123_readreg(state, 0x1d) << 8 |
Yeasah Pell18c053b2006-08-08 15:48:08 -0300879 cx24123_readreg(state, 0x1e));
Steve Tothb79cb652006-01-09 15:25:07 -0200880
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300881 dprintk("BER = %d\n", *ber);
Steve Tothb79cb652006-01-09 15:25:07 -0200882
883 return 0;
884}
885
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300886static int cx24123_read_signal_strength(struct dvb_frontend *fe,
887 u16 *signal_strength)
Steve Tothb79cb652006-01-09 15:25:07 -0200888{
889 struct cx24123_state *state = fe->demodulator_priv;
Mauro Carvalho Chehabd93f8862006-08-06 17:03:50 -0300890
Steven Toth93504ab2008-10-16 20:28:32 -0300891 /* larger = better */
892 *signal_strength = cx24123_readreg(state, 0x3b) << 8;
Steve Tothb79cb652006-01-09 15:25:07 -0200893
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300894 dprintk("Signal strength = %d\n", *signal_strength);
Mauro Carvalho Chehabcaf970e2006-04-13 11:29:13 -0300895
Steve Tothb79cb652006-01-09 15:25:07 -0200896 return 0;
897}
898
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300899static int cx24123_read_snr(struct dvb_frontend *fe, u16 *snr)
Steve Tothb79cb652006-01-09 15:25:07 -0200900{
901 struct cx24123_state *state = fe->demodulator_priv;
Yeasah Pell18c053b2006-08-08 15:48:08 -0300902
903 /* Inverted raw Es/N0 count, totally bogus but better than the
904 BER threshold. */
905 *snr = 65535 - (((u16)cx24123_readreg(state, 0x18) << 8) |
906 (u16)cx24123_readreg(state, 0x19));
Steve Tothb79cb652006-01-09 15:25:07 -0200907
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300908 dprintk("read S/N index = %d\n", *snr);
Mauro Carvalho Chehabcaf970e2006-04-13 11:29:13 -0300909
Steve Tothb79cb652006-01-09 15:25:07 -0200910 return 0;
911}
912
Mauro Carvalho Chehaba73efc02011-12-22 17:54:00 -0300913static int cx24123_set_frontend(struct dvb_frontend *fe)
Steve Tothb79cb652006-01-09 15:25:07 -0200914{
915 struct cx24123_state *state = fe->demodulator_priv;
Mauro Carvalho Chehaba73efc02011-12-22 17:54:00 -0300916 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
Steve Tothb79cb652006-01-09 15:25:07 -0200917
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300918 dprintk("\n");
Mauro Carvalho Chehabcaf970e2006-04-13 11:29:13 -0300919
Steve Tothb79cb652006-01-09 15:25:07 -0200920 if (state->config->set_ts_params)
921 state->config->set_ts_params(fe, 0);
922
Steven Toth93504ab2008-10-16 20:28:32 -0300923 state->currentfreq = p->frequency;
Mauro Carvalho Chehaba73efc02011-12-22 17:54:00 -0300924 state->currentsymbolrate = p->symbol_rate;
Steve Tothb79cb652006-01-09 15:25:07 -0200925
926 cx24123_set_inversion(state, p->inversion);
Mauro Carvalho Chehaba73efc02011-12-22 17:54:00 -0300927 cx24123_set_fec(state, p->fec_inner);
928 cx24123_set_symbolrate(state, p->symbol_rate);
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300929
930 if (!state->config->dont_use_pll)
Mauro Carvalho Chehaba73efc02011-12-22 17:54:00 -0300931 cx24123_pll_tune(fe);
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300932 else if (fe->ops.tuner_ops.set_params)
Mauro Carvalho Chehab14d24d12011-12-24 12:24:33 -0300933 fe->ops.tuner_ops.set_params(fe);
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300934 else
935 err("it seems I don't have a tuner...");
Steve Tothb79cb652006-01-09 15:25:07 -0200936
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300937 /* Enable automatic acquisition and reset cycle */
Johannes Stezenbache3b152b2006-01-09 15:25:08 -0200938 cx24123_writereg(state, 0x03, (cx24123_readreg(state, 0x03) | 0x07));
Steve Tothb79cb652006-01-09 15:25:07 -0200939 cx24123_writereg(state, 0x00, 0x10);
940 cx24123_writereg(state, 0x00, 0);
941
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300942 if (state->config->agc_callback)
943 state->config->agc_callback(fe);
944
Steve Tothb79cb652006-01-09 15:25:07 -0200945 return 0;
946}
947
Mauro Carvalho Chehab7c61d802011-12-30 11:30:21 -0300948static int cx24123_get_frontend(struct dvb_frontend *fe)
Steve Tothb79cb652006-01-09 15:25:07 -0200949{
Mauro Carvalho Chehab7c61d802011-12-30 11:30:21 -0300950 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
Steve Tothb79cb652006-01-09 15:25:07 -0200951 struct cx24123_state *state = fe->demodulator_priv;
952
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300953 dprintk("\n");
Mauro Carvalho Chehabcaf970e2006-04-13 11:29:13 -0300954
Steve Tothb79cb652006-01-09 15:25:07 -0200955 if (cx24123_get_inversion(state, &p->inversion) != 0) {
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300956 err("%s: Failed to get inversion status\n", __func__);
Steve Tothb79cb652006-01-09 15:25:07 -0200957 return -EREMOTEIO;
958 }
Mauro Carvalho Chehaba73efc02011-12-22 17:54:00 -0300959 if (cx24123_get_fec(state, &p->fec_inner) != 0) {
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300960 err("%s: Failed to get fec status\n", __func__);
Steve Tothb79cb652006-01-09 15:25:07 -0200961 return -EREMOTEIO;
962 }
963 p->frequency = state->currentfreq;
Mauro Carvalho Chehaba73efc02011-12-22 17:54:00 -0300964 p->symbol_rate = state->currentsymbolrate;
Steve Tothb79cb652006-01-09 15:25:07 -0200965
966 return 0;
967}
968
Mauro Carvalho Chehab0df289a2015-06-07 14:53:52 -0300969static int cx24123_set_tone(struct dvb_frontend *fe, enum fe_sec_tone_mode tone)
Steve Tothb79cb652006-01-09 15:25:07 -0200970{
971 struct cx24123_state *state = fe->demodulator_priv;
972 u8 val;
973
Andrew de Quinceycd20ca92006-05-12 20:31:51 -0300974 /* wait for diseqc queue ready */
975 cx24123_wait_for_diseqc(state);
Steve Tothb79cb652006-01-09 15:25:07 -0200976
Andrew de Quinceycd20ca92006-05-12 20:31:51 -0300977 val = cx24123_readreg(state, 0x29) & ~0x40;
Vadim Catana1c956a32006-01-09 15:25:08 -0200978
Andrew de Quinceycd20ca92006-05-12 20:31:51 -0300979 switch (tone) {
980 case SEC_TONE_ON:
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300981 dprintk("setting tone on\n");
Andrew de Quinceycd20ca92006-05-12 20:31:51 -0300982 return cx24123_writereg(state, 0x29, val | 0x10);
983 case SEC_TONE_OFF:
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300984 dprintk("setting tone off\n");
Andrew de Quinceycd20ca92006-05-12 20:31:51 -0300985 return cx24123_writereg(state, 0x29, val & 0xef);
986 default:
Patrick Boettcherca06fa72008-03-29 21:01:12 -0300987 err("CASE reached default with tone=%d\n", tone);
Andrew de Quinceycd20ca92006-05-12 20:31:51 -0300988 return -EINVAL;
Steve Tothb79cb652006-01-09 15:25:07 -0200989 }
Vadim Catana1c956a32006-01-09 15:25:08 -0200990
991 return 0;
Steve Tothb79cb652006-01-09 15:25:07 -0200992}
993
Steven Toth93504ab2008-10-16 20:28:32 -0300994static int cx24123_tune(struct dvb_frontend *fe,
Mauro Carvalho Chehab7e072222011-12-26 17:48:33 -0300995 bool re_tune,
Yeasah Pell174ff212006-08-08 15:48:08 -0300996 unsigned int mode_flags,
Mauro Carvalho Chehab3ea96612007-07-16 09:27:20 -0300997 unsigned int *delay,
Mauro Carvalho Chehab0df289a2015-06-07 14:53:52 -0300998 enum fe_status *status)
Yeasah Pell174ff212006-08-08 15:48:08 -0300999{
1000 int retval = 0;
1001
Mauro Carvalho Chehab7e072222011-12-26 17:48:33 -03001002 if (re_tune)
Mauro Carvalho Chehaba73efc02011-12-22 17:54:00 -03001003 retval = cx24123_set_frontend(fe);
Yeasah Pell174ff212006-08-08 15:48:08 -03001004
1005 if (!(mode_flags & FE_TUNE_MODE_ONESHOT))
1006 cx24123_read_status(fe, status);
1007 *delay = HZ/10;
1008
1009 return retval;
1010}
1011
1012static int cx24123_get_algo(struct dvb_frontend *fe)
1013{
Mauro Carvalho Chehab27460ad2015-08-22 12:48:09 -03001014 return DVBFE_ALGO_HW;
Yeasah Pell174ff212006-08-08 15:48:08 -03001015}
1016
Steven Toth93504ab2008-10-16 20:28:32 -03001017static void cx24123_release(struct dvb_frontend *fe)
Steve Tothb79cb652006-01-09 15:25:07 -02001018{
Steven Toth93504ab2008-10-16 20:28:32 -03001019 struct cx24123_state *state = fe->demodulator_priv;
Patrick Boettcherca06fa72008-03-29 21:01:12 -03001020 dprintk("\n");
1021 i2c_del_adapter(&state->tuner_i2c_adapter);
Steve Tothb79cb652006-01-09 15:25:07 -02001022 kfree(state);
1023}
1024
Patrick Boettcherca06fa72008-03-29 21:01:12 -03001025static int cx24123_tuner_i2c_tuner_xfer(struct i2c_adapter *i2c_adap,
1026 struct i2c_msg msg[], int num)
1027{
1028 struct cx24123_state *state = i2c_get_adapdata(i2c_adap);
1029 /* this repeater closes after the first stop */
Steven Toth93504ab2008-10-16 20:28:32 -03001030 cx24123_repeater_mode(state, 1, 1);
Patrick Boettcherca06fa72008-03-29 21:01:12 -03001031 return i2c_transfer(state->i2c, msg, num);
1032}
1033
1034static u32 cx24123_tuner_i2c_func(struct i2c_adapter *adapter)
1035{
1036 return I2C_FUNC_I2C;
1037}
1038
1039static struct i2c_algorithm cx24123_tuner_i2c_algo = {
1040 .master_xfer = cx24123_tuner_i2c_tuner_xfer,
1041 .functionality = cx24123_tuner_i2c_func,
1042};
1043
1044struct i2c_adapter *
1045 cx24123_get_tuner_i2c_adapter(struct dvb_frontend *fe)
1046{
1047 struct cx24123_state *state = fe->demodulator_priv;
1048 return &state->tuner_i2c_adapter;
1049}
1050EXPORT_SYMBOL(cx24123_get_tuner_i2c_adapter);
1051
Steve Tothb79cb652006-01-09 15:25:07 -02001052static struct dvb_frontend_ops cx24123_ops;
1053
Steven Toth93504ab2008-10-16 20:28:32 -03001054struct dvb_frontend *cx24123_attach(const struct cx24123_config *config,
1055 struct i2c_adapter *i2c)
Steve Tothb79cb652006-01-09 15:25:07 -02001056{
Matthias Schwarzott8420fa72009-02-23 12:26:38 -03001057 /* allocate memory for the internal state */
Patrick Boettcherca06fa72008-03-29 21:01:12 -03001058 struct cx24123_state *state =
1059 kzalloc(sizeof(struct cx24123_state), GFP_KERNEL);
Steve Tothb79cb652006-01-09 15:25:07 -02001060
Patrick Boettcherca06fa72008-03-29 21:01:12 -03001061 dprintk("\n");
Steve Tothb79cb652006-01-09 15:25:07 -02001062 if (state == NULL) {
Matthias Schwarzott8420fa72009-02-23 12:26:38 -03001063 err("Unable to kzalloc\n");
Steve Tothb79cb652006-01-09 15:25:07 -02001064 goto error;
1065 }
1066
1067 /* setup the state */
1068 state->config = config;
1069 state->i2c = i2c;
Steve Tothb79cb652006-01-09 15:25:07 -02001070
1071 /* check if the demod is there */
Patrick Boettcherca06fa72008-03-29 21:01:12 -03001072 state->demod_rev = cx24123_readreg(state, 0x00);
1073 switch (state->demod_rev) {
Steven Toth93504ab2008-10-16 20:28:32 -03001074 case 0xe1:
1075 info("detected CX24123C\n");
1076 break;
1077 case 0xd1:
1078 info("detected CX24123\n");
1079 break;
Patrick Boettcherca06fa72008-03-29 21:01:12 -03001080 default:
1081 err("wrong demod revision: %x\n", state->demod_rev);
Steve Tothb79cb652006-01-09 15:25:07 -02001082 goto error;
1083 }
1084
1085 /* create dvb_frontend */
Steven Toth93504ab2008-10-16 20:28:32 -03001086 memcpy(&state->frontend.ops, &cx24123_ops,
1087 sizeof(struct dvb_frontend_ops));
Steve Tothb79cb652006-01-09 15:25:07 -02001088 state->frontend.demodulator_priv = state;
Patrick Boettcherca06fa72008-03-29 21:01:12 -03001089
Steven Toth93504ab2008-10-16 20:28:32 -03001090 /* create tuner i2c adapter */
1091 if (config->dont_use_pll)
1092 cx24123_repeater_mode(state, 1, 0);
Patrick Boettcherca06fa72008-03-29 21:01:12 -03001093
Jean Delvare1d434012008-09-03 17:12:23 -03001094 strlcpy(state->tuner_i2c_adapter.name, "CX24123 tuner I2C bus",
1095 sizeof(state->tuner_i2c_adapter.name));
Patrick Boettcherca06fa72008-03-29 21:01:12 -03001096 state->tuner_i2c_adapter.algo = &cx24123_tuner_i2c_algo;
1097 state->tuner_i2c_adapter.algo_data = NULL;
Hans Verkuilfdc6b382014-09-20 09:36:26 -03001098 state->tuner_i2c_adapter.dev.parent = i2c->dev.parent;
Patrick Boettcherca06fa72008-03-29 21:01:12 -03001099 i2c_set_adapdata(&state->tuner_i2c_adapter, state);
1100 if (i2c_add_adapter(&state->tuner_i2c_adapter) < 0) {
Steven Toth93504ab2008-10-16 20:28:32 -03001101 err("tuner i2c bus could not be initialized\n");
Patrick Boettcherca06fa72008-03-29 21:01:12 -03001102 goto error;
1103 }
1104
Steve Tothb79cb652006-01-09 15:25:07 -02001105 return &state->frontend;
1106
1107error:
1108 kfree(state);
1109
1110 return NULL;
1111}
Steven Toth93504ab2008-10-16 20:28:32 -03001112EXPORT_SYMBOL(cx24123_attach);
Steve Tothb79cb652006-01-09 15:25:07 -02001113
1114static struct dvb_frontend_ops cx24123_ops = {
Mauro Carvalho Chehaba73efc02011-12-22 17:54:00 -03001115 .delsys = { SYS_DVBS },
Steve Tothb79cb652006-01-09 15:25:07 -02001116 .info = {
1117 .name = "Conexant CX24123/CX24109",
Steve Tothb79cb652006-01-09 15:25:07 -02001118 .frequency_min = 950000,
1119 .frequency_max = 2150000,
1120 .frequency_stepsize = 1011, /* kHz for QPSK frontends */
Yeasah Pell0e4558a2006-04-13 17:24:13 -03001121 .frequency_tolerance = 5000,
Steve Tothb79cb652006-01-09 15:25:07 -02001122 .symbol_rate_min = 1000000,
1123 .symbol_rate_max = 45000000,
1124 .caps = FE_CAN_INVERSION_AUTO |
1125 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
Yeasah Pell0e4558a2006-04-13 17:24:13 -03001126 FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 |
1127 FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
Steve Tothb79cb652006-01-09 15:25:07 -02001128 FE_CAN_QPSK | FE_CAN_RECOVER
1129 },
1130
1131 .release = cx24123_release,
1132
1133 .init = cx24123_initfe,
Mauro Carvalho Chehaba73efc02011-12-22 17:54:00 -03001134 .set_frontend = cx24123_set_frontend,
1135 .get_frontend = cx24123_get_frontend,
Steve Tothb79cb652006-01-09 15:25:07 -02001136 .read_status = cx24123_read_status,
1137 .read_ber = cx24123_read_ber,
1138 .read_signal_strength = cx24123_read_signal_strength,
1139 .read_snr = cx24123_read_snr,
Steve Tothb79cb652006-01-09 15:25:07 -02001140 .diseqc_send_master_cmd = cx24123_send_diseqc_msg,
Vadim Catanaa74b51f2006-04-13 10:19:52 -03001141 .diseqc_send_burst = cx24123_diseqc_send_burst,
Steve Tothb79cb652006-01-09 15:25:07 -02001142 .set_tone = cx24123_set_tone,
1143 .set_voltage = cx24123_set_voltage,
Yeasah Pell174ff212006-08-08 15:48:08 -03001144 .tune = cx24123_tune,
1145 .get_frontend_algo = cx24123_get_algo,
Steve Tothb79cb652006-01-09 15:25:07 -02001146};
1147
Patrick Boettcherca06fa72008-03-29 21:01:12 -03001148MODULE_DESCRIPTION("DVB Frontend module for Conexant " \
1149 "CX24123/CX24109/CX24113 hardware");
Steve Tothb79cb652006-01-09 15:25:07 -02001150MODULE_AUTHOR("Steven Toth");
1151MODULE_LICENSE("GPL");
1152