blob: 9fd47b42da05d00e32331f5aaead5a5db030042a [file] [log] [blame]
Dan Williams6f231dd2011-07-02 22:56:22 -07001/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
Dan Williamsce2b3262011-05-08 15:49:15 -070055#ifndef _SCI_HOST_H_
Dan Williams6f231dd2011-07-02 22:56:22 -070056#define _SCI_HOST_H_
57
Dan Williams6f231dd2011-07-02 22:56:22 -070058#include "remote_device.h"
Dan Williamsce2b3262011-05-08 15:49:15 -070059#include "phy.h"
Dan Williamscc9203b2011-05-08 17:34:44 -070060#include "pool.h"
Dan Williams3bff9d52011-05-08 22:15:10 -070061#include "state_machine.h"
Dan Williamscc9203b2011-05-08 17:34:44 -070062#include "remote_node_table.h"
Dan Williams63a3a152011-05-08 21:36:46 -070063#include "registers.h"
Dan Williamscc9203b2011-05-08 17:34:44 -070064#include "scu_unsolicited_frame.h"
Dan Williams63a3a152011-05-08 21:36:46 -070065#include "unsolicited_frame_control.h"
Dan Williamse2f8db52011-05-10 02:28:46 -070066#include "probe_roms.h"
Dan Williamscc9203b2011-05-08 17:34:44 -070067
68struct scic_sds_request;
69struct scu_task_context;
70
Dan Williamse2f8db52011-05-10 02:28:46 -070071
Dan Williamscc9203b2011-05-08 17:34:44 -070072/**
73 * struct scic_power_control -
74 *
75 * This structure defines the fields for managing power control for direct
76 * attached disk devices.
77 */
78struct scic_power_control {
79 /**
80 * This field is set when the power control timer is running and cleared when
81 * it is not.
82 */
83 bool timer_started;
84
85 /**
Edmund Nadolski04736612011-05-19 20:17:47 -070086 * Timer to control when the directed attached disks can consume power.
Dan Williamscc9203b2011-05-08 17:34:44 -070087 */
Edmund Nadolski04736612011-05-19 20:17:47 -070088 struct sci_timer timer;
Dan Williamscc9203b2011-05-08 17:34:44 -070089
90 /**
91 * This field is used to keep track of how many phys are put into the
92 * requesters field.
93 */
94 u8 phys_waiting;
95
96 /**
97 * This field is used to keep track of how many phys have been granted to consume power
98 */
99 u8 phys_granted_power;
100
101 /**
102 * This field is an array of phys that we are waiting on. The phys are direct
103 * mapped into requesters via struct scic_sds_phy.phy_index
104 */
105 struct scic_sds_phy *requesters[SCI_MAX_PHYS];
106
107};
108
Dan Williamse2f8db52011-05-10 02:28:46 -0700109struct scic_sds_port_configuration_agent;
110typedef void (*port_config_fn)(struct scic_sds_controller *,
111 struct scic_sds_port_configuration_agent *,
112 struct scic_sds_port *, struct scic_sds_phy *);
113
114struct scic_sds_port_configuration_agent {
115 u16 phy_configured_mask;
116 u16 phy_ready_mask;
117 struct {
118 u8 min_index;
119 u8 max_index;
120 } phy_valid_port_range[SCI_MAX_PHYS];
121 bool timer_pending;
122 port_config_fn link_up_handler;
123 port_config_fn link_down_handler;
Edmund Nadolskiac0eeb42011-05-19 20:00:51 -0700124 struct sci_timer timer;
Dan Williamse2f8db52011-05-10 02:28:46 -0700125};
126
Dan Williamscc9203b2011-05-08 17:34:44 -0700127/**
128 * struct scic_sds_controller -
129 *
130 * This structure represents the SCU controller object.
131 */
132struct scic_sds_controller {
133 /**
134 * This field contains the information for the base controller state
135 * machine.
136 */
137 struct sci_base_state_machine state_machine;
138
139 /**
Edmund Nadolski6cb58532011-05-19 11:59:56 +0000140 * Timer for controller start/stop operations.
Dan Williamscc9203b2011-05-08 17:34:44 -0700141 */
Edmund Nadolski6cb58532011-05-19 11:59:56 +0000142 struct sci_timer timer;
Dan Williamscc9203b2011-05-08 17:34:44 -0700143
144 /**
145 * This field contains the user parameters to be utilized for this
146 * core controller object.
147 */
148 union scic_user_parameters user_parameters;
149
150 /**
151 * This field contains the OEM parameters to be utilized for this
152 * core controller object.
153 */
154 union scic_oem_parameters oem_parameters;
155
156 /**
157 * This field contains the port configuration agent for this controller.
158 */
159 struct scic_sds_port_configuration_agent port_agent;
160
161 /**
162 * This field is the array of device objects that are currently constructed
163 * for this controller object. This table is used as a fast lookup of device
164 * objects that need to handle device completion notifications from the
165 * hardware. The table is RNi based.
166 */
167 struct scic_sds_remote_device *device_table[SCI_MAX_REMOTE_DEVICES];
168
169 /**
170 * This field is the array of IO request objects that are currently active for
171 * this controller object. This table is used as a fast lookup of the io
172 * request object that need to handle completion queue notifications. The
173 * table is TCi based.
174 */
175 struct scic_sds_request *io_request_table[SCI_MAX_IO_REQUESTS];
176
177 /**
178 * This field is the free RNi data structure
179 */
180 struct scic_remote_node_table available_remote_nodes;
181
182 /**
183 * This field is the TCi pool used to manage the task context index.
184 */
185 SCI_POOL_CREATE(tci_pool, u16, SCI_MAX_IO_REQUESTS);
186
187 /**
188 * This filed is the struct scic_power_control data used to controll when direct
189 * attached devices can consume power.
190 */
191 struct scic_power_control power_control;
192
193 /**
194 * This field is the array of sequence values for the IO Tag fields. Even
195 * though only 4 bits of the field is used for the sequence the sequence is 16
196 * bits in size so the sequence can be bitwise or'd with the TCi to build the
197 * IO Tag value.
198 */
199 u16 io_request_sequence[SCI_MAX_IO_REQUESTS];
200
201 /**
202 * This field in the array of sequence values for the RNi. These are used
203 * to control io request build to io request start operations. The sequence
204 * value is recorded into an io request when it is built and is checked on
205 * the io request start operation to make sure that there was not a device
206 * hot plug between the build and start operation.
207 */
208 u8 remote_device_sequence[SCI_MAX_REMOTE_DEVICES];
209
210 /**
211 * This field is a pointer to the memory allocated by the driver for the task
212 * context table. This data is shared between the hardware and software.
213 */
214 struct scu_task_context *task_context_table;
215
216 /**
217 * This field is a pointer to the memory allocated by the driver for the
218 * remote node context table. This table is shared between the hardware and
219 * software.
220 */
221 union scu_remote_node_context *remote_node_context_table;
222
223 /**
224 * This field is a pointer to the completion queue. This memory is
225 * written to by the hardware and read by the software.
226 */
227 u32 *completion_queue;
228
229 /**
230 * This field is the software copy of the completion queue get pointer. The
231 * controller object writes this value to the hardware after processing the
232 * completion entries.
233 */
234 u32 completion_queue_get;
235
236 /**
237 * This field is the minimum of the number of hardware supported port entries
238 * and the software requested port entries.
239 */
240 u32 logical_port_entries;
241
242 /**
243 * This field is the minimum number of hardware supported completion queue
244 * entries and the software requested completion queue entries.
245 */
246 u32 completion_queue_entries;
247
248 /**
249 * This field is the minimum number of hardware supported event entries and
250 * the software requested event entries.
251 */
252 u32 completion_event_entries;
253
254 /**
255 * This field is the minimum number of devices supported by the hardware and
256 * the number of devices requested by the software.
257 */
258 u32 remote_node_entries;
259
260 /**
261 * This field is the minimum number of IO requests supported by the hardware
262 * and the number of IO requests requested by the software.
263 */
264 u32 task_context_entries;
265
266 /**
267 * This object contains all of the unsolicited frame specific
268 * data utilized by the core controller.
269 */
270 struct scic_sds_unsolicited_frame_control uf_control;
271
272 /* Phy Startup Data */
273 /**
Edmund Nadolskibb3dbdf2011-05-19 20:26:02 -0700274 * Timer for controller phy request startup. On controller start the
275 * controller will start each PHY individually in order of phy index.
Dan Williamscc9203b2011-05-08 17:34:44 -0700276 */
Edmund Nadolskibb3dbdf2011-05-19 20:26:02 -0700277 struct sci_timer phy_timer;
Dan Williamscc9203b2011-05-08 17:34:44 -0700278
279 /**
Edmund Nadolskibb3dbdf2011-05-19 20:26:02 -0700280 * This field is set when the phy_timer is running and is cleared when
281 * the phy_timer is stopped.
Dan Williamscc9203b2011-05-08 17:34:44 -0700282 */
283 bool phy_startup_timer_pending;
284
285 /**
286 * This field is the index of the next phy start. It is initialized to 0 and
287 * increments for each phy index that is started.
288 */
289 u32 next_phy_to_start;
290
291 /**
292 * This field controlls the invalid link up notifications to the SCI_USER. If
293 * an invalid_link_up notification is reported a bit for the PHY index is set
294 * so further notifications are not made. Once the PHY object reports link up
295 * and is made part of a port then this bit for the PHY index is cleared.
296 */
297 u8 invalid_phy_mask;
298
299 /*
300 * This field saves the current interrupt coalescing number of the controller.
301 */
302 u16 interrupt_coalesce_number;
303
304 /*
305 * This field saves the current interrupt coalescing timeout value in microseconds.
306 */
307 u32 interrupt_coalesce_timeout;
308
309 /**
310 * This field is a pointer to the memory mapped register space for the
311 * struct smu_registers.
312 */
313 struct smu_registers __iomem *smu_registers;
314
315 /**
316 * This field is a pointer to the memory mapped register space for the
317 * struct scu_registers.
318 */
319 struct scu_registers __iomem *scu_registers;
320
321};
Dan Williams6f231dd2011-07-02 22:56:22 -0700322
Dan Williams6f231dd2011-07-02 22:56:22 -0700323struct isci_host {
Artur Wojcikcc3dbd02011-05-04 07:58:16 +0000324 struct scic_sds_controller sci;
Dan Williams6f231dd2011-07-02 22:56:22 -0700325 union scic_oem_parameters oem_parameters;
326
327 int id; /* unique within a given pci device */
Dan Williams7c40a802011-03-02 11:49:26 -0800328 struct list_head timers;
Dan Williams6f231dd2011-07-02 22:56:22 -0700329 void *core_ctrl_memory;
330 struct dma_pool *dma_pool;
Dan Williams6f231dd2011-07-02 22:56:22 -0700331 struct isci_phy phys[SCI_MAX_PHYS];
Dan Williamse5313812011-05-07 10:11:43 -0700332 struct isci_port ports[SCI_MAX_PORTS + 1]; /* includes dummy port */
Dan Williams6f231dd2011-07-02 22:56:22 -0700333 struct sas_ha_struct sas_ha;
334
335 int can_queue;
336 spinlock_t queue_lock;
337 spinlock_t state_lock;
338
339 struct pci_dev *pdev;
Dan Williams6f231dd2011-07-02 22:56:22 -0700340
341 enum isci_status status;
Dan Williams0cf89d12011-02-18 09:25:07 -0800342 #define IHOST_START_PENDING 0
343 #define IHOST_STOP_PENDING 1
344 unsigned long flags;
345 wait_queue_head_t eventq;
Dan Williams6f231dd2011-07-02 22:56:22 -0700346 struct Scsi_Host *shost;
347 struct tasklet_struct completion_tasklet;
Dan Williams6f231dd2011-07-02 22:56:22 -0700348 struct list_head requests_to_complete;
Jeff Skirvin11b00c12011-03-04 14:06:40 -0800349 struct list_head requests_to_errorback;
Dan Williams6f231dd2011-07-02 22:56:22 -0700350 spinlock_t scic_lock;
Dan Williamsd9c37392011-03-03 17:59:32 -0800351
Dan Williams57f20f42011-04-21 18:14:45 -0700352 struct isci_remote_device devices[SCI_MAX_REMOTE_DEVICES];
Dan Williams6f231dd2011-07-02 22:56:22 -0700353};
354
Dan Williams6f231dd2011-07-02 22:56:22 -0700355/**
Dan Williamscc9203b2011-05-08 17:34:44 -0700356 * enum scic_sds_controller_states - This enumeration depicts all the states
357 * for the common controller state machine.
358 */
359enum scic_sds_controller_states {
360 /**
361 * Simply the initial state for the base controller state machine.
362 */
363 SCI_BASE_CONTROLLER_STATE_INITIAL = 0,
364
365 /**
366 * This state indicates that the controller is reset. The memory for
367 * the controller is in it's initial state, but the controller requires
368 * initialization.
369 * This state is entered from the INITIAL state.
370 * This state is entered from the RESETTING state.
371 */
372 SCI_BASE_CONTROLLER_STATE_RESET,
373
374 /**
375 * This state is typically an action state that indicates the controller
376 * is in the process of initialization. In this state no new IO operations
377 * are permitted.
378 * This state is entered from the RESET state.
379 */
380 SCI_BASE_CONTROLLER_STATE_INITIALIZING,
381
382 /**
383 * This state indicates that the controller has been successfully
384 * initialized. In this state no new IO operations are permitted.
385 * This state is entered from the INITIALIZING state.
386 */
387 SCI_BASE_CONTROLLER_STATE_INITIALIZED,
388
389 /**
390 * This state indicates the the controller is in the process of becoming
391 * ready (i.e. starting). In this state no new IO operations are permitted.
392 * This state is entered from the INITIALIZED state.
393 */
394 SCI_BASE_CONTROLLER_STATE_STARTING,
395
396 /**
397 * This state indicates the controller is now ready. Thus, the user
398 * is able to perform IO operations on the controller.
399 * This state is entered from the STARTING state.
400 */
401 SCI_BASE_CONTROLLER_STATE_READY,
402
403 /**
404 * This state is typically an action state that indicates the controller
405 * is in the process of resetting. Thus, the user is unable to perform
406 * IO operations on the controller. A reset is considered destructive in
407 * most cases.
408 * This state is entered from the READY state.
409 * This state is entered from the FAILED state.
410 * This state is entered from the STOPPED state.
411 */
412 SCI_BASE_CONTROLLER_STATE_RESETTING,
413
414 /**
415 * This state indicates that the controller is in the process of stopping.
416 * In this state no new IO operations are permitted, but existing IO
417 * operations are allowed to complete.
418 * This state is entered from the READY state.
419 */
420 SCI_BASE_CONTROLLER_STATE_STOPPING,
421
422 /**
423 * This state indicates that the controller has successfully been stopped.
424 * In this state no new IO operations are permitted.
425 * This state is entered from the STOPPING state.
426 */
427 SCI_BASE_CONTROLLER_STATE_STOPPED,
428
429 /**
430 * This state indicates that the controller could not successfully be
431 * initialized. In this state no new IO operations are permitted.
432 * This state is entered from the INITIALIZING state.
433 * This state is entered from the STARTING state.
434 * This state is entered from the STOPPING state.
435 * This state is entered from the RESETTING state.
436 */
437 SCI_BASE_CONTROLLER_STATE_FAILED,
438
439 SCI_BASE_CONTROLLER_MAX_STATES
440
441};
442
443
444
445/**
Dan Williams6f231dd2011-07-02 22:56:22 -0700446 * struct isci_pci_info - This class represents the pci function containing the
447 * controllers. Depending on PCI SKU, there could be up to 2 controllers in
448 * the PCI function.
449 */
450#define SCI_MAX_MSIX_INT (SCI_NUM_MSI_X_INT*SCI_MAX_CONTROLLERS)
451
452struct isci_pci_info {
453 struct msix_entry msix_entries[SCI_MAX_MSIX_INT];
Dan Williamsb329aff2011-03-07 16:02:25 -0800454 struct isci_host *hosts[SCI_MAX_CONTROLLERS];
Dan Williamsd044af12011-03-08 09:52:49 -0800455 struct isci_orom *orom;
Dan Williams6f231dd2011-07-02 22:56:22 -0700456};
457
458static inline struct isci_pci_info *to_pci_info(struct pci_dev *pdev)
459{
460 return pci_get_drvdata(pdev);
461}
462
Dan Williamsb329aff2011-03-07 16:02:25 -0800463#define for_each_isci_host(id, ihost, pdev) \
464 for (id = 0, ihost = to_pci_info(pdev)->hosts[id]; \
465 id < ARRAY_SIZE(to_pci_info(pdev)->hosts) && ihost; \
466 ihost = to_pci_info(pdev)->hosts[++id])
Dan Williams6f231dd2011-07-02 22:56:22 -0700467
Dan Williamscc9203b2011-05-08 17:34:44 -0700468static inline enum isci_status isci_host_get_state(struct isci_host *isci_host)
Dan Williams6f231dd2011-07-02 22:56:22 -0700469{
470 return isci_host->status;
471}
472
Dan Williamscc9203b2011-05-08 17:34:44 -0700473static inline void isci_host_change_state(struct isci_host *isci_host,
474 enum isci_status status)
Dan Williams6f231dd2011-07-02 22:56:22 -0700475{
476 unsigned long flags;
477
478 dev_dbg(&isci_host->pdev->dev,
479 "%s: isci_host = %p, state = 0x%x",
480 __func__,
481 isci_host,
482 status);
483 spin_lock_irqsave(&isci_host->state_lock, flags);
484 isci_host->status = status;
485 spin_unlock_irqrestore(&isci_host->state_lock, flags);
486
487}
488
Dan Williamscc9203b2011-05-08 17:34:44 -0700489static inline int isci_host_can_queue(struct isci_host *isci_host, int num)
Dan Williams6f231dd2011-07-02 22:56:22 -0700490{
491 int ret = 0;
492 unsigned long flags;
493
494 spin_lock_irqsave(&isci_host->queue_lock, flags);
495 if ((isci_host->can_queue - num) < 0) {
496 dev_dbg(&isci_host->pdev->dev,
497 "%s: isci_host->can_queue = %d\n",
498 __func__,
499 isci_host->can_queue);
500 ret = -SAS_QUEUE_FULL;
501
502 } else
503 isci_host->can_queue -= num;
504
505 spin_unlock_irqrestore(&isci_host->queue_lock, flags);
506
507 return ret;
508}
509
Dan Williamscc9203b2011-05-08 17:34:44 -0700510static inline void isci_host_can_dequeue(struct isci_host *isci_host, int num)
Dan Williams6f231dd2011-07-02 22:56:22 -0700511{
512 unsigned long flags;
513
514 spin_lock_irqsave(&isci_host->queue_lock, flags);
515 isci_host->can_queue += num;
516 spin_unlock_irqrestore(&isci_host->queue_lock, flags);
517}
518
Dan Williams0cf89d12011-02-18 09:25:07 -0800519static inline void wait_for_start(struct isci_host *ihost)
520{
521 wait_event(ihost->eventq, !test_bit(IHOST_START_PENDING, &ihost->flags));
522}
523
524static inline void wait_for_stop(struct isci_host *ihost)
525{
526 wait_event(ihost->eventq, !test_bit(IHOST_STOP_PENDING, &ihost->flags));
527}
528
Dan Williams6ad31fe2011-03-04 12:10:29 -0800529static inline void wait_for_device_start(struct isci_host *ihost, struct isci_remote_device *idev)
530{
531 wait_event(ihost->eventq, !test_bit(IDEV_START_PENDING, &idev->flags));
532}
533
534static inline void wait_for_device_stop(struct isci_host *ihost, struct isci_remote_device *idev)
535{
Dan Williamsd9c37392011-03-03 17:59:32 -0800536 wait_event(ihost->eventq, !test_bit(IDEV_STOP_PENDING, &idev->flags));
Dan Williams6ad31fe2011-03-04 12:10:29 -0800537}
Dan Williams0cf89d12011-02-18 09:25:07 -0800538
Dan Williams4393aa42011-03-31 13:10:44 -0700539static inline struct isci_host *dev_to_ihost(struct domain_device *dev)
540{
541 return dev->port->ha->lldd_ha;
542}
Dan Williams6f231dd2011-07-02 22:56:22 -0700543
Artur Wojcikcc3dbd02011-05-04 07:58:16 +0000544static inline struct isci_host *scic_to_ihost(struct scic_sds_controller *scic)
545{
546 /* XXX delete after merging scic_sds_contoller and isci_host */
547 struct isci_host *ihost = container_of(scic, typeof(*ihost), sci);
548
549 return ihost;
550}
551
Dan Williams6f231dd2011-07-02 22:56:22 -0700552/**
Dan Williamscc9203b2011-05-08 17:34:44 -0700553 * INCREMENT_QUEUE_GET() -
Dan Williams6f231dd2011-07-02 22:56:22 -0700554 *
Dan Williamscc9203b2011-05-08 17:34:44 -0700555 * This macro will increment the specified index to and if the index wraps to 0
556 * it will toggel the cycle bit.
Dan Williams6f231dd2011-07-02 22:56:22 -0700557 */
Dan Williamscc9203b2011-05-08 17:34:44 -0700558#define INCREMENT_QUEUE_GET(index, cycle, entry_count, bit_toggle) \
559 { \
560 if ((index) + 1 == entry_count) { \
561 (index) = 0; \
562 (cycle) = (cycle) ^ (bit_toggle); \
563 } else { \
564 index = index + 1; \
565 } \
566 }
Dan Williams6f231dd2011-07-02 22:56:22 -0700567
568/**
Dan Williamscc9203b2011-05-08 17:34:44 -0700569 * scic_sds_controller_get_protocol_engine_group() -
Dan Williams6f231dd2011-07-02 22:56:22 -0700570 *
Dan Williamscc9203b2011-05-08 17:34:44 -0700571 * This macro returns the protocol engine group for this controller object.
572 * Presently we only support protocol engine group 0 so just return that
Dan Williams6f231dd2011-07-02 22:56:22 -0700573 */
Dan Williamscc9203b2011-05-08 17:34:44 -0700574#define scic_sds_controller_get_protocol_engine_group(controller) 0
Dan Williams6f231dd2011-07-02 22:56:22 -0700575
Dan Williamscc9203b2011-05-08 17:34:44 -0700576/**
577 * scic_sds_io_tag_construct() -
578 *
579 * This macro constructs an IO tag from the sequence and index values.
580 */
581#define scic_sds_io_tag_construct(sequence, task_index) \
582 ((sequence) << 12 | (task_index))
583
584/**
585 * scic_sds_io_tag_get_sequence() -
586 *
587 * This macro returns the IO sequence from the IO tag value.
588 */
589#define scic_sds_io_tag_get_sequence(io_tag) \
590 (((io_tag) & 0xF000) >> 12)
591
592/**
593 * scic_sds_io_tag_get_index() -
594 *
595 * This macro returns the TCi from the io tag value
596 */
597#define scic_sds_io_tag_get_index(io_tag) \
598 ((io_tag) & 0x0FFF)
599
600/**
601 * scic_sds_io_sequence_increment() -
602 *
603 * This is a helper macro to increment the io sequence count. We may find in
604 * the future that it will be faster to store the sequence count in such a way
605 * as we dont perform the shift operation to build io tag values so therefore
606 * need a way to incrment them correctly
607 */
608#define scic_sds_io_sequence_increment(value) \
609 ((value) = (((value) + 1) & 0x000F))
610
611/* expander attached sata devices require 3 rnc slots */
612static inline int scic_sds_remote_device_node_count(struct scic_sds_remote_device *sci_dev)
613{
614 struct domain_device *dev = sci_dev_to_domain(sci_dev);
615
616 if ((dev->dev_type == SATA_DEV || (dev->tproto & SAS_PROTOCOL_STP)) &&
617 !sci_dev->is_direct_attached)
618 return SCU_STP_REMOTE_NODE_COUNT;
619 return SCU_SSP_REMOTE_NODE_COUNT;
620}
621
622/**
623 * scic_sds_controller_set_invalid_phy() -
624 *
625 * This macro will set the bit in the invalid phy mask for this controller
626 * object. This is used to control messages reported for invalid link up
627 * notifications.
628 */
629#define scic_sds_controller_set_invalid_phy(controller, phy) \
630 ((controller)->invalid_phy_mask |= (1 << (phy)->phy_index))
631
632/**
633 * scic_sds_controller_clear_invalid_phy() -
634 *
635 * This macro will clear the bit in the invalid phy mask for this controller
636 * object. This is used to control messages reported for invalid link up
637 * notifications.
638 */
639#define scic_sds_controller_clear_invalid_phy(controller, phy) \
640 ((controller)->invalid_phy_mask &= ~(1 << (phy)->phy_index))
641
642static inline struct device *scic_to_dev(struct scic_sds_controller *scic)
643{
644 return &scic_to_ihost(scic)->pdev->dev;
645}
646
647static inline struct device *sciphy_to_dev(struct scic_sds_phy *sci_phy)
648{
649 struct isci_phy *iphy = sci_phy_to_iphy(sci_phy);
650
651 if (!iphy || !iphy->isci_port || !iphy->isci_port->isci_host)
652 return NULL;
653
654 return &iphy->isci_port->isci_host->pdev->dev;
655}
656
657static inline struct device *sciport_to_dev(struct scic_sds_port *sci_port)
658{
659 struct isci_port *iport = sci_port_to_iport(sci_port);
660
661 if (!iport || !iport->isci_host)
662 return NULL;
663
664 return &iport->isci_host->pdev->dev;
665}
666
667static inline struct device *scirdev_to_dev(struct scic_sds_remote_device *sci_dev)
668{
669 struct isci_remote_device *idev =
670 container_of(sci_dev, typeof(*idev), sci);
671
672 if (!idev || !idev->isci_port || !idev->isci_port->isci_host)
673 return NULL;
674
675 return &idev->isci_port->isci_host->pdev->dev;
676}
677
678enum {
679 ISCI_SI_REVA0,
680 ISCI_SI_REVA2,
681 ISCI_SI_REVB0,
682};
683
684extern int isci_si_rev;
685
686static inline bool is_a0(void)
687{
688 return isci_si_rev == ISCI_SI_REVA0;
689}
690
691static inline bool is_a2(void)
692{
693 return isci_si_rev == ISCI_SI_REVA2;
694}
695
696static inline bool is_b0(void)
697{
698 return isci_si_rev > ISCI_SI_REVA2;
699}
700
701void scic_sds_controller_post_request(struct scic_sds_controller *scic,
702 u32 request);
703void scic_sds_controller_release_frame(struct scic_sds_controller *scic,
704 u32 frame_index);
705void scic_sds_controller_copy_sata_response(void *response_buffer,
706 void *frame_header,
707 void *frame_buffer);
708enum sci_status scic_sds_controller_allocate_remote_node_context(struct scic_sds_controller *scic,
709 struct scic_sds_remote_device *sci_dev,
710 u16 *node_id);
711void scic_sds_controller_free_remote_node_context(
712 struct scic_sds_controller *scic,
713 struct scic_sds_remote_device *sci_dev,
714 u16 node_id);
715union scu_remote_node_context *scic_sds_controller_get_remote_node_context_buffer(
716 struct scic_sds_controller *scic,
717 u16 node_id);
718
719struct scic_sds_request *scic_request_by_tag(struct scic_sds_controller *scic,
720 u16 io_tag);
721
722struct scu_task_context *scic_sds_controller_get_task_context_buffer(
723 struct scic_sds_controller *scic,
724 u16 io_tag);
725
726void scic_sds_controller_power_control_queue_insert(
727 struct scic_sds_controller *scic,
728 struct scic_sds_phy *sci_phy);
729
730void scic_sds_controller_power_control_queue_remove(
731 struct scic_sds_controller *scic,
732 struct scic_sds_phy *sci_phy);
733
734void scic_sds_controller_link_up(
735 struct scic_sds_controller *scic,
736 struct scic_sds_port *sci_port,
737 struct scic_sds_phy *sci_phy);
738
739void scic_sds_controller_link_down(
740 struct scic_sds_controller *scic,
741 struct scic_sds_port *sci_port,
742 struct scic_sds_phy *sci_phy);
743
744void scic_sds_controller_remote_device_stopped(
745 struct scic_sds_controller *scic,
746 struct scic_sds_remote_device *sci_dev);
747
748void scic_sds_controller_copy_task_context(
749 struct scic_sds_controller *scic,
750 struct scic_sds_request *this_request);
751
752void scic_sds_controller_register_setup(struct scic_sds_controller *scic);
753
754enum sci_status scic_controller_continue_io(struct scic_sds_request *sci_req);
755int isci_host_scan_finished(struct Scsi_Host *, unsigned long);
756void isci_host_scan_start(struct Scsi_Host *);
Dan Williams6f231dd2011-07-02 22:56:22 -0700757
758int isci_host_init(struct isci_host *);
759
760void isci_host_init_controller_names(
761 struct isci_host *isci_host,
762 unsigned int controller_idx);
763
764void isci_host_deinit(
765 struct isci_host *);
766
767void isci_host_port_link_up(
768 struct isci_host *,
769 struct scic_sds_port *,
770 struct scic_sds_phy *);
771int isci_host_dev_found(struct domain_device *);
772
773void isci_host_remote_device_start_complete(
774 struct isci_host *,
775 struct isci_remote_device *,
776 enum sci_status);
777
Dan Williamscc9203b2011-05-08 17:34:44 -0700778void scic_controller_disable_interrupts(
779 struct scic_sds_controller *scic);
780
781enum sci_status scic_controller_start_io(
782 struct scic_sds_controller *scic,
783 struct scic_sds_remote_device *remote_device,
784 struct scic_sds_request *io_request,
785 u16 io_tag);
786
787enum sci_task_status scic_controller_start_task(
788 struct scic_sds_controller *scic,
789 struct scic_sds_remote_device *remote_device,
790 struct scic_sds_request *task_request,
791 u16 io_tag);
792
793enum sci_status scic_controller_terminate_request(
794 struct scic_sds_controller *scic,
795 struct scic_sds_remote_device *remote_device,
796 struct scic_sds_request *request);
797
798enum sci_status scic_controller_complete_io(
799 struct scic_sds_controller *scic,
800 struct scic_sds_remote_device *remote_device,
801 struct scic_sds_request *io_request);
802
803u16 scic_controller_allocate_io_tag(
804 struct scic_sds_controller *scic);
805
806enum sci_status scic_controller_free_io_tag(
807 struct scic_sds_controller *scic,
808 u16 io_tag);
Dan Williamse2f8db52011-05-10 02:28:46 -0700809
810void scic_sds_port_configuration_agent_construct(
811 struct scic_sds_port_configuration_agent *port_agent);
812
813enum sci_status scic_sds_port_configuration_agent_initialize(
814 struct scic_sds_controller *controller,
815 struct scic_sds_port_configuration_agent *port_agent);
Dan Williamscc9203b2011-05-08 17:34:44 -0700816#endif