blob: 49a2786e00b9737042c5e96f6a3abf030d3f116f [file] [log] [blame]
Thomas Abraham0561cea2011-11-02 19:31:15 +09001/*
2 * Samsung's Exynos4210 SoC device tree source
3 *
4 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 * Copyright (c) 2010-2011 Linaro Ltd.
7 * www.linaro.org
8 *
9 * Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210
10 * based board files can include this file and provide values for board specfic
11 * bindings.
12 *
13 * Note: This file does not include device nodes for all the controllers in
14 * Exynos4210 SoC. As device tree coverage for Exynos4210 increases, additional
15 * nodes can be added to this file.
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20*/
21
Tomasz Figab571abb2012-09-21 10:12:59 +090022/include/ "exynos4.dtsi"
Thomas Abraham87711d82012-09-07 06:14:26 +090023/include/ "exynos4210-pinctrl.dtsi"
Thomas Abraham0561cea2011-11-02 19:31:15 +090024
25/ {
26 compatible = "samsung,exynos4210";
Thomas Abraham0561cea2011-11-02 19:31:15 +090027
Thomas Abraham4980c392012-07-14 10:45:32 +090028 aliases {
Thomas Abraham87711d82012-09-07 06:14:26 +090029 pinctrl0 = &pinctrl_0;
30 pinctrl1 = &pinctrl_1;
31 pinctrl2 = &pinctrl_2;
Thomas Abraham4980c392012-07-14 10:45:32 +090032 };
33
Tomasz Figa91d88f02012-11-22 00:22:09 +090034 pd_lcd1: lcd1-power-domain@10023CA0 {
35 compatible = "samsung,exynos4210-pd";
36 reg = <0x10023CA0 0x20>;
37 };
38
Thomas Abraham0561cea2011-11-02 19:31:15 +090039 gic:interrupt-controller@10490000 {
Thomas Abrahamda911782012-02-08 11:42:43 +090040 cpu-offset = <0x8000>;
Thomas Abraham0561cea2011-11-02 19:31:15 +090041 };
42
Thomas Abraham49229722012-07-13 15:25:08 +090043 combiner:interrupt-controller@10440000 {
Thomas Abraham49229722012-07-13 15:25:08 +090044 interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
45 <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
46 <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
47 <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>;
48 };
49
Thomas Abrahambbd97002013-03-09 16:12:35 +090050 mct@10050000 {
51 compatible = "samsung,exynos4210-mct";
52 reg = <0x10050000 0x800>;
53 interrupt-controller;
54 #interrups-cells = <2>;
55 interrupt-parent = <&mct_map>;
56 interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
57 <4 0>, <5 0>;
58
59 mct_map: mct-map {
60 #interrupt-cells = <2>;
61 #address-cells = <0>;
62 #size-cells = <0>;
63 interrupt-map = <0x0 0 &gic 0 57 0>,
64 <0x1 0 &gic 0 69 0>,
65 <0x2 0 &combiner 12 6>,
66 <0x3 0 &combiner 12 7>,
67 <0x4 0 &gic 0 42 0>,
68 <0x5 0 &gic 0 48 0>;
69 };
70 };
71
Thomas Abraham87711d82012-09-07 06:14:26 +090072 pinctrl_0: pinctrl@11400000 {
Kukjin Kimb533c862013-01-02 16:05:42 -080073 compatible = "samsung,exynos4210-pinctrl";
Thomas Abraham87711d82012-09-07 06:14:26 +090074 reg = <0x11400000 0x1000>;
75 interrupts = <0 47 0>;
Thomas Abraham87711d82012-09-07 06:14:26 +090076 };
77
78 pinctrl_1: pinctrl@11000000 {
Kukjin Kimb533c862013-01-02 16:05:42 -080079 compatible = "samsung,exynos4210-pinctrl";
Thomas Abraham87711d82012-09-07 06:14:26 +090080 reg = <0x11000000 0x1000>;
81 interrupts = <0 46 0>;
Thomas Abraham87711d82012-09-07 06:14:26 +090082
83 wakup_eint: wakeup-interrupt-controller {
84 compatible = "samsung,exynos4210-wakeup-eint";
85 interrupt-parent = <&gic>;
Tomasz Figaa04b07c2012-10-11 10:11:18 +020086 interrupts = <0 32 0>;
Thomas Abraham87711d82012-09-07 06:14:26 +090087 };
88 };
89
90 pinctrl_2: pinctrl@03860000 {
Kukjin Kimb533c862013-01-02 16:05:42 -080091 compatible = "samsung,exynos4210-pinctrl";
Thomas Abraham87711d82012-09-07 06:14:26 +090092 reg = <0x03860000 0x1000>;
93 };
94
Amit Daniel Kachhap8d4155d2012-10-29 21:18:01 +090095 tmu@100C0000 {
96 compatible = "samsung,exynos4210-tmu";
97 interrupt-parent = <&combiner>;
98 reg = <0x100C0000 0x100>;
99 interrupts = <2 4>;
100 };
Thomas Abraham0561cea2011-11-02 19:31:15 +0900101};