Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is subject to the terms and conditions of the GNU General Public |
| 3 | * License. See the file "COPYING" in the main directory of this archive |
| 4 | * for more details. |
| 5 | * |
| 6 | * Copyright (C) 1992 Ross Biro |
| 7 | * Copyright (C) Linus Torvalds |
| 8 | * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle |
| 9 | * Copyright (C) 1996 David S. Miller |
| 10 | * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com |
| 11 | * Copyright (C) 1999 MIPS Technologies, Inc. |
| 12 | * Copyright (C) 2000 Ulf Carlsson |
| 13 | * |
| 14 | * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit |
| 15 | * binaries. |
| 16 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 17 | #include <linux/compiler.h> |
Ralf Baechle | c3fc5cd | 2013-05-29 01:07:19 +0200 | [diff] [blame] | 18 | #include <linux/context_tracking.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 19 | #include <linux/kernel.h> |
| 20 | #include <linux/sched.h> |
| 21 | #include <linux/mm.h> |
| 22 | #include <linux/errno.h> |
| 23 | #include <linux/ptrace.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | #include <linux/smp.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 25 | #include <linux/user.h> |
| 26 | #include <linux/security.h> |
Ralf Baechle | bc3d22c | 2012-07-17 19:43:58 +0200 | [diff] [blame^] | 27 | #include <linux/tracehook.h> |
Ralf Baechle | 293c5bd | 2007-07-25 16:19:33 +0100 | [diff] [blame] | 28 | #include <linux/audit.h> |
| 29 | #include <linux/seccomp.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 30 | |
Ralf Baechle | f8280c8 | 2005-05-19 12:08:04 +0000 | [diff] [blame] | 31 | #include <asm/byteorder.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 32 | #include <asm/cpu.h> |
Ralf Baechle | e50c0a8 | 2005-05-31 11:49:19 +0000 | [diff] [blame] | 33 | #include <asm/dsp.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 34 | #include <asm/fpu.h> |
| 35 | #include <asm/mipsregs.h> |
Ralf Baechle | 101b353 | 2005-10-06 17:39:32 +0100 | [diff] [blame] | 36 | #include <asm/mipsmtregs.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 37 | #include <asm/pgtable.h> |
| 38 | #include <asm/page.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 39 | #include <asm/uaccess.h> |
| 40 | #include <asm/bootinfo.h> |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 41 | #include <asm/reg.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 42 | |
| 43 | /* |
| 44 | * Called by kernel/ptrace.c when detaching.. |
| 45 | * |
| 46 | * Make sure single step bits etc are not set. |
| 47 | */ |
| 48 | void ptrace_disable(struct task_struct *child) |
| 49 | { |
David Daney | 0926bf9 | 2008-09-23 00:11:26 -0700 | [diff] [blame] | 50 | /* Don't load the watchpoint registers for the ex-child. */ |
| 51 | clear_tsk_thread_flag(child, TIF_LOAD_WATCH); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 52 | } |
| 53 | |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 54 | /* |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 55 | * Read a general register set. We always use the 64-bit format, even |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 56 | * for 32-bit kernels and for 32-bit processes on a 64-bit kernel. |
| 57 | * Registers are sign extended to fill the available space. |
| 58 | */ |
Ralf Baechle | 49a89ef | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 59 | int ptrace_getregs(struct task_struct *child, __s64 __user *data) |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 60 | { |
| 61 | struct pt_regs *regs; |
| 62 | int i; |
| 63 | |
| 64 | if (!access_ok(VERIFY_WRITE, data, 38 * 8)) |
| 65 | return -EIO; |
| 66 | |
Al Viro | 40bc9c6 | 2006-01-12 01:06:07 -0800 | [diff] [blame] | 67 | regs = task_pt_regs(child); |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 68 | |
| 69 | for (i = 0; i < 32; i++) |
Atsushi Nemoto | 62b14c2 | 2007-10-26 00:53:02 +0900 | [diff] [blame] | 70 | __put_user((long)regs->regs[i], data + i); |
| 71 | __put_user((long)regs->lo, data + EF_LO - EF_R0); |
| 72 | __put_user((long)regs->hi, data + EF_HI - EF_R0); |
| 73 | __put_user((long)regs->cp0_epc, data + EF_CP0_EPC - EF_R0); |
| 74 | __put_user((long)regs->cp0_badvaddr, data + EF_CP0_BADVADDR - EF_R0); |
| 75 | __put_user((long)regs->cp0_status, data + EF_CP0_STATUS - EF_R0); |
| 76 | __put_user((long)regs->cp0_cause, data + EF_CP0_CAUSE - EF_R0); |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 77 | |
| 78 | return 0; |
| 79 | } |
| 80 | |
| 81 | /* |
| 82 | * Write a general register set. As for PTRACE_GETREGS, we always use |
| 83 | * the 64-bit format. On a 32-bit kernel only the lower order half |
| 84 | * (according to endianness) will be used. |
| 85 | */ |
Ralf Baechle | 49a89ef | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 86 | int ptrace_setregs(struct task_struct *child, __s64 __user *data) |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 87 | { |
| 88 | struct pt_regs *regs; |
| 89 | int i; |
| 90 | |
| 91 | if (!access_ok(VERIFY_READ, data, 38 * 8)) |
| 92 | return -EIO; |
| 93 | |
Al Viro | 40bc9c6 | 2006-01-12 01:06:07 -0800 | [diff] [blame] | 94 | regs = task_pt_regs(child); |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 95 | |
| 96 | for (i = 0; i < 32; i++) |
Ralf Baechle | 49a89ef | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 97 | __get_user(regs->regs[i], data + i); |
| 98 | __get_user(regs->lo, data + EF_LO - EF_R0); |
| 99 | __get_user(regs->hi, data + EF_HI - EF_R0); |
| 100 | __get_user(regs->cp0_epc, data + EF_CP0_EPC - EF_R0); |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 101 | |
| 102 | /* badvaddr, status, and cause may not be written. */ |
| 103 | |
| 104 | return 0; |
| 105 | } |
| 106 | |
Ralf Baechle | 49a89ef | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 107 | int ptrace_getfpregs(struct task_struct *child, __u32 __user *data) |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 108 | { |
| 109 | int i; |
Atsushi Nemoto | e04582b | 2006-10-09 00:10:01 +0900 | [diff] [blame] | 110 | unsigned int tmp; |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 111 | |
| 112 | if (!access_ok(VERIFY_WRITE, data, 33 * 8)) |
| 113 | return -EIO; |
| 114 | |
| 115 | if (tsk_used_math(child)) { |
| 116 | fpureg_t *fregs = get_fpu_regs(child); |
| 117 | for (i = 0; i < 32; i++) |
Ralf Baechle | 49a89ef | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 118 | __put_user(fregs[i], i + (__u64 __user *) data); |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 119 | } else { |
| 120 | for (i = 0; i < 32; i++) |
Ralf Baechle | 49a89ef | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 121 | __put_user((__u64) -1, i + (__u64 __user *) data); |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 122 | } |
| 123 | |
Ralf Baechle | 49a89ef | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 124 | __put_user(child->thread.fpu.fcr31, data + 64); |
Atsushi Nemoto | eae8907 | 2006-05-16 01:26:03 +0900 | [diff] [blame] | 125 | |
Atsushi Nemoto | e04582b | 2006-10-09 00:10:01 +0900 | [diff] [blame] | 126 | preempt_disable(); |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 127 | if (cpu_has_fpu) { |
Atsushi Nemoto | e04582b | 2006-10-09 00:10:01 +0900 | [diff] [blame] | 128 | unsigned int flags; |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 129 | |
Ralf Baechle | 101b353 | 2005-10-06 17:39:32 +0100 | [diff] [blame] | 130 | if (cpu_has_mipsmt) { |
| 131 | unsigned int vpflags = dvpe(); |
| 132 | flags = read_c0_status(); |
| 133 | __enable_fpu(); |
| 134 | __asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp)); |
| 135 | write_c0_status(flags); |
| 136 | evpe(vpflags); |
| 137 | } else { |
| 138 | flags = read_c0_status(); |
| 139 | __enable_fpu(); |
| 140 | __asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp)); |
| 141 | write_c0_status(flags); |
| 142 | } |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 143 | } else { |
Atsushi Nemoto | e04582b | 2006-10-09 00:10:01 +0900 | [diff] [blame] | 144 | tmp = 0; |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 145 | } |
Atsushi Nemoto | e04582b | 2006-10-09 00:10:01 +0900 | [diff] [blame] | 146 | preempt_enable(); |
Ralf Baechle | 49a89ef | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 147 | __put_user(tmp, data + 65); |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 148 | |
| 149 | return 0; |
| 150 | } |
| 151 | |
Ralf Baechle | 49a89ef | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 152 | int ptrace_setfpregs(struct task_struct *child, __u32 __user *data) |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 153 | { |
| 154 | fpureg_t *fregs; |
| 155 | int i; |
| 156 | |
| 157 | if (!access_ok(VERIFY_READ, data, 33 * 8)) |
| 158 | return -EIO; |
| 159 | |
| 160 | fregs = get_fpu_regs(child); |
| 161 | |
| 162 | for (i = 0; i < 32; i++) |
Ralf Baechle | 49a89ef | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 163 | __get_user(fregs[i], i + (__u64 __user *) data); |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 164 | |
Ralf Baechle | 49a89ef | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 165 | __get_user(child->thread.fpu.fcr31, data + 64); |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 166 | |
| 167 | /* FIR may not be written. */ |
| 168 | |
| 169 | return 0; |
| 170 | } |
| 171 | |
David Daney | 0926bf9 | 2008-09-23 00:11:26 -0700 | [diff] [blame] | 172 | int ptrace_get_watch_regs(struct task_struct *child, |
| 173 | struct pt_watch_regs __user *addr) |
| 174 | { |
| 175 | enum pt_watch_style style; |
| 176 | int i; |
| 177 | |
| 178 | if (!cpu_has_watch || current_cpu_data.watch_reg_use_cnt == 0) |
| 179 | return -EIO; |
| 180 | if (!access_ok(VERIFY_WRITE, addr, sizeof(struct pt_watch_regs))) |
| 181 | return -EIO; |
| 182 | |
| 183 | #ifdef CONFIG_32BIT |
| 184 | style = pt_watch_style_mips32; |
| 185 | #define WATCH_STYLE mips32 |
| 186 | #else |
| 187 | style = pt_watch_style_mips64; |
| 188 | #define WATCH_STYLE mips64 |
| 189 | #endif |
| 190 | |
| 191 | __put_user(style, &addr->style); |
| 192 | __put_user(current_cpu_data.watch_reg_use_cnt, |
| 193 | &addr->WATCH_STYLE.num_valid); |
| 194 | for (i = 0; i < current_cpu_data.watch_reg_use_cnt; i++) { |
| 195 | __put_user(child->thread.watch.mips3264.watchlo[i], |
| 196 | &addr->WATCH_STYLE.watchlo[i]); |
| 197 | __put_user(child->thread.watch.mips3264.watchhi[i] & 0xfff, |
| 198 | &addr->WATCH_STYLE.watchhi[i]); |
| 199 | __put_user(current_cpu_data.watch_reg_masks[i], |
| 200 | &addr->WATCH_STYLE.watch_masks[i]); |
| 201 | } |
| 202 | for (; i < 8; i++) { |
| 203 | __put_user(0, &addr->WATCH_STYLE.watchlo[i]); |
| 204 | __put_user(0, &addr->WATCH_STYLE.watchhi[i]); |
| 205 | __put_user(0, &addr->WATCH_STYLE.watch_masks[i]); |
| 206 | } |
| 207 | |
| 208 | return 0; |
| 209 | } |
| 210 | |
| 211 | int ptrace_set_watch_regs(struct task_struct *child, |
| 212 | struct pt_watch_regs __user *addr) |
| 213 | { |
| 214 | int i; |
| 215 | int watch_active = 0; |
| 216 | unsigned long lt[NUM_WATCH_REGS]; |
| 217 | u16 ht[NUM_WATCH_REGS]; |
| 218 | |
| 219 | if (!cpu_has_watch || current_cpu_data.watch_reg_use_cnt == 0) |
| 220 | return -EIO; |
| 221 | if (!access_ok(VERIFY_READ, addr, sizeof(struct pt_watch_regs))) |
| 222 | return -EIO; |
| 223 | /* Check the values. */ |
| 224 | for (i = 0; i < current_cpu_data.watch_reg_use_cnt; i++) { |
| 225 | __get_user(lt[i], &addr->WATCH_STYLE.watchlo[i]); |
| 226 | #ifdef CONFIG_32BIT |
| 227 | if (lt[i] & __UA_LIMIT) |
| 228 | return -EINVAL; |
| 229 | #else |
| 230 | if (test_tsk_thread_flag(child, TIF_32BIT_ADDR)) { |
| 231 | if (lt[i] & 0xffffffff80000000UL) |
| 232 | return -EINVAL; |
| 233 | } else { |
| 234 | if (lt[i] & __UA_LIMIT) |
| 235 | return -EINVAL; |
| 236 | } |
| 237 | #endif |
| 238 | __get_user(ht[i], &addr->WATCH_STYLE.watchhi[i]); |
| 239 | if (ht[i] & ~0xff8) |
| 240 | return -EINVAL; |
| 241 | } |
| 242 | /* Install them. */ |
| 243 | for (i = 0; i < current_cpu_data.watch_reg_use_cnt; i++) { |
| 244 | if (lt[i] & 7) |
| 245 | watch_active = 1; |
| 246 | child->thread.watch.mips3264.watchlo[i] = lt[i]; |
| 247 | /* Set the G bit. */ |
| 248 | child->thread.watch.mips3264.watchhi[i] = ht[i]; |
| 249 | } |
| 250 | |
| 251 | if (watch_active) |
| 252 | set_tsk_thread_flag(child, TIF_LOAD_WATCH); |
| 253 | else |
| 254 | clear_tsk_thread_flag(child, TIF_LOAD_WATCH); |
| 255 | |
| 256 | return 0; |
| 257 | } |
| 258 | |
Namhyung Kim | 9b05a69 | 2010-10-27 15:33:47 -0700 | [diff] [blame] | 259 | long arch_ptrace(struct task_struct *child, long request, |
| 260 | unsigned long addr, unsigned long data) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 261 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 262 | int ret; |
Namhyung Kim | fb67113 | 2010-10-27 15:33:58 -0700 | [diff] [blame] | 263 | void __user *addrp = (void __user *) addr; |
| 264 | void __user *datavp = (void __user *) data; |
| 265 | unsigned long __user *datalp = (void __user *) data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 266 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 267 | switch (request) { |
| 268 | /* when I and D space are separate, these will need to be fixed. */ |
| 269 | case PTRACE_PEEKTEXT: /* read word at location addr. */ |
Alexey Dobriyan | 7664732 | 2007-07-17 04:03:43 -0700 | [diff] [blame] | 270 | case PTRACE_PEEKDATA: |
| 271 | ret = generic_ptrace_peekdata(child, addr, data); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 272 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 273 | |
| 274 | /* Read the word at location addr in the USER area. */ |
| 275 | case PTRACE_PEEKUSR: { |
| 276 | struct pt_regs *regs; |
| 277 | unsigned long tmp = 0; |
| 278 | |
Al Viro | 40bc9c6 | 2006-01-12 01:06:07 -0800 | [diff] [blame] | 279 | regs = task_pt_regs(child); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 280 | ret = 0; /* Default return value. */ |
| 281 | |
| 282 | switch (addr) { |
| 283 | case 0 ... 31: |
| 284 | tmp = regs->regs[addr]; |
| 285 | break; |
| 286 | case FPR_BASE ... FPR_BASE + 31: |
| 287 | if (tsk_used_math(child)) { |
| 288 | fpureg_t *fregs = get_fpu_regs(child); |
| 289 | |
Ralf Baechle | 875d43e | 2005-09-03 15:56:16 -0700 | [diff] [blame] | 290 | #ifdef CONFIG_32BIT |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 291 | /* |
| 292 | * The odd registers are actually the high |
| 293 | * order bits of the values stored in the even |
| 294 | * registers - unless we're using r2k_switch.S. |
| 295 | */ |
| 296 | if (addr & 1) |
| 297 | tmp = (unsigned long) (fregs[((addr & ~1) - 32)] >> 32); |
| 298 | else |
| 299 | tmp = (unsigned long) (fregs[(addr - 32)] & 0xffffffff); |
| 300 | #endif |
Ralf Baechle | 875d43e | 2005-09-03 15:56:16 -0700 | [diff] [blame] | 301 | #ifdef CONFIG_64BIT |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 302 | tmp = fregs[addr - FPR_BASE]; |
| 303 | #endif |
| 304 | } else { |
| 305 | tmp = -1; /* FP not yet used */ |
| 306 | } |
| 307 | break; |
| 308 | case PC: |
| 309 | tmp = regs->cp0_epc; |
| 310 | break; |
| 311 | case CAUSE: |
| 312 | tmp = regs->cp0_cause; |
| 313 | break; |
| 314 | case BADVADDR: |
| 315 | tmp = regs->cp0_badvaddr; |
| 316 | break; |
| 317 | case MMHI: |
| 318 | tmp = regs->hi; |
| 319 | break; |
| 320 | case MMLO: |
| 321 | tmp = regs->lo; |
| 322 | break; |
Franck Bui-Huu | 9693a85 | 2007-02-02 17:41:47 +0100 | [diff] [blame] | 323 | #ifdef CONFIG_CPU_HAS_SMARTMIPS |
| 324 | case ACX: |
| 325 | tmp = regs->acx; |
| 326 | break; |
| 327 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 328 | case FPC_CSR: |
Atsushi Nemoto | eae8907 | 2006-05-16 01:26:03 +0900 | [diff] [blame] | 329 | tmp = child->thread.fpu.fcr31; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 330 | break; |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 331 | case FPC_EIR: { /* implementation / version register */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 332 | unsigned int flags; |
Ralf Baechle | 41c594a | 2006-04-05 09:45:45 +0100 | [diff] [blame] | 333 | #ifdef CONFIG_MIPS_MT_SMTC |
Ralf Baechle | b7e4226 | 2008-10-01 21:52:41 +0100 | [diff] [blame] | 334 | unsigned long irqflags; |
Ralf Baechle | 41c594a | 2006-04-05 09:45:45 +0100 | [diff] [blame] | 335 | unsigned int mtflags; |
| 336 | #endif /* CONFIG_MIPS_MT_SMTC */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 337 | |
Atsushi Nemoto | e04582b | 2006-10-09 00:10:01 +0900 | [diff] [blame] | 338 | preempt_disable(); |
| 339 | if (!cpu_has_fpu) { |
| 340 | preempt_enable(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 341 | break; |
Atsushi Nemoto | e04582b | 2006-10-09 00:10:01 +0900 | [diff] [blame] | 342 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 343 | |
Ralf Baechle | 41c594a | 2006-04-05 09:45:45 +0100 | [diff] [blame] | 344 | #ifdef CONFIG_MIPS_MT_SMTC |
| 345 | /* Read-modify-write of Status must be atomic */ |
| 346 | local_irq_save(irqflags); |
| 347 | mtflags = dmt(); |
| 348 | #endif /* CONFIG_MIPS_MT_SMTC */ |
Ralf Baechle | 101b353 | 2005-10-06 17:39:32 +0100 | [diff] [blame] | 349 | if (cpu_has_mipsmt) { |
| 350 | unsigned int vpflags = dvpe(); |
| 351 | flags = read_c0_status(); |
| 352 | __enable_fpu(); |
| 353 | __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp)); |
| 354 | write_c0_status(flags); |
| 355 | evpe(vpflags); |
| 356 | } else { |
| 357 | flags = read_c0_status(); |
| 358 | __enable_fpu(); |
| 359 | __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp)); |
| 360 | write_c0_status(flags); |
| 361 | } |
Ralf Baechle | 41c594a | 2006-04-05 09:45:45 +0100 | [diff] [blame] | 362 | #ifdef CONFIG_MIPS_MT_SMTC |
| 363 | emt(mtflags); |
| 364 | local_irq_restore(irqflags); |
| 365 | #endif /* CONFIG_MIPS_MT_SMTC */ |
Ralf Baechle | 101b353 | 2005-10-06 17:39:32 +0100 | [diff] [blame] | 366 | preempt_enable(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 367 | break; |
| 368 | } |
Ralf Baechle | c134a5e | 2005-06-30 09:42:00 +0000 | [diff] [blame] | 369 | case DSP_BASE ... DSP_BASE + 5: { |
| 370 | dspreg_t *dregs; |
| 371 | |
Ralf Baechle | e50c0a8 | 2005-05-31 11:49:19 +0000 | [diff] [blame] | 372 | if (!cpu_has_dsp) { |
| 373 | tmp = 0; |
| 374 | ret = -EIO; |
Christoph Hellwig | 481bed4 | 2005-11-07 00:59:47 -0800 | [diff] [blame] | 375 | goto out; |
Ralf Baechle | e50c0a8 | 2005-05-31 11:49:19 +0000 | [diff] [blame] | 376 | } |
Ralf Baechle | 6c35585 | 2005-12-05 13:47:25 +0000 | [diff] [blame] | 377 | dregs = __get_dsp_regs(child); |
| 378 | tmp = (unsigned long) (dregs[addr - DSP_BASE]); |
Ralf Baechle | e50c0a8 | 2005-05-31 11:49:19 +0000 | [diff] [blame] | 379 | break; |
Ralf Baechle | c134a5e | 2005-06-30 09:42:00 +0000 | [diff] [blame] | 380 | } |
Ralf Baechle | e50c0a8 | 2005-05-31 11:49:19 +0000 | [diff] [blame] | 381 | case DSP_CONTROL: |
| 382 | if (!cpu_has_dsp) { |
| 383 | tmp = 0; |
| 384 | ret = -EIO; |
Christoph Hellwig | 481bed4 | 2005-11-07 00:59:47 -0800 | [diff] [blame] | 385 | goto out; |
Ralf Baechle | e50c0a8 | 2005-05-31 11:49:19 +0000 | [diff] [blame] | 386 | } |
| 387 | tmp = child->thread.dsp.dspcontrol; |
| 388 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 389 | default: |
| 390 | tmp = 0; |
| 391 | ret = -EIO; |
Christoph Hellwig | 481bed4 | 2005-11-07 00:59:47 -0800 | [diff] [blame] | 392 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 393 | } |
Namhyung Kim | fb67113 | 2010-10-27 15:33:58 -0700 | [diff] [blame] | 394 | ret = put_user(tmp, datalp); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 395 | break; |
| 396 | } |
| 397 | |
| 398 | /* when I and D space are separate, this will have to be fixed. */ |
| 399 | case PTRACE_POKETEXT: /* write the word at location addr. */ |
| 400 | case PTRACE_POKEDATA: |
Alexey Dobriyan | f284ce7 | 2007-07-17 04:03:44 -0700 | [diff] [blame] | 401 | ret = generic_ptrace_pokedata(child, addr, data); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 402 | break; |
| 403 | |
| 404 | case PTRACE_POKEUSR: { |
| 405 | struct pt_regs *regs; |
| 406 | ret = 0; |
Al Viro | 40bc9c6 | 2006-01-12 01:06:07 -0800 | [diff] [blame] | 407 | regs = task_pt_regs(child); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 408 | |
| 409 | switch (addr) { |
| 410 | case 0 ... 31: |
| 411 | regs->regs[addr] = data; |
| 412 | break; |
| 413 | case FPR_BASE ... FPR_BASE + 31: { |
| 414 | fpureg_t *fregs = get_fpu_regs(child); |
| 415 | |
| 416 | if (!tsk_used_math(child)) { |
| 417 | /* FP not yet used */ |
Atsushi Nemoto | eae8907 | 2006-05-16 01:26:03 +0900 | [diff] [blame] | 418 | memset(&child->thread.fpu, ~0, |
| 419 | sizeof(child->thread.fpu)); |
| 420 | child->thread.fpu.fcr31 = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 421 | } |
Ralf Baechle | 875d43e | 2005-09-03 15:56:16 -0700 | [diff] [blame] | 422 | #ifdef CONFIG_32BIT |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 423 | /* |
| 424 | * The odd registers are actually the high order bits |
| 425 | * of the values stored in the even registers - unless |
| 426 | * we're using r2k_switch.S. |
| 427 | */ |
| 428 | if (addr & 1) { |
| 429 | fregs[(addr & ~1) - FPR_BASE] &= 0xffffffff; |
| 430 | fregs[(addr & ~1) - FPR_BASE] |= ((unsigned long long) data) << 32; |
| 431 | } else { |
| 432 | fregs[addr - FPR_BASE] &= ~0xffffffffLL; |
| 433 | fregs[addr - FPR_BASE] |= data; |
| 434 | } |
| 435 | #endif |
Ralf Baechle | 875d43e | 2005-09-03 15:56:16 -0700 | [diff] [blame] | 436 | #ifdef CONFIG_64BIT |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 437 | fregs[addr - FPR_BASE] = data; |
| 438 | #endif |
| 439 | break; |
| 440 | } |
| 441 | case PC: |
| 442 | regs->cp0_epc = data; |
| 443 | break; |
| 444 | case MMHI: |
| 445 | regs->hi = data; |
| 446 | break; |
| 447 | case MMLO: |
| 448 | regs->lo = data; |
| 449 | break; |
Franck Bui-Huu | 9693a85 | 2007-02-02 17:41:47 +0100 | [diff] [blame] | 450 | #ifdef CONFIG_CPU_HAS_SMARTMIPS |
| 451 | case ACX: |
| 452 | regs->acx = data; |
| 453 | break; |
| 454 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 455 | case FPC_CSR: |
Atsushi Nemoto | eae8907 | 2006-05-16 01:26:03 +0900 | [diff] [blame] | 456 | child->thread.fpu.fcr31 = data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 457 | break; |
Ralf Baechle | c134a5e | 2005-06-30 09:42:00 +0000 | [diff] [blame] | 458 | case DSP_BASE ... DSP_BASE + 5: { |
| 459 | dspreg_t *dregs; |
| 460 | |
Ralf Baechle | e50c0a8 | 2005-05-31 11:49:19 +0000 | [diff] [blame] | 461 | if (!cpu_has_dsp) { |
| 462 | ret = -EIO; |
| 463 | break; |
| 464 | } |
| 465 | |
Ralf Baechle | c134a5e | 2005-06-30 09:42:00 +0000 | [diff] [blame] | 466 | dregs = __get_dsp_regs(child); |
Ralf Baechle | e50c0a8 | 2005-05-31 11:49:19 +0000 | [diff] [blame] | 467 | dregs[addr - DSP_BASE] = data; |
| 468 | break; |
Ralf Baechle | c134a5e | 2005-06-30 09:42:00 +0000 | [diff] [blame] | 469 | } |
Ralf Baechle | e50c0a8 | 2005-05-31 11:49:19 +0000 | [diff] [blame] | 470 | case DSP_CONTROL: |
| 471 | if (!cpu_has_dsp) { |
| 472 | ret = -EIO; |
| 473 | break; |
| 474 | } |
| 475 | child->thread.dsp.dspcontrol = data; |
| 476 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 477 | default: |
| 478 | /* The rest are not allowed. */ |
| 479 | ret = -EIO; |
| 480 | break; |
| 481 | } |
| 482 | break; |
| 483 | } |
| 484 | |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 485 | case PTRACE_GETREGS: |
Namhyung Kim | fb67113 | 2010-10-27 15:33:58 -0700 | [diff] [blame] | 486 | ret = ptrace_getregs(child, datavp); |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 487 | break; |
| 488 | |
| 489 | case PTRACE_SETREGS: |
Namhyung Kim | fb67113 | 2010-10-27 15:33:58 -0700 | [diff] [blame] | 490 | ret = ptrace_setregs(child, datavp); |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 491 | break; |
| 492 | |
| 493 | case PTRACE_GETFPREGS: |
Namhyung Kim | fb67113 | 2010-10-27 15:33:58 -0700 | [diff] [blame] | 494 | ret = ptrace_getfpregs(child, datavp); |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 495 | break; |
| 496 | |
| 497 | case PTRACE_SETFPREGS: |
Namhyung Kim | fb67113 | 2010-10-27 15:33:58 -0700 | [diff] [blame] | 498 | ret = ptrace_setfpregs(child, datavp); |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 499 | break; |
| 500 | |
Ralf Baechle | 3c37026 | 2005-04-13 17:43:59 +0000 | [diff] [blame] | 501 | case PTRACE_GET_THREAD_AREA: |
Namhyung Kim | fb67113 | 2010-10-27 15:33:58 -0700 | [diff] [blame] | 502 | ret = put_user(task_thread_info(child)->tp_value, datalp); |
Ralf Baechle | 3c37026 | 2005-04-13 17:43:59 +0000 | [diff] [blame] | 503 | break; |
| 504 | |
David Daney | 0926bf9 | 2008-09-23 00:11:26 -0700 | [diff] [blame] | 505 | case PTRACE_GET_WATCH_REGS: |
Namhyung Kim | fb67113 | 2010-10-27 15:33:58 -0700 | [diff] [blame] | 506 | ret = ptrace_get_watch_regs(child, addrp); |
David Daney | 0926bf9 | 2008-09-23 00:11:26 -0700 | [diff] [blame] | 507 | break; |
| 508 | |
| 509 | case PTRACE_SET_WATCH_REGS: |
Namhyung Kim | fb67113 | 2010-10-27 15:33:58 -0700 | [diff] [blame] | 510 | ret = ptrace_set_watch_regs(child, addrp); |
David Daney | 0926bf9 | 2008-09-23 00:11:26 -0700 | [diff] [blame] | 511 | break; |
| 512 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 513 | default: |
| 514 | ret = ptrace_request(child, request, addr, data); |
| 515 | break; |
| 516 | } |
Christoph Hellwig | 481bed4 | 2005-11-07 00:59:47 -0800 | [diff] [blame] | 517 | out: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 518 | return ret; |
| 519 | } |
| 520 | |
Yoichi Yuasa | 67eb81e | 2005-04-29 16:13:35 +0100 | [diff] [blame] | 521 | static inline int audit_arch(void) |
| 2fd6f58 | 2005-04-29 16:08:28 +0100 | [diff] [blame] | 522 | { |
Ralf Baechle | f8280c8 | 2005-05-19 12:08:04 +0000 | [diff] [blame] | 523 | int arch = EM_MIPS; |
Ralf Baechle | 875d43e | 2005-09-03 15:56:16 -0700 | [diff] [blame] | 524 | #ifdef CONFIG_64BIT |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 525 | arch |= __AUDIT_ARCH_64BIT; |
Ralf Baechle | f8280c8 | 2005-05-19 12:08:04 +0000 | [diff] [blame] | 526 | #endif |
| 527 | #if defined(__LITTLE_ENDIAN) |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 528 | arch |= __AUDIT_ARCH_LE; |
Ralf Baechle | f8280c8 | 2005-05-19 12:08:04 +0000 | [diff] [blame] | 529 | #endif |
| 530 | return arch; |
| 2fd6f58 | 2005-04-29 16:08:28 +0100 | [diff] [blame] | 531 | } |
| 532 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 533 | /* |
| 534 | * Notification of system call entry/exit |
| 535 | * - triggered by current->work.syscall_trace |
| 536 | */ |
Ralf Baechle | 8b659a3 | 2011-05-19 09:21:29 +0100 | [diff] [blame] | 537 | asmlinkage void syscall_trace_enter(struct pt_regs *regs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 538 | { |
Ralf Baechle | c3fc5cd | 2013-05-29 01:07:19 +0200 | [diff] [blame] | 539 | user_exit(); |
| 540 | |
Ralf Baechle | 293c5bd | 2007-07-25 16:19:33 +0100 | [diff] [blame] | 541 | /* do the secure computing check first */ |
Will Drewry | e4da89d | 2012-04-17 14:48:57 -0500 | [diff] [blame] | 542 | secure_computing_strict(regs->regs[2]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 543 | |
Ralf Baechle | bc3d22c | 2012-07-17 19:43:58 +0200 | [diff] [blame^] | 544 | if (test_thread_flag(TIF_SYSCALL_TRACE)) |
| 545 | ptrace_report_syscall(regs); |
Ralf Baechle | 293c5bd | 2007-07-25 16:19:33 +0100 | [diff] [blame] | 546 | |
Eric Paris | b05d844 | 2012-01-03 14:23:06 -0500 | [diff] [blame] | 547 | audit_syscall_entry(audit_arch(), regs->regs[2], |
| 548 | regs->regs[4], regs->regs[5], |
| 549 | regs->regs[6], regs->regs[7]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 550 | } |
Ralf Baechle | 8b659a3 | 2011-05-19 09:21:29 +0100 | [diff] [blame] | 551 | |
| 552 | /* |
| 553 | * Notification of system call entry/exit |
| 554 | * - triggered by current->work.syscall_trace |
| 555 | */ |
| 556 | asmlinkage void syscall_trace_leave(struct pt_regs *regs) |
| 557 | { |
Ralf Baechle | c3fc5cd | 2013-05-29 01:07:19 +0200 | [diff] [blame] | 558 | /* |
| 559 | * We may come here right after calling schedule_user() |
| 560 | * or do_notify_resume(), in which case we can be in RCU |
| 561 | * user mode. |
| 562 | */ |
| 563 | user_exit(); |
| 564 | |
Eric Paris | d7e7528 | 2012-01-03 14:23:06 -0500 | [diff] [blame] | 565 | audit_syscall_exit(regs); |
Ralf Baechle | 8b659a3 | 2011-05-19 09:21:29 +0100 | [diff] [blame] | 566 | |
Ralf Baechle | bc3d22c | 2012-07-17 19:43:58 +0200 | [diff] [blame^] | 567 | if (test_thread_flag(TIF_SYSCALL_TRACE)) |
| 568 | tracehook_report_syscall_exit(regs, 0); |
Ralf Baechle | c3fc5cd | 2013-05-29 01:07:19 +0200 | [diff] [blame] | 569 | |
| 570 | user_enter(); |
Ralf Baechle | 8b659a3 | 2011-05-19 09:21:29 +0100 | [diff] [blame] | 571 | } |