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Sylwester Nawrocki5f3cc442010-10-07 10:06:16 -03001/*
Sylwester Nawrocki56bc9112013-02-01 15:00:40 -03002 * Samsung S5P/Exynos4 SoC series camera interface driver header
Sylwester Nawrocki5f3cc442010-10-07 10:06:16 -03003 *
Sylwester Nawrocki56bc9112013-02-01 15:00:40 -03004 * Copyright (C) 2010 - 2013 Samsung Electronics Co., Ltd.
5 * Sylwester Nawrocki <s.nawrocki@samsung.com>
Sylwester Nawrocki5f3cc442010-10-07 10:06:16 -03006 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
Sylwester Nawrockidf7e09a2010-12-27 14:42:15 -030012#ifndef S5P_FIMC_H_
13#define S5P_FIMC_H_
Sylwester Nawrocki5f3cc442010-10-07 10:06:16 -030014
Sylwester Nawrockib9ee31e2012-08-14 10:46:58 -030015#include <media/media-entity.h>
Sylwester Nawrockibc7584b2013-05-31 11:37:18 -030016#include <media/v4l2-dev.h>
Sylwester Nawrocki80f958f2013-02-25 13:20:21 -030017#include <media/v4l2-mediabus.h>
Sylwester Nawrockib9ee31e2012-08-14 10:46:58 -030018
Sylwester Nawrocki56bc9112013-02-01 15:00:40 -030019/*
Sylwester Nawrocki02399e32013-03-26 08:20:30 -030020 * Enumeration of data inputs to the camera subsystem.
21 */
22enum fimc_input {
23 FIMC_INPUT_PARALLEL_0 = 1,
24 FIMC_INPUT_PARALLEL_1,
25 FIMC_INPUT_MIPI_CSI2_0 = 3,
26 FIMC_INPUT_MIPI_CSI2_1,
27 FIMC_INPUT_WRITEBACK_A = 5,
28 FIMC_INPUT_WRITEBACK_B,
29 FIMC_INPUT_WRITEBACK_ISP = 5,
30};
31
32/*
Sylwester Nawrocki56bc9112013-02-01 15:00:40 -030033 * Enumeration of the FIMC data bus types.
34 */
35enum fimc_bus_type {
36 /* Camera parallel bus */
37 FIMC_BUS_TYPE_ITU_601 = 1,
38 /* Camera parallel bus with embedded synchronization */
39 FIMC_BUS_TYPE_ITU_656,
40 /* Camera MIPI-CSI2 serial bus */
41 FIMC_BUS_TYPE_MIPI_CSI2,
42 /* FIFO link from LCD controller (WriteBack A) */
43 FIMC_BUS_TYPE_LCD_WRITEBACK_A,
44 /* FIFO link from LCD controller (WriteBack B) */
45 FIMC_BUS_TYPE_LCD_WRITEBACK_B,
46 /* FIFO link from FIMC-IS */
47 FIMC_BUS_TYPE_ISP_WRITEBACK = FIMC_BUS_TYPE_LCD_WRITEBACK_B,
Sylwester Nawrocki5f3cc442010-10-07 10:06:16 -030048};
49
Sylwester Nawrocki2b13f7d2013-03-29 14:12:39 -030050#define fimc_input_is_parallel(x) ((x) == 1 || (x) == 2)
51#define fimc_input_is_mipi_csi(x) ((x) == 3 || (x) == 4)
52
Sylwester Nawrocki488f29d2013-04-09 07:19:27 -030053/*
54 * The subdevices' group IDs.
55 */
56#define GRP_ID_SENSOR (1 << 8)
57#define GRP_ID_FIMC_IS_SENSOR (1 << 9)
58#define GRP_ID_WRITEBACK (1 << 10)
59#define GRP_ID_CSIS (1 << 11)
60#define GRP_ID_FIMC (1 << 12)
61#define GRP_ID_FLITE (1 << 13)
62#define GRP_ID_FIMC_IS (1 << 14)
63
Sylwester Nawrocki5f3cc442010-10-07 10:06:16 -030064struct i2c_board_info;
65
66/**
Sylwester Nawrocki56bc9112013-02-01 15:00:40 -030067 * struct fimc_source_info - video source description required for the host
68 * interface configuration
Sylwester Nawrocki5f3cc442010-10-07 10:06:16 -030069 *
70 * @board_info: pointer to I2C subdevice's board info
Sylwester Nawrockia25be182010-12-27 15:34:43 -030071 * @clk_frequency: frequency of the clock the host interface provides to sensor
Sylwester Nawrocki56bc9112013-02-01 15:00:40 -030072 * @fimc_bus_type: FIMC camera input type
73 * @sensor_bus_type: image sensor bus type, MIPI, ITU-R BT.601 etc.
74 * @flags: the parallel sensor bus flags defining signals polarity (V4L2_MBUS_*)
Sylwester Nawrocki5f3cc442010-10-07 10:06:16 -030075 * @i2c_bus_num: i2c control bus id the sensor is attached to
76 * @mux_id: FIMC camera interface multiplexer index (separate for MIPI and ITU)
Sylwester Nawrockid3953222011-09-01 06:01:08 -030077 * @clk_id: index of the SoC peripheral clock for sensors
Sylwester Nawrocki5f3cc442010-10-07 10:06:16 -030078 */
Sylwester Nawrocki56bc9112013-02-01 15:00:40 -030079struct fimc_source_info {
Sylwester Nawrocki5f3cc442010-10-07 10:06:16 -030080 struct i2c_board_info *board_info;
Sylwester Nawrockia25be182010-12-27 15:34:43 -030081 unsigned long clk_frequency;
Sylwester Nawrocki56bc9112013-02-01 15:00:40 -030082 enum fimc_bus_type fimc_bus_type;
83 enum fimc_bus_type sensor_bus_type;
84 u16 flags;
Sylwester Nawrocki5f3cc442010-10-07 10:06:16 -030085 u16 i2c_bus_num;
86 u16 mux_id;
Sylwester Nawrockid3953222011-09-01 06:01:08 -030087 u8 clk_id;
Sylwester Nawrocki5f3cc442010-10-07 10:06:16 -030088};
89
Sylwester Nawrocki5f3cc442010-10-07 10:06:16 -030090/**
Sylwester Nawrockidf7e09a2010-12-27 14:42:15 -030091 * struct s5p_platform_fimc - camera host interface platform data
Sylwester Nawrocki5f3cc442010-10-07 10:06:16 -030092 *
Sylwester Nawrocki56bc9112013-02-01 15:00:40 -030093 * @source_info: properties of an image source for the host interface setup
94 * @num_clients: the number of attached image sources
Sylwester Nawrocki5f3cc442010-10-07 10:06:16 -030095 */
Sylwester Nawrockidf7e09a2010-12-27 14:42:15 -030096struct s5p_platform_fimc {
Sylwester Nawrocki56bc9112013-02-01 15:00:40 -030097 struct fimc_source_info *source_info;
Sylwester Nawrocki117182d2011-02-28 11:12:19 -030098 int num_clients;
Sylwester Nawrocki5f3cc442010-10-07 10:06:16 -030099};
Sylwester Nawrockie1d72f42011-06-10 15:36:58 -0300100
101/*
102 * v4l2_device notification id. This is only for internal use in the kernel.
103 * Sensor subdevs should issue S5P_FIMC_TX_END_NOTIFY notification in single
104 * frame capture mode when there is only one VSYNC pulse issued by the sensor
105 * at begining of the frame transmission.
106 */
107#define S5P_FIMC_TX_END_NOTIFY _IO('e', 0)
108
Sylwester Nawrocki80f958f2013-02-25 13:20:21 -0300109#define FIMC_MAX_PLANES 3
110
111/**
112 * struct fimc_fmt - color format data structure
113 * @mbus_code: media bus pixel code, -1 if not applicable
114 * @name: format description
115 * @fourcc: fourcc code for this format, 0 if not applicable
116 * @color: the driver's private color format id
117 * @memplanes: number of physically non-contiguous data planes
118 * @colplanes: number of physically contiguous data planes
Sylwester Nawrocki1c261902013-06-20 10:49:09 -0300119 * @colorspace: v4l2 colorspace (V4L2_COLORSPACE_*)
Sylwester Nawrocki80f958f2013-02-25 13:20:21 -0300120 * @depth: per plane driver's private 'number of bits per pixel'
121 * @mdataplanes: bitmask indicating meta data plane(s), (1 << plane_no)
122 * @flags: flags indicating which operation mode format applies to
123 */
124struct fimc_fmt {
125 enum v4l2_mbus_pixelcode mbus_code;
126 char *name;
127 u32 fourcc;
128 u32 color;
129 u16 memplanes;
130 u16 colplanes;
Sylwester Nawrocki1c261902013-06-20 10:49:09 -0300131 u8 colorspace;
Sylwester Nawrocki80f958f2013-02-25 13:20:21 -0300132 u8 depth[FIMC_MAX_PLANES];
133 u16 mdataplanes;
134 u16 flags;
135#define FMT_FLAGS_CAM (1 << 0)
136#define FMT_FLAGS_M2M_IN (1 << 1)
137#define FMT_FLAGS_M2M_OUT (1 << 2)
138#define FMT_FLAGS_M2M (1 << 1 | 1 << 2)
139#define FMT_HAS_ALPHA (1 << 3)
140#define FMT_FLAGS_COMPRESSED (1 << 4)
141#define FMT_FLAGS_WRITEBACK (1 << 5)
Sylwester Nawrockie90ad652013-03-20 15:31:03 -0300142#define FMT_FLAGS_RAW_BAYER (1 << 6)
143#define FMT_FLAGS_YUV (1 << 7)
Sylwester Nawrocki80f958f2013-02-25 13:20:21 -0300144};
145
Sylwester Nawrocki403dfbe2013-05-31 11:37:22 -0300146struct exynos_media_pipeline;
Sylwester Nawrocki0f735f52012-04-27 09:33:10 -0300147
Sylwester Nawrocki403dfbe2013-05-31 11:37:22 -0300148/*
149 * Media pipeline operations to be called from within a video node, i.e. the
150 * last entity within the pipeline. Implemented by related media device driver.
151 */
152struct exynos_media_pipeline_ops {
153 int (*prepare)(struct exynos_media_pipeline *p,
154 struct media_entity *me);
155 int (*unprepare)(struct exynos_media_pipeline *p);
156 int (*open)(struct exynos_media_pipeline *p, struct media_entity *me,
157 bool resume);
158 int (*close)(struct exynos_media_pipeline *p);
159 int (*set_stream)(struct exynos_media_pipeline *p, bool state);
Sylwester Nawrocki0f735f52012-04-27 09:33:10 -0300160};
161
Sylwester Nawrockibc7584b2013-05-31 11:37:18 -0300162struct exynos_video_entity {
163 struct video_device vdev;
Sylwester Nawrocki403dfbe2013-05-31 11:37:22 -0300164 struct exynos_media_pipeline *pipe;
Sylwester Nawrockibc7584b2013-05-31 11:37:18 -0300165};
166
Sylwester Nawrocki403dfbe2013-05-31 11:37:22 -0300167struct exynos_media_pipeline {
168 struct media_pipeline mp;
169 const struct exynos_media_pipeline_ops *ops;
Sylwester Nawrockib9ee31e2012-08-14 10:46:58 -0300170};
171
Sylwester Nawrocki403dfbe2013-05-31 11:37:22 -0300172static inline struct exynos_video_entity *vdev_to_exynos_video_entity(
173 struct video_device *vdev)
174{
175 return container_of(vdev, struct exynos_video_entity, vdev);
176}
177
178#define fimc_pipeline_call(ent, op, args...) \
179 (!(ent) ? -ENOENT : (((ent)->pipe->ops && (ent)->pipe->ops->op) ? \
180 (ent)->pipe->ops->op(((ent)->pipe), ##args) : -ENOIOCTLCMD)) \
Sylwester Nawrockib9ee31e2012-08-14 10:46:58 -0300181
Sylwester Nawrockidf7e09a2010-12-27 14:42:15 -0300182#endif /* S5P_FIMC_H_ */