| Heiko Stuebner | d63dc05 | 2013-06-02 23:09:41 +0200 | [diff] [blame] | 1 | config ARCH_ROCKCHIP |
| Masahiro Yamada | e324654 | 2015-11-16 12:06:10 +0900 | [diff] [blame] | 2 | bool "Rockchip RK2928 and RK3xxx SOCs" |
| 3 | depends on ARCH_MULTI_V7 |
| Heiko Stuebner | d63dc05 | 2013-06-02 23:09:41 +0200 | [diff] [blame] | 4 | select PINCTRL |
| 5 | select PINCTRL_ROCKCHIP |
| Heiko Stübner | 1fe6949 | 2014-07-03 02:02:58 +0200 | [diff] [blame] | 6 | select ARCH_HAS_RESET_CONTROLLER |
| Heiko Stuebner | d63dc05 | 2013-06-02 23:09:41 +0200 | [diff] [blame] | 7 | select ARCH_REQUIRE_GPIOLIB |
| Heiko Stübner | 34f137b | 2014-08-14 23:00:56 +0200 | [diff] [blame] | 8 | select ARM_AMBA |
| Heiko Stuebner | d63dc05 | 2013-06-02 23:09:41 +0200 | [diff] [blame] | 9 | select ARM_GIC |
| 10 | select CACHE_L2X0 |
| Heiko Stuebner | 7a1917a | 2014-06-28 20:13:42 +0200 | [diff] [blame] | 11 | select HAVE_ARM_ARCH_TIMER |
| Heiko Stuebner | f6f70cf | 2013-06-17 21:28:57 +0200 | [diff] [blame] | 12 | select HAVE_ARM_SCU if SMP |
| Heiko Stuebner | f350f82 | 2013-09-29 16:15:35 +0200 | [diff] [blame] | 13 | select HAVE_ARM_TWD if SMP |
| Heiko Stuebner | d63dc05 | 2013-06-02 23:09:41 +0200 | [diff] [blame] | 14 | select DW_APB_TIMER_OF |
| Arnd Bergmann | d1bef99 | 2015-02-05 15:26:26 +0100 | [diff] [blame] | 15 | select REGULATOR if PM |
| Daniel Lezcano | 468b8c4 | 2015-01-25 22:06:02 +0100 | [diff] [blame] | 16 | select ROCKCHIP_TIMER |
| Heiko Stuebner | f95a2b3 | 2013-09-30 16:29:55 +0200 | [diff] [blame] | 17 | select ARM_GLOBAL_TIMER |
| 18 | select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK |
| Heiko Stuebner | d63dc05 | 2013-06-02 23:09:41 +0200 | [diff] [blame] | 19 | help |
| 20 | Support for Rockchip's Cortex-A9 Single-to-Quad-Core-SoCs |
| 21 | containing the RK2928, RK30xx and RK31xx series. |