Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 1 | /* |
| 2 | * Support for the interrupt controllers found on Power Macintosh, |
| 3 | * currently Apple's "Grand Central" interrupt controller in all |
| 4 | * it's incarnations. OpenPIC support used on newer machines is |
| 5 | * in a separate file |
| 6 | * |
| 7 | * Copyright (C) 1997 Paul Mackerras (paulus@samba.org) |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 8 | * Copyright (C) 2005 Benjamin Herrenschmidt (benh@kernel.crashing.org) |
| 9 | * IBM, Corp. |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 10 | * |
| 11 | * This program is free software; you can redistribute it and/or |
| 12 | * modify it under the terms of the GNU General Public License |
| 13 | * as published by the Free Software Foundation; either version |
| 14 | * 2 of the License, or (at your option) any later version. |
| 15 | * |
| 16 | */ |
| 17 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 18 | #include <linux/stddef.h> |
| 19 | #include <linux/init.h> |
| 20 | #include <linux/sched.h> |
| 21 | #include <linux/signal.h> |
| 22 | #include <linux/pci.h> |
| 23 | #include <linux/interrupt.h> |
Rafael J. Wysocki | f5a592f | 2011-04-26 19:14:57 +0200 | [diff] [blame] | 24 | #include <linux/syscore_ops.h> |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 25 | #include <linux/adb.h> |
| 26 | #include <linux/pmu.h> |
| 27 | |
| 28 | #include <asm/sections.h> |
| 29 | #include <asm/io.h> |
| 30 | #include <asm/smp.h> |
| 31 | #include <asm/prom.h> |
| 32 | #include <asm/pci-bridge.h> |
| 33 | #include <asm/time.h> |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 34 | #include <asm/pmac_feature.h> |
| 35 | #include <asm/mpic.h> |
Michael Ellerman | af3b74d | 2008-05-08 14:27:15 +1000 | [diff] [blame] | 36 | #include <asm/xmon.h> |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 37 | |
Paul Mackerras | 3c3f42d | 2005-10-10 22:58:41 +1000 | [diff] [blame] | 38 | #include "pmac.h" |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 39 | |
Paul Mackerras | 3c3f42d | 2005-10-10 22:58:41 +1000 | [diff] [blame] | 40 | #ifdef CONFIG_PPC32 |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 41 | struct pmac_irq_hw { |
| 42 | unsigned int event; |
| 43 | unsigned int enable; |
| 44 | unsigned int ack; |
| 45 | unsigned int level; |
| 46 | }; |
| 47 | |
Grant Likely | b83da29 | 2010-06-18 11:10:01 -0600 | [diff] [blame] | 48 | /* Workaround flags for 32bit powermac machines */ |
| 49 | unsigned int of_irq_workarounds; |
| 50 | struct device_node *of_irq_dflt_pic; |
| 51 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 52 | /* Default addresses */ |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 53 | static volatile struct pmac_irq_hw __iomem *pmac_irq_hw[4]; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 54 | |
| 55 | #define GC_LEVEL_MASK 0x3ff00000 |
| 56 | #define OHARE_LEVEL_MASK 0x1ff00000 |
| 57 | #define HEATHROW_LEVEL_MASK 0x1ff00000 |
| 58 | |
| 59 | static int max_irqs; |
| 60 | static int max_real_irqs; |
| 61 | static u32 level_mask[4]; |
| 62 | |
Thomas Gleixner | d0eab3e | 2010-02-18 02:23:03 +0000 | [diff] [blame] | 63 | static DEFINE_RAW_SPINLOCK(pmac_pic_lock); |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 64 | |
Stephen Rothwell | 756e710 | 2005-11-09 18:07:45 +1100 | [diff] [blame] | 65 | #define NR_MASK_WORDS ((NR_IRQS + 31) / 32) |
| 66 | static unsigned long ppc_lost_interrupts[NR_MASK_WORDS]; |
Benjamin Herrenschmidt | b9e5b4e | 2006-07-03 19:32:51 +1000 | [diff] [blame] | 67 | static unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; |
| 68 | static int pmac_irq_cascade = -1; |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 69 | static struct irq_host *pmac_pic_host; |
Stephen Rothwell | 756e710 | 2005-11-09 18:07:45 +1100 | [diff] [blame] | 70 | |
Benjamin Herrenschmidt | b9e5b4e | 2006-07-03 19:32:51 +1000 | [diff] [blame] | 71 | static void __pmac_retrigger(unsigned int irq_nr) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 72 | { |
Benjamin Herrenschmidt | b9e5b4e | 2006-07-03 19:32:51 +1000 | [diff] [blame] | 73 | if (irq_nr >= max_real_irqs && pmac_irq_cascade > 0) { |
| 74 | __set_bit(irq_nr, ppc_lost_interrupts); |
| 75 | irq_nr = pmac_irq_cascade; |
| 76 | mb(); |
| 77 | } |
| 78 | if (!__test_and_set_bit(irq_nr, ppc_lost_interrupts)) { |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 79 | atomic_inc(&ppc_n_lost_interrupts); |
Benjamin Herrenschmidt | b9e5b4e | 2006-07-03 19:32:51 +1000 | [diff] [blame] | 80 | set_dec(1); |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 81 | } |
| 82 | } |
| 83 | |
Lennert Buytenhek | d8c94ac | 2011-03-07 13:59:40 +0000 | [diff] [blame] | 84 | static void pmac_mask_and_ack_irq(struct irq_data *d) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 85 | { |
Grant Likely | 476eb49 | 2011-05-04 15:02:15 +1000 | [diff] [blame] | 86 | unsigned int src = irqd_to_hwirq(d); |
Benjamin Herrenschmidt | ca72945 | 2006-08-31 21:27:50 -0700 | [diff] [blame] | 87 | unsigned long bit = 1UL << (src & 0x1f); |
| 88 | int i = src >> 5; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 89 | unsigned long flags; |
| 90 | |
Thomas Gleixner | d0eab3e | 2010-02-18 02:23:03 +0000 | [diff] [blame] | 91 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 92 | __clear_bit(src, ppc_cached_irq_mask); |
| 93 | if (__test_and_clear_bit(src, ppc_lost_interrupts)) |
Benjamin Herrenschmidt | b9e5b4e | 2006-07-03 19:32:51 +1000 | [diff] [blame] | 94 | atomic_dec(&ppc_n_lost_interrupts); |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 95 | out_le32(&pmac_irq_hw[i]->enable, ppc_cached_irq_mask[i]); |
| 96 | out_le32(&pmac_irq_hw[i]->ack, bit); |
| 97 | do { |
| 98 | /* make sure ack gets to controller before we enable |
| 99 | interrupts */ |
| 100 | mb(); |
| 101 | } while((in_le32(&pmac_irq_hw[i]->enable) & bit) |
| 102 | != (ppc_cached_irq_mask[i] & bit)); |
Thomas Gleixner | d0eab3e | 2010-02-18 02:23:03 +0000 | [diff] [blame] | 103 | raw_spin_unlock_irqrestore(&pmac_pic_lock, flags); |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 104 | } |
| 105 | |
Lennert Buytenhek | d8c94ac | 2011-03-07 13:59:40 +0000 | [diff] [blame] | 106 | static void pmac_ack_irq(struct irq_data *d) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 107 | { |
Grant Likely | 476eb49 | 2011-05-04 15:02:15 +1000 | [diff] [blame] | 108 | unsigned int src = irqd_to_hwirq(d); |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 109 | unsigned long bit = 1UL << (src & 0x1f); |
| 110 | int i = src >> 5; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 111 | unsigned long flags; |
| 112 | |
Thomas Gleixner | d0eab3e | 2010-02-18 02:23:03 +0000 | [diff] [blame] | 113 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 114 | if (__test_and_clear_bit(src, ppc_lost_interrupts)) |
Benjamin Herrenschmidt | b9e5b4e | 2006-07-03 19:32:51 +1000 | [diff] [blame] | 115 | atomic_dec(&ppc_n_lost_interrupts); |
| 116 | out_le32(&pmac_irq_hw[i]->ack, bit); |
| 117 | (void)in_le32(&pmac_irq_hw[i]->ack); |
Thomas Gleixner | d0eab3e | 2010-02-18 02:23:03 +0000 | [diff] [blame] | 118 | raw_spin_unlock_irqrestore(&pmac_pic_lock, flags); |
Benjamin Herrenschmidt | b9e5b4e | 2006-07-03 19:32:51 +1000 | [diff] [blame] | 119 | } |
| 120 | |
| 121 | static void __pmac_set_irq_mask(unsigned int irq_nr, int nokicklost) |
| 122 | { |
| 123 | unsigned long bit = 1UL << (irq_nr & 0x1f); |
| 124 | int i = irq_nr >> 5; |
| 125 | |
| 126 | if ((unsigned)irq_nr >= max_irqs) |
| 127 | return; |
| 128 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 129 | /* enable unmasked interrupts */ |
| 130 | out_le32(&pmac_irq_hw[i]->enable, ppc_cached_irq_mask[i]); |
| 131 | |
| 132 | do { |
| 133 | /* make sure mask gets to controller before we |
| 134 | return to user */ |
| 135 | mb(); |
| 136 | } while((in_le32(&pmac_irq_hw[i]->enable) & bit) |
| 137 | != (ppc_cached_irq_mask[i] & bit)); |
| 138 | |
| 139 | /* |
| 140 | * Unfortunately, setting the bit in the enable register |
| 141 | * when the device interrupt is already on *doesn't* set |
| 142 | * the bit in the flag register or request another interrupt. |
| 143 | */ |
| 144 | if (bit & ppc_cached_irq_mask[i] & in_le32(&pmac_irq_hw[i]->level)) |
Benjamin Herrenschmidt | b9e5b4e | 2006-07-03 19:32:51 +1000 | [diff] [blame] | 145 | __pmac_retrigger(irq_nr); |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 146 | } |
| 147 | |
| 148 | /* When an irq gets requested for the first client, if it's an |
| 149 | * edge interrupt, we clear any previous one on the controller |
| 150 | */ |
Lennert Buytenhek | d8c94ac | 2011-03-07 13:59:40 +0000 | [diff] [blame] | 151 | static unsigned int pmac_startup_irq(struct irq_data *d) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 152 | { |
Benjamin Herrenschmidt | b9e5b4e | 2006-07-03 19:32:51 +1000 | [diff] [blame] | 153 | unsigned long flags; |
Grant Likely | 476eb49 | 2011-05-04 15:02:15 +1000 | [diff] [blame] | 154 | unsigned int src = irqd_to_hwirq(d); |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 155 | unsigned long bit = 1UL << (src & 0x1f); |
| 156 | int i = src >> 5; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 157 | |
Thomas Gleixner | d0eab3e | 2010-02-18 02:23:03 +0000 | [diff] [blame] | 158 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); |
Thomas Gleixner | 8c99f56 | 2011-03-25 16:03:07 +0100 | [diff] [blame] | 159 | if (!irqd_is_level_type(d)) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 160 | out_le32(&pmac_irq_hw[i]->ack, bit); |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 161 | __set_bit(src, ppc_cached_irq_mask); |
| 162 | __pmac_set_irq_mask(src, 0); |
Thomas Gleixner | d0eab3e | 2010-02-18 02:23:03 +0000 | [diff] [blame] | 163 | raw_spin_unlock_irqrestore(&pmac_pic_lock, flags); |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 164 | |
| 165 | return 0; |
| 166 | } |
| 167 | |
Lennert Buytenhek | d8c94ac | 2011-03-07 13:59:40 +0000 | [diff] [blame] | 168 | static void pmac_mask_irq(struct irq_data *d) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 169 | { |
Benjamin Herrenschmidt | b9e5b4e | 2006-07-03 19:32:51 +1000 | [diff] [blame] | 170 | unsigned long flags; |
Grant Likely | 476eb49 | 2011-05-04 15:02:15 +1000 | [diff] [blame] | 171 | unsigned int src = irqd_to_hwirq(d); |
Benjamin Herrenschmidt | b9e5b4e | 2006-07-03 19:32:51 +1000 | [diff] [blame] | 172 | |
Thomas Gleixner | d0eab3e | 2010-02-18 02:23:03 +0000 | [diff] [blame] | 173 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 174 | __clear_bit(src, ppc_cached_irq_mask); |
Benjamin Herrenschmidt | ca72945 | 2006-08-31 21:27:50 -0700 | [diff] [blame] | 175 | __pmac_set_irq_mask(src, 1); |
Thomas Gleixner | d0eab3e | 2010-02-18 02:23:03 +0000 | [diff] [blame] | 176 | raw_spin_unlock_irqrestore(&pmac_pic_lock, flags); |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 177 | } |
| 178 | |
Lennert Buytenhek | d8c94ac | 2011-03-07 13:59:40 +0000 | [diff] [blame] | 179 | static void pmac_unmask_irq(struct irq_data *d) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 180 | { |
Benjamin Herrenschmidt | b9e5b4e | 2006-07-03 19:32:51 +1000 | [diff] [blame] | 181 | unsigned long flags; |
Grant Likely | 476eb49 | 2011-05-04 15:02:15 +1000 | [diff] [blame] | 182 | unsigned int src = irqd_to_hwirq(d); |
Benjamin Herrenschmidt | b9e5b4e | 2006-07-03 19:32:51 +1000 | [diff] [blame] | 183 | |
Thomas Gleixner | d0eab3e | 2010-02-18 02:23:03 +0000 | [diff] [blame] | 184 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 185 | __set_bit(src, ppc_cached_irq_mask); |
| 186 | __pmac_set_irq_mask(src, 0); |
Thomas Gleixner | d0eab3e | 2010-02-18 02:23:03 +0000 | [diff] [blame] | 187 | raw_spin_unlock_irqrestore(&pmac_pic_lock, flags); |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 188 | } |
| 189 | |
Lennert Buytenhek | d8c94ac | 2011-03-07 13:59:40 +0000 | [diff] [blame] | 190 | static int pmac_retrigger(struct irq_data *d) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 191 | { |
Benjamin Herrenschmidt | b9e5b4e | 2006-07-03 19:32:51 +1000 | [diff] [blame] | 192 | unsigned long flags; |
| 193 | |
Thomas Gleixner | d0eab3e | 2010-02-18 02:23:03 +0000 | [diff] [blame] | 194 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); |
Grant Likely | 476eb49 | 2011-05-04 15:02:15 +1000 | [diff] [blame] | 195 | __pmac_retrigger(irqd_to_hwirq(d)); |
Thomas Gleixner | d0eab3e | 2010-02-18 02:23:03 +0000 | [diff] [blame] | 196 | raw_spin_unlock_irqrestore(&pmac_pic_lock, flags); |
Benjamin Herrenschmidt | b9e5b4e | 2006-07-03 19:32:51 +1000 | [diff] [blame] | 197 | return 1; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 198 | } |
| 199 | |
Benjamin Herrenschmidt | b9e5b4e | 2006-07-03 19:32:51 +1000 | [diff] [blame] | 200 | static struct irq_chip pmac_pic = { |
Anton Blanchard | fc380c0 | 2010-01-31 20:33:41 +0000 | [diff] [blame] | 201 | .name = "PMAC-PIC", |
Lennert Buytenhek | d8c94ac | 2011-03-07 13:59:40 +0000 | [diff] [blame] | 202 | .irq_startup = pmac_startup_irq, |
| 203 | .irq_mask = pmac_mask_irq, |
| 204 | .irq_ack = pmac_ack_irq, |
| 205 | .irq_mask_ack = pmac_mask_and_ack_irq, |
| 206 | .irq_unmask = pmac_unmask_irq, |
| 207 | .irq_retrigger = pmac_retrigger, |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 208 | }; |
| 209 | |
Olaf Hering | 35a84c2 | 2006-10-07 22:08:26 +1000 | [diff] [blame] | 210 | static irqreturn_t gatwick_action(int cpl, void *dev_id) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 211 | { |
Benjamin Herrenschmidt | b9e5b4e | 2006-07-03 19:32:51 +1000 | [diff] [blame] | 212 | unsigned long flags; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 213 | int irq, bits; |
Benjamin Herrenschmidt | b9e5b4e | 2006-07-03 19:32:51 +1000 | [diff] [blame] | 214 | int rc = IRQ_NONE; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 215 | |
Thomas Gleixner | d0eab3e | 2010-02-18 02:23:03 +0000 | [diff] [blame] | 216 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 217 | for (irq = max_irqs; (irq -= 32) >= max_real_irqs; ) { |
| 218 | int i = irq >> 5; |
| 219 | bits = in_le32(&pmac_irq_hw[i]->event) | ppc_lost_interrupts[i]; |
| 220 | /* We must read level interrupts from the level register */ |
| 221 | bits |= (in_le32(&pmac_irq_hw[i]->level) & level_mask[i]); |
| 222 | bits &= ppc_cached_irq_mask[i]; |
| 223 | if (bits == 0) |
| 224 | continue; |
| 225 | irq += __ilog2(bits); |
Thomas Gleixner | d0eab3e | 2010-02-18 02:23:03 +0000 | [diff] [blame] | 226 | raw_spin_unlock_irqrestore(&pmac_pic_lock, flags); |
Michael Ellerman | f11f76d | 2009-04-22 15:31:44 +0000 | [diff] [blame] | 227 | generic_handle_irq(irq); |
Thomas Gleixner | d0eab3e | 2010-02-18 02:23:03 +0000 | [diff] [blame] | 228 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); |
Benjamin Herrenschmidt | b9e5b4e | 2006-07-03 19:32:51 +1000 | [diff] [blame] | 229 | rc = IRQ_HANDLED; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 230 | } |
Thomas Gleixner | d0eab3e | 2010-02-18 02:23:03 +0000 | [diff] [blame] | 231 | raw_spin_unlock_irqrestore(&pmac_pic_lock, flags); |
Benjamin Herrenschmidt | b9e5b4e | 2006-07-03 19:32:51 +1000 | [diff] [blame] | 232 | return rc; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 233 | } |
| 234 | |
Olaf Hering | 35a84c2 | 2006-10-07 22:08:26 +1000 | [diff] [blame] | 235 | static unsigned int pmac_pic_get_irq(void) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 236 | { |
| 237 | int irq; |
| 238 | unsigned long bits = 0; |
Benjamin Herrenschmidt | b9e5b4e | 2006-07-03 19:32:51 +1000 | [diff] [blame] | 239 | unsigned long flags; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 240 | |
Milton Miller | 1ece355 | 2011-05-10 19:29:42 +0000 | [diff] [blame] | 241 | #ifdef CONFIG_PPC_PMAC32_PSURGE |
Milton Miller | 23f73a5 | 2011-05-10 19:30:22 +0000 | [diff] [blame] | 242 | /* IPI's are a hack on the powersurge -- Cort */ |
| 243 | if (smp_processor_id() != 0) { |
| 244 | return psurge_secondary_virq; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 245 | } |
Milton Miller | 1ece355 | 2011-05-10 19:29:42 +0000 | [diff] [blame] | 246 | #endif /* CONFIG_PPC_PMAC32_PSURGE */ |
Thomas Gleixner | d0eab3e | 2010-02-18 02:23:03 +0000 | [diff] [blame] | 247 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 248 | for (irq = max_real_irqs; (irq -= 32) >= 0; ) { |
| 249 | int i = irq >> 5; |
| 250 | bits = in_le32(&pmac_irq_hw[i]->event) | ppc_lost_interrupts[i]; |
| 251 | /* We must read level interrupts from the level register */ |
| 252 | bits |= (in_le32(&pmac_irq_hw[i]->level) & level_mask[i]); |
| 253 | bits &= ppc_cached_irq_mask[i]; |
| 254 | if (bits == 0) |
| 255 | continue; |
| 256 | irq += __ilog2(bits); |
| 257 | break; |
| 258 | } |
Thomas Gleixner | d0eab3e | 2010-02-18 02:23:03 +0000 | [diff] [blame] | 259 | raw_spin_unlock_irqrestore(&pmac_pic_lock, flags); |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 260 | if (unlikely(irq < 0)) |
| 261 | return NO_IRQ; |
| 262 | return irq_linear_revmap(pmac_pic_host, irq); |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 263 | } |
| 264 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 265 | #ifdef CONFIG_XMON |
| 266 | static struct irqaction xmon_action = { |
| 267 | .handler = xmon_irq, |
| 268 | .flags = 0, |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 269 | .name = "NMI - XMON" |
| 270 | }; |
| 271 | #endif |
| 272 | |
| 273 | static struct irqaction gatwick_cascade_action = { |
| 274 | .handler = gatwick_action, |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 275 | .name = "cascade", |
| 276 | }; |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 277 | |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 278 | static int pmac_pic_host_match(struct irq_host *h, struct device_node *node) |
| 279 | { |
| 280 | /* We match all, we don't always have a node anyway */ |
| 281 | return 1; |
| 282 | } |
| 283 | |
| 284 | static int pmac_pic_host_map(struct irq_host *h, unsigned int virq, |
Benjamin Herrenschmidt | 6e99e45 | 2006-07-10 04:44:42 -0700 | [diff] [blame] | 285 | irq_hw_number_t hw) |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 286 | { |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 287 | int level; |
| 288 | |
| 289 | if (hw >= max_irqs) |
| 290 | return -EINVAL; |
| 291 | |
| 292 | /* Mark level interrupts, set delayed disable for edge ones and set |
| 293 | * handlers |
| 294 | */ |
| 295 | level = !!(level_mask[hw >> 5] & (1UL << (hw & 0x1f))); |
| 296 | if (level) |
Thomas Gleixner | 98488db | 2011-03-25 15:43:57 +0100 | [diff] [blame] | 297 | irq_set_status_flags(virq, IRQ_LEVEL); |
Thomas Gleixner | ec775d0 | 2011-03-25 16:45:20 +0100 | [diff] [blame] | 298 | irq_set_chip_and_handler(virq, &pmac_pic, |
| 299 | level ? handle_level_irq : handle_edge_irq); |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 300 | return 0; |
| 301 | } |
| 302 | |
| 303 | static int pmac_pic_host_xlate(struct irq_host *h, struct device_node *ct, |
Roman Fietze | 40d50cf | 2009-12-08 02:39:50 +0000 | [diff] [blame] | 304 | const u32 *intspec, unsigned int intsize, |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 305 | irq_hw_number_t *out_hwirq, |
| 306 | unsigned int *out_flags) |
| 307 | |
| 308 | { |
Benjamin Herrenschmidt | 6e99e45 | 2006-07-10 04:44:42 -0700 | [diff] [blame] | 309 | *out_flags = IRQ_TYPE_NONE; |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 310 | *out_hwirq = *intspec; |
| 311 | return 0; |
| 312 | } |
| 313 | |
| 314 | static struct irq_host_ops pmac_pic_host_ops = { |
| 315 | .match = pmac_pic_host_match, |
| 316 | .map = pmac_pic_host_map, |
| 317 | .xlate = pmac_pic_host_xlate, |
| 318 | }; |
| 319 | |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 320 | static void __init pmac_pic_probe_oldstyle(void) |
| 321 | { |
| 322 | int i; |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 323 | struct device_node *master = NULL; |
| 324 | struct device_node *slave = NULL; |
| 325 | u8 __iomem *addr; |
| 326 | struct resource r; |
| 327 | |
| 328 | /* Set our get_irq function */ |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 329 | ppc_md.get_irq = pmac_pic_get_irq; |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 330 | |
| 331 | /* |
| 332 | * Find the interrupt controller type & node |
| 333 | */ |
| 334 | |
| 335 | if ((master = of_find_node_by_name(NULL, "gc")) != NULL) { |
| 336 | max_irqs = max_real_irqs = 32; |
| 337 | level_mask[0] = GC_LEVEL_MASK; |
| 338 | } else if ((master = of_find_node_by_name(NULL, "ohare")) != NULL) { |
| 339 | max_irqs = max_real_irqs = 32; |
| 340 | level_mask[0] = OHARE_LEVEL_MASK; |
| 341 | |
| 342 | /* We might have a second cascaded ohare */ |
| 343 | slave = of_find_node_by_name(NULL, "pci106b,7"); |
| 344 | if (slave) { |
| 345 | max_irqs = 64; |
| 346 | level_mask[1] = OHARE_LEVEL_MASK; |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 347 | } |
| 348 | } else if ((master = of_find_node_by_name(NULL, "mac-io")) != NULL) { |
| 349 | max_irqs = max_real_irqs = 64; |
| 350 | level_mask[0] = HEATHROW_LEVEL_MASK; |
| 351 | level_mask[1] = 0; |
| 352 | |
| 353 | /* We might have a second cascaded heathrow */ |
| 354 | slave = of_find_node_by_name(master, "mac-io"); |
| 355 | |
| 356 | /* Check ordering of master & slave */ |
Stephen Rothwell | 55b61fe | 2007-05-03 17:26:52 +1000 | [diff] [blame] | 357 | if (of_device_is_compatible(master, "gatwick")) { |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 358 | struct device_node *tmp; |
| 359 | BUG_ON(slave == NULL); |
| 360 | tmp = master; |
| 361 | master = slave; |
| 362 | slave = tmp; |
| 363 | } |
| 364 | |
| 365 | /* We found a slave */ |
| 366 | if (slave) { |
| 367 | max_irqs = 128; |
| 368 | level_mask[2] = HEATHROW_LEVEL_MASK; |
| 369 | level_mask[3] = 0; |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 370 | } |
| 371 | } |
| 372 | BUG_ON(master == NULL); |
| 373 | |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 374 | /* |
| 375 | * Allocate an irq host |
| 376 | */ |
Michael Ellerman | 52964f8 | 2007-08-28 18:47:54 +1000 | [diff] [blame] | 377 | pmac_pic_host = irq_alloc_host(master, IRQ_HOST_MAP_LINEAR, max_irqs, |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 378 | &pmac_pic_host_ops, |
| 379 | max_irqs); |
| 380 | BUG_ON(pmac_pic_host == NULL); |
| 381 | irq_set_default_host(pmac_pic_host); |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 382 | |
| 383 | /* Get addresses of first controller if we have a node for it */ |
| 384 | BUG_ON(of_address_to_resource(master, 0, &r)); |
| 385 | |
| 386 | /* Map interrupts of primary controller */ |
| 387 | addr = (u8 __iomem *) ioremap(r.start, 0x40); |
| 388 | i = 0; |
| 389 | pmac_irq_hw[i++] = (volatile struct pmac_irq_hw __iomem *) |
| 390 | (addr + 0x20); |
| 391 | if (max_real_irqs > 32) |
| 392 | pmac_irq_hw[i++] = (volatile struct pmac_irq_hw __iomem *) |
| 393 | (addr + 0x10); |
| 394 | of_node_put(master); |
| 395 | |
| 396 | printk(KERN_INFO "irq: Found primary Apple PIC %s for %d irqs\n", |
| 397 | master->full_name, max_real_irqs); |
| 398 | |
| 399 | /* Map interrupts of cascaded controller */ |
| 400 | if (slave && !of_address_to_resource(slave, 0, &r)) { |
| 401 | addr = (u8 __iomem *)ioremap(r.start, 0x40); |
| 402 | pmac_irq_hw[i++] = (volatile struct pmac_irq_hw __iomem *) |
| 403 | (addr + 0x20); |
| 404 | if (max_irqs > 64) |
| 405 | pmac_irq_hw[i++] = |
| 406 | (volatile struct pmac_irq_hw __iomem *) |
| 407 | (addr + 0x10); |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 408 | pmac_irq_cascade = irq_of_parse_and_map(slave, 0); |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 409 | |
| 410 | printk(KERN_INFO "irq: Found slave Apple PIC %s for %d irqs" |
| 411 | " cascade: %d\n", slave->full_name, |
Benjamin Herrenschmidt | b9e5b4e | 2006-07-03 19:32:51 +1000 | [diff] [blame] | 412 | max_irqs - max_real_irqs, pmac_irq_cascade); |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 413 | } |
| 414 | of_node_put(slave); |
| 415 | |
Benjamin Herrenschmidt | b9e5b4e | 2006-07-03 19:32:51 +1000 | [diff] [blame] | 416 | /* Disable all interrupts in all controllers */ |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 417 | for (i = 0; i * 32 < max_irqs; ++i) |
| 418 | out_le32(&pmac_irq_hw[i]->enable, 0); |
| 419 | |
Benjamin Herrenschmidt | b9e5b4e | 2006-07-03 19:32:51 +1000 | [diff] [blame] | 420 | /* Hookup cascade irq */ |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 421 | if (slave && pmac_irq_cascade != NO_IRQ) |
Benjamin Herrenschmidt | b9e5b4e | 2006-07-03 19:32:51 +1000 | [diff] [blame] | 422 | setup_irq(pmac_irq_cascade, &gatwick_cascade_action); |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 423 | |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 424 | printk(KERN_INFO "irq: System has %d possible interrupts\n", max_irqs); |
| 425 | #ifdef CONFIG_XMON |
Benjamin Herrenschmidt | 6e99e45 | 2006-07-10 04:44:42 -0700 | [diff] [blame] | 426 | setup_irq(irq_create_mapping(NULL, 20), &xmon_action); |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 427 | #endif |
| 428 | } |
Grant Likely | b83da29 | 2010-06-18 11:10:01 -0600 | [diff] [blame] | 429 | |
| 430 | int of_irq_map_oldworld(struct device_node *device, int index, |
| 431 | struct of_irq *out_irq) |
| 432 | { |
| 433 | const u32 *ints = NULL; |
| 434 | int intlen; |
| 435 | |
| 436 | /* |
| 437 | * Old machines just have a list of interrupt numbers |
| 438 | * and no interrupt-controller nodes. We also have dodgy |
| 439 | * cases where the APPL,interrupts property is completely |
| 440 | * missing behind pci-pci bridges and we have to get it |
| 441 | * from the parent (the bridge itself, as apple just wired |
| 442 | * everything together on these) |
| 443 | */ |
| 444 | while (device) { |
| 445 | ints = of_get_property(device, "AAPL,interrupts", &intlen); |
| 446 | if (ints != NULL) |
| 447 | break; |
| 448 | device = device->parent; |
| 449 | if (device && strcmp(device->type, "pci") != 0) |
| 450 | break; |
| 451 | } |
| 452 | if (ints == NULL) |
| 453 | return -EINVAL; |
| 454 | intlen /= sizeof(u32); |
| 455 | |
| 456 | if (index >= intlen) |
| 457 | return -EINVAL; |
| 458 | |
| 459 | out_irq->controller = NULL; |
| 460 | out_irq->specifier[0] = ints[index]; |
| 461 | out_irq->size = 1; |
| 462 | |
| 463 | return 0; |
| 464 | } |
Paul Mackerras | 3c3f42d | 2005-10-10 22:58:41 +1000 | [diff] [blame] | 465 | #endif /* CONFIG_PPC32 */ |
| 466 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 467 | static void pmac_u3_cascade(unsigned int irq, struct irq_desc *desc) |
Paul Mackerras | 3c3f42d | 2005-10-10 22:58:41 +1000 | [diff] [blame] | 468 | { |
Thomas Gleixner | ec775d0 | 2011-03-25 16:45:20 +0100 | [diff] [blame] | 469 | struct irq_chip *chip = irq_desc_get_chip(desc); |
| 470 | struct mpic *mpic = irq_desc_get_handler_data(desc); |
Olaf Hering | 35a84c2 | 2006-10-07 22:08:26 +1000 | [diff] [blame] | 471 | unsigned int cascade_irq = mpic_get_one_irq(mpic); |
Lennert Buytenhek | d8c94ac | 2011-03-07 13:59:40 +0000 | [diff] [blame] | 472 | |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 473 | if (cascade_irq != NO_IRQ) |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 474 | generic_handle_irq(cascade_irq); |
Lennert Buytenhek | d8c94ac | 2011-03-07 13:59:40 +0000 | [diff] [blame] | 475 | |
| 476 | chip->irq_eoi(&desc->irq_data); |
Paul Mackerras | 3c3f42d | 2005-10-10 22:58:41 +1000 | [diff] [blame] | 477 | } |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 478 | |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 479 | static void __init pmac_pic_setup_mpic_nmi(struct mpic *mpic) |
| 480 | { |
| 481 | #if defined(CONFIG_XMON) && defined(CONFIG_PPC32) |
| 482 | struct device_node* pswitch; |
| 483 | int nmi_irq; |
| 484 | |
| 485 | pswitch = of_find_node_by_name(NULL, "programmer-switch"); |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 486 | if (pswitch) { |
| 487 | nmi_irq = irq_of_parse_and_map(pswitch, 0); |
| 488 | if (nmi_irq != NO_IRQ) { |
| 489 | mpic_irq_set_priority(nmi_irq, 9); |
| 490 | setup_irq(nmi_irq, &xmon_action); |
| 491 | } |
| 492 | of_node_put(pswitch); |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 493 | } |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 494 | #endif /* defined(CONFIG_XMON) && defined(CONFIG_PPC32) */ |
| 495 | } |
| 496 | |
Benjamin Herrenschmidt | 1beb6a7 | 2005-12-14 13:10:10 +1100 | [diff] [blame] | 497 | static struct mpic * __init pmac_setup_one_mpic(struct device_node *np, |
| 498 | int master) |
| 499 | { |
Benjamin Herrenschmidt | 1beb6a7 | 2005-12-14 13:10:10 +1100 | [diff] [blame] | 500 | const char *name = master ? " MPIC 1 " : " MPIC 2 "; |
Benjamin Herrenschmidt | 1beb6a7 | 2005-12-14 13:10:10 +1100 | [diff] [blame] | 501 | struct mpic *mpic; |
Kyle Moffett | be8bec5 | 2011-12-02 06:28:03 +0000 | [diff] [blame^] | 502 | unsigned int flags = master ? 0 : MPIC_SECONDARY; |
Benjamin Herrenschmidt | 1beb6a7 | 2005-12-14 13:10:10 +1100 | [diff] [blame] | 503 | |
| 504 | pmac_call_feature(PMAC_FTR_ENABLE_MPIC, np, 0, 0); |
| 505 | |
Benjamin Herrenschmidt | 1beb6a7 | 2005-12-14 13:10:10 +1100 | [diff] [blame] | 506 | flags |= MPIC_WANTS_RESET; |
Stephen Rothwell | e2eb639 | 2007-04-03 22:26:41 +1000 | [diff] [blame] | 507 | if (of_get_property(np, "big-endian", NULL)) |
Benjamin Herrenschmidt | 1beb6a7 | 2005-12-14 13:10:10 +1100 | [diff] [blame] | 508 | flags |= MPIC_BIG_ENDIAN; |
| 509 | |
| 510 | /* Primary Big Endian means HT interrupts. This is quite dodgy |
| 511 | * but works until I find a better way |
| 512 | */ |
| 513 | if (master && (flags & MPIC_BIG_ENDIAN)) |
Michael Ellerman | 6cfef5b | 2007-04-23 18:47:08 +1000 | [diff] [blame] | 514 | flags |= MPIC_U3_HT_IRQS; |
Benjamin Herrenschmidt | 1beb6a7 | 2005-12-14 13:10:10 +1100 | [diff] [blame] | 515 | |
Kyle Moffett | 8bf4156 | 2011-12-02 06:27:59 +0000 | [diff] [blame] | 516 | mpic = mpic_alloc(np, 0, flags, 0, 0, name); |
Benjamin Herrenschmidt | 1beb6a7 | 2005-12-14 13:10:10 +1100 | [diff] [blame] | 517 | if (mpic == NULL) |
| 518 | return NULL; |
| 519 | |
| 520 | mpic_init(mpic); |
| 521 | |
| 522 | return mpic; |
| 523 | } |
| 524 | |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 525 | static int __init pmac_pic_probe_mpic(void) |
| 526 | { |
| 527 | struct mpic *mpic1, *mpic2; |
| 528 | struct device_node *np, *master = NULL, *slave = NULL; |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 529 | unsigned int cascade; |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 530 | |
| 531 | /* We can have up to 2 MPICs cascaded */ |
| 532 | for (np = NULL; (np = of_find_node_by_type(np, "open-pic")) |
| 533 | != NULL;) { |
| 534 | if (master == NULL && |
Stephen Rothwell | e2eb639 | 2007-04-03 22:26:41 +1000 | [diff] [blame] | 535 | of_get_property(np, "interrupts", NULL) == NULL) |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 536 | master = of_node_get(np); |
| 537 | else if (slave == NULL) |
| 538 | slave = of_node_get(np); |
| 539 | if (master && slave) |
| 540 | break; |
| 541 | } |
| 542 | |
| 543 | /* Check for bogus setups */ |
| 544 | if (master == NULL && slave != NULL) { |
| 545 | master = slave; |
| 546 | slave = NULL; |
| 547 | } |
| 548 | |
| 549 | /* Not found, default to good old pmac pic */ |
| 550 | if (master == NULL) |
| 551 | return -ENODEV; |
| 552 | |
| 553 | /* Set master handler */ |
| 554 | ppc_md.get_irq = mpic_get_irq; |
| 555 | |
| 556 | /* Setup master */ |
Benjamin Herrenschmidt | 1beb6a7 | 2005-12-14 13:10:10 +1100 | [diff] [blame] | 557 | mpic1 = pmac_setup_one_mpic(master, 1); |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 558 | BUG_ON(mpic1 == NULL); |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 559 | |
| 560 | /* Install NMI if any */ |
| 561 | pmac_pic_setup_mpic_nmi(mpic1); |
| 562 | |
| 563 | of_node_put(master); |
| 564 | |
| 565 | /* No slave, let's go out */ |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 566 | if (slave == NULL) |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 567 | return 0; |
| 568 | |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 569 | /* Get/Map slave interrupt */ |
| 570 | cascade = irq_of_parse_and_map(slave, 0); |
| 571 | if (cascade == NO_IRQ) { |
| 572 | printk(KERN_ERR "Failed to map cascade IRQ\n"); |
| 573 | return 0; |
| 574 | } |
| 575 | |
Benjamin Herrenschmidt | 1beb6a7 | 2005-12-14 13:10:10 +1100 | [diff] [blame] | 576 | mpic2 = pmac_setup_one_mpic(slave, 0); |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 577 | if (mpic2 == NULL) { |
Benjamin Herrenschmidt | 1beb6a7 | 2005-12-14 13:10:10 +1100 | [diff] [blame] | 578 | printk(KERN_ERR "Failed to setup slave MPIC\n"); |
| 579 | of_node_put(slave); |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 580 | return 0; |
| 581 | } |
Thomas Gleixner | ec775d0 | 2011-03-25 16:45:20 +0100 | [diff] [blame] | 582 | irq_set_handler_data(cascade, mpic2); |
| 583 | irq_set_chained_handler(cascade, pmac_u3_cascade); |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 584 | |
| 585 | of_node_put(slave); |
| 586 | return 0; |
| 587 | } |
| 588 | |
| 589 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 590 | void __init pmac_pic_init(void) |
| 591 | { |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 592 | /* We configure the OF parsing based on our oldworld vs. newworld |
| 593 | * platform type and wether we were booted by BootX. |
| 594 | */ |
| 595 | #ifdef CONFIG_PPC32 |
| 596 | if (!pmac_newworld) |
Grant Likely | b83da29 | 2010-06-18 11:10:01 -0600 | [diff] [blame] | 597 | of_irq_workarounds |= OF_IMAP_OLDWORLD_MAC; |
Stephen Rothwell | e2eb639 | 2007-04-03 22:26:41 +1000 | [diff] [blame] | 598 | if (of_get_property(of_chosen, "linux,bootx", NULL) != NULL) |
Grant Likely | b83da29 | 2010-06-18 11:10:01 -0600 | [diff] [blame] | 599 | of_irq_workarounds |= OF_IMAP_NO_PHANDLE; |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 600 | |
Grant Likely | b83da29 | 2010-06-18 11:10:01 -0600 | [diff] [blame] | 601 | /* If we don't have phandles on a newworld, then try to locate a |
| 602 | * default interrupt controller (happens when booting with BootX). |
| 603 | * We do a first match here, hopefully, that only ever happens on |
| 604 | * machines with one controller. |
| 605 | */ |
| 606 | if (pmac_newworld && (of_irq_workarounds & OF_IMAP_NO_PHANDLE)) { |
| 607 | struct device_node *np; |
| 608 | |
| 609 | for_each_node_with_property(np, "interrupt-controller") { |
| 610 | /* Skip /chosen/interrupt-controller */ |
| 611 | if (strcmp(np->name, "chosen") == 0) |
| 612 | continue; |
| 613 | /* It seems like at least one person wants |
| 614 | * to use BootX on a machine with an AppleKiwi |
| 615 | * controller which happens to pretend to be an |
| 616 | * interrupt controller too. */ |
| 617 | if (strcmp(np->name, "AppleKiwi") == 0) |
| 618 | continue; |
| 619 | /* I think we found one ! */ |
| 620 | of_irq_dflt_pic = np; |
| 621 | break; |
| 622 | } |
| 623 | } |
| 624 | #endif /* CONFIG_PPC32 */ |
Benjamin Herrenschmidt | 6e99e45 | 2006-07-10 04:44:42 -0700 | [diff] [blame] | 625 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 626 | /* We first try to detect Apple's new Core99 chipset, since mac-io |
| 627 | * is quite different on those machines and contains an IBM MPIC2. |
| 628 | */ |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 629 | if (pmac_pic_probe_mpic() == 0) |
Paul Mackerras | 20c8c21 | 2005-09-28 20:28:14 +1000 | [diff] [blame] | 630 | return; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 631 | |
Paul Mackerras | 3c3f42d | 2005-10-10 22:58:41 +1000 | [diff] [blame] | 632 | #ifdef CONFIG_PPC32 |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 633 | pmac_pic_probe_oldstyle(); |
| 634 | #endif |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 635 | } |
| 636 | |
Paul Mackerras | a000503 | 2005-11-02 15:08:17 +1100 | [diff] [blame] | 637 | #if defined(CONFIG_PM) && defined(CONFIG_PPC32) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 638 | /* |
| 639 | * These procedures are used in implementing sleep on the powerbooks. |
| 640 | * sleep_save_intrs() saves the states of all interrupt enables |
| 641 | * and disables all interrupts except for the nominated one. |
| 642 | * sleep_restore_intrs() restores the states of all interrupt enables. |
| 643 | */ |
| 644 | unsigned long sleep_save_mask[2]; |
| 645 | |
| 646 | /* This used to be passed by the PMU driver but that link got |
| 647 | * broken with the new driver model. We use this tweak for now... |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 648 | * We really want to do things differently though... |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 649 | */ |
| 650 | static int pmacpic_find_viaint(void) |
| 651 | { |
| 652 | int viaint = -1; |
| 653 | |
| 654 | #ifdef CONFIG_ADB_PMU |
| 655 | struct device_node *np; |
| 656 | |
| 657 | if (pmu_get_model() != PMU_OHARE_BASED) |
| 658 | goto not_found; |
| 659 | np = of_find_node_by_name(NULL, "via-pmu"); |
| 660 | if (np == NULL) |
| 661 | goto not_found; |
Joe Perches | d258e64 | 2009-06-28 06:26:10 +0000 | [diff] [blame] | 662 | viaint = irq_of_parse_and_map(np, 0); |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 663 | |
| 664 | not_found: |
Tony Breeds | 98cddbf | 2008-03-12 10:48:48 +1100 | [diff] [blame] | 665 | #endif /* CONFIG_ADB_PMU */ |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 666 | return viaint; |
| 667 | } |
| 668 | |
Rafael J. Wysocki | f5a592f | 2011-04-26 19:14:57 +0200 | [diff] [blame] | 669 | static int pmacpic_suspend(void) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 670 | { |
| 671 | int viaint = pmacpic_find_viaint(); |
| 672 | |
| 673 | sleep_save_mask[0] = ppc_cached_irq_mask[0]; |
| 674 | sleep_save_mask[1] = ppc_cached_irq_mask[1]; |
| 675 | ppc_cached_irq_mask[0] = 0; |
| 676 | ppc_cached_irq_mask[1] = 0; |
| 677 | if (viaint > 0) |
| 678 | set_bit(viaint, ppc_cached_irq_mask); |
| 679 | out_le32(&pmac_irq_hw[0]->enable, ppc_cached_irq_mask[0]); |
| 680 | if (max_real_irqs > 32) |
| 681 | out_le32(&pmac_irq_hw[1]->enable, ppc_cached_irq_mask[1]); |
| 682 | (void)in_le32(&pmac_irq_hw[0]->event); |
| 683 | /* make sure mask gets to controller before we return to caller */ |
| 684 | mb(); |
| 685 | (void)in_le32(&pmac_irq_hw[0]->enable); |
| 686 | |
| 687 | return 0; |
| 688 | } |
| 689 | |
Rafael J. Wysocki | f5a592f | 2011-04-26 19:14:57 +0200 | [diff] [blame] | 690 | static void pmacpic_resume(void) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 691 | { |
| 692 | int i; |
| 693 | |
| 694 | out_le32(&pmac_irq_hw[0]->enable, 0); |
| 695 | if (max_real_irqs > 32) |
| 696 | out_le32(&pmac_irq_hw[1]->enable, 0); |
| 697 | mb(); |
| 698 | for (i = 0; i < max_real_irqs; ++i) |
| 699 | if (test_bit(i, sleep_save_mask)) |
Lennert Buytenhek | d8c94ac | 2011-03-07 13:59:40 +0000 | [diff] [blame] | 700 | pmac_unmask_irq(irq_get_irq_data(i)); |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 701 | } |
| 702 | |
Rafael J. Wysocki | f5a592f | 2011-04-26 19:14:57 +0200 | [diff] [blame] | 703 | static struct syscore_ops pmacpic_syscore_ops = { |
| 704 | .suspend = pmacpic_suspend, |
| 705 | .resume = pmacpic_resume, |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 706 | }; |
| 707 | |
Rafael J. Wysocki | f5a592f | 2011-04-26 19:14:57 +0200 | [diff] [blame] | 708 | static int __init init_pmacpic_syscore(void) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 709 | { |
Benjamin Herrenschmidt | 339dedf | 2011-05-31 18:01:23 +1000 | [diff] [blame] | 710 | if (pmac_irq_hw[0]) |
| 711 | register_syscore_ops(&pmacpic_syscore_ops); |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 712 | return 0; |
| 713 | } |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 714 | |
Rafael J. Wysocki | f5a592f | 2011-04-26 19:14:57 +0200 | [diff] [blame] | 715 | machine_subsys_initcall(powermac, init_pmacpic_syscore); |
| 716 | |
| 717 | #endif /* CONFIG_PM && CONFIG_PPC32 */ |