blob: 5f3680e7c883e3a4e50b60ec22a5e283ecd78ed2 [file] [log] [blame]
Eric Bénard41a353d2009-07-30 07:20:03 +01001/*
2 * linux/arch/arm/mach-at91/board-cpu9krea.c
3 *
4 * Copyright (C) 2005 SAN People
5 * Copyright (C) 2006 Atmel
6 * Copyright (C) 2009 Eric Benard - eric@eukrea.com
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#include <linux/types.h>
Russell King2f8163b2011-07-26 10:53:52 +010024#include <linux/gpio.h>
Eric Bénard41a353d2009-07-30 07:20:03 +010025#include <linux/init.h>
26#include <linux/mm.h>
27#include <linux/module.h>
28#include <linux/platform_device.h>
29#include <linux/clk.h>
30#include <linux/gpio_keys.h>
31#include <linux/input.h>
32#include <linux/mtd/physmap.h>
33
34#include <asm/setup.h>
35#include <asm/mach-types.h>
36#include <asm/irq.h>
37
38#include <asm/mach/arch.h>
39#include <asm/mach/map.h>
40#include <asm/mach/irq.h>
41
42#include <mach/hardware.h>
43#include <mach/board.h>
Eric Bénard41a353d2009-07-30 07:20:03 +010044#include <mach/at91sam9_smc.h>
45#include <mach/at91sam9260_matrix.h>
Jean-Christophe PLAGNIOL-VILLARD4342d642011-11-27 23:15:50 +080046#include <mach/at91_matrix.h>
Eric Bénard41a353d2009-07-30 07:20:03 +010047
48#include "sam9_smc.h"
49#include "generic.h"
50
Jean-Christophe PLAGNIOL-VILLARD1b021a32011-04-28 20:19:32 +080051static void __init cpu9krea_init_early(void)
Eric Bénard41a353d2009-07-30 07:20:03 +010052{
53 /* Initialize processor: 18.432 MHz crystal */
Jean-Christophe PLAGNIOL-VILLARD21d08b92011-04-23 15:28:34 +080054 at91_initialize(18432000);
Eric Bénard41a353d2009-07-30 07:20:03 +010055
56 /* DGBU on ttyS0. (Rx & Tx only) */
57 at91_register_uart(0, 0, 0);
58
59 /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
60 at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS |
61 ATMEL_UART_RTS | ATMEL_UART_DTR | ATMEL_UART_DSR |
62 ATMEL_UART_DCD | ATMEL_UART_RI);
63
64 /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
65 at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS |
66 ATMEL_UART_RTS);
67
68 /* USART2 on ttyS3. (Rx, Tx, RTS, CTS) */
69 at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS |
70 ATMEL_UART_RTS);
71
72 /* USART3 on ttyS4. (Rx, Tx) */
73 at91_register_uart(AT91SAM9260_ID_US3, 4, 0);
74
75 /* USART4 on ttyS5. (Rx, Tx) */
76 at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
77
78 /* USART5 on ttyS6. (Rx, Tx) */
79 at91_register_uart(AT91SAM9260_ID_US5, 6, 0);
80
81 /* set serial console to ttyS0 (ie, DBGU) */
82 at91_set_serial_console(0);
83}
84
Eric Bénard41a353d2009-07-30 07:20:03 +010085/*
86 * USB Host port
87 */
88static struct at91_usbh_data __initdata cpu9krea_usbh_data = {
89 .ports = 2,
Jean-Christophe PLAGNIOL-VILLARD63b4c292011-11-25 01:51:06 +080090 .vbus_pin = {-EINVAL, -EINVAL},
91 .overcurrent_pin= {-EINVAL, -EINVAL},
Eric Bénard41a353d2009-07-30 07:20:03 +010092};
93
94/*
95 * USB Device port
96 */
97static struct at91_udc_data __initdata cpu9krea_udc_data = {
98 .vbus_pin = AT91_PIN_PC8,
Jean-Christophe PLAGNIOL-VILLARD63b4c292011-11-25 01:51:06 +080099 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
Eric Bénard41a353d2009-07-30 07:20:03 +0100100};
101
102/*
103 * MACB Ethernet device
104 */
Jamie Iles84e0cdb2011-03-08 20:17:06 +0000105static struct macb_platform_data __initdata cpu9krea_macb_data = {
Jean-Christophe PLAGNIOL-VILLARD63b4c292011-11-25 01:51:06 +0800106 .phy_irq_pin = -EINVAL,
Eric Bénard41a353d2009-07-30 07:20:03 +0100107 .is_rmii = 1,
108};
109
110/*
111 * NAND flash
112 */
113static struct atmel_nand_data __initdata cpu9krea_nand_data = {
114 .ale = 21,
115 .cle = 22,
116 .rdy_pin = AT91_PIN_PC13,
117 .enable_pin = AT91_PIN_PC14,
118 .bus_width_16 = 0,
Jean-Christophe PLAGNIOL-VILLARD63b4c292011-11-25 01:51:06 +0800119 .det_pin = -EINVAL,
Jean-Christophe PLAGNIOL-VILLARDbf4289c2011-12-29 14:43:24 +0800120 .ecc_mode = NAND_ECC_SOFT,
Eric Bénard41a353d2009-07-30 07:20:03 +0100121};
122
123#ifdef CONFIG_MACH_CPU9260
124static struct sam9_smc_config __initdata cpu9krea_nand_smc_config = {
125 .ncs_read_setup = 0,
126 .nrd_setup = 1,
127 .ncs_write_setup = 0,
128 .nwe_setup = 1,
129
130 .ncs_read_pulse = 3,
131 .nrd_pulse = 3,
132 .ncs_write_pulse = 3,
133 .nwe_pulse = 3,
134
135 .read_cycle = 5,
136 .write_cycle = 5,
137
138 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE
139 | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
140 .tdf_cycles = 2,
141};
142#else
143static struct sam9_smc_config __initdata cpu9krea_nand_smc_config = {
144 .ncs_read_setup = 0,
145 .nrd_setup = 2,
146 .ncs_write_setup = 0,
147 .nwe_setup = 2,
148
149 .ncs_read_pulse = 4,
150 .nrd_pulse = 4,
151 .ncs_write_pulse = 4,
152 .nwe_pulse = 4,
153
154 .read_cycle = 7,
155 .write_cycle = 7,
156
157 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE
158 | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
159 .tdf_cycles = 3,
160};
161#endif
162
163static void __init cpu9krea_add_device_nand(void)
164{
Jean-Christophe PLAGNIOL-VILLARDfaee0cc2011-10-14 01:37:09 +0800165 sam9_smc_configure(0, 3, &cpu9krea_nand_smc_config);
Eric Bénard41a353d2009-07-30 07:20:03 +0100166 at91_add_device_nand(&cpu9krea_nand_data);
167}
168
169/*
170 * NOR flash
171 */
172static struct physmap_flash_data cpuat9260_nor_data = {
173 .width = 2,
174};
175
176#define NOR_BASE AT91_CHIPSELECT_0
177#define NOR_SIZE SZ_64M
178
179static struct resource nor_flash_resources[] = {
180 {
181 .start = NOR_BASE,
182 .end = NOR_BASE + NOR_SIZE - 1,
183 .flags = IORESOURCE_MEM,
184 }
185};
186
187static struct platform_device cpu9krea_nor_flash = {
188 .name = "physmap-flash",
189 .id = 0,
190 .dev = {
191 .platform_data = &cpuat9260_nor_data,
192 },
193 .resource = nor_flash_resources,
194 .num_resources = ARRAY_SIZE(nor_flash_resources),
195};
196
197#ifdef CONFIG_MACH_CPU9260
198static struct sam9_smc_config __initdata cpu9krea_nor_smc_config = {
199 .ncs_read_setup = 0,
200 .nrd_setup = 1,
201 .ncs_write_setup = 0,
202 .nwe_setup = 1,
203
204 .ncs_read_pulse = 10,
205 .nrd_pulse = 10,
206 .ncs_write_pulse = 6,
207 .nwe_pulse = 6,
208
209 .read_cycle = 12,
210 .write_cycle = 8,
211
212 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE
213 | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE
214 | AT91_SMC_DBW_16,
215 .tdf_cycles = 2,
216};
217#else
218static struct sam9_smc_config __initdata cpu9krea_nor_smc_config = {
219 .ncs_read_setup = 0,
220 .nrd_setup = 1,
221 .ncs_write_setup = 0,
222 .nwe_setup = 1,
223
224 .ncs_read_pulse = 13,
225 .nrd_pulse = 13,
226 .ncs_write_pulse = 8,
227 .nwe_pulse = 8,
228
229 .read_cycle = 15,
230 .write_cycle = 10,
231
232 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE
233 | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE
234 | AT91_SMC_DBW_16,
235 .tdf_cycles = 2,
236};
237#endif
238
239static __init void cpu9krea_add_device_nor(void)
240{
241 unsigned long csa;
242
Jean-Christophe PLAGNIOL-VILLARD4342d642011-11-27 23:15:50 +0800243 csa = at91_matrix_read(AT91_MATRIX_EBICSA);
244 at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_VDDIOMSEL_3_3V);
Eric Bénard41a353d2009-07-30 07:20:03 +0100245
246 /* configure chip-select 0 (NOR) */
Jean-Christophe PLAGNIOL-VILLARDfaee0cc2011-10-14 01:37:09 +0800247 sam9_smc_configure(0, 0, &cpu9krea_nor_smc_config);
Eric Bénard41a353d2009-07-30 07:20:03 +0100248
249 platform_device_register(&cpu9krea_nor_flash);
250}
251
252/*
253 * LEDs
254 */
255static struct gpio_led cpu9krea_leds[] = {
256 { /* LED1 */
257 .name = "LED1",
258 .gpio = AT91_PIN_PC11,
259 .active_low = 1,
260 .default_trigger = "timer",
261 },
262 { /* LED2 */
263 .name = "LED2",
264 .gpio = AT91_PIN_PC12,
265 .active_low = 1,
266 .default_trigger = "heartbeat",
267 },
268 { /* LED3 */
269 .name = "LED3",
270 .gpio = AT91_PIN_PC7,
271 .active_low = 1,
272 .default_trigger = "none",
273 },
274 { /* LED4 */
275 .name = "LED4",
276 .gpio = AT91_PIN_PC9,
277 .active_low = 1,
278 .default_trigger = "none",
279 }
280};
281
282static struct i2c_board_info __initdata cpu9krea_i2c_devices[] = {
283 {
284 I2C_BOARD_INFO("rtc-ds1307", 0x68),
285 .type = "ds1339",
286 },
287};
288
289/*
290 * GPIO Buttons
291 */
292#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
293static struct gpio_keys_button cpu9krea_buttons[] = {
294 {
295 .gpio = AT91_PIN_PC3,
296 .code = BTN_0,
297 .desc = "BP1",
298 .active_low = 1,
299 .wakeup = 1,
300 },
301 {
302 .gpio = AT91_PIN_PB20,
303 .code = BTN_1,
304 .desc = "BP2",
305 .active_low = 1,
306 .wakeup = 1,
307 }
308};
309
310static struct gpio_keys_platform_data cpu9krea_button_data = {
311 .buttons = cpu9krea_buttons,
312 .nbuttons = ARRAY_SIZE(cpu9krea_buttons),
313};
314
315static struct platform_device cpu9krea_button_device = {
316 .name = "gpio-keys",
317 .id = -1,
318 .num_resources = 0,
319 .dev = {
320 .platform_data = &cpu9krea_button_data,
321 }
322};
323
324static void __init cpu9krea_add_device_buttons(void)
325{
326 at91_set_gpio_input(AT91_PIN_PC3, 1); /* BP1 */
327 at91_set_deglitch(AT91_PIN_PC3, 1);
328 at91_set_gpio_input(AT91_PIN_PB20, 1); /* BP2 */
329 at91_set_deglitch(AT91_PIN_PB20, 1);
330
331 platform_device_register(&cpu9krea_button_device);
332}
333#else
334static void __init cpu9krea_add_device_buttons(void)
335{
336}
337#endif
338
339/*
340 * MCI (SD/MMC)
341 */
342static struct at91_mmc_data __initdata cpu9krea_mmc_data = {
343 .slot_b = 0,
344 .wire4 = 1,
345 .det_pin = AT91_PIN_PA29,
Jean-Christophe PLAGNIOL-VILLARD63b4c292011-11-25 01:51:06 +0800346 .wp_pin = -EINVAL,
347 .vcc_pin = -EINVAL,
Eric Bénard41a353d2009-07-30 07:20:03 +0100348};
349
350static void __init cpu9krea_board_init(void)
351{
352 /* NOR */
353 cpu9krea_add_device_nor();
354 /* Serial */
355 at91_add_device_serial();
356 /* USB Host */
357 at91_add_device_usbh(&cpu9krea_usbh_data);
358 /* USB Device */
359 at91_add_device_udc(&cpu9krea_udc_data);
360 /* NAND */
361 cpu9krea_add_device_nand();
362 /* Ethernet */
363 at91_add_device_eth(&cpu9krea_macb_data);
364 /* MMC */
365 at91_add_device_mmc(0, &cpu9krea_mmc_data);
366 /* I2C */
367 at91_add_device_i2c(cpu9krea_i2c_devices,
368 ARRAY_SIZE(cpu9krea_i2c_devices));
369 /* LEDs */
370 at91_gpio_leds(cpu9krea_leds, ARRAY_SIZE(cpu9krea_leds));
371 /* Push Buttons */
372 cpu9krea_add_device_buttons();
373}
374
375#ifdef CONFIG_MACH_CPU9260
376MACHINE_START(CPUAT9260, "Eukrea CPU9260")
377#else
378MACHINE_START(CPUAT9G20, "Eukrea CPU9G20")
379#endif
380 /* Maintainer: Eric Benard - EUKREA Electromatique */
Eric Bénard41a353d2009-07-30 07:20:03 +0100381 .timer = &at91sam926x_timer,
Jean-Christophe PLAGNIOL-VILLARD21d08b92011-04-23 15:28:34 +0800382 .map_io = at91_map_io,
Jean-Christophe PLAGNIOL-VILLARD1b021a32011-04-28 20:19:32 +0800383 .init_early = cpu9krea_init_early,
Jean-Christophe PLAGNIOL-VILLARD92100c12011-04-23 15:28:34 +0800384 .init_irq = at91_init_irq_default,
Eric Bénard41a353d2009-07-30 07:20:03 +0100385 .init_machine = cpu9krea_board_init,
386MACHINE_END