Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Eugene Surovegin | 37448f7 | 2005-10-10 16:58:14 -0700 | [diff] [blame] | 2 | * drivers/net/ibm_emac/ibm_emac_core.h |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | * |
Eugene Surovegin | 37448f7 | 2005-10-10 16:58:14 -0700 | [diff] [blame] | 4 | * Driver for PowerPC 4xx on-chip ethernet controller. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5 | * |
Eugene Surovegin | 37448f7 | 2005-10-10 16:58:14 -0700 | [diff] [blame] | 6 | * Copyright (c) 2004, 2005 Zultys Technologies. |
| 7 | * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 8 | * |
Eugene Surovegin | 37448f7 | 2005-10-10 16:58:14 -0700 | [diff] [blame] | 9 | * Based on original work by |
| 10 | * Armin Kuster <akuster@mvista.com> |
| 11 | * Johnnie Peters <jpeters@mvista.com> |
| 12 | * Copyright 2000, 2001 MontaVista Softare Inc. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 13 | * |
| 14 | * This program is free software; you can redistribute it and/or modify it |
| 15 | * under the terms of the GNU General Public License as published by the |
| 16 | * Free Software Foundation; either version 2 of the License, or (at your |
| 17 | * option) any later version. |
Eugene Surovegin | 37448f7 | 2005-10-10 16:58:14 -0700 | [diff] [blame] | 18 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 19 | */ |
Eugene Surovegin | 37448f7 | 2005-10-10 16:58:14 -0700 | [diff] [blame] | 20 | #ifndef __IBM_EMAC_CORE_H_ |
| 21 | #define __IBM_EMAC_CORE_H_ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 | #include <linux/netdevice.h> |
Eugene Surovegin | 37448f7 | 2005-10-10 16:58:14 -0700 | [diff] [blame] | 24 | #include <linux/dma-mapping.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 25 | #include <asm/ocp.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 26 | |
| 27 | #include "ibm_emac.h" |
| 28 | #include "ibm_emac_phy.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | #include "ibm_emac_zmii.h" |
Eugene Surovegin | 37448f7 | 2005-10-10 16:58:14 -0700 | [diff] [blame] | 30 | #include "ibm_emac_rgmii.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 31 | #include "ibm_emac_mal.h" |
| 32 | #include "ibm_emac_tah.h" |
| 33 | |
Eugene Surovegin | 37448f7 | 2005-10-10 16:58:14 -0700 | [diff] [blame] | 34 | #define NUM_TX_BUFF CONFIG_IBM_EMAC_TXB |
| 35 | #define NUM_RX_BUFF CONFIG_IBM_EMAC_RXB |
| 36 | |
| 37 | /* Simple sanity check */ |
| 38 | #if NUM_TX_BUFF > 256 || NUM_RX_BUFF > 256 |
| 39 | #error Invalid number of buffer descriptors (greater than 256) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 40 | #endif |
| 41 | |
Eugene Surovegin | 37448f7 | 2005-10-10 16:58:14 -0700 | [diff] [blame] | 42 | // XXX |
| 43 | #define EMAC_MIN_MTU 46 |
| 44 | #define EMAC_MAX_MTU 9000 |
| 45 | |
| 46 | /* Maximum L2 header length (VLAN tagged, no FCS) */ |
| 47 | #define EMAC_MTU_OVERHEAD (6 * 2 + 2 + 4) |
| 48 | |
| 49 | /* RX BD size for the given MTU */ |
| 50 | static inline int emac_rx_size(int mtu) |
| 51 | { |
| 52 | if (mtu > ETH_DATA_LEN) |
| 53 | return MAL_MAX_RX_SIZE; |
| 54 | else |
| 55 | return mal_rx_size(ETH_DATA_LEN + EMAC_MTU_OVERHEAD); |
| 56 | } |
| 57 | |
| 58 | #define EMAC_DMA_ALIGN(x) ALIGN((x), dma_get_cache_alignment()) |
| 59 | |
| 60 | #define EMAC_RX_SKB_HEADROOM \ |
| 61 | EMAC_DMA_ALIGN(CONFIG_IBM_EMAC_RX_SKB_HEADROOM) |
| 62 | |
| 63 | /* Size of RX skb for the given MTU */ |
| 64 | static inline int emac_rx_skb_size(int mtu) |
| 65 | { |
| 66 | int size = max(mtu + EMAC_MTU_OVERHEAD, emac_rx_size(mtu)); |
| 67 | return EMAC_DMA_ALIGN(size + 2) + EMAC_RX_SKB_HEADROOM; |
| 68 | } |
| 69 | |
| 70 | /* RX DMA sync size */ |
| 71 | static inline int emac_rx_sync_size(int mtu) |
| 72 | { |
| 73 | return EMAC_DMA_ALIGN(emac_rx_size(mtu) + 2); |
| 74 | } |
| 75 | |
| 76 | /* Driver statistcs is split into two parts to make it more cache friendly: |
| 77 | * - normal statistics (packet count, etc) |
| 78 | * - error statistics |
| 79 | * |
| 80 | * When statistics is requested by ethtool, these parts are concatenated, |
| 81 | * normal one goes first. |
| 82 | * |
| 83 | * Please, keep these structures in sync with emac_stats_keys. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 84 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 85 | |
Eugene Surovegin | 37448f7 | 2005-10-10 16:58:14 -0700 | [diff] [blame] | 86 | /* Normal TX/RX Statistics */ |
| 87 | struct ibm_emac_stats { |
| 88 | u64 rx_packets; |
| 89 | u64 rx_bytes; |
| 90 | u64 tx_packets; |
| 91 | u64 tx_bytes; |
| 92 | u64 rx_packets_csum; |
| 93 | u64 tx_packets_csum; |
| 94 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 95 | |
Eugene Surovegin | 37448f7 | 2005-10-10 16:58:14 -0700 | [diff] [blame] | 96 | /* Error statistics */ |
| 97 | struct ibm_emac_error_stats { |
| 98 | u64 tx_undo; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 99 | |
Eugene Surovegin | 37448f7 | 2005-10-10 16:58:14 -0700 | [diff] [blame] | 100 | /* Software RX Errors */ |
| 101 | u64 rx_dropped_stack; |
| 102 | u64 rx_dropped_oom; |
| 103 | u64 rx_dropped_error; |
| 104 | u64 rx_dropped_resize; |
| 105 | u64 rx_dropped_mtu; |
| 106 | u64 rx_stopped; |
| 107 | /* BD reported RX errors */ |
| 108 | u64 rx_bd_errors; |
| 109 | u64 rx_bd_overrun; |
| 110 | u64 rx_bd_bad_packet; |
| 111 | u64 rx_bd_runt_packet; |
| 112 | u64 rx_bd_short_event; |
| 113 | u64 rx_bd_alignment_error; |
| 114 | u64 rx_bd_bad_fcs; |
| 115 | u64 rx_bd_packet_too_long; |
| 116 | u64 rx_bd_out_of_range; |
| 117 | u64 rx_bd_in_range; |
| 118 | /* EMAC IRQ reported RX errors */ |
| 119 | u64 rx_parity; |
| 120 | u64 rx_fifo_overrun; |
| 121 | u64 rx_overrun; |
| 122 | u64 rx_bad_packet; |
| 123 | u64 rx_runt_packet; |
| 124 | u64 rx_short_event; |
| 125 | u64 rx_alignment_error; |
| 126 | u64 rx_bad_fcs; |
| 127 | u64 rx_packet_too_long; |
| 128 | u64 rx_out_of_range; |
| 129 | u64 rx_in_range; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 130 | |
Eugene Surovegin | 37448f7 | 2005-10-10 16:58:14 -0700 | [diff] [blame] | 131 | /* Software TX Errors */ |
| 132 | u64 tx_dropped; |
| 133 | /* BD reported TX errors */ |
| 134 | u64 tx_bd_errors; |
| 135 | u64 tx_bd_bad_fcs; |
| 136 | u64 tx_bd_carrier_loss; |
| 137 | u64 tx_bd_excessive_deferral; |
| 138 | u64 tx_bd_excessive_collisions; |
| 139 | u64 tx_bd_late_collision; |
| 140 | u64 tx_bd_multple_collisions; |
| 141 | u64 tx_bd_single_collision; |
| 142 | u64 tx_bd_underrun; |
| 143 | u64 tx_bd_sqe; |
| 144 | /* EMAC IRQ reported TX errors */ |
| 145 | u64 tx_parity; |
| 146 | u64 tx_underrun; |
| 147 | u64 tx_sqe; |
| 148 | u64 tx_errors; |
| 149 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 150 | |
Eugene Surovegin | 37448f7 | 2005-10-10 16:58:14 -0700 | [diff] [blame] | 151 | #define EMAC_ETHTOOL_STATS_COUNT ((sizeof(struct ibm_emac_stats) + \ |
| 152 | sizeof(struct ibm_emac_error_stats)) \ |
| 153 | / sizeof(u64)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 154 | |
| 155 | struct ocp_enet_private { |
Eugene Surovegin | 37448f7 | 2005-10-10 16:58:14 -0700 | [diff] [blame] | 156 | struct net_device *ndev; /* 0 */ |
Al Viro | b43de2d | 2005-12-01 10:15:21 -0500 | [diff] [blame] | 157 | struct emac_regs __iomem *emacp; |
Eugene Surovegin | 37448f7 | 2005-10-10 16:58:14 -0700 | [diff] [blame] | 158 | |
| 159 | struct mal_descriptor *tx_desc; |
| 160 | int tx_cnt; |
| 161 | int tx_slot; |
| 162 | int ack_slot; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 163 | |
Eugene Surovegin | 37448f7 | 2005-10-10 16:58:14 -0700 | [diff] [blame] | 164 | struct mal_descriptor *rx_desc; |
| 165 | int rx_slot; |
| 166 | struct sk_buff *rx_sg_skb; /* 1 */ |
| 167 | int rx_skb_size; |
| 168 | int rx_sync_size; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 169 | |
Eugene Surovegin | 37448f7 | 2005-10-10 16:58:14 -0700 | [diff] [blame] | 170 | struct ibm_emac_stats stats; |
| 171 | struct ocp_device *tah_dev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 172 | |
Eugene Surovegin | 37448f7 | 2005-10-10 16:58:14 -0700 | [diff] [blame] | 173 | struct ibm_ocp_mal *mal; |
| 174 | struct mal_commac commac; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 175 | |
Eugene Surovegin | 37448f7 | 2005-10-10 16:58:14 -0700 | [diff] [blame] | 176 | struct sk_buff *tx_skb[NUM_TX_BUFF]; |
| 177 | struct sk_buff *rx_skb[NUM_RX_BUFF]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 178 | |
Eugene Surovegin | 37448f7 | 2005-10-10 16:58:14 -0700 | [diff] [blame] | 179 | struct ocp_device *zmii_dev; |
| 180 | int zmii_input; |
| 181 | struct ocp_enet_private *mdio_dev; |
| 182 | struct ocp_device *rgmii_dev; |
| 183 | int rgmii_input; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 184 | |
Eugene Surovegin | 37448f7 | 2005-10-10 16:58:14 -0700 | [diff] [blame] | 185 | struct ocp_def *def; |
| 186 | |
| 187 | struct mii_phy phy; |
| 188 | struct timer_list link_timer; |
| 189 | int reset_failed; |
| 190 | |
Eugene Surovegin | 8169bd919 | 2005-11-24 14:48:40 -0800 | [diff] [blame] | 191 | int stop_timeout; /* in us */ |
| 192 | |
Eugene Surovegin | 37448f7 | 2005-10-10 16:58:14 -0700 | [diff] [blame] | 193 | struct ibm_emac_error_stats estats; |
| 194 | struct net_device_stats nstats; |
| 195 | |
| 196 | struct device* ldev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 197 | }; |
Eugene Surovegin | 37448f7 | 2005-10-10 16:58:14 -0700 | [diff] [blame] | 198 | |
| 199 | /* Ethtool get_regs complex data. |
| 200 | * We want to get not just EMAC registers, but also MAL, ZMII, RGMII, TAH |
| 201 | * when available. |
| 202 | * |
| 203 | * Returned BLOB consists of the ibm_emac_ethtool_regs_hdr, |
| 204 | * MAL registers, EMAC registers and optional ZMII, RGMII, TAH registers. |
| 205 | * Each register component is preceded with emac_ethtool_regs_subhdr. |
| 206 | * Order of the optional headers follows their relative bit posititions |
| 207 | * in emac_ethtool_regs_hdr.components |
| 208 | */ |
| 209 | #define EMAC_ETHTOOL_REGS_ZMII 0x00000001 |
| 210 | #define EMAC_ETHTOOL_REGS_RGMII 0x00000002 |
| 211 | #define EMAC_ETHTOOL_REGS_TAH 0x00000004 |
| 212 | |
| 213 | struct emac_ethtool_regs_hdr { |
| 214 | u32 components; |
| 215 | }; |
| 216 | |
| 217 | struct emac_ethtool_regs_subhdr { |
| 218 | u32 version; |
| 219 | u32 index; |
| 220 | }; |
| 221 | |
| 222 | #endif /* __IBM_EMAC_CORE_H_ */ |