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Mark Brownb83a3132011-05-11 19:59:58 +02001#ifndef __LINUX_REGMAP_H
2#define __LINUX_REGMAP_H
3
4/*
5 * Register map access API
6 *
7 * Copyright 2011 Wolfson Microelectronics plc
8 *
9 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/device.h>
17#include <linux/list.h>
Mark Brownb83a3132011-05-11 19:59:58 +020018
Paul Gortmakerde477252011-05-26 13:46:22 -040019struct module;
Mark Brown9943fa32011-06-20 19:02:29 +010020struct i2c_client;
Mark Browna676f082011-05-12 11:42:10 +020021struct spi_device;
Mark Brown9943fa32011-06-20 19:02:29 +010022
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010023/* An enum of all the supported cache types */
24enum regcache_type {
25 REGCACHE_NONE,
Dimitris Papastamos28644c802011-09-19 14:34:02 +010026 REGCACHE_RBTREE,
Mark Brown50b776f2011-11-02 15:00:03 +000027 REGCACHE_COMPRESSED
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010028};
29
Mark Browndd898b22011-07-20 22:28:58 +010030/**
Mark Brownbd20eb52011-08-19 18:09:38 +090031 * Default value for a register. We use an array of structs rather
32 * than a simple array as many modern devices have very sparse
33 * register maps.
34 *
35 * @reg: Register address.
36 * @def: Register default value.
37 */
38struct reg_default {
39 unsigned int reg;
40 unsigned int def;
41};
42
43/**
Mark Browndd898b22011-07-20 22:28:58 +010044 * Configuration for the register map of a device.
45 *
46 * @reg_bits: Number of bits in a register address, mandatory.
47 * @val_bits: Number of bits in a register value, mandatory.
Mark Brown2e2ae662011-07-20 22:33:39 +010048 *
Mark Brown3566cc92011-08-09 10:23:22 +090049 * @writeable_reg: Optional callback returning true if the register
50 * can be written to.
51 * @readable_reg: Optional callback returning true if the register
52 * can be read from.
53 * @volatile_reg: Optional callback returning true if the register
54 * value can't be cached.
55 * @precious_reg: Optional callback returning true if the rgister
56 * should not be read outside of a call from the driver
57 * (eg, a clear on read interrupt status register).
Mark Brownbd20eb52011-08-19 18:09:38 +090058 *
59 * @max_register: Optional, specifies the maximum valid register index.
60 * @reg_defaults: Power on reset values for registers (for use with
61 * register cache support).
62 * @num_reg_defaults: Number of elements in reg_defaults.
Lars-Peter Clausen6f306442011-09-05 20:46:32 +020063 *
64 * @read_flag_mask: Mask to be set in the top byte of the register when doing
65 * a read.
66 * @write_flag_mask: Mask to be set in the top byte of the register when doing
67 * a write. If both read_flag_mask and write_flag_mask are
68 * empty the regmap_bus default masks are used.
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010069 *
70 * @cache_type: The actual cache type.
71 * @reg_defaults_raw: Power on reset values for registers (for use with
72 * register cache support).
73 * @num_reg_defaults_raw: Number of elements in reg_defaults_raw.
Mark Browndd898b22011-07-20 22:28:58 +010074 */
Mark Brownb83a3132011-05-11 19:59:58 +020075struct regmap_config {
76 int reg_bits;
77 int val_bits;
Mark Brown2e2ae662011-07-20 22:33:39 +010078
Mark Brown2e2ae662011-07-20 22:33:39 +010079 bool (*writeable_reg)(struct device *dev, unsigned int reg);
80 bool (*readable_reg)(struct device *dev, unsigned int reg);
81 bool (*volatile_reg)(struct device *dev, unsigned int reg);
Mark Brown18694882011-08-08 15:40:22 +090082 bool (*precious_reg)(struct device *dev, unsigned int reg);
Mark Brownbd20eb52011-08-19 18:09:38 +090083
84 unsigned int max_register;
Lars-Peter Clausen720e4612011-11-16 16:28:17 +010085 const struct reg_default *reg_defaults;
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010086 unsigned int num_reg_defaults;
87 enum regcache_type cache_type;
88 const void *reg_defaults_raw;
89 unsigned int num_reg_defaults_raw;
Lars-Peter Clausen6f306442011-09-05 20:46:32 +020090
91 u8 read_flag_mask;
92 u8 write_flag_mask;
Mark Brownb83a3132011-05-11 19:59:58 +020093};
94
95typedef int (*regmap_hw_write)(struct device *dev, const void *data,
96 size_t count);
97typedef int (*regmap_hw_gather_write)(struct device *dev,
98 const void *reg, size_t reg_len,
99 const void *val, size_t val_len);
100typedef int (*regmap_hw_read)(struct device *dev,
101 const void *reg_buf, size_t reg_size,
102 void *val_buf, size_t val_size);
103
104/**
105 * Description of a hardware bus for the register map infrastructure.
106 *
Mark Brownb83a3132011-05-11 19:59:58 +0200107 * @write: Write operation.
108 * @gather_write: Write operation with split register/value, return -ENOTSUPP
109 * if not implemented on a given device.
110 * @read: Read operation. Data is returned in the buffer used to transmit
111 * data.
Mark Brownb83a3132011-05-11 19:59:58 +0200112 * @read_flag_mask: Mask to be set in the top byte of the register when doing
113 * a read.
114 */
115struct regmap_bus {
Mark Brownb83a3132011-05-11 19:59:58 +0200116 regmap_hw_write write;
117 regmap_hw_gather_write gather_write;
118 regmap_hw_read read;
Mark Brownb83a3132011-05-11 19:59:58 +0200119 u8 read_flag_mask;
120};
121
122struct regmap *regmap_init(struct device *dev,
123 const struct regmap_bus *bus,
124 const struct regmap_config *config);
Mark Brown9943fa32011-06-20 19:02:29 +0100125struct regmap *regmap_init_i2c(struct i2c_client *i2c,
126 const struct regmap_config *config);
Mark Browna676f082011-05-12 11:42:10 +0200127struct regmap *regmap_init_spi(struct spi_device *dev,
128 const struct regmap_config *config);
129
Mark Brownc0eb4672012-01-30 19:56:52 +0000130struct regmap *devm_regmap_init(struct device *dev,
131 const struct regmap_bus *bus,
132 const struct regmap_config *config);
133struct regmap *devm_regmap_init_i2c(struct i2c_client *i2c,
134 const struct regmap_config *config);
135struct regmap *devm_regmap_init_spi(struct spi_device *dev,
136 const struct regmap_config *config);
137
Mark Brownb83a3132011-05-11 19:59:58 +0200138void regmap_exit(struct regmap *map);
Mark Brownbf315172011-12-03 17:06:20 +0000139int regmap_reinit_cache(struct regmap *map,
140 const struct regmap_config *config);
Mark Brownb83a3132011-05-11 19:59:58 +0200141int regmap_write(struct regmap *map, unsigned int reg, unsigned int val);
142int regmap_raw_write(struct regmap *map, unsigned int reg,
143 const void *val, size_t val_len);
144int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val);
145int regmap_raw_read(struct regmap *map, unsigned int reg,
146 void *val, size_t val_len);
147int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
148 size_t val_count);
149int regmap_update_bits(struct regmap *map, unsigned int reg,
150 unsigned int mask, unsigned int val);
Mark Brown018690d2011-11-29 20:10:36 +0000151int regmap_update_bits_check(struct regmap *map, unsigned int reg,
152 unsigned int mask, unsigned int val,
153 bool *change);
Mark Brownb83a3132011-05-11 19:59:58 +0200154
Mark Brown39a58432011-09-19 18:21:49 +0100155int regcache_sync(struct regmap *map);
Mark Brown92afb282011-09-19 18:22:14 +0100156void regcache_cache_only(struct regmap *map, bool enable);
Dimitris Papastamos6eb0f5e2011-09-29 14:36:27 +0100157void regcache_cache_bypass(struct regmap *map, bool enable);
Mark Brown8ae0d7e2011-10-26 10:34:22 +0200158void regcache_mark_dirty(struct regmap *map);
Mark Brown92afb282011-09-19 18:22:14 +0100159
Mark Brownf8beab22011-10-28 23:50:49 +0200160/**
161 * Description of an IRQ for the generic regmap irq_chip.
162 *
163 * @reg_offset: Offset of the status/mask register within the bank
164 * @mask: Mask used to flag/control the register.
165 */
166struct regmap_irq {
167 unsigned int reg_offset;
168 unsigned int mask;
169};
170
171/**
172 * Description of a generic regmap irq_chip. This is not intended to
173 * handle every possible interrupt controller, but it should handle a
174 * substantial proportion of those that are found in the wild.
175 *
176 * @name: Descriptive name for IRQ controller.
177 *
178 * @status_base: Base status register address.
179 * @mask_base: Base mask register address.
180 * @ack_base: Base ack address. If zero then the chip is clear on read.
181 *
182 * @num_regs: Number of registers in each control bank.
183 * @irqs: Descriptors for individual IRQs. Interrupt numbers are
184 * assigned based on the index in the array of the interrupt.
185 * @num_irqs: Number of descriptors.
186 */
187struct regmap_irq_chip {
188 const char *name;
189
190 unsigned int status_base;
191 unsigned int mask_base;
192 unsigned int ack_base;
193
194 int num_regs;
195
196 const struct regmap_irq *irqs;
197 int num_irqs;
198};
199
200struct regmap_irq_chip_data;
201
202int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
203 int irq_base, struct regmap_irq_chip *chip,
204 struct regmap_irq_chip_data **data);
205void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data);
Mark Brown209a6002011-12-05 16:10:15 +0000206int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data);
Mark Brownb83a3132011-05-11 19:59:58 +0200207
208#endif