blob: cd229998a62eb716979fa99fe4e38d8d7d83265b [file] [log] [blame]
Krzysztof Halasa921a86e2010-08-12 23:14:07 +02001/*
2 * SBE 2T3E3 synchronous serial card driver for Linux
3 *
4 * Copyright (C) 2009-2010 Krzysztof Halasa <khc@pm.waw.pl>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License
8 * as published by the Free Software Foundation.
9 *
10 * This code is based on a driver written by SBE Inc.
11 */
12
13#include "2t3e3.h"
14#include "ctrl.h"
15
16void exar7300_init(struct channel *sc)
17{
18 exar7300_write(sc, SBE_2T3E3_LIU_REG_REG1, 0);
19
20 /* enable line decodeer and encoder */
21 exar7300_write(sc, SBE_2T3E3_LIU_REG_REG2, 0);
22 exar7300_write(sc, SBE_2T3E3_LIU_REG_REG3, 0);
23 exar7300_write(sc, SBE_2T3E3_LIU_REG_REG4,
24 SBE_2T3E3_LIU_VAL_T3_MODE_SELECT |
25 SBE_2T3E3_LIU_VAL_LOOPBACK_OFF);
26}
27
28void exar7300_set_loopback(struct channel *sc, u32 mode)
29{
30 u32 val;
31
32 switch (mode) {
33 case SBE_2T3E3_LIU_VAL_LOOPBACK_OFF:
34 case SBE_2T3E3_LIU_VAL_LOOPBACK_REMOTE:
35 case SBE_2T3E3_LIU_VAL_LOOPBACK_ANALOG:
36 case SBE_2T3E3_LIU_VAL_LOOPBACK_DIGITAL:
37 break;
38 default:
39 return;
40 }
41
42 val = exar7300_read(sc, SBE_2T3E3_LIU_REG_REG4);
43 val &= ~(SBE_2T3E3_LIU_VAL_LOCAL_LOOPBACK | SBE_2T3E3_LIU_VAL_REMOTE_LOOPBACK);
44 val |= mode;
45 exar7300_write(sc, SBE_2T3E3_LIU_REG_REG4, val);
Krzysztof Halasa921a86e2010-08-12 23:14:07 +020046}
47
48void exar7300_set_frame_type(struct channel *sc, u32 type)
49{
50 u32 val;
51
52 switch (type) {
53 case SBE_2T3E3_FRAME_TYPE_T3_CBIT:
54 case SBE_2T3E3_FRAME_TYPE_T3_M13:
55 case SBE_2T3E3_FRAME_TYPE_E3_G751:
56 case SBE_2T3E3_FRAME_TYPE_E3_G832:
57 break;
58 default:
59 return;
60 }
61
62 val = exar7300_read(sc, SBE_2T3E3_LIU_REG_REG4);
63 val &= ~(SBE_2T3E3_LIU_VAL_T3_MODE_SELECT |
64 SBE_2T3E3_LIU_VAL_E3_MODE_SELECT);
65
66 switch (type) {
67 case SBE_2T3E3_FRAME_TYPE_T3_CBIT:
68 case SBE_2T3E3_FRAME_TYPE_T3_M13:
69 val |= SBE_2T3E3_LIU_VAL_T3_MODE_SELECT;
70 break;
71 case SBE_2T3E3_FRAME_TYPE_E3_G751:
72 case SBE_2T3E3_FRAME_TYPE_E3_G832:
73 val |= SBE_2T3E3_LIU_VAL_E3_MODE_SELECT;
74 break;
75 default:
76 return;
77 }
78
79 exar7300_write(sc, SBE_2T3E3_LIU_REG_REG4, val);
80}
81
82
83void exar7300_transmit_all_ones_onoff(struct channel *sc, u32 mode)
84{
85 if (sc->p.transmit_all_ones == mode)
86 return;
87
88 switch (mode) {
89 case SBE_2T3E3_ON:
90 exar7300_set_bit(sc, SBE_2T3E3_LIU_REG_REG1,
91 SBE_2T3E3_LIU_VAL_TRANSMIT_ALL_ONES);
92 break;
93 case SBE_2T3E3_OFF:
94 exar7300_clear_bit(sc, SBE_2T3E3_LIU_REG_REG1,
95 SBE_2T3E3_LIU_VAL_TRANSMIT_ALL_ONES);
96 break;
97 default:
98 return;
99 }
100
101 sc->p.transmit_all_ones = mode;
102}
103
104void exar7300_receive_equalization_onoff(struct channel *sc, u32 mode)
105{
106 if (sc->p.receive_equalization == mode)
107 return;
108
109 switch (mode) {
110 case SBE_2T3E3_OFF:
111 exar7300_set_bit(sc, SBE_2T3E3_LIU_REG_REG2,
112 SBE_2T3E3_LIU_VAL_RECEIVE_EQUALIZATION_DISABLE);
113 break;
114 case SBE_2T3E3_ON:
115 exar7300_clear_bit(sc, SBE_2T3E3_LIU_REG_REG2,
116 SBE_2T3E3_LIU_VAL_RECEIVE_EQUALIZATION_DISABLE);
117 break;
118 default:
119 return;
120 }
121
122 sc->p.receive_equalization = mode;
123}
124
125void exar7300_line_build_out_onoff(struct channel *sc, u32 mode)
126{
127 if (sc->p.line_build_out == mode)
128 return;
129
130 switch (mode) {
131 case SBE_2T3E3_OFF:
132 exar7300_set_bit(sc, SBE_2T3E3_LIU_REG_REG1,
133 SBE_2T3E3_LIU_VAL_TRANSMIT_LEVEL_SELECT);
134 exar7300_receive_equalization_onoff(sc, SBE_2T3E3_OFF);
135 break;
136 case SBE_2T3E3_ON:
137 exar7300_clear_bit(sc, SBE_2T3E3_LIU_REG_REG1,
138 SBE_2T3E3_LIU_VAL_TRANSMIT_LEVEL_SELECT);
139 exar7300_receive_equalization_onoff(sc, SBE_2T3E3_ON);
140 break;
141 default:
142 return;
143 }
144
145 sc->p.line_build_out = mode;
146}
147
148/* TODO - what about encoder in raw mode??? disable it too? */
149void exar7300_unipolar_onoff(struct channel *sc, u32 mode)
150{
151 switch (mode) {
152 case SBE_2T3E3_OFF:
153 exar7300_clear_bit(sc, SBE_2T3E3_LIU_REG_REG3,
154 SBE_2T3E3_LIU_VAL_DECODER_DISABLE);
155 exar7300_clear_bit(sc, SBE_2T3E3_LIU_REG_REG1,
156 SBE_2T3E3_LIU_VAL_TRANSMIT_BINARY_DATA);
157 break;
158 case SBE_2T3E3_ON:
159 exar7300_set_bit(sc, SBE_2T3E3_LIU_REG_REG3,
160 SBE_2T3E3_LIU_VAL_DECODER_DISABLE);
161 exar7300_set_bit(sc, SBE_2T3E3_LIU_REG_REG1,
162 SBE_2T3E3_LIU_VAL_TRANSMIT_BINARY_DATA);
163 break;
164 }
165}