Paul Mackerras | 047ea78 | 2005-11-19 20:17:32 +1100 | [diff] [blame] | 1 | #ifndef _ASM_POWERPC_IO_H |
| 2 | #define _ASM_POWERPC_IO_H |
Arnd Bergmann | 88ced03 | 2005-12-16 22:43:46 +0100 | [diff] [blame] | 3 | #ifdef __KERNEL__ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4 | |
| 5 | /* |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License |
| 8 | * as published by the Free Software Foundation; either version |
| 9 | * 2 of the License, or (at your option) any later version. |
| 10 | */ |
| 11 | |
David Woodhouse | 1269277a | 2006-04-24 23:22:17 +0100 | [diff] [blame] | 12 | /* Check of existence of legacy devices */ |
| 13 | extern int check_legacy_ioport(unsigned long base_port); |
Olaf Hering | 30cbc22 | 2006-09-30 23:27:57 -0700 | [diff] [blame] | 14 | #define PNPBIOS_BASE 0xf000 /* only relevant for PReP */ |
David Woodhouse | 1269277a | 2006-04-24 23:22:17 +0100 | [diff] [blame] | 15 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 16 | #include <linux/compiler.h> |
| 17 | #include <asm/page.h> |
| 18 | #include <asm/byteorder.h> |
Becky Bruce | feaf7cf | 2005-09-22 14:20:04 -0500 | [diff] [blame] | 19 | #include <asm/synch.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 20 | #include <asm/delay.h> |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 21 | #include <asm/mmu.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | |
| 23 | #include <asm-generic/iomap.h> |
| 24 | |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 25 | #ifdef CONFIG_PPC64 |
| 26 | #include <asm/paca.h> |
| 27 | #endif |
| 28 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | #define SIO_CONFIG_RA 0x398 |
| 30 | #define SIO_CONFIG_RD 0x399 |
| 31 | |
| 32 | #define SLOW_DOWN_IO |
| 33 | |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 34 | /* 32 bits uses slightly different variables for the various IO |
| 35 | * bases. Most of this file only uses _IO_BASE though which we |
| 36 | * define properly based on the platform |
| 37 | */ |
| 38 | #ifndef CONFIG_PCI |
| 39 | #define _IO_BASE 0 |
| 40 | #define _ISA_MEM_BASE 0 |
| 41 | #define PCI_DRAM_OFFSET 0 |
| 42 | #elif defined(CONFIG_PPC32) |
| 43 | #define _IO_BASE isa_io_base |
| 44 | #define _ISA_MEM_BASE isa_mem_base |
| 45 | #define PCI_DRAM_OFFSET pci_dram_offset |
| 46 | #else |
| 47 | #define _IO_BASE pci_io_base |
| 48 | #define _ISA_MEM_BASE 0 |
| 49 | #define PCI_DRAM_OFFSET 0 |
| 50 | #endif |
| 51 | |
| 52 | extern unsigned long isa_io_base; |
| 53 | extern unsigned long isa_mem_base; |
| 54 | extern unsigned long pci_io_base; |
| 55 | extern unsigned long pci_dram_offset; |
| 56 | |
| 57 | #if defined(CONFIG_PPC32) && defined(CONFIG_PPC_INDIRECT_IO) |
| 58 | #error CONFIG_PPC_INDIRECT_IO is not yet supported on 32 bits |
| 59 | #endif |
| 60 | |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 61 | /* |
| 62 | * |
| 63 | * Low level MMIO accessors |
| 64 | * |
| 65 | * This provides the non-bus specific accessors to MMIO. Those are PowerPC |
| 66 | * specific and thus shouldn't be used in generic code. The accessors |
| 67 | * provided here are: |
| 68 | * |
| 69 | * in_8, in_le16, in_be16, in_le32, in_be32, in_le64, in_be64 |
| 70 | * out_8, out_le16, out_be16, out_le32, out_be32, out_le64, out_be64 |
| 71 | * _insb, _insw_ns, _insl_ns, _outsb, _outsw_ns, _outsl_ns |
| 72 | * |
| 73 | * Those operate directly on a kernel virtual address. Note that the prototype |
| 74 | * for the out_* accessors has the arguments in opposite order from the usual |
| 75 | * linux PCI accessors. Unlike those, they take the address first and the value |
| 76 | * next. |
| 77 | * |
| 78 | * Note: I might drop the _ns suffix on the stream operations soon as it is |
| 79 | * simply normal for stream operations to not swap in the first place. |
| 80 | * |
| 81 | */ |
| 82 | |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 83 | #ifdef CONFIG_PPC64 |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 84 | #define IO_SET_SYNC_FLAG() do { get_paca()->io_sync = 1; } while(0) |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 85 | #else |
| 86 | #define IO_SET_SYNC_FLAG() |
| 87 | #endif |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 88 | |
| 89 | #define DEF_MMIO_IN(name, type, insn) \ |
| 90 | static inline type name(const volatile type __iomem *addr) \ |
| 91 | { \ |
| 92 | type ret; \ |
| 93 | __asm__ __volatile__("sync;" insn ";twi 0,%0,0;isync" \ |
| 94 | : "=r" (ret) : "r" (addr), "m" (*addr)); \ |
| 95 | return ret; \ |
| 96 | } |
| 97 | |
| 98 | #define DEF_MMIO_OUT(name, type, insn) \ |
| 99 | static inline void name(volatile type __iomem *addr, type val) \ |
| 100 | { \ |
| 101 | __asm__ __volatile__("sync;" insn \ |
| 102 | : "=m" (*addr) : "r" (val), "r" (addr)); \ |
| 103 | IO_SET_SYNC_FLAG(); \ |
| 104 | } |
| 105 | |
| 106 | |
| 107 | #define DEF_MMIO_IN_BE(name, size, insn) \ |
| 108 | DEF_MMIO_IN(name, u##size, __stringify(insn)"%U2%X2 %0,%2") |
| 109 | #define DEF_MMIO_IN_LE(name, size, insn) \ |
| 110 | DEF_MMIO_IN(name, u##size, __stringify(insn)" %0,0,%1") |
| 111 | |
| 112 | #define DEF_MMIO_OUT_BE(name, size, insn) \ |
| 113 | DEF_MMIO_OUT(name, u##size, __stringify(insn)"%U0%X0 %1,%0") |
| 114 | #define DEF_MMIO_OUT_LE(name, size, insn) \ |
| 115 | DEF_MMIO_OUT(name, u##size, __stringify(insn)" %1,0,%2") |
| 116 | |
| 117 | DEF_MMIO_IN_BE(in_8, 8, lbz); |
| 118 | DEF_MMIO_IN_BE(in_be16, 16, lhz); |
| 119 | DEF_MMIO_IN_BE(in_be32, 32, lwz); |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 120 | DEF_MMIO_IN_LE(in_le16, 16, lhbrx); |
| 121 | DEF_MMIO_IN_LE(in_le32, 32, lwbrx); |
| 122 | |
| 123 | DEF_MMIO_OUT_BE(out_8, 8, stb); |
| 124 | DEF_MMIO_OUT_BE(out_be16, 16, sth); |
| 125 | DEF_MMIO_OUT_BE(out_be32, 32, stw); |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 126 | DEF_MMIO_OUT_LE(out_le16, 16, sthbrx); |
| 127 | DEF_MMIO_OUT_LE(out_le32, 32, stwbrx); |
| 128 | |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 129 | #ifdef __powerpc64__ |
| 130 | DEF_MMIO_OUT_BE(out_be64, 64, std); |
| 131 | DEF_MMIO_IN_BE(in_be64, 64, ld); |
| 132 | |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 133 | /* There is no asm instructions for 64 bits reverse loads and stores */ |
| 134 | static inline u64 in_le64(const volatile u64 __iomem *addr) |
| 135 | { |
| 136 | return le64_to_cpu(in_be64(addr)); |
| 137 | } |
| 138 | |
| 139 | static inline void out_le64(volatile u64 __iomem *addr, u64 val) |
| 140 | { |
| 141 | out_be64(addr, cpu_to_le64(val)); |
| 142 | } |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 143 | #endif /* __powerpc64__ */ |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 144 | |
| 145 | /* |
| 146 | * Low level IO stream instructions are defined out of line for now |
| 147 | */ |
| 148 | extern void _insb(const volatile u8 __iomem *addr, void *buf, long count); |
| 149 | extern void _outsb(volatile u8 __iomem *addr,const void *buf,long count); |
| 150 | extern void _insw_ns(const volatile u16 __iomem *addr, void *buf, long count); |
| 151 | extern void _outsw_ns(volatile u16 __iomem *addr, const void *buf, long count); |
| 152 | extern void _insl_ns(const volatile u32 __iomem *addr, void *buf, long count); |
| 153 | extern void _outsl_ns(volatile u32 __iomem *addr, const void *buf, long count); |
| 154 | |
| 155 | /* The _ns naming is historical and will be removed. For now, just #define |
| 156 | * the non _ns equivalent names |
| 157 | */ |
| 158 | #define _insw _insw_ns |
| 159 | #define _insl _insl_ns |
| 160 | #define _outsw _outsw_ns |
| 161 | #define _outsl _outsl_ns |
| 162 | |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 163 | |
| 164 | /* |
| 165 | * memset_io, memcpy_toio, memcpy_fromio base implementations are out of line |
| 166 | */ |
| 167 | |
| 168 | extern void _memset_io(volatile void __iomem *addr, int c, unsigned long n); |
| 169 | extern void _memcpy_fromio(void *dest, const volatile void __iomem *src, |
| 170 | unsigned long n); |
| 171 | extern void _memcpy_toio(volatile void __iomem *dest, const void *src, |
| 172 | unsigned long n); |
| 173 | |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 174 | /* |
| 175 | * |
| 176 | * PCI and standard ISA accessors |
| 177 | * |
| 178 | * Those are globally defined linux accessors for devices on PCI or ISA |
| 179 | * busses. They follow the Linux defined semantics. The current implementation |
| 180 | * for PowerPC is as close as possible to the x86 version of these, and thus |
| 181 | * provides fairly heavy weight barriers for the non-raw versions |
| 182 | * |
| 183 | * In addition, they support a hook mechanism when CONFIG_PPC_INDIRECT_IO |
| 184 | * allowing the platform to provide its own implementation of some or all |
| 185 | * of the accessors. |
| 186 | */ |
| 187 | |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 188 | /* |
| 189 | * Include the EEH definitions when EEH is enabled only so they don't get |
| 190 | * in the way when building for 32 bits |
| 191 | */ |
| 192 | #ifdef CONFIG_EEH |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 193 | #include <asm/eeh.h> |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 194 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 195 | |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 196 | /* Shortcut to the MMIO argument pointer */ |
| 197 | #define PCI_IO_ADDR volatile void __iomem * |
Stephen Rothwell | caf8132 | 2006-09-21 18:00:00 +1000 | [diff] [blame] | 198 | |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 199 | /* Indirect IO address tokens: |
| 200 | * |
| 201 | * When CONFIG_PPC_INDIRECT_IO is set, the platform can provide hooks |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 202 | * on all IOs. (Note that this is all 64 bits only for now) |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 203 | * |
| 204 | * To help platforms who may need to differenciate MMIO addresses in |
| 205 | * their hooks, a bitfield is reserved for use by the platform near the |
| 206 | * top of MMIO addresses (not PIO, those have to cope the hard way). |
| 207 | * |
| 208 | * This bit field is 12 bits and is at the top of the IO virtual |
| 209 | * addresses PCI_IO_INDIRECT_TOKEN_MASK. |
| 210 | * |
| 211 | * The kernel virtual space is thus: |
| 212 | * |
| 213 | * 0xD000000000000000 : vmalloc |
| 214 | * 0xD000080000000000 : PCI PHB IO space |
| 215 | * 0xD000080080000000 : ioremap |
| 216 | * 0xD0000fffffffffff : end of ioremap region |
| 217 | * |
| 218 | * Since the top 4 bits are reserved as the region ID, we use thus |
| 219 | * the next 12 bits and keep 4 bits available for the future if the |
| 220 | * virtual address space is ever to be extended. |
| 221 | * |
| 222 | * The direct IO mapping operations will then mask off those bits |
| 223 | * before doing the actual access, though that only happen when |
| 224 | * CONFIG_PPC_INDIRECT_IO is set, thus be careful when you use that |
| 225 | * mechanism |
| 226 | */ |
| 227 | |
| 228 | #ifdef CONFIG_PPC_INDIRECT_IO |
| 229 | #define PCI_IO_IND_TOKEN_MASK 0x0fff000000000000ul |
| 230 | #define PCI_IO_IND_TOKEN_SHIFT 48 |
| 231 | #define PCI_FIX_ADDR(addr) \ |
| 232 | ((PCI_IO_ADDR)(((unsigned long)(addr)) & ~PCI_IO_IND_TOKEN_MASK)) |
| 233 | #define PCI_GET_ADDR_TOKEN(addr) \ |
| 234 | (((unsigned long)(addr) & PCI_IO_IND_TOKEN_MASK) >> \ |
| 235 | PCI_IO_IND_TOKEN_SHIFT) |
| 236 | #define PCI_SET_ADDR_TOKEN(addr, token) \ |
| 237 | do { \ |
| 238 | unsigned long __a = (unsigned long)(addr); \ |
| 239 | __a &= ~PCI_IO_IND_TOKEN_MASK; \ |
| 240 | __a |= ((unsigned long)(token)) << PCI_IO_IND_TOKEN_SHIFT; \ |
| 241 | (addr) = (void __iomem *)__a; \ |
| 242 | } while(0) |
| 243 | #else |
| 244 | #define PCI_FIX_ADDR(addr) (addr) |
| 245 | #endif |
| 246 | |
Benjamin Herrenschmidt | 757db1e | 2006-11-21 12:35:29 +1100 | [diff] [blame] | 247 | |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 248 | /* |
Benjamin Herrenschmidt | 757db1e | 2006-11-21 12:35:29 +1100 | [diff] [blame] | 249 | * Non ordered and non-swapping "raw" accessors |
| 250 | */ |
| 251 | |
| 252 | static inline unsigned char __raw_readb(const volatile void __iomem *addr) |
| 253 | { |
| 254 | return *(volatile unsigned char __force *)PCI_FIX_ADDR(addr); |
| 255 | } |
| 256 | static inline unsigned short __raw_readw(const volatile void __iomem *addr) |
| 257 | { |
| 258 | return *(volatile unsigned short __force *)PCI_FIX_ADDR(addr); |
| 259 | } |
| 260 | static inline unsigned int __raw_readl(const volatile void __iomem *addr) |
| 261 | { |
| 262 | return *(volatile unsigned int __force *)PCI_FIX_ADDR(addr); |
| 263 | } |
| 264 | static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr) |
| 265 | { |
| 266 | *(volatile unsigned char __force *)PCI_FIX_ADDR(addr) = v; |
| 267 | } |
| 268 | static inline void __raw_writew(unsigned short v, volatile void __iomem *addr) |
| 269 | { |
| 270 | *(volatile unsigned short __force *)PCI_FIX_ADDR(addr) = v; |
| 271 | } |
| 272 | static inline void __raw_writel(unsigned int v, volatile void __iomem *addr) |
| 273 | { |
| 274 | *(volatile unsigned int __force *)PCI_FIX_ADDR(addr) = v; |
| 275 | } |
| 276 | |
| 277 | #ifdef __powerpc64__ |
| 278 | static inline unsigned long __raw_readq(const volatile void __iomem *addr) |
| 279 | { |
| 280 | return *(volatile unsigned long __force *)PCI_FIX_ADDR(addr); |
| 281 | } |
| 282 | static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr) |
| 283 | { |
| 284 | *(volatile unsigned long __force *)PCI_FIX_ADDR(addr) = v; |
| 285 | } |
| 286 | #endif /* __powerpc64__ */ |
| 287 | |
| 288 | /* |
| 289 | * |
| 290 | * PCI PIO and MMIO accessors. |
| 291 | * |
| 292 | * |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 293 | * On 32 bits, PIO operations have a recovery mechanism in case they trigger |
| 294 | * machine checks (which they occasionally do when probing non existing |
| 295 | * IO ports on some platforms, like PowerMac and 8xx). |
| 296 | * I always found it to be of dubious reliability and I am tempted to get |
| 297 | * rid of it one of these days. So if you think it's important to keep it, |
| 298 | * please voice up asap. We never had it for 64 bits and I do not intend |
| 299 | * to port it over |
| 300 | */ |
| 301 | |
| 302 | #ifdef CONFIG_PPC32 |
| 303 | |
| 304 | #define __do_in_asm(name, op) \ |
Adrian Bunk | 4cfbdff | 2006-12-01 12:53:18 +0100 | [diff] [blame] | 305 | static inline unsigned int name(unsigned int port) \ |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 306 | { \ |
| 307 | unsigned int x; \ |
| 308 | __asm__ __volatile__( \ |
| 309 | "sync\n" \ |
| 310 | "0:" op " %0,0,%1\n" \ |
| 311 | "1: twi 0,%0,0\n" \ |
| 312 | "2: isync\n" \ |
| 313 | "3: nop\n" \ |
| 314 | "4:\n" \ |
| 315 | ".section .fixup,\"ax\"\n" \ |
| 316 | "5: li %0,-1\n" \ |
| 317 | " b 4b\n" \ |
| 318 | ".previous\n" \ |
| 319 | ".section __ex_table,\"a\"\n" \ |
| 320 | " .align 2\n" \ |
| 321 | " .long 0b,5b\n" \ |
| 322 | " .long 1b,5b\n" \ |
| 323 | " .long 2b,5b\n" \ |
| 324 | " .long 3b,5b\n" \ |
| 325 | ".previous" \ |
| 326 | : "=&r" (x) \ |
| 327 | : "r" (port + _IO_BASE)); \ |
| 328 | return x; \ |
| 329 | } |
| 330 | |
| 331 | #define __do_out_asm(name, op) \ |
Adrian Bunk | 4cfbdff | 2006-12-01 12:53:18 +0100 | [diff] [blame] | 332 | static inline void name(unsigned int val, unsigned int port) \ |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 333 | { \ |
| 334 | __asm__ __volatile__( \ |
| 335 | "sync\n" \ |
| 336 | "0:" op " %0,0,%1\n" \ |
| 337 | "1: sync\n" \ |
| 338 | "2:\n" \ |
| 339 | ".section __ex_table,\"a\"\n" \ |
| 340 | " .align 2\n" \ |
| 341 | " .long 0b,2b\n" \ |
| 342 | " .long 1b,2b\n" \ |
| 343 | ".previous" \ |
| 344 | : : "r" (val), "r" (port + _IO_BASE)); \ |
| 345 | } |
| 346 | |
| 347 | __do_in_asm(_rec_inb, "lbzx") |
| 348 | __do_in_asm(_rec_inw, "lhbrx") |
| 349 | __do_in_asm(_rec_inl, "lwbrx") |
| 350 | __do_out_asm(_rec_outb, "stbx") |
| 351 | __do_out_asm(_rec_outw, "sthbrx") |
| 352 | __do_out_asm(_rec_outl, "stwbrx") |
| 353 | |
| 354 | #endif /* CONFIG_PPC32 */ |
| 355 | |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 356 | /* The "__do_*" operations below provide the actual "base" implementation |
| 357 | * for each of the defined acccessor. Some of them use the out_* functions |
| 358 | * directly, some of them still use EEH, though we might change that in the |
| 359 | * future. Those macros below provide the necessary argument swapping and |
| 360 | * handling of the IO base for PIO. |
| 361 | * |
| 362 | * They are themselves used by the macros that define the actual accessors |
| 363 | * and can be used by the hooks if any. |
| 364 | * |
| 365 | * Note that PIO operations are always defined in terms of their corresonding |
| 366 | * MMIO operations. That allows platforms like iSeries who want to modify the |
| 367 | * behaviour of both to only hook on the MMIO version and get both. It's also |
| 368 | * possible to hook directly at the toplevel PIO operation if they have to |
| 369 | * be handled differently |
| 370 | */ |
| 371 | #define __do_writeb(val, addr) out_8(PCI_FIX_ADDR(addr), val) |
| 372 | #define __do_writew(val, addr) out_le16(PCI_FIX_ADDR(addr), val) |
| 373 | #define __do_writel(val, addr) out_le32(PCI_FIX_ADDR(addr), val) |
| 374 | #define __do_writeq(val, addr) out_le64(PCI_FIX_ADDR(addr), val) |
| 375 | #define __do_writew_be(val, addr) out_be16(PCI_FIX_ADDR(addr), val) |
| 376 | #define __do_writel_be(val, addr) out_be32(PCI_FIX_ADDR(addr), val) |
| 377 | #define __do_writeq_be(val, addr) out_be64(PCI_FIX_ADDR(addr), val) |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 378 | |
| 379 | #ifdef CONFIG_EEH |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 380 | #define __do_readb(addr) eeh_readb(PCI_FIX_ADDR(addr)) |
| 381 | #define __do_readw(addr) eeh_readw(PCI_FIX_ADDR(addr)) |
| 382 | #define __do_readl(addr) eeh_readl(PCI_FIX_ADDR(addr)) |
| 383 | #define __do_readq(addr) eeh_readq(PCI_FIX_ADDR(addr)) |
| 384 | #define __do_readw_be(addr) eeh_readw_be(PCI_FIX_ADDR(addr)) |
| 385 | #define __do_readl_be(addr) eeh_readl_be(PCI_FIX_ADDR(addr)) |
| 386 | #define __do_readq_be(addr) eeh_readq_be(PCI_FIX_ADDR(addr)) |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 387 | #else /* CONFIG_EEH */ |
| 388 | #define __do_readb(addr) in_8(PCI_FIX_ADDR(addr)) |
| 389 | #define __do_readw(addr) in_le16(PCI_FIX_ADDR(addr)) |
| 390 | #define __do_readl(addr) in_le32(PCI_FIX_ADDR(addr)) |
| 391 | #define __do_readq(addr) in_le64(PCI_FIX_ADDR(addr)) |
| 392 | #define __do_readw_be(addr) in_be16(PCI_FIX_ADDR(addr)) |
| 393 | #define __do_readl_be(addr) in_be32(PCI_FIX_ADDR(addr)) |
| 394 | #define __do_readq_be(addr) in_be64(PCI_FIX_ADDR(addr)) |
| 395 | #endif /* !defined(CONFIG_EEH) */ |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 396 | |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 397 | #ifdef CONFIG_PPC32 |
| 398 | #define __do_outb(val, port) _rec_outb(val, port) |
| 399 | #define __do_outw(val, port) _rec_outw(val, port) |
| 400 | #define __do_outl(val, port) _rec_outl(val, port) |
| 401 | #define __do_inb(port) _rec_inb(port) |
| 402 | #define __do_inw(port) _rec_inw(port) |
| 403 | #define __do_inl(port) _rec_inl(port) |
| 404 | #else /* CONFIG_PPC32 */ |
| 405 | #define __do_outb(val, port) writeb(val,(PCI_IO_ADDR)_IO_BASE+port); |
| 406 | #define __do_outw(val, port) writew(val,(PCI_IO_ADDR)_IO_BASE+port); |
| 407 | #define __do_outl(val, port) writel(val,(PCI_IO_ADDR)_IO_BASE+port); |
| 408 | #define __do_inb(port) readb((PCI_IO_ADDR)_IO_BASE + port); |
| 409 | #define __do_inw(port) readw((PCI_IO_ADDR)_IO_BASE + port); |
| 410 | #define __do_inl(port) readl((PCI_IO_ADDR)_IO_BASE + port); |
| 411 | #endif /* !CONFIG_PPC32 */ |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 412 | |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 413 | #ifdef CONFIG_EEH |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 414 | #define __do_readsb(a, b, n) eeh_readsb(PCI_FIX_ADDR(a), (b), (n)) |
| 415 | #define __do_readsw(a, b, n) eeh_readsw(PCI_FIX_ADDR(a), (b), (n)) |
| 416 | #define __do_readsl(a, b, n) eeh_readsl(PCI_FIX_ADDR(a), (b), (n)) |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 417 | #else /* CONFIG_EEH */ |
| 418 | #define __do_readsb(a, b, n) _insb(PCI_FIX_ADDR(a), (b), (n)) |
| 419 | #define __do_readsw(a, b, n) _insw(PCI_FIX_ADDR(a), (b), (n)) |
| 420 | #define __do_readsl(a, b, n) _insl(PCI_FIX_ADDR(a), (b), (n)) |
| 421 | #endif /* !CONFIG_EEH */ |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 422 | #define __do_writesb(a, b, n) _outsb(PCI_FIX_ADDR(a),(b),(n)) |
| 423 | #define __do_writesw(a, b, n) _outsw(PCI_FIX_ADDR(a),(b),(n)) |
| 424 | #define __do_writesl(a, b, n) _outsl(PCI_FIX_ADDR(a),(b),(n)) |
| 425 | |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 426 | #define __do_insb(p, b, n) readsb((PCI_IO_ADDR)_IO_BASE+(p), (b), (n)) |
| 427 | #define __do_insw(p, b, n) readsw((PCI_IO_ADDR)_IO_BASE+(p), (b), (n)) |
| 428 | #define __do_insl(p, b, n) readsl((PCI_IO_ADDR)_IO_BASE+(p), (b), (n)) |
| 429 | #define __do_outsb(p, b, n) writesb((PCI_IO_ADDR)_IO_BASE+(p),(b),(n)) |
| 430 | #define __do_outsw(p, b, n) writesw((PCI_IO_ADDR)_IO_BASE+(p),(b),(n)) |
| 431 | #define __do_outsl(p, b, n) writesl((PCI_IO_ADDR)_IO_BASE+(p),(b),(n)) |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 432 | |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 433 | #define __do_memset_io(addr, c, n) \ |
| 434 | _memset_io(PCI_FIX_ADDR(addr), c, n) |
| 435 | #define __do_memcpy_toio(dst, src, n) \ |
| 436 | _memcpy_toio(PCI_FIX_ADDR(dst), src, n) |
| 437 | |
| 438 | #ifdef CONFIG_EEH |
| 439 | #define __do_memcpy_fromio(dst, src, n) \ |
| 440 | eeh_memcpy_fromio(dst, PCI_FIX_ADDR(src), n) |
| 441 | #else /* CONFIG_EEH */ |
| 442 | #define __do_memcpy_fromio(dst, src, n) \ |
| 443 | _memcpy_fromio(dst,PCI_FIX_ADDR(src),n) |
| 444 | #endif /* !CONFIG_EEH */ |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 445 | |
| 446 | #ifdef CONFIG_PPC_INDIRECT_IO |
| 447 | #define DEF_PCI_HOOK(x) x |
| 448 | #else |
| 449 | #define DEF_PCI_HOOK(x) NULL |
| 450 | #endif |
| 451 | |
| 452 | /* Structure containing all the hooks */ |
| 453 | extern struct ppc_pci_io { |
| 454 | |
| 455 | #define DEF_PCI_AC_RET(name, ret, at, al) ret (*name) at; |
| 456 | #define DEF_PCI_AC_NORET(name, at, al) void (*name) at; |
| 457 | |
| 458 | #include <asm/io-defs.h> |
| 459 | |
| 460 | #undef DEF_PCI_AC_RET |
| 461 | #undef DEF_PCI_AC_NORET |
| 462 | |
| 463 | } ppc_pci_io; |
| 464 | |
| 465 | /* The inline wrappers */ |
| 466 | #define DEF_PCI_AC_RET(name, ret, at, al) \ |
| 467 | static inline ret name at \ |
| 468 | { \ |
| 469 | if (DEF_PCI_HOOK(ppc_pci_io.name) != NULL) \ |
| 470 | return ppc_pci_io.name al; \ |
| 471 | return __do_##name al; \ |
| 472 | } |
| 473 | |
| 474 | #define DEF_PCI_AC_NORET(name, at, al) \ |
| 475 | static inline void name at \ |
| 476 | { \ |
| 477 | if (DEF_PCI_HOOK(ppc_pci_io.name) != NULL) \ |
| 478 | ppc_pci_io.name al; \ |
| 479 | else \ |
| 480 | __do_##name al; \ |
| 481 | } |
| 482 | |
| 483 | #include <asm/io-defs.h> |
| 484 | |
| 485 | #undef DEF_PCI_AC_RET |
| 486 | #undef DEF_PCI_AC_NORET |
| 487 | |
| 488 | /* Some drivers check for the presence of readq & writeq with |
| 489 | * a #ifdef, so we make them happy here. |
| 490 | */ |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 491 | #ifdef __powerpc64__ |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 492 | #define readq readq |
| 493 | #define writeq writeq |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 494 | #endif |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 495 | |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 496 | #ifdef CONFIG_NOT_COHERENT_CACHE |
| 497 | |
| 498 | #define dma_cache_inv(_start,_size) \ |
| 499 | invalidate_dcache_range(_start, (_start + _size)) |
| 500 | #define dma_cache_wback(_start,_size) \ |
| 501 | clean_dcache_range(_start, (_start + _size)) |
| 502 | #define dma_cache_wback_inv(_start,_size) \ |
| 503 | flush_dcache_range(_start, (_start + _size)) |
| 504 | |
| 505 | #else /* CONFIG_NOT_COHERENT_CACHE */ |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 506 | |
| 507 | #define dma_cache_inv(_start,_size) do { } while (0) |
| 508 | #define dma_cache_wback(_start,_size) do { } while (0) |
| 509 | #define dma_cache_wback_inv(_start,_size) do { } while (0) |
| 510 | |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 511 | #endif /* !CONFIG_NOT_COHERENT_CACHE */ |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 512 | |
| 513 | /* |
| 514 | * Convert a physical pointer to a virtual kernel pointer for /dev/mem |
| 515 | * access |
| 516 | */ |
| 517 | #define xlate_dev_mem_ptr(p) __va(p) |
| 518 | |
| 519 | /* |
| 520 | * Convert a virtual cached pointer to an uncached pointer |
| 521 | */ |
| 522 | #define xlate_dev_kmem_ptr(p) p |
| 523 | |
| 524 | /* |
| 525 | * We don't do relaxed operations yet, at least not with this semantic |
| 526 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 527 | #define readb_relaxed(addr) readb(addr) |
| 528 | #define readw_relaxed(addr) readw(addr) |
| 529 | #define readl_relaxed(addr) readl(addr) |
| 530 | #define readq_relaxed(addr) readq(addr) |
| 531 | |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 532 | #ifdef CONFIG_PPC32 |
| 533 | #define mmiowb() |
| 534 | #else |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 535 | /* |
| 536 | * Enforce synchronisation of stores vs. spin_unlock |
| 537 | * (this does it explicitely, though our implementation of spin_unlock |
| 538 | * does it implicitely too) |
| 539 | */ |
Paul Mackerras | f007cac | 2006-09-13 22:08:26 +1000 | [diff] [blame] | 540 | static inline void mmiowb(void) |
| 541 | { |
Hugh Dickins | 292f86f | 2006-10-31 18:41:51 +0000 | [diff] [blame] | 542 | unsigned long tmp; |
| 543 | |
| 544 | __asm__ __volatile__("sync; li %0,0; stb %0,%1(13)" |
| 545 | : "=&r" (tmp) : "i" (offsetof(struct paca_struct, io_sync)) |
| 546 | : "memory"); |
Paul Mackerras | f007cac | 2006-09-13 22:08:26 +1000 | [diff] [blame] | 547 | } |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 548 | #endif /* !CONFIG_PPC32 */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 549 | |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 550 | static inline void iosync(void) |
| 551 | { |
| 552 | __asm__ __volatile__ ("sync" : : : "memory"); |
| 553 | } |
| 554 | |
| 555 | /* Enforce in-order execution of data I/O. |
| 556 | * No distinction between read/write on PPC; use eieio for all three. |
| 557 | * Those are fairly week though. They don't provide a barrier between |
| 558 | * MMIO and cacheable storage nor do they provide a barrier vs. locks, |
| 559 | * they only provide barriers between 2 __raw MMIO operations and |
| 560 | * possibly break write combining. |
| 561 | */ |
| 562 | #define iobarrier_rw() eieio() |
| 563 | #define iobarrier_r() eieio() |
| 564 | #define iobarrier_w() eieio() |
| 565 | |
| 566 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 567 | /* |
| 568 | * output pause versions need a delay at least for the |
| 569 | * w83c105 ide controller in a p610. |
| 570 | */ |
| 571 | #define inb_p(port) inb(port) |
| 572 | #define outb_p(val, port) (udelay(1), outb((val), (port))) |
| 573 | #define inw_p(port) inw(port) |
| 574 | #define outw_p(val, port) (udelay(1), outw((val), (port))) |
| 575 | #define inl_p(port) inl(port) |
| 576 | #define outl_p(val, port) (udelay(1), outl((val), (port))) |
| 577 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 578 | |
| 579 | #define IO_SPACE_LIMIT ~(0UL) |
| 580 | |
| 581 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 582 | /** |
| 583 | * ioremap - map bus memory into CPU space |
| 584 | * @address: bus address of the memory |
| 585 | * @size: size of the resource to map |
| 586 | * |
| 587 | * ioremap performs a platform specific sequence of operations to |
| 588 | * make bus memory CPU accessible via the readb/readw/readl/writeb/ |
| 589 | * writew/writel functions and the other mmio helpers. The returned |
| 590 | * address is not guaranteed to be usable directly as a virtual |
| 591 | * address. |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 592 | * |
| 593 | * We provide a few variations of it: |
| 594 | * |
| 595 | * * ioremap is the standard one and provides non-cacheable guarded mappings |
| 596 | * and can be hooked by the platform via ppc_md |
| 597 | * |
| 598 | * * ioremap_flags allows to specify the page flags as an argument and can |
| 599 | * also be hooked by the platform via ppc_md |
| 600 | * |
| 601 | * * ioremap_nocache is identical to ioremap |
| 602 | * |
| 603 | * * iounmap undoes such a mapping and can be hooked |
| 604 | * |
| 605 | * * __ioremap_explicit (and the pending __iounmap_explicit) are low level |
| 606 | * functions to create hand-made mappings for use only by the PCI code |
| 607 | * and cannot currently be hooked. |
| 608 | * |
| 609 | * * __ioremap is the low level implementation used by ioremap and |
| 610 | * ioremap_flags and cannot be hooked (but can be used by a hook on one |
| 611 | * of the previous ones) |
| 612 | * |
| 613 | * * __iounmap, is the low level implementation used by iounmap and cannot |
| 614 | * be hooked (but can be used by a hook on iounmap) |
| 615 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 616 | */ |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 617 | extern void __iomem *ioremap(phys_addr_t address, unsigned long size); |
| 618 | extern void __iomem *ioremap_flags(phys_addr_t address, unsigned long size, |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 619 | unsigned long flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 620 | #define ioremap_nocache(addr, size) ioremap((addr), (size)) |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 621 | extern void iounmap(volatile void __iomem *addr); |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 622 | |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 623 | extern void __iomem *__ioremap(phys_addr_t, unsigned long size, |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 624 | unsigned long flags); |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 625 | extern void __iounmap(volatile void __iomem *addr); |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 626 | |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 627 | extern int __ioremap_explicit(phys_addr_t p_addr, unsigned long v_addr, |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 628 | unsigned long size, unsigned long flags); |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 629 | extern int __iounmap_explicit(volatile void __iomem *start, |
| 630 | unsigned long size); |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 631 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 632 | extern void __iomem * reserve_phb_iospace(unsigned long size); |
| 633 | |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 634 | /* Those are more 32 bits only functions */ |
| 635 | extern unsigned long iopa(unsigned long addr); |
| 636 | extern unsigned long mm_ptov(unsigned long addr) __attribute_const__; |
| 637 | extern void io_block_mapping(unsigned long virt, phys_addr_t phys, |
| 638 | unsigned int size, int flags); |
| 639 | |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 640 | |
| 641 | /* |
| 642 | * When CONFIG_PPC_INDIRECT_IO is set, we use the generic iomap implementation |
| 643 | * which needs some additional definitions here. They basically allow PIO |
| 644 | * space overall to be 1GB. This will work as long as we never try to use |
| 645 | * iomap to map MMIO below 1GB which should be fine on ppc64 |
| 646 | */ |
| 647 | #define HAVE_ARCH_PIO_SIZE 1 |
| 648 | #define PIO_OFFSET 0x00000000UL |
| 649 | #define PIO_MASK 0x3fffffffUL |
| 650 | #define PIO_RESERVED 0x40000000UL |
| 651 | |
| 652 | #define mmio_read16be(addr) readw_be(addr) |
| 653 | #define mmio_read32be(addr) readl_be(addr) |
| 654 | #define mmio_write16be(val, addr) writew_be(val, addr) |
| 655 | #define mmio_write32be(val, addr) writel_be(val, addr) |
| 656 | #define mmio_insb(addr, dst, count) readsb(addr, dst, count) |
| 657 | #define mmio_insw(addr, dst, count) readsw(addr, dst, count) |
| 658 | #define mmio_insl(addr, dst, count) readsl(addr, dst, count) |
| 659 | #define mmio_outsb(addr, src, count) writesb(addr, src, count) |
| 660 | #define mmio_outsw(addr, src, count) writesw(addr, src, count) |
| 661 | #define mmio_outsl(addr, src, count) writesl(addr, src, count) |
| 662 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 663 | /** |
| 664 | * virt_to_phys - map virtual addresses to physical |
| 665 | * @address: address to remap |
| 666 | * |
| 667 | * The returned physical address is the physical (CPU) mapping for |
| 668 | * the memory address given. It is only valid to use this function on |
| 669 | * addresses directly mapped or allocated via kmalloc. |
| 670 | * |
| 671 | * This function does not give bus mappings for DMA transfers. In |
| 672 | * almost all conceivable cases a device driver should not be using |
| 673 | * this function |
| 674 | */ |
| 675 | static inline unsigned long virt_to_phys(volatile void * address) |
| 676 | { |
| 677 | return __pa((unsigned long)address); |
| 678 | } |
| 679 | |
| 680 | /** |
| 681 | * phys_to_virt - map physical address to virtual |
| 682 | * @address: address to remap |
| 683 | * |
| 684 | * The returned virtual address is a current CPU mapping for |
| 685 | * the memory address given. It is only valid to use this function on |
| 686 | * addresses that have a kernel mapping |
| 687 | * |
| 688 | * This function does not handle bus mappings for DMA transfers. In |
| 689 | * almost all conceivable cases a device driver should not be using |
| 690 | * this function |
| 691 | */ |
| 692 | static inline void * phys_to_virt(unsigned long address) |
| 693 | { |
| 694 | return (void *)__va(address); |
| 695 | } |
| 696 | |
| 697 | /* |
| 698 | * Change "struct page" to physical address. |
| 699 | */ |
| 700 | #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) |
| 701 | |
| 702 | /* We do NOT want virtual merging, it would put too much pressure on |
| 703 | * our iommu allocator. Instead, we want drivers to be smart enough |
| 704 | * to coalesce sglists that happen to have been mapped in a contiguous |
| 705 | * way by the iommu |
| 706 | */ |
| 707 | #define BIO_VMERGE_BOUNDARY 0 |
| 708 | |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 709 | /* |
| 710 | * 32 bits still uses virt_to_bus() for it's implementation of DMA |
| 711 | * mappings se we have to keep it defined here. We also have some old |
| 712 | * drivers (shame shame shame) that use bus_to_virt() and haven't been |
| 713 | * fixed yet so I need to define it here. |
| 714 | */ |
| 715 | #ifdef CONFIG_PPC32 |
| 716 | |
| 717 | static inline unsigned long virt_to_bus(volatile void * address) |
| 718 | { |
| 719 | if (address == NULL) |
| 720 | return 0; |
| 721 | return __pa(address) + PCI_DRAM_OFFSET; |
| 722 | } |
| 723 | |
| 724 | static inline void * bus_to_virt(unsigned long address) |
| 725 | { |
| 726 | if (address == 0) |
| 727 | return NULL; |
| 728 | return __va(address - PCI_DRAM_OFFSET); |
| 729 | } |
| 730 | |
| 731 | #define page_to_bus(page) (page_to_phys(page) + PCI_DRAM_OFFSET) |
| 732 | |
| 733 | #endif /* CONFIG_PPC32 */ |
| 734 | |
| 735 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 736 | #endif /* __KERNEL__ */ |
| 737 | |
Paul Mackerras | 047ea78 | 2005-11-19 20:17:32 +1100 | [diff] [blame] | 738 | #endif /* _ASM_POWERPC_IO_H */ |