blob: 82d615fe2947e143e600f6b425d9f674a2fef9ed [file] [log] [blame]
Peter Ujfalusif9f8c042012-09-14 17:30:27 +03001/*
2* TWL6040 clock module driver for OMAP4 McPDM functional clock
3*
4* Copyright (C) 2012 Texas Instruments Inc.
5* Peter Ujfalusi <peter.ujfalusi@ti.com>
6*
7* This program is free software; you can redistribute it and/or
8* modify it under the terms of the GNU General Public License
9* version 2 as published by the Free Software Foundation.
10*
11* This program is distributed in the hope that it will be useful, but
12* WITHOUT ANY WARRANTY; without even the implied warranty of
13* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14* General Public License for more details.
15*
16* You should have received a copy of the GNU General Public License
17* along with this program; if not, write to the Free Software
18* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
19* 02110-1301 USA
20*
21*/
22
Peter Ujfalusif9f8c042012-09-14 17:30:27 +030023#include <linux/module.h>
24#include <linux/slab.h>
25#include <linux/platform_device.h>
26#include <linux/mfd/twl6040.h>
27#include <linux/clk-provider.h>
28
Peter Ujfalusi7e37deb2016-05-30 11:55:11 +030029struct twl6040_pdmclk {
Peter Ujfalusif9f8c042012-09-14 17:30:27 +030030 struct twl6040 *twl6040;
31 struct device *dev;
Peter Ujfalusi7e37deb2016-05-30 11:55:11 +030032 struct clk_hw pdmclk_hw;
Peter Ujfalusif9f8c042012-09-14 17:30:27 +030033 int enabled;
34};
35
Peter Ujfalusi7e37deb2016-05-30 11:55:11 +030036static int twl6040_pdmclk_is_prepared(struct clk_hw *hw)
Peter Ujfalusif9f8c042012-09-14 17:30:27 +030037{
Peter Ujfalusi7e37deb2016-05-30 11:55:11 +030038 struct twl6040_pdmclk *pdmclk = container_of(hw, struct twl6040_pdmclk,
39 pdmclk_hw);
40
41 return pdmclk->enabled;
Peter Ujfalusif9f8c042012-09-14 17:30:27 +030042}
43
Tony Lindgren51e197b2019-02-11 14:59:07 -080044static int twl6040_pdmclk_reset_one_clock(struct twl6040_pdmclk *pdmclk,
45 unsigned int reg)
46{
47 const u8 reset_mask = TWL6040_HPLLRST; /* Same for HPPLL and LPPLL */
48 int ret;
49
50 ret = twl6040_set_bits(pdmclk->twl6040, reg, reset_mask);
51 if (ret < 0)
52 return ret;
53
54 ret = twl6040_clear_bits(pdmclk->twl6040, reg, reset_mask);
55 if (ret < 0)
56 return ret;
57
58 return 0;
59}
60
61/*
62 * TWL6040A2 Phoenix Audio IC erratum #6: "PDM Clock Generation Issue At
63 * Cold Temperature". This affects cold boot and deeper idle states it
64 * seems. The workaround consists of resetting HPPLL and LPPLL.
65 */
66static int twl6040_pdmclk_quirk_reset_clocks(struct twl6040_pdmclk *pdmclk)
67{
68 int ret;
69
70 ret = twl6040_pdmclk_reset_one_clock(pdmclk, TWL6040_REG_HPPLLCTL);
71 if (ret)
72 return ret;
73
74 ret = twl6040_pdmclk_reset_one_clock(pdmclk, TWL6040_REG_LPPLLCTL);
75 if (ret)
76 return ret;
77
78 return 0;
79}
80
Peter Ujfalusi7e37deb2016-05-30 11:55:11 +030081static int twl6040_pdmclk_prepare(struct clk_hw *hw)
Peter Ujfalusif9f8c042012-09-14 17:30:27 +030082{
Peter Ujfalusi7e37deb2016-05-30 11:55:11 +030083 struct twl6040_pdmclk *pdmclk = container_of(hw, struct twl6040_pdmclk,
84 pdmclk_hw);
Peter Ujfalusif9f8c042012-09-14 17:30:27 +030085 int ret;
86
Peter Ujfalusi7e37deb2016-05-30 11:55:11 +030087 ret = twl6040_power(pdmclk->twl6040, 1);
Tony Lindgren51e197b2019-02-11 14:59:07 -080088 if (ret)
89 return ret;
90
91 ret = twl6040_pdmclk_quirk_reset_clocks(pdmclk);
92 if (ret)
93 goto out_err;
94
95 pdmclk->enabled = 1;
96
97 return 0;
98
99out_err:
100 dev_err(pdmclk->dev, "%s: error %i\n", __func__, ret);
101 twl6040_power(pdmclk->twl6040, 0);
Peter Ujfalusif9f8c042012-09-14 17:30:27 +0300102
103 return ret;
104}
105
Peter Ujfalusi7e37deb2016-05-30 11:55:11 +0300106static void twl6040_pdmclk_unprepare(struct clk_hw *hw)
Peter Ujfalusif9f8c042012-09-14 17:30:27 +0300107{
Peter Ujfalusi7e37deb2016-05-30 11:55:11 +0300108 struct twl6040_pdmclk *pdmclk = container_of(hw, struct twl6040_pdmclk,
109 pdmclk_hw);
Peter Ujfalusif9f8c042012-09-14 17:30:27 +0300110 int ret;
111
Peter Ujfalusi7e37deb2016-05-30 11:55:11 +0300112 ret = twl6040_power(pdmclk->twl6040, 0);
Peter Ujfalusif9f8c042012-09-14 17:30:27 +0300113 if (!ret)
Peter Ujfalusi7e37deb2016-05-30 11:55:11 +0300114 pdmclk->enabled = 0;
115
Peter Ujfalusif9f8c042012-09-14 17:30:27 +0300116}
117
Peter Ujfalusi7e37deb2016-05-30 11:55:11 +0300118static unsigned long twl6040_pdmclk_recalc_rate(struct clk_hw *hw,
119 unsigned long parent_rate)
120{
121 struct twl6040_pdmclk *pdmclk = container_of(hw, struct twl6040_pdmclk,
122 pdmclk_hw);
123
124 return twl6040_get_sysclk(pdmclk->twl6040);
125}
126
127static const struct clk_ops twl6040_pdmclk_ops = {
128 .is_prepared = twl6040_pdmclk_is_prepared,
129 .prepare = twl6040_pdmclk_prepare,
130 .unprepare = twl6040_pdmclk_unprepare,
131 .recalc_rate = twl6040_pdmclk_recalc_rate,
Peter Ujfalusif9f8c042012-09-14 17:30:27 +0300132};
133
Peter Ujfalusi7e37deb2016-05-30 11:55:11 +0300134static struct clk_init_data twl6040_pdmclk_init = {
135 .name = "pdmclk",
136 .ops = &twl6040_pdmclk_ops,
137 .flags = CLK_GET_RATE_NOCACHE,
Peter Ujfalusif9f8c042012-09-14 17:30:27 +0300138};
139
Peter Ujfalusi7e37deb2016-05-30 11:55:11 +0300140static int twl6040_pdmclk_probe(struct platform_device *pdev)
Peter Ujfalusif9f8c042012-09-14 17:30:27 +0300141{
142 struct twl6040 *twl6040 = dev_get_drvdata(pdev->dev.parent);
Peter Ujfalusi7e37deb2016-05-30 11:55:11 +0300143 struct twl6040_pdmclk *clkdata;
Stephen Boydf5b37152016-06-01 16:15:30 -0700144 int ret;
Peter Ujfalusif9f8c042012-09-14 17:30:27 +0300145
146 clkdata = devm_kzalloc(&pdev->dev, sizeof(*clkdata), GFP_KERNEL);
147 if (!clkdata)
148 return -ENOMEM;
149
150 clkdata->dev = &pdev->dev;
151 clkdata->twl6040 = twl6040;
152
Peter Ujfalusi7e37deb2016-05-30 11:55:11 +0300153 clkdata->pdmclk_hw.init = &twl6040_pdmclk_init;
Stephen Boydf5b37152016-06-01 16:15:30 -0700154 ret = devm_clk_hw_register(&pdev->dev, &clkdata->pdmclk_hw);
155 if (ret)
156 return ret;
Peter Ujfalusif9f8c042012-09-14 17:30:27 +0300157
Jingoo Hanc0431032013-05-24 10:11:46 +0900158 platform_set_drvdata(pdev, clkdata);
Peter Ujfalusif9f8c042012-09-14 17:30:27 +0300159
Stephen Boydf5b37152016-06-01 16:15:30 -0700160 return of_clk_add_hw_provider(pdev->dev.parent->of_node,
161 of_clk_hw_simple_get,
162 &clkdata->pdmclk_hw);
Peter Ujfalusif9f8c042012-09-14 17:30:27 +0300163}
164
Peter Ujfalusi7e37deb2016-05-30 11:55:11 +0300165static struct platform_driver twl6040_pdmclk_driver = {
Peter Ujfalusif9f8c042012-09-14 17:30:27 +0300166 .driver = {
Peter Ujfalusi7e37deb2016-05-30 11:55:11 +0300167 .name = "twl6040-pdmclk",
Peter Ujfalusif9f8c042012-09-14 17:30:27 +0300168 },
Peter Ujfalusi7e37deb2016-05-30 11:55:11 +0300169 .probe = twl6040_pdmclk_probe,
Peter Ujfalusif9f8c042012-09-14 17:30:27 +0300170};
171
Peter Ujfalusi7e37deb2016-05-30 11:55:11 +0300172module_platform_driver(twl6040_pdmclk_driver);
Peter Ujfalusif9f8c042012-09-14 17:30:27 +0300173
174MODULE_DESCRIPTION("TWL6040 clock driver for McPDM functional clock");
175MODULE_AUTHOR("Peter Ujfalusi <peter.ujfalusi@ti.com>");
Peter Ujfalusi7e37deb2016-05-30 11:55:11 +0300176MODULE_ALIAS("platform:twl6040-pdmclk");
Peter Ujfalusif9f8c042012-09-14 17:30:27 +0300177MODULE_LICENSE("GPL");