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Mathieu Poirier32887312015-03-30 14:13:36 -06001#
2# Coresight configuration
3#
4menuconfig CORESIGHT
5 bool "CoreSight Tracing Support"
6 select ARM_AMBA
Mathieu Poirier882d5e12016-02-17 17:51:57 -07007 select PERF_EVENTS
Mathieu Poirier32887312015-03-30 14:13:36 -06008 help
9 This framework provides a kernel interface for the CoreSight debug
10 and trace drivers to register themselves with. It's intended to build
11 a topological view of the CoreSight components based on a DT
Andrew F. Davisb9884d32015-12-17 08:47:02 -070012 specification and configure the right series of components when a
Mathieu Poirier32887312015-03-30 14:13:36 -060013 trace source gets enabled.
14
15if CORESIGHT
16config CORESIGHT_LINKS_AND_SINKS
17 bool "CoreSight Link and Sink drivers"
18 help
19 This enables support for CoreSight link and sink drivers that are
20 responsible for transporting and collecting the trace data
21 respectively. Link and sinks are dynamically aggregated with a trace
22 entity at run time to form a complete trace path.
23
24config CORESIGHT_LINK_AND_SINK_TMC
25 bool "Coresight generic TMC driver"
26 depends on CORESIGHT_LINKS_AND_SINKS
Satyajit Desaie8c98232016-11-01 12:01:19 -070027 select CORESIGHT_CSR
Mathieu Poirier32887312015-03-30 14:13:36 -060028 help
29 This enables support for the Trace Memory Controller driver.
30 Depending on its configuration the device can act as a link (embedded
31 trace router - ETR) or sink (embedded trace FIFO). The driver
32 complies with the generic implementation of the component without
33 special enhancement or added features.
34
35config CORESIGHT_SINK_TPIU
36 bool "Coresight generic TPIU driver"
37 depends on CORESIGHT_LINKS_AND_SINKS
38 help
39 This enables support for the Trace Port Interface Unit driver,
40 responsible for bridging the gap between the on-chip coresight
41 components and a trace for bridging the gap between the on-chip
42 coresight components and a trace port collection engine, typically
43 connected to an external host for use case capturing more traces than
44 the on-board coresight memory can handle.
45
46config CORESIGHT_SINK_ETBV10
47 bool "Coresight ETBv1.0 driver"
48 depends on CORESIGHT_LINKS_AND_SINKS
49 help
50 This enables support for the Embedded Trace Buffer version 1.0 driver
51 that complies with the generic implementation of the component without
52 special enhancement or added features.
53
54config CORESIGHT_SOURCE_ETM3X
55 bool "CoreSight Embedded Trace Macrocell 3.x driver"
56 depends on !ARM64
57 select CORESIGHT_LINKS_AND_SINKS
58 help
59 This driver provides support for processor ETM3.x and PTM1.x modules,
60 which allows tracing the instructions that a processor is executing
61 This is primarily useful for instruction level tracing. Depending
62 the ETM version data tracing may also be available.
Pratik Patel2e1cdfe2015-05-13 10:34:09 -060063
64config CORESIGHT_SOURCE_ETM4X
65 bool "CoreSight Embedded Trace Macrocell 4.x driver"
66 depends on ARM64
67 select CORESIGHT_LINKS_AND_SINKS
68 help
69 This driver provides support for the ETM4.x tracer module, tracing the
70 instructions that a processor is executing. This is primarily useful
71 for instruction level tracing. Depending on the implemented version
72 data tracing may also be available.
73
Pratik Patel620cf782015-05-19 10:55:21 -060074config CORESIGHT_QCOM_REPLICATOR
75 bool "Qualcomm CoreSight Replicator driver"
76 depends on CORESIGHT_LINKS_AND_SINKS
77 help
78 This enables support for Qualcomm CoreSight link driver. The
79 programmable ATB replicator sends the ATB trace stream from the
80 ETB/ETF to the TPIUi and ETR.
81
Pratik Patel237483a2016-05-03 11:33:40 -060082config CORESIGHT_STM
83 bool "CoreSight System Trace Macrocell driver"
84 depends on (ARM && !(CPU_32v3 || CPU_32v4 || CPU_32v4T)) || ARM64
85 select CORESIGHT_LINKS_AND_SINKS
86 select STM
Satyajit Desaie30e3c52016-08-22 11:22:51 -070087 select CORESIGHT_OST
Pratik Patel237483a2016-05-03 11:33:40 -060088 help
89 This driver provides support for hardware assisted software
90 instrumentation based tracing. This is primarily used for
91 logging useful software events or data coming from various entities
92 in the system, possibly running different OSs
93
Satyajit Desaie30e3c52016-08-22 11:22:51 -070094config CORESIGHT_OST
95 bool "CoreSight OST framework"
Satyajit Desaie2f6c542016-10-03 17:38:40 -070096 depends on CORESIGHT_STM
Satyajit Desaie30e3c52016-08-22 11:22:51 -070097 help
98 This enables support for OST packet in STM.
Satyajit Desaif151d682016-09-12 16:18:03 -070099
100config CORESIGHT_TPDA
101 bool "CoreSight Trace, Profiling & Diagnostics Aggregator driver"
102 help
103 This driver provides support for configuring aggregator. This is
104 primarily useful for pulling the data sets from one or more
105 attached monitors and pushing the resultant data out. Multiple
106 monitors are connected on different input ports of TPDA.
107
108config CORESIGHT_TPDM
109 bool "CoreSight Trace, Profiling & Diagnostics Monitor driver"
110 help
111 This driver provides support for configuring monitor. Monitors are
112 primarily responsible for data set collection and support the
113 ability to collect any permutation of data set types. Monitors are
114 also responsible for interaction with system cross triggering.
115
116config CORESIGHT_TPDM_DEFAULT_ENABLE
117 bool "Turn on TPDM tracing by default"
118 depends on CORESIGHT_TPDM
119 help
120 Turns on CoreSight TPDM tracing for different data set types by
121 default. Otherwise, tracing is disabled by default but can be
122 enabled via sysfs.
123
124 If unsure, say 'N' here to avoid potential power and performance
125 penalty.
126
Satyajit Desai3d577e82016-10-27 14:07:02 -0700127config CORESIGHT_CTI
128 bool "CoreSight Cross Trigger Interface driver"
129 help
130 This driver provides support for Cross Trigger Interface that is
131 used to input or output i.e. pass cross trigger events from one
132 hardware component to another. It can also be used to pass
133 software generated events.
Satyajit Desaie8c98232016-11-01 12:01:19 -0700134
135config CORESIGHT_CSR
136 bool "CoreSight Slave Register driver"
137 help
138 This driver provides support for CoreSight Slave Register block
139 that hosts miscellaneous configuration registers.
140 Those configuration registers can be used to control, various
141 coresight configurations.
142
Satyajit Desaic1a7d402016-11-01 12:11:18 -0700143config CORESIGHT_HWEVENT
144 bool "CoreSight Hardware Event driver"
145 depends on CORESIGHT_STM
146 select CORESIGHT_CSR
147 help
148 This driver provides support for monitoring and tracing CoreSight
149 Hardware Event across STM interface. It configures Coresight
150 Hardware Event mux control registers to select hardware events
151 based on user input.
Mathieu Poirier32887312015-03-30 14:13:36 -0600152endif