blob: 2632a806c4a8c39554addb426c368133b3a52eff [file] [log] [blame]
Manjunath Hadli91825402012-11-28 02:02:02 -03001/*
2 * Copyright (C) 2012 Texas Instruments Inc
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
16 *
17 * Contributors:
18 * Manjunath Hadli <manjunath.hadli@ti.com>
19 * Prabhakar Lad <prabhakar.lad@ti.com>
20 */
21
22#ifndef _DAVINCI_VPFE_MC_CAPTURE_H
23#define _DAVINCI_VPFE_MC_CAPTURE_H
24
25#include "dm365_ipipe.h"
26#include "dm365_ipipeif.h"
27#include "dm365_isif.h"
28#include "dm365_resizer.h"
29#include "vpfe_video.h"
30
31#define VPFE_MAJOR_RELEASE 0
32#define VPFE_MINOR_RELEASE 0
33#define VPFE_BUILD 1
34#define VPFE_CAPTURE_VERSION_CODE ((VPFE_MAJOR_RELEASE << 16) | \
35 (VPFE_MINOR_RELEASE << 8) | \
36 VPFE_BUILD)
37
38/* IPIPE hardware limits */
39#define IPIPE_MAX_OUTPUT_WIDTH_A 2176
40#define IPIPE_MAX_OUTPUT_WIDTH_B 640
41
42/* Based on max resolution supported. QXGA */
43#define IPIPE_MAX_OUTPUT_HEIGHT_A 1536
44/* Based on max resolution supported. VGA */
45#define IPIPE_MAX_OUTPUT_HEIGHT_B 480
46
47#define to_vpfe_device(ptr_module) \
48 container_of(ptr_module, struct vpfe_device, vpfe_##ptr_module)
49#define to_device(ptr_module) \
50 (to_vpfe_device(ptr_module)->dev)
51
52struct vpfe_device {
53 /* external registered sub devices */
54 struct v4l2_subdev **sd;
55 /* number of registered external subdevs */
56 unsigned int num_ext_subdevs;
57 /* vpfe cfg */
58 struct vpfe_config *cfg;
59 /* clock ptrs for vpfe capture */
60 struct clk **clks;
61 /* V4l2 device */
62 struct v4l2_device v4l2_dev;
63 /* parent device */
64 struct device *pdev;
65 /* IRQ number for DMA transfer completion at the image processor */
66 unsigned int imp_dma_irq;
67 /* CCDC IRQs used when CCDC/ISIF output to SDRAM */
68 unsigned int ccdc_irq0;
69 unsigned int ccdc_irq1;
70 /* maximum video memory that is available*/
71 unsigned int video_limit;
72 /* media device */
73 struct media_device media_dev;
74 /* ccdc subdevice */
75 struct vpfe_isif_device vpfe_isif;
76 /* ipipeif subdevice */
77 struct vpfe_ipipeif_device vpfe_ipipeif;
78 /* ipipe subdevice */
79 struct vpfe_ipipe_device vpfe_ipipe;
80 /* resizer subdevice */
81 struct vpfe_resizer_device vpfe_resizer;
82};
83
84/* File handle structure */
85struct vpfe_fh {
86 struct v4l2_fh vfh;
87 struct vpfe_video_device *video;
88 /* Indicates whether this file handle is doing IO */
89 u8 io_allowed;
Manjunath Hadli91825402012-11-28 02:02:02 -030090};
91
92void mbus_to_pix(const struct v4l2_mbus_framefmt *mbus,
93 struct v4l2_pix_format *pix);
94
95#endif /* _DAVINCI_VPFE_MC_CAPTURE_H */