| Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 1 | /* |
| 2 | * arch/arm/mach-netx/include/mach/irqs.h |
| 3 | * |
| 4 | * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 |
| 8 | * as published by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 18 | */ |
| 19 | |
| Linus Walleij | 30a1b5e | 2013-02-08 23:02:33 +0100 | [diff] [blame] | 20 | #define NETX_IRQ_VIC_START 64 |
| 21 | #define NETX_IRQ_SOFTINT (NETX_IRQ_VIC_START + 0) |
| 22 | #define NETX_IRQ_TIMER0 (NETX_IRQ_VIC_START + 1) |
| 23 | #define NETX_IRQ_TIMER1 (NETX_IRQ_VIC_START + 2) |
| 24 | #define NETX_IRQ_TIMER2 (NETX_IRQ_VIC_START + 3) |
| 25 | #define NETX_IRQ_SYSTIME_NS (NETX_IRQ_VIC_START + 4) |
| 26 | #define NETX_IRQ_SYSTIME_S (NETX_IRQ_VIC_START + 5) |
| 27 | #define NETX_IRQ_GPIO_15 (NETX_IRQ_VIC_START + 6) |
| 28 | #define NETX_IRQ_WATCHDOG (NETX_IRQ_VIC_START + 7) |
| 29 | #define NETX_IRQ_UART0 (NETX_IRQ_VIC_START + 8) |
| 30 | #define NETX_IRQ_UART1 (NETX_IRQ_VIC_START + 9) |
| 31 | #define NETX_IRQ_UART2 (NETX_IRQ_VIC_START + 10) |
| 32 | #define NETX_IRQ_USB (NETX_IRQ_VIC_START + 11) |
| 33 | #define NETX_IRQ_SPI (NETX_IRQ_VIC_START + 12) |
| 34 | #define NETX_IRQ_I2C (NETX_IRQ_VIC_START + 13) |
| 35 | #define NETX_IRQ_LCD (NETX_IRQ_VIC_START + 14) |
| 36 | #define NETX_IRQ_HIF (NETX_IRQ_VIC_START + 15) |
| 37 | #define NETX_IRQ_GPIO_0_14 (NETX_IRQ_VIC_START + 16) |
| 38 | #define NETX_IRQ_XPEC0 (NETX_IRQ_VIC_START + 17) |
| 39 | #define NETX_IRQ_XPEC1 (NETX_IRQ_VIC_START + 18) |
| 40 | #define NETX_IRQ_XPEC2 (NETX_IRQ_VIC_START + 19) |
| 41 | #define NETX_IRQ_XPEC3 (NETX_IRQ_VIC_START + 20) |
| 42 | #define NETX_IRQ_XPEC(no) (NETX_IRQ_VIC_START + 17 + (no)) |
| 43 | #define NETX_IRQ_MSYNC0 (NETX_IRQ_VIC_START + 21) |
| 44 | #define NETX_IRQ_MSYNC1 (NETX_IRQ_VIC_START + 22) |
| 45 | #define NETX_IRQ_MSYNC2 (NETX_IRQ_VIC_START + 23) |
| 46 | #define NETX_IRQ_MSYNC3 (NETX_IRQ_VIC_START + 24) |
| 47 | #define NETX_IRQ_IRQ_PHY (NETX_IRQ_VIC_START + 25) |
| 48 | #define NETX_IRQ_ISO_AREA (NETX_IRQ_VIC_START + 26) |
| Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 49 | /* int 27 is reserved */ |
| 50 | /* int 28 is reserved */ |
| Linus Walleij | 30a1b5e | 2013-02-08 23:02:33 +0100 | [diff] [blame] | 51 | #define NETX_IRQ_TIMER3 (NETX_IRQ_VIC_START + 29) |
| 52 | #define NETX_IRQ_TIMER4 (NETX_IRQ_VIC_START + 30) |
| Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 53 | /* int 31 is reserved */ |
| 54 | |
| Linus Walleij | 30a1b5e | 2013-02-08 23:02:33 +0100 | [diff] [blame] | 55 | #define NETX_IRQS (NETX_IRQ_VIC_START + 32) |
| Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 56 | |
| 57 | /* for multiplexed irqs on gpio 0..14 */ |
| 58 | #define NETX_IRQ_GPIO(x) (NETX_IRQS + (x)) |
| 59 | #define NETX_IRQ_GPIO_LAST NETX_IRQ_GPIO(14) |
| 60 | |
| 61 | /* Host interface interrupts */ |
| 62 | #define NETX_IRQ_HIF_CHAINED(x) (NETX_IRQ_GPIO_LAST + 1 + (x)) |
| 63 | #define NETX_IRQ_HIF_PIO35 NETX_IRQ_HIF_CHAINED(0) |
| 64 | #define NETX_IRQ_HIF_PIO36 NETX_IRQ_HIF_CHAINED(1) |
| 65 | #define NETX_IRQ_HIF_PIO40 NETX_IRQ_HIF_CHAINED(2) |
| 66 | #define NETX_IRQ_HIF_PIO47 NETX_IRQ_HIF_CHAINED(3) |
| 67 | #define NETX_IRQ_HIF_PIO72 NETX_IRQ_HIF_CHAINED(4) |
| 68 | #define NETX_IRQ_HIF_LAST NETX_IRQ_HIF_CHAINED(4) |
| 69 | |
| 70 | #define NR_IRQS (NETX_IRQ_HIF_LAST + 1) |