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Paul Mackerrasf2783c12005-10-20 09:23:26 +10001/*
2 * Common time prototypes and such for all ppc machines.
3 *
4 * Written by Cort Dougan (cort@cs.nmt.edu) to merge
5 * Paul Mackerras' version and mine for PReP and Pmac.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#ifndef __POWERPC_TIME_H
14#define __POWERPC_TIME_H
15
16#ifdef __KERNEL__
Paul Mackerrasf2783c12005-10-20 09:23:26 +100017#include <linux/types.h>
18#include <linux/percpu.h>
19
20#include <asm/processor.h>
Paul Mackerrasf2783c12005-10-20 09:23:26 +100021
22/* time.c */
23extern unsigned long tb_ticks_per_jiffy;
24extern unsigned long tb_ticks_per_usec;
25extern unsigned long tb_ticks_per_sec;
Bharat Bhushan6e359942012-04-18 06:01:19 +000026extern struct clock_event_device decrementer_clockevent;
Paul Mackerrasf2783c12005-10-20 09:23:26 +100027
28struct rtc_time;
29extern void to_tm(int tim, struct rtc_time * tm);
Michael Ellerman1c21a292008-05-08 14:27:19 +100030extern void GregorianDay(struct rtc_time *tm);
Paul Mackerrasf2783c12005-10-20 09:23:26 +100031
32extern void generic_calibrate_decr(void);
Paul Mackerrasf2783c12005-10-20 09:23:26 +100033
Vitaly Bordugf2a0bd32007-01-24 22:41:24 +030034extern void set_dec_cpu6(unsigned int val);
35
Paul Mackerrasf2783c12005-10-20 09:23:26 +100036/* Some sane defaults: 125 MHz timebase, 1GHz processor */
37extern unsigned long ppc_proc_freq;
38#define DEFAULT_PROC_FREQ (DEFAULT_TB_FREQ * 8)
39extern unsigned long ppc_tb_freq;
40#define DEFAULT_TB_FREQ 125000000UL
41
Paul Mackerrasf2783c12005-10-20 09:23:26 +100042struct div_result {
43 u64 result_high;
44 u64 result_low;
45};
46
47/* Accessor functions for the timebase (RTC on 601) registers. */
48/* If one day CONFIG_POWER is added just define __USE_RTC as 1 */
49#ifdef CONFIG_6xx
Paul Mackerras5d14a182005-10-20 22:33:06 +100050#define __USE_RTC() (!cpu_has_feature(CPU_FTR_USE_TB))
Paul Mackerrasf2783c12005-10-20 09:23:26 +100051#else
52#define __USE_RTC() 0
53#endif
54
Benjamin Herrenschmidt859deea2006-10-20 14:37:05 +100055#ifdef CONFIG_PPC64
56
57/* For compatibility, get_tbl() is defined as get_tb() on ppc64 */
58#define get_tbl get_tb
59
60#else
61
Paul Mackerrasf2783c12005-10-20 09:23:26 +100062static inline unsigned long get_tbl(void)
63{
Paul Mackerrasf2783c12005-10-20 09:23:26 +100064#if defined(CONFIG_403GCX)
Benjamin Herrenschmidt859deea2006-10-20 14:37:05 +100065 unsigned long tbl;
Paul Mackerrasf2783c12005-10-20 09:23:26 +100066 asm volatile("mfspr %0, 0x3dd" : "=r" (tbl));
Paul Mackerrasf2783c12005-10-20 09:23:26 +100067 return tbl;
Benjamin Herrenschmidt859deea2006-10-20 14:37:05 +100068#else
69 return mftbl();
70#endif
Paul Mackerrasf2783c12005-10-20 09:23:26 +100071}
72
73static inline unsigned int get_tbu(void)
74{
Benjamin Herrenschmidt859deea2006-10-20 14:37:05 +100075#ifdef CONFIG_403GCX
Paul Mackerrasf2783c12005-10-20 09:23:26 +100076 unsigned int tbu;
Paul Mackerrasf2783c12005-10-20 09:23:26 +100077 asm volatile("mfspr %0, 0x3dc" : "=r" (tbu));
Paul Mackerrasf2783c12005-10-20 09:23:26 +100078 return tbu;
Benjamin Herrenschmidt859deea2006-10-20 14:37:05 +100079#else
80 return mftbu();
81#endif
Paul Mackerrasf2783c12005-10-20 09:23:26 +100082}
Benjamin Herrenschmidt859deea2006-10-20 14:37:05 +100083#endif /* !CONFIG_PPC64 */
Paul Mackerrasf2783c12005-10-20 09:23:26 +100084
85static inline unsigned int get_rtcl(void)
86{
87 unsigned int rtcl;
88
89 asm volatile("mfrtcl %0" : "=r" (rtcl));
90 return rtcl;
91}
92
Paul Mackerras96c44502005-10-23 17:14:56 +100093static inline u64 get_rtc(void)
94{
95 unsigned int hi, lo, hi2;
96
97 do {
98 asm volatile("mfrtcu %0; mfrtcl %1; mfrtcu %2"
99 : "=r" (hi), "=r" (lo), "=r" (hi2));
100 } while (hi2 != hi);
101 return (u64)hi * 1000000000 + lo;
102}
103
Paul Mackerrasf2783c12005-10-20 09:23:26 +1000104#ifdef CONFIG_PPC64
105static inline u64 get_tb(void)
106{
107 return mftb();
108}
Benjamin Herrenschmidt859deea2006-10-20 14:37:05 +1000109#else /* CONFIG_PPC64 */
Paul Mackerrasf2783c12005-10-20 09:23:26 +1000110static inline u64 get_tb(void)
111{
112 unsigned int tbhi, tblo, tbhi2;
113
114 do {
115 tbhi = get_tbu();
116 tblo = get_tbl();
117 tbhi2 = get_tbu();
118 } while (tbhi != tbhi2);
119
120 return ((u64)tbhi << 32) | tblo;
121}
Benjamin Herrenschmidt859deea2006-10-20 14:37:05 +1000122#endif /* !CONFIG_PPC64 */
Paul Mackerrasf2783c12005-10-20 09:23:26 +1000123
Benjamin Herrenschmidtc27da3392007-09-19 14:21:56 +1000124static inline u64 get_tb_or_rtc(void)
125{
126 return __USE_RTC() ? get_rtc() : get_tb();
127}
128
Paul Mackerrasf2783c12005-10-20 09:23:26 +1000129static inline void set_tb(unsigned int upper, unsigned int lower)
130{
131 mtspr(SPRN_TBWL, 0);
132 mtspr(SPRN_TBWU, upper);
133 mtspr(SPRN_TBWL, lower);
134}
135
136/* Accessor functions for the decrementer register.
137 * The 4xx doesn't even have a decrementer. I tried to use the
138 * generic timer interrupt code, which seems OK, with the 4xx PIT
139 * in auto-reload mode. The problem is PIT stops counting when it
140 * hits zero. If it would wrap, we could use it just like a decrementer.
141 */
142static inline unsigned int get_dec(void)
143{
144#if defined(CONFIG_40x)
145 return (mfspr(SPRN_PIT));
146#else
147 return (mfspr(SPRN_DEC));
148#endif
149}
150
Paul Mackerras43875cc2007-10-31 22:25:35 +1100151/*
152 * Note: Book E and 4xx processors differ from other PowerPC processors
153 * in when the decrementer generates its interrupt: on the 1 to 0
154 * transition for Book E/4xx, but on the 0 to -1 transition for others.
155 */
Paul Mackerrasf2783c12005-10-20 09:23:26 +1000156static inline void set_dec(int val)
157{
158#if defined(CONFIG_40x)
Josh Boyeraab69292007-08-20 07:29:11 -0500159 mtspr(SPRN_PIT, val);
Paul Mackerrasf2783c12005-10-20 09:23:26 +1000160#elif defined(CONFIG_8xx_CPU6)
Paul Mackerras43875cc2007-10-31 22:25:35 +1100161 set_dec_cpu6(val - 1);
Paul Mackerrasf2783c12005-10-20 09:23:26 +1000162#else
Paul Mackerras43875cc2007-10-31 22:25:35 +1100163#ifndef CONFIG_BOOKE
164 --val;
165#endif
Paul Mackerras43875cc2007-10-31 22:25:35 +1100166 mtspr(SPRN_DEC, val);
Paul Mackerrasf2783c12005-10-20 09:23:26 +1000167#endif /* not 40x or 8xx_CPU6 */
168}
169
170static inline unsigned long tb_ticks_since(unsigned long tstamp)
171{
172 if (__USE_RTC()) {
173 int delta = get_rtcl() - (unsigned int) tstamp;
174 return delta < 0 ? delta + 1000000000 : delta;
175 }
176 return get_tbl() - tstamp;
177}
178
179#define mulhwu(x,y) \
180({unsigned z; asm ("mulhwu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
181
182#ifdef CONFIG_PPC64
183#define mulhdu(x,y) \
184({unsigned long z; asm ("mulhdu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
185#else
186extern u64 mulhdu(u64, u64);
187#endif
188
Paul Mackerrasa5b518e2005-10-22 14:55:23 +1000189extern void div128_by_32(u64 dividend_high, u64 dividend_low,
190 unsigned divisor, struct div_result *dr);
Paul Mackerrasf2783c12005-10-20 09:23:26 +1000191
192/* Used to store Processor Utilization register (purr) values */
193
194struct cpu_usage {
195 u64 current_tb; /* Holds the current purr register values */
196};
197
198DECLARE_PER_CPU(struct cpu_usage, cpu_usage_array);
199
Tony Breedsd831d0b2007-09-21 13:26:03 +1000200extern void secondary_cpu_time_init(void);
Tony Breeds71712b42007-06-22 16:54:30 +1000201
Anton Blanchard7df10272011-11-23 20:07:22 +0000202DECLARE_PER_CPU(u64, decrementers_next_tb);
Anton Blanchard37fb9a02011-11-23 20:07:17 +0000203
Paul Mackerrasf2783c12005-10-20 09:23:26 +1000204#endif /* __KERNEL__ */
Kim Phillips7a69af62006-09-26 17:46:37 -0500205#endif /* __POWERPC_TIME_H */