Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 1 | /* |
| 2 | * File: arch/blackfin/mach-common/irqpanic.c |
| 3 | * Based on: |
| 4 | * Author: |
| 5 | * |
| 6 | * Created: ? |
| 7 | * Description: panic kernel with dump information |
| 8 | * |
| 9 | * Modified: rgetz - added cache checking code 14Feb06 |
| 10 | * Copyright 2004-2006 Analog Devices Inc. |
| 11 | * |
| 12 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
| 13 | * |
| 14 | * This program is free software; you can redistribute it and/or modify |
| 15 | * it under the terms of the GNU General Public License as published by |
| 16 | * the Free Software Foundation; either version 2 of the License, or |
| 17 | * (at your option) any later version. |
| 18 | * |
| 19 | * This program is distributed in the hope that it will be useful, |
| 20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 22 | * GNU General Public License for more details. |
| 23 | * |
| 24 | * You should have received a copy of the GNU General Public License |
| 25 | * along with this program; if not, see the file COPYING, or write |
| 26 | * to the Free Software Foundation, Inc., |
| 27 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 28 | */ |
| 29 | |
| 30 | #include <linux/module.h> |
| 31 | #include <linux/kernel_stat.h> |
| 32 | #include <linux/sched.h> |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 33 | #include <asm/blackfin.h> |
| 34 | |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 35 | #define L1_ICACHE_START 0xffa10000 |
| 36 | #define L1_ICACHE_END 0xffa13fff |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 37 | |
| 38 | /* |
| 39 | * irq_panic - calls panic with string setup |
| 40 | */ |
Mike Frysinger | cf8d943 | 2009-06-13 10:14:24 -0400 | [diff] [blame] | 41 | __attribute__ ((l1_text)) |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 42 | asmlinkage void irq_panic(int reason, struct pt_regs *regs) |
| 43 | { |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 44 | unsigned int cmd, tag, ca, cache_hi, cache_lo, *pa; |
| 45 | unsigned short i, j, die; |
| 46 | unsigned int bad[10][6]; |
| 47 | |
| 48 | /* check entire cache for coherency |
| 49 | * Since printk is in cacheable memory, |
| 50 | * don't call it until you have checked everything |
| 51 | */ |
| 52 | |
| 53 | die = 0; |
| 54 | i = 0; |
| 55 | |
| 56 | /* check icache */ |
| 57 | |
| 58 | for (ca = L1_ICACHE_START; ca <= L1_ICACHE_END && i < 10; ca += 32) { |
| 59 | |
| 60 | /* Grab various address bits for the itest_cmd fields */ |
| 61 | cmd = (((ca & 0x3000) << 4) | /* ca[13:12] for SBNK[1:0] */ |
| 62 | ((ca & 0x0c00) << 16) | /* ca[11:10] for WAYSEL[1:0] */ |
| 63 | ((ca & 0x3f8)) | /* ca[09:03] for SET[4:0] and DW[1:0] */ |
| 64 | 0); /* Access Tag, Read access */ |
| 65 | |
| 66 | SSYNC(); |
| 67 | bfin_write_ITEST_COMMAND(cmd); |
| 68 | SSYNC(); |
| 69 | tag = bfin_read_ITEST_DATA0(); |
| 70 | SSYNC(); |
| 71 | |
| 72 | /* if tag is marked as valid, check it */ |
| 73 | if (tag & 1) { |
| 74 | /* The icache is arranged in 4 groups of 64-bits */ |
| 75 | for (j = 0; j < 32; j += 8) { |
| 76 | cmd = ((((ca + j) & 0x3000) << 4) | /* ca[13:12] for SBNK[1:0] */ |
| 77 | (((ca + j) & 0x0c00) << 16) | /* ca[11:10] for WAYSEL[1:0] */ |
| 78 | (((ca + j) & 0x3f8)) | /* ca[09:03] for SET[4:0] and DW[1:0] */ |
| 79 | 4); /* Access Data, Read access */ |
| 80 | |
| 81 | SSYNC(); |
| 82 | bfin_write_ITEST_COMMAND(cmd); |
| 83 | SSYNC(); |
| 84 | |
| 85 | cache_hi = bfin_read_ITEST_DATA1(); |
| 86 | cache_lo = bfin_read_ITEST_DATA0(); |
| 87 | |
| 88 | pa = ((unsigned int *)((tag & 0xffffcc00) | |
| 89 | ((ca + j) & ~(0xffffcc00)))); |
| 90 | |
| 91 | /* |
| 92 | * Debugging this, enable |
| 93 | * |
| 94 | * printk("addr: %08x %08x%08x | %08x%08x\n", |
| 95 | * ((unsigned int *)((tag & 0xffffcc00) | ((ca+j) & ~(0xffffcc00)))), |
| 96 | * cache_hi, cache_lo, *(pa+1), *pa); |
| 97 | */ |
| 98 | |
| 99 | if (cache_hi != *(pa + 1) || cache_lo != *pa) { |
| 100 | /* Since icache is not working, stay out of it, by not printing */ |
| 101 | die = 1; |
| 102 | bad[i][0] = (ca + j); |
| 103 | bad[i][1] = cache_hi; |
| 104 | bad[i][2] = cache_lo; |
| 105 | bad[i][3] = ((tag & 0xffffcc00) | |
| 106 | ((ca + j) & ~(0xffffcc00))); |
| 107 | bad[i][4] = *(pa + 1); |
| 108 | bad[i][5] = *(pa); |
| 109 | i++; |
| 110 | } |
| 111 | } |
| 112 | } |
| 113 | } |
| 114 | if (die) { |
| 115 | printk(KERN_EMERG "icache coherency error\n"); |
| 116 | for (j = 0; j <= i; j++) { |
| 117 | printk(KERN_EMERG |
| 118 | "cache address : %08x cache value : %08x%08x\n", |
| 119 | bad[j][0], bad[j][1], bad[j][2]); |
| 120 | printk(KERN_EMERG |
| 121 | "physical address: %08x SDRAM value : %08x%08x\n", |
| 122 | bad[j][3], bad[j][4], bad[j][5]); |
| 123 | } |
| 124 | panic("icache coherency error"); |
Mike Frysinger | cf8d943 | 2009-06-13 10:14:24 -0400 | [diff] [blame] | 125 | } else |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 126 | printk(KERN_EMERG "icache checked, and OK\n"); |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 127 | } |