Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Linas Vepstas | 3c8c90a | 2007-05-24 03:28:01 +1000 | [diff] [blame] | 2 | * Copyright IBM Corporation 2001, 2005, 2006 |
| 3 | * Copyright Dave Engebretsen & Todd Inglett 2001 |
| 4 | * Copyright Linas Vepstas 2005, 2006 |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 5 | * Copyright 2001-2012 IBM Corporation. |
Linas Vepstas | 6937650 | 2005-11-03 18:47:50 -0600 | [diff] [blame] | 6 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
Linas Vepstas | 6937650 | 2005-11-03 18:47:50 -0600 | [diff] [blame] | 11 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
Linas Vepstas | 6937650 | 2005-11-03 18:47:50 -0600 | [diff] [blame] | 16 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
Linas Vepstas | 3c8c90a | 2007-05-24 03:28:01 +1000 | [diff] [blame] | 20 | * |
| 21 | * Please address comments and feedback to Linas Vepstas <linas@austin.ibm.com> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | */ |
| 23 | |
Linas Vepstas | 6dee3fb | 2005-11-03 18:50:10 -0600 | [diff] [blame] | 24 | #include <linux/delay.h> |
Gavin Shan | 7f52a52 | 2014-04-24 18:00:18 +1000 | [diff] [blame] | 25 | #include <linux/debugfs.h> |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 26 | #include <linux/sched.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | #include <linux/init.h> |
| 28 | #include <linux/list.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | #include <linux/pci.h> |
Gavin Shan | a3032ca | 2014-07-15 17:00:56 +1000 | [diff] [blame] | 30 | #include <linux/iommu.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 31 | #include <linux/proc_fs.h> |
| 32 | #include <linux/rbtree.h> |
Gavin Shan | 66f9af83 | 2014-02-12 15:24:56 +0800 | [diff] [blame] | 33 | #include <linux/reboot.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 34 | #include <linux/seq_file.h> |
| 35 | #include <linux/spinlock.h> |
Paul Gortmaker | 66b15db | 2011-05-27 10:46:24 -0400 | [diff] [blame] | 36 | #include <linux/export.h> |
Stephen Rothwell | acaa617 | 2007-12-21 15:52:07 +1100 | [diff] [blame] | 37 | #include <linux/of.h> |
| 38 | |
Arun Sharma | 60063497 | 2011-07-26 16:09:06 -0700 | [diff] [blame] | 39 | #include <linux/atomic.h> |
Gavin Shan | 1e54b93 | 2014-05-05 12:09:05 +1000 | [diff] [blame] | 40 | #include <asm/debug.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 41 | #include <asm/eeh.h> |
Linas Vepstas | 172ca92 | 2005-11-03 18:50:04 -0600 | [diff] [blame] | 42 | #include <asm/eeh_event.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 43 | #include <asm/io.h> |
Gavin Shan | 212d16c | 2014-06-10 11:41:56 +1000 | [diff] [blame] | 44 | #include <asm/iommu.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 45 | #include <asm/machdep.h> |
Stephen Rothwell | d387899 | 2005-09-28 02:50:25 +1000 | [diff] [blame] | 46 | #include <asm/ppc-pci.h> |
Linas Vepstas | 172ca92 | 2005-11-03 18:50:04 -0600 | [diff] [blame] | 47 | #include <asm/rtas.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 48 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 49 | |
| 50 | /** Overview: |
Russell Currey | 8ee2653 | 2016-02-16 23:06:05 +1100 | [diff] [blame] | 51 | * EEH, or "Enhanced Error Handling" is a PCI bridge technology for |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 52 | * dealing with PCI bus errors that can't be dealt with within the |
| 53 | * usual PCI framework, except by check-stopping the CPU. Systems |
| 54 | * that are designed for high-availability/reliability cannot afford |
| 55 | * to crash due to a "mere" PCI error, thus the need for EEH. |
| 56 | * An EEH-capable bridge operates by converting a detected error |
| 57 | * into a "slot freeze", taking the PCI adapter off-line, making |
| 58 | * the slot behave, from the OS'es point of view, as if the slot |
| 59 | * were "empty": all reads return 0xff's and all writes are silently |
| 60 | * ignored. EEH slot isolation events can be triggered by parity |
| 61 | * errors on the address or data busses (e.g. during posted writes), |
Linas Vepstas | 6937650 | 2005-11-03 18:47:50 -0600 | [diff] [blame] | 62 | * which in turn might be caused by low voltage on the bus, dust, |
| 63 | * vibration, humidity, radioactivity or plain-old failed hardware. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 64 | * |
| 65 | * Note, however, that one of the leading causes of EEH slot |
| 66 | * freeze events are buggy device drivers, buggy device microcode, |
| 67 | * or buggy device hardware. This is because any attempt by the |
| 68 | * device to bus-master data to a memory address that is not |
| 69 | * assigned to the device will trigger a slot freeze. (The idea |
| 70 | * is to prevent devices-gone-wild from corrupting system memory). |
| 71 | * Buggy hardware/drivers will have a miserable time co-existing |
| 72 | * with EEH. |
| 73 | * |
| 74 | * Ideally, a PCI device driver, when suspecting that an isolation |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 75 | * event has occurred (e.g. by reading 0xff's), will then ask EEH |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 76 | * whether this is the case, and then take appropriate steps to |
| 77 | * reset the PCI slot, the PCI device, and then resume operations. |
| 78 | * However, until that day, the checking is done here, with the |
| 79 | * eeh_check_failure() routine embedded in the MMIO macros. If |
| 80 | * the slot is found to be isolated, an "EEH Event" is synthesized |
| 81 | * and sent out for processing. |
| 82 | */ |
| 83 | |
Linas Vepstas | 5c1344e | 2005-11-03 18:49:31 -0600 | [diff] [blame] | 84 | /* If a device driver keeps reading an MMIO register in an interrupt |
Mike Mason | f36c522 | 2008-07-22 02:40:17 +1000 | [diff] [blame] | 85 | * handler after a slot isolation event, it might be broken. |
| 86 | * This sets the threshold for how many read attempts we allow |
| 87 | * before printing an error message. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 88 | */ |
Linas Vepstas | 2fd30be | 2007-03-19 14:53:22 -0500 | [diff] [blame] | 89 | #define EEH_MAX_FAILS 2100000 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 90 | |
Linas Vepstas | 17213c3 | 2007-05-10 02:38:11 +1000 | [diff] [blame] | 91 | /* Time to wait for a PCI slot to report status, in milliseconds */ |
Brian King | fb48dc2 | 2013-11-25 16:27:54 -0600 | [diff] [blame] | 92 | #define PCI_BUS_RESET_WAIT_MSEC (5*60*1000) |
Linas Vepstas | 9c54776 | 2007-03-19 14:58:07 -0500 | [diff] [blame] | 93 | |
Gavin Shan | 8a5ad35 | 2014-04-24 18:00:17 +1000 | [diff] [blame] | 94 | /* |
| 95 | * EEH probe mode support, which is part of the flags, |
| 96 | * is to support multiple platforms for EEH. Some platforms |
| 97 | * like pSeries do PCI emunation based on device tree. |
| 98 | * However, other platforms like powernv probe PCI devices |
| 99 | * from hardware. The flag is used to distinguish that. |
| 100 | * In addition, struct eeh_ops::probe would be invoked for |
| 101 | * particular OF node or PCI device so that the corresponding |
| 102 | * PE would be created there. |
| 103 | */ |
| 104 | int eeh_subsystem_flags; |
| 105 | EXPORT_SYMBOL(eeh_subsystem_flags); |
| 106 | |
Gavin Shan | 1b28f17 | 2014-12-11 14:28:56 +1100 | [diff] [blame] | 107 | /* |
| 108 | * EEH allowed maximal frozen times. If one particular PE's |
| 109 | * frozen count in last hour exceeds this limit, the PE will |
| 110 | * be forced to be offline permanently. |
| 111 | */ |
| 112 | int eeh_max_freezes = 5; |
| 113 | |
Gavin Shan | aa1e637 | 2012-02-27 20:03:53 +0000 | [diff] [blame] | 114 | /* Platform dependent EEH operations */ |
| 115 | struct eeh_ops *eeh_ops = NULL; |
| 116 | |
Linas Vepstas | fd761fd | 2005-11-03 18:49:23 -0600 | [diff] [blame] | 117 | /* Lock to avoid races due to multiple reports of an error */ |
Gavin Shan | 4907581 | 2013-06-20 13:21:03 +0800 | [diff] [blame] | 118 | DEFINE_RAW_SPINLOCK(confirm_error_lock); |
Gavin Shan | 35066c0 | 2016-09-28 14:34:54 +1000 | [diff] [blame] | 119 | EXPORT_SYMBOL_GPL(confirm_error_lock); |
Linas Vepstas | fd761fd | 2005-11-03 18:49:23 -0600 | [diff] [blame] | 120 | |
Gavin Shan | 212d16c | 2014-06-10 11:41:56 +1000 | [diff] [blame] | 121 | /* Lock to protect passed flags */ |
| 122 | static DEFINE_MUTEX(eeh_dev_mutex); |
| 123 | |
Linas Vepstas | 17213c3 | 2007-05-10 02:38:11 +1000 | [diff] [blame] | 124 | /* Buffer for reporting pci register dumps. Its here in BSS, and |
| 125 | * not dynamically alloced, so that it ends up in RMO where RTAS |
| 126 | * can access it. |
| 127 | */ |
Gavin Shan | f2e0be5 | 2014-09-30 12:39:08 +1000 | [diff] [blame] | 128 | #define EEH_PCI_REGS_LOG_LEN 8192 |
Linas Vepstas | d99bb1d | 2007-05-09 09:35:32 +1000 | [diff] [blame] | 129 | static unsigned char pci_regs_buf[EEH_PCI_REGS_LOG_LEN]; |
| 130 | |
Gavin Shan | e575f8d | 2012-02-29 15:47:45 +0000 | [diff] [blame] | 131 | /* |
| 132 | * The struct is used to maintain the EEH global statistic |
| 133 | * information. Besides, the EEH global statistics will be |
| 134 | * exported to user space through procfs |
| 135 | */ |
| 136 | struct eeh_stats { |
| 137 | u64 no_device; /* PCI device not found */ |
| 138 | u64 no_dn; /* OF node not found */ |
| 139 | u64 no_cfg_addr; /* Config address not found */ |
| 140 | u64 ignored_check; /* EEH check skipped */ |
| 141 | u64 total_mmio_ffs; /* Total EEH checks */ |
| 142 | u64 false_positives; /* Unnecessary EEH checks */ |
| 143 | u64 slot_resets; /* PE reset */ |
| 144 | }; |
| 145 | |
| 146 | static struct eeh_stats eeh_stats; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 147 | |
Gavin Shan | 7f52a52 | 2014-04-24 18:00:18 +1000 | [diff] [blame] | 148 | static int __init eeh_setup(char *str) |
| 149 | { |
| 150 | if (!strcmp(str, "off")) |
Gavin Shan | 05b1721 | 2014-07-17 14:41:38 +1000 | [diff] [blame] | 151 | eeh_add_flag(EEH_FORCE_DISABLED); |
Gavin Shan | a450e8f | 2014-11-22 21:58:09 +1100 | [diff] [blame] | 152 | else if (!strcmp(str, "early_log")) |
| 153 | eeh_add_flag(EEH_EARLY_DUMP_LOG); |
Gavin Shan | 7f52a52 | 2014-04-24 18:00:18 +1000 | [diff] [blame] | 154 | |
| 155 | return 1; |
| 156 | } |
| 157 | __setup("eeh=", eeh_setup); |
| 158 | |
Gavin Shan | f2e0be5 | 2014-09-30 12:39:08 +1000 | [diff] [blame] | 159 | /* |
| 160 | * This routine captures assorted PCI configuration space data |
| 161 | * for the indicated PCI device, and puts them into a buffer |
| 162 | * for RTAS error logging. |
Linas Vepstas | d99bb1d | 2007-05-09 09:35:32 +1000 | [diff] [blame] | 163 | */ |
Gavin Shan | f2e0be5 | 2014-09-30 12:39:08 +1000 | [diff] [blame] | 164 | static size_t eeh_dump_dev_log(struct eeh_dev *edev, char *buf, size_t len) |
Linas Vepstas | d99bb1d | 2007-05-09 09:35:32 +1000 | [diff] [blame] | 165 | { |
Gavin Shan | 0bd7858 | 2015-03-17 16:15:07 +1100 | [diff] [blame] | 166 | struct pci_dn *pdn = eeh_dev_to_pdn(edev); |
Linas Vepstas | d99bb1d | 2007-05-09 09:35:32 +1000 | [diff] [blame] | 167 | u32 cfg; |
Linas Vepstas | fcf9892b | 2007-05-09 09:36:21 +1000 | [diff] [blame] | 168 | int cap, i; |
Gavin Shan | 0ed352d | 2014-07-17 14:41:40 +1000 | [diff] [blame] | 169 | int n = 0, l = 0; |
| 170 | char buffer[128]; |
Linas Vepstas | d99bb1d | 2007-05-09 09:35:32 +1000 | [diff] [blame] | 171 | |
Sam Bobroff | 9bed31c | 2018-09-12 11:23:20 +1000 | [diff] [blame] | 172 | if (!pdn) { |
| 173 | pr_warn("EEH: Note: No error log for absent device.\n"); |
| 174 | return 0; |
| 175 | } |
| 176 | |
Guilherme G. Piccoli | 10560b9 | 2016-07-22 14:05:29 -0300 | [diff] [blame] | 177 | n += scnprintf(buf+n, len-n, "%04x:%02x:%02x.%01x\n", |
Gavin Shan | 0bd7858 | 2015-03-17 16:15:07 +1100 | [diff] [blame] | 178 | edev->phb->global_number, pdn->busno, |
| 179 | PCI_SLOT(pdn->devfn), PCI_FUNC(pdn->devfn)); |
Guilherme G. Piccoli | 10560b9 | 2016-07-22 14:05:29 -0300 | [diff] [blame] | 180 | pr_warn("EEH: of node=%04x:%02x:%02x.%01x\n", |
Gavin Shan | 0bd7858 | 2015-03-17 16:15:07 +1100 | [diff] [blame] | 181 | edev->phb->global_number, pdn->busno, |
| 182 | PCI_SLOT(pdn->devfn), PCI_FUNC(pdn->devfn)); |
Linas Vepstas | fcf9892b | 2007-05-09 09:36:21 +1000 | [diff] [blame] | 183 | |
Gavin Shan | 0bd7858 | 2015-03-17 16:15:07 +1100 | [diff] [blame] | 184 | eeh_ops->read_config(pdn, PCI_VENDOR_ID, 4, &cfg); |
Linas Vepstas | fcf9892b | 2007-05-09 09:36:21 +1000 | [diff] [blame] | 185 | n += scnprintf(buf+n, len-n, "dev/vend:%08x\n", cfg); |
Gavin Shan | 2d86c38 | 2014-04-24 18:00:15 +1000 | [diff] [blame] | 186 | pr_warn("EEH: PCI device/vendor: %08x\n", cfg); |
Linas Vepstas | fcf9892b | 2007-05-09 09:36:21 +1000 | [diff] [blame] | 187 | |
Gavin Shan | 0bd7858 | 2015-03-17 16:15:07 +1100 | [diff] [blame] | 188 | eeh_ops->read_config(pdn, PCI_COMMAND, 4, &cfg); |
Linas Vepstas | d99bb1d | 2007-05-09 09:35:32 +1000 | [diff] [blame] | 189 | n += scnprintf(buf+n, len-n, "cmd/stat:%x\n", cfg); |
Gavin Shan | 2d86c38 | 2014-04-24 18:00:15 +1000 | [diff] [blame] | 190 | pr_warn("EEH: PCI cmd/status register: %08x\n", cfg); |
Linas Vepstas | d99bb1d | 2007-05-09 09:35:32 +1000 | [diff] [blame] | 191 | |
Linas Vepstas | 0b9369f | 2007-07-27 08:35:40 +1000 | [diff] [blame] | 192 | /* Gather bridge-specific registers */ |
Gavin Shan | 2a18dfc | 2014-04-24 18:00:16 +1000 | [diff] [blame] | 193 | if (edev->mode & EEH_DEV_BRIDGE) { |
Gavin Shan | 0bd7858 | 2015-03-17 16:15:07 +1100 | [diff] [blame] | 194 | eeh_ops->read_config(pdn, PCI_SEC_STATUS, 2, &cfg); |
Linas Vepstas | 0b9369f | 2007-07-27 08:35:40 +1000 | [diff] [blame] | 195 | n += scnprintf(buf+n, len-n, "sec stat:%x\n", cfg); |
Gavin Shan | 2d86c38 | 2014-04-24 18:00:15 +1000 | [diff] [blame] | 196 | pr_warn("EEH: Bridge secondary status: %04x\n", cfg); |
Linas Vepstas | 0b9369f | 2007-07-27 08:35:40 +1000 | [diff] [blame] | 197 | |
Gavin Shan | 0bd7858 | 2015-03-17 16:15:07 +1100 | [diff] [blame] | 198 | eeh_ops->read_config(pdn, PCI_BRIDGE_CONTROL, 2, &cfg); |
Linas Vepstas | 0b9369f | 2007-07-27 08:35:40 +1000 | [diff] [blame] | 199 | n += scnprintf(buf+n, len-n, "brdg ctl:%x\n", cfg); |
Gavin Shan | 2d86c38 | 2014-04-24 18:00:15 +1000 | [diff] [blame] | 200 | pr_warn("EEH: Bridge control: %04x\n", cfg); |
Linas Vepstas | 0b9369f | 2007-07-27 08:35:40 +1000 | [diff] [blame] | 201 | } |
| 202 | |
Linas Vepstas | fcf9892b | 2007-05-09 09:36:21 +1000 | [diff] [blame] | 203 | /* Dump out the PCI-X command and status regs */ |
Gavin Shan | 2a18dfc | 2014-04-24 18:00:16 +1000 | [diff] [blame] | 204 | cap = edev->pcix_cap; |
Linas Vepstas | fcf9892b | 2007-05-09 09:36:21 +1000 | [diff] [blame] | 205 | if (cap) { |
Gavin Shan | 0bd7858 | 2015-03-17 16:15:07 +1100 | [diff] [blame] | 206 | eeh_ops->read_config(pdn, cap, 4, &cfg); |
Linas Vepstas | fcf9892b | 2007-05-09 09:36:21 +1000 | [diff] [blame] | 207 | n += scnprintf(buf+n, len-n, "pcix-cmd:%x\n", cfg); |
Gavin Shan | 2d86c38 | 2014-04-24 18:00:15 +1000 | [diff] [blame] | 208 | pr_warn("EEH: PCI-X cmd: %08x\n", cfg); |
Linas Vepstas | fcf9892b | 2007-05-09 09:36:21 +1000 | [diff] [blame] | 209 | |
Gavin Shan | 0bd7858 | 2015-03-17 16:15:07 +1100 | [diff] [blame] | 210 | eeh_ops->read_config(pdn, cap+4, 4, &cfg); |
Linas Vepstas | fcf9892b | 2007-05-09 09:36:21 +1000 | [diff] [blame] | 211 | n += scnprintf(buf+n, len-n, "pcix-stat:%x\n", cfg); |
Gavin Shan | 2d86c38 | 2014-04-24 18:00:15 +1000 | [diff] [blame] | 212 | pr_warn("EEH: PCI-X status: %08x\n", cfg); |
Linas Vepstas | fcf9892b | 2007-05-09 09:36:21 +1000 | [diff] [blame] | 213 | } |
| 214 | |
Gavin Shan | 2a18dfc | 2014-04-24 18:00:16 +1000 | [diff] [blame] | 215 | /* If PCI-E capable, dump PCI-E cap 10 */ |
| 216 | cap = edev->pcie_cap; |
| 217 | if (cap) { |
Linas Vepstas | fcf9892b | 2007-05-09 09:36:21 +1000 | [diff] [blame] | 218 | n += scnprintf(buf+n, len-n, "pci-e cap10:\n"); |
Gavin Shan | 2d86c38 | 2014-04-24 18:00:15 +1000 | [diff] [blame] | 219 | pr_warn("EEH: PCI-E capabilities and status follow:\n"); |
Linas Vepstas | fcf9892b | 2007-05-09 09:36:21 +1000 | [diff] [blame] | 220 | |
| 221 | for (i=0; i<=8; i++) { |
Gavin Shan | 0bd7858 | 2015-03-17 16:15:07 +1100 | [diff] [blame] | 222 | eeh_ops->read_config(pdn, cap+4*i, 4, &cfg); |
Linas Vepstas | fcf9892b | 2007-05-09 09:36:21 +1000 | [diff] [blame] | 223 | n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg); |
Gavin Shan | 0ed352d | 2014-07-17 14:41:40 +1000 | [diff] [blame] | 224 | |
| 225 | if ((i % 4) == 0) { |
| 226 | if (i != 0) |
| 227 | pr_warn("%s\n", buffer); |
| 228 | |
| 229 | l = scnprintf(buffer, sizeof(buffer), |
| 230 | "EEH: PCI-E %02x: %08x ", |
| 231 | 4*i, cfg); |
| 232 | } else { |
| 233 | l += scnprintf(buffer+l, sizeof(buffer)-l, |
| 234 | "%08x ", cfg); |
| 235 | } |
| 236 | |
Linas Vepstas | fcf9892b | 2007-05-09 09:36:21 +1000 | [diff] [blame] | 237 | } |
Gavin Shan | 0ed352d | 2014-07-17 14:41:40 +1000 | [diff] [blame] | 238 | |
| 239 | pr_warn("%s\n", buffer); |
Gavin Shan | 2a18dfc | 2014-04-24 18:00:16 +1000 | [diff] [blame] | 240 | } |
Linas Vepstas | fcf9892b | 2007-05-09 09:36:21 +1000 | [diff] [blame] | 241 | |
Gavin Shan | 2a18dfc | 2014-04-24 18:00:16 +1000 | [diff] [blame] | 242 | /* If AER capable, dump it */ |
| 243 | cap = edev->aer_cap; |
| 244 | if (cap) { |
| 245 | n += scnprintf(buf+n, len-n, "pci-e AER:\n"); |
| 246 | pr_warn("EEH: PCI-E AER capability register set follows:\n"); |
Linas Vepstas | fcf9892b | 2007-05-09 09:36:21 +1000 | [diff] [blame] | 247 | |
Gavin Shan | 0ed352d | 2014-07-17 14:41:40 +1000 | [diff] [blame] | 248 | for (i=0; i<=13; i++) { |
Gavin Shan | 0bd7858 | 2015-03-17 16:15:07 +1100 | [diff] [blame] | 249 | eeh_ops->read_config(pdn, cap+4*i, 4, &cfg); |
Gavin Shan | 2a18dfc | 2014-04-24 18:00:16 +1000 | [diff] [blame] | 250 | n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg); |
Gavin Shan | 0ed352d | 2014-07-17 14:41:40 +1000 | [diff] [blame] | 251 | |
| 252 | if ((i % 4) == 0) { |
| 253 | if (i != 0) |
| 254 | pr_warn("%s\n", buffer); |
| 255 | |
| 256 | l = scnprintf(buffer, sizeof(buffer), |
| 257 | "EEH: PCI-E AER %02x: %08x ", |
| 258 | 4*i, cfg); |
| 259 | } else { |
| 260 | l += scnprintf(buffer+l, sizeof(buffer)-l, |
| 261 | "%08x ", cfg); |
| 262 | } |
Linas Vepstas | fcf9892b | 2007-05-09 09:36:21 +1000 | [diff] [blame] | 263 | } |
Gavin Shan | 0ed352d | 2014-07-17 14:41:40 +1000 | [diff] [blame] | 264 | |
| 265 | pr_warn("%s\n", buffer); |
Linas Vepstas | fcf9892b | 2007-05-09 09:36:21 +1000 | [diff] [blame] | 266 | } |
Linas Vepstas | 0b9369f | 2007-07-27 08:35:40 +1000 | [diff] [blame] | 267 | |
Linas Vepstas | d99bb1d | 2007-05-09 09:35:32 +1000 | [diff] [blame] | 268 | return n; |
| 269 | } |
| 270 | |
Gavin Shan | f2e0be5 | 2014-09-30 12:39:08 +1000 | [diff] [blame] | 271 | static void *eeh_dump_pe_log(void *data, void *flag) |
| 272 | { |
| 273 | struct eeh_pe *pe = data; |
| 274 | struct eeh_dev *edev, *tmp; |
| 275 | size_t *plen = flag; |
| 276 | |
| 277 | eeh_pe_for_each_dev(pe, edev, tmp) |
| 278 | *plen += eeh_dump_dev_log(edev, pci_regs_buf + *plen, |
| 279 | EEH_PCI_REGS_LOG_LEN - *plen); |
| 280 | |
| 281 | return NULL; |
| 282 | } |
| 283 | |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 284 | /** |
| 285 | * eeh_slot_error_detail - Generate combined log including driver log and error log |
Gavin Shan | ff47796 | 2012-09-07 22:44:16 +0000 | [diff] [blame] | 286 | * @pe: EEH PE |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 287 | * @severity: temporary or permanent error log |
| 288 | * |
| 289 | * This routine should be called to generate the combined log, which |
| 290 | * is comprised of driver log and error log. The driver log is figured |
| 291 | * out from the config space of the corresponding PCI device, while |
| 292 | * the error log is fetched through platform dependent function call. |
| 293 | */ |
Gavin Shan | ff47796 | 2012-09-07 22:44:16 +0000 | [diff] [blame] | 294 | void eeh_slot_error_detail(struct eeh_pe *pe, int severity) |
Linas Vepstas | d99bb1d | 2007-05-09 09:35:32 +1000 | [diff] [blame] | 295 | { |
| 296 | size_t loglen = 0; |
Gavin Shan | ff47796 | 2012-09-07 22:44:16 +0000 | [diff] [blame] | 297 | |
Gavin Shan | c35ae17 | 2013-06-27 13:46:42 +0800 | [diff] [blame] | 298 | /* |
| 299 | * When the PHB is fenced or dead, it's pointless to collect |
| 300 | * the data from PCI config space because it should return |
| 301 | * 0xFF's. For ER, we still retrieve the data from the PCI |
| 302 | * config space. |
Gavin Shan | 7895470 | 2014-04-24 18:00:14 +1000 | [diff] [blame] | 303 | * |
| 304 | * For pHyp, we have to enable IO for log retrieval. Otherwise, |
| 305 | * 0xFF's is always returned from PCI config space. |
Gavin Shan | 6e315b2 | 2017-01-06 10:39:49 +1100 | [diff] [blame] | 306 | * |
| 307 | * When the @severity is EEH_LOG_PERM, the PE is going to be |
| 308 | * removed. Prior to that, the drivers for devices included in |
| 309 | * the PE will be closed. The drivers rely on working IO path |
| 310 | * to bring the devices to quiet state. Otherwise, PCI traffic |
| 311 | * from those devices after they are removed is like to cause |
| 312 | * another unexpected EEH error. |
Gavin Shan | c35ae17 | 2013-06-27 13:46:42 +0800 | [diff] [blame] | 313 | */ |
Gavin Shan | 9e04937 | 2014-04-24 18:00:07 +1000 | [diff] [blame] | 314 | if (!(pe->type & EEH_PE_PHB)) { |
Gavin Shan | 6e315b2 | 2017-01-06 10:39:49 +1100 | [diff] [blame] | 315 | if (eeh_has_flag(EEH_ENABLE_IO_FOR_LOG) || |
| 316 | severity == EEH_LOG_PERM) |
Gavin Shan | 7895470 | 2014-04-24 18:00:14 +1000 | [diff] [blame] | 317 | eeh_pci_enable(pe, EEH_OPT_THAW_MMIO); |
Gavin Shan | c35ae17 | 2013-06-27 13:46:42 +0800 | [diff] [blame] | 318 | |
Gavin Shan | 2598001 | 2015-08-28 11:57:00 +1000 | [diff] [blame] | 319 | /* |
| 320 | * The config space of some PCI devices can't be accessed |
| 321 | * when their PEs are in frozen state. Otherwise, fenced |
| 322 | * PHB might be seen. Those PEs are identified with flag |
| 323 | * EEH_PE_CFG_RESTRICTED, indicating EEH_PE_CFG_BLOCKED |
| 324 | * is set automatically when the PE is put to EEH_PE_ISOLATED. |
| 325 | * |
| 326 | * Restoring BARs possibly triggers PCI config access in |
| 327 | * (OPAL) firmware and then causes fenced PHB. If the |
| 328 | * PCI config is blocked with flag EEH_PE_CFG_BLOCKED, it's |
| 329 | * pointless to restore BARs and dump config space. |
| 330 | */ |
| 331 | eeh_ops->configure_bridge(pe); |
| 332 | if (!(pe->state & EEH_PE_CFG_BLOCKED)) { |
| 333 | eeh_pe_restore_bars(pe); |
| 334 | |
| 335 | pci_regs_buf[0] = 0; |
| 336 | eeh_pe_traverse(pe, eeh_dump_pe_log, &loglen); |
| 337 | } |
Gavin Shan | c35ae17 | 2013-06-27 13:46:42 +0800 | [diff] [blame] | 338 | } |
Linas Vepstas | d99bb1d | 2007-05-09 09:35:32 +1000 | [diff] [blame] | 339 | |
Gavin Shan | ff47796 | 2012-09-07 22:44:16 +0000 | [diff] [blame] | 340 | eeh_ops->get_log(pe, severity, pci_regs_buf, loglen); |
Linas Vepstas | d99bb1d | 2007-05-09 09:35:32 +1000 | [diff] [blame] | 341 | } |
| 342 | |
| 343 | /** |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 344 | * eeh_token_to_phys - Convert EEH address token to phys address |
| 345 | * @token: I/O token, should be address in the form 0xA.... |
| 346 | * |
| 347 | * This routine should be called to convert virtual I/O address |
| 348 | * to physical one. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 349 | */ |
| 350 | static inline unsigned long eeh_token_to_phys(unsigned long token) |
| 351 | { |
| 352 | pte_t *ptep; |
| 353 | unsigned long pa; |
Aneesh Kumar K.V | 12bc9f6 | 2013-06-20 14:30:18 +0530 | [diff] [blame] | 354 | int hugepage_shift; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 355 | |
Aneesh Kumar K.V | 12bc9f6 | 2013-06-20 14:30:18 +0530 | [diff] [blame] | 356 | /* |
Aneesh Kumar K.V | 691e95f | 2015-03-30 10:41:03 +0530 | [diff] [blame] | 357 | * We won't find hugepages here(this is iomem). Hence we are not |
| 358 | * worried about _PAGE_SPLITTING/collapse. Also we will not hit |
| 359 | * page table free, because of init_mm. |
Aneesh Kumar K.V | 12bc9f6 | 2013-06-20 14:30:18 +0530 | [diff] [blame] | 360 | */ |
Aneesh Kumar K.V | 891121e | 2015-10-09 08:32:21 +0530 | [diff] [blame] | 361 | ptep = __find_linux_pte_or_hugepte(init_mm.pgd, token, |
| 362 | NULL, &hugepage_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 363 | if (!ptep) |
| 364 | return token; |
Aneesh Kumar K.V | 12bc9f6 | 2013-06-20 14:30:18 +0530 | [diff] [blame] | 365 | WARN_ON(hugepage_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 366 | pa = pte_pfn(*ptep) << PAGE_SHIFT; |
| 367 | |
| 368 | return pa | (token & (PAGE_SIZE-1)); |
| 369 | } |
| 370 | |
Gavin Shan | b95cd2c | 2013-06-20 13:21:16 +0800 | [diff] [blame] | 371 | /* |
| 372 | * On PowerNV platform, we might already have fenced PHB there. |
| 373 | * For that case, it's meaningless to recover frozen PE. Intead, |
| 374 | * We have to handle fenced PHB firstly. |
| 375 | */ |
| 376 | static int eeh_phb_check_failure(struct eeh_pe *pe) |
| 377 | { |
| 378 | struct eeh_pe *phb_pe; |
| 379 | unsigned long flags; |
| 380 | int ret; |
| 381 | |
Gavin Shan | 05b1721 | 2014-07-17 14:41:38 +1000 | [diff] [blame] | 382 | if (!eeh_has_flag(EEH_PROBE_MODE_DEV)) |
Gavin Shan | b95cd2c | 2013-06-20 13:21:16 +0800 | [diff] [blame] | 383 | return -EPERM; |
| 384 | |
| 385 | /* Find the PHB PE */ |
| 386 | phb_pe = eeh_phb_pe_get(pe->phb); |
| 387 | if (!phb_pe) { |
Gavin Shan | 0dae274 | 2014-07-17 14:41:41 +1000 | [diff] [blame] | 388 | pr_warn("%s Can't find PE for PHB#%d\n", |
| 389 | __func__, pe->phb->global_number); |
Gavin Shan | b95cd2c | 2013-06-20 13:21:16 +0800 | [diff] [blame] | 390 | return -EEXIST; |
| 391 | } |
| 392 | |
| 393 | /* If the PHB has been in problematic state */ |
| 394 | eeh_serialize_lock(&flags); |
Gavin Shan | 9e04937 | 2014-04-24 18:00:07 +1000 | [diff] [blame] | 395 | if (phb_pe->state & EEH_PE_ISOLATED) { |
Gavin Shan | b95cd2c | 2013-06-20 13:21:16 +0800 | [diff] [blame] | 396 | ret = 0; |
| 397 | goto out; |
| 398 | } |
| 399 | |
| 400 | /* Check PHB state */ |
| 401 | ret = eeh_ops->get_state(phb_pe, NULL); |
| 402 | if ((ret < 0) || |
| 403 | (ret == EEH_STATE_NOT_SUPPORT) || |
| 404 | (ret & (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) == |
| 405 | (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) { |
| 406 | ret = 0; |
| 407 | goto out; |
| 408 | } |
| 409 | |
| 410 | /* Isolate the PHB and send event */ |
| 411 | eeh_pe_state_mark(phb_pe, EEH_PE_ISOLATED); |
| 412 | eeh_serialize_unlock(flags); |
Gavin Shan | b95cd2c | 2013-06-20 13:21:16 +0800 | [diff] [blame] | 413 | |
Gavin Shan | 357b2f3 | 2014-06-11 18:26:44 +1000 | [diff] [blame] | 414 | pr_err("EEH: PHB#%x failure detected, location: %s\n", |
| 415 | phb_pe->phb->global_number, eeh_pe_loc_get(phb_pe)); |
Gavin Shan | 56ca4fd | 2013-06-27 13:46:46 +0800 | [diff] [blame] | 416 | dump_stack(); |
Gavin Shan | 5293bf9 | 2013-09-06 09:00:05 +0800 | [diff] [blame] | 417 | eeh_send_failure_event(phb_pe); |
Gavin Shan | b95cd2c | 2013-06-20 13:21:16 +0800 | [diff] [blame] | 418 | |
| 419 | return 1; |
| 420 | out: |
| 421 | eeh_serialize_unlock(flags); |
| 422 | return ret; |
| 423 | } |
| 424 | |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 425 | /** |
Gavin Shan | f8f7d63 | 2012-09-07 22:44:22 +0000 | [diff] [blame] | 426 | * eeh_dev_check_failure - Check if all 1's data is due to EEH slot freeze |
| 427 | * @edev: eeh device |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 428 | * |
| 429 | * Check for an EEH failure for the given device node. Call this |
| 430 | * routine if the result of a read was all 0xff's and you want to |
| 431 | * find out if this is due to an EEH slot freeze. This routine |
| 432 | * will query firmware for the EEH status. |
| 433 | * |
| 434 | * Returns 0 if there has not been an EEH error; otherwise returns |
Linas Vepstas | 6937650 | 2005-11-03 18:47:50 -0600 | [diff] [blame] | 435 | * a non-zero value and queues up a slot isolation event notification. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 436 | * |
| 437 | * It is safe to call this routine in an interrupt context. |
| 438 | */ |
Gavin Shan | f8f7d63 | 2012-09-07 22:44:22 +0000 | [diff] [blame] | 439 | int eeh_dev_check_failure(struct eeh_dev *edev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 440 | { |
| 441 | int ret; |
Gavin Shan | 1ad7a72 | 2014-05-05 09:29:03 +1000 | [diff] [blame] | 442 | int active_flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 443 | unsigned long flags; |
Gavin Shan | c6406d8 | 2015-03-17 16:15:08 +1100 | [diff] [blame] | 444 | struct pci_dn *pdn; |
Gavin Shan | f8f7d63 | 2012-09-07 22:44:22 +0000 | [diff] [blame] | 445 | struct pci_dev *dev; |
Gavin Shan | 357b2f3 | 2014-06-11 18:26:44 +1000 | [diff] [blame] | 446 | struct eeh_pe *pe, *parent_pe, *phb_pe; |
Linas Vepstas | fd761fd | 2005-11-03 18:49:23 -0600 | [diff] [blame] | 447 | int rc = 0; |
Gavin Shan | c6406d8 | 2015-03-17 16:15:08 +1100 | [diff] [blame] | 448 | const char *location = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 449 | |
Gavin Shan | e575f8d | 2012-02-29 15:47:45 +0000 | [diff] [blame] | 450 | eeh_stats.total_mmio_ffs++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 451 | |
Gavin Shan | 2ec5a0a | 2014-02-12 15:24:55 +0800 | [diff] [blame] | 452 | if (!eeh_enabled()) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 453 | return 0; |
| 454 | |
Gavin Shan | f8f7d63 | 2012-09-07 22:44:22 +0000 | [diff] [blame] | 455 | if (!edev) { |
Gavin Shan | e575f8d | 2012-02-29 15:47:45 +0000 | [diff] [blame] | 456 | eeh_stats.no_dn++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 457 | return 0; |
Linas Vepstas | 177bc93 | 2005-11-03 18:48:52 -0600 | [diff] [blame] | 458 | } |
Gavin Shan | f8f7d63 | 2012-09-07 22:44:22 +0000 | [diff] [blame] | 459 | dev = eeh_dev_to_pci_dev(edev); |
Wei Yang | 2a58222 | 2014-09-17 10:48:26 +0800 | [diff] [blame] | 460 | pe = eeh_dev_to_pe(edev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 461 | |
| 462 | /* Access to IO BARs might get this far and still not want checking. */ |
Gavin Shan | 66523d9 | 2012-09-07 22:44:13 +0000 | [diff] [blame] | 463 | if (!pe) { |
Gavin Shan | e575f8d | 2012-02-29 15:47:45 +0000 | [diff] [blame] | 464 | eeh_stats.ignored_check++; |
Gavin Shan | c6406d8 | 2015-03-17 16:15:08 +1100 | [diff] [blame] | 465 | pr_debug("EEH: Ignored check for %s\n", |
| 466 | eeh_pci_name(dev)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 467 | return 0; |
| 468 | } |
| 469 | |
Gavin Shan | 66523d9 | 2012-09-07 22:44:13 +0000 | [diff] [blame] | 470 | if (!pe->addr && !pe->config_addr) { |
Gavin Shan | e575f8d | 2012-02-29 15:47:45 +0000 | [diff] [blame] | 471 | eeh_stats.no_cfg_addr++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 472 | return 0; |
| 473 | } |
| 474 | |
Gavin Shan | b95cd2c | 2013-06-20 13:21:16 +0800 | [diff] [blame] | 475 | /* |
| 476 | * On PowerNV platform, we might already have fenced PHB |
| 477 | * there and we need take care of that firstly. |
| 478 | */ |
| 479 | ret = eeh_phb_check_failure(pe); |
| 480 | if (ret > 0) |
| 481 | return ret; |
| 482 | |
Gavin Shan | 05ec424 | 2014-06-10 11:41:55 +1000 | [diff] [blame] | 483 | /* |
| 484 | * If the PE isn't owned by us, we shouldn't check the |
| 485 | * state. Instead, let the owner handle it if the PE has |
| 486 | * been frozen. |
| 487 | */ |
| 488 | if (eeh_pe_passed(pe)) |
| 489 | return 0; |
| 490 | |
Linas Vepstas | fd761fd | 2005-11-03 18:49:23 -0600 | [diff] [blame] | 491 | /* If we already have a pending isolation event for this |
| 492 | * slot, we know it's bad already, we don't need to check. |
| 493 | * Do this checking under a lock; as multiple PCI devices |
| 494 | * in one slot might report errors simultaneously, and we |
| 495 | * only want one error recovery routine running. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 496 | */ |
Gavin Shan | 4907581 | 2013-06-20 13:21:03 +0800 | [diff] [blame] | 497 | eeh_serialize_lock(&flags); |
Linas Vepstas | fd761fd | 2005-11-03 18:49:23 -0600 | [diff] [blame] | 498 | rc = 1; |
Gavin Shan | 66523d9 | 2012-09-07 22:44:13 +0000 | [diff] [blame] | 499 | if (pe->state & EEH_PE_ISOLATED) { |
| 500 | pe->check_count++; |
| 501 | if (pe->check_count % EEH_MAX_FAILS == 0) { |
Gavin Shan | c6406d8 | 2015-03-17 16:15:08 +1100 | [diff] [blame] | 502 | pdn = eeh_dev_to_pdn(edev); |
| 503 | if (pdn->node) |
| 504 | location = of_get_property(pdn->node, "ibm,loc-code", NULL); |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 505 | printk(KERN_ERR "EEH: %d reads ignored for recovering device at " |
Mike Mason | f36c522 | 2008-07-22 02:40:17 +1000 | [diff] [blame] | 506 | "location=%s driver=%s pci addr=%s\n", |
Gavin Shan | c6406d8 | 2015-03-17 16:15:08 +1100 | [diff] [blame] | 507 | pe->check_count, |
| 508 | location ? location : "unknown", |
Thadeu Lima de Souza Cascardo | 778a785 | 2012-01-11 09:09:58 +0000 | [diff] [blame] | 509 | eeh_driver_name(dev), eeh_pci_name(dev)); |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 510 | printk(KERN_ERR "EEH: Might be infinite loop in %s driver\n", |
Thadeu Lima de Souza Cascardo | 778a785 | 2012-01-11 09:09:58 +0000 | [diff] [blame] | 511 | eeh_driver_name(dev)); |
Linas Vepstas | 5c1344e | 2005-11-03 18:49:31 -0600 | [diff] [blame] | 512 | dump_stack(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 513 | } |
Linas Vepstas | fd761fd | 2005-11-03 18:49:23 -0600 | [diff] [blame] | 514 | goto dn_unlock; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 515 | } |
| 516 | |
| 517 | /* |
| 518 | * Now test for an EEH failure. This is VERY expensive. |
| 519 | * Note that the eeh_config_addr may be a parent device |
| 520 | * in the case of a device behind a bridge, or it may be |
| 521 | * function zero of a multi-function device. |
| 522 | * In any case they must share a common PHB. |
| 523 | */ |
Gavin Shan | 66523d9 | 2012-09-07 22:44:13 +0000 | [diff] [blame] | 524 | ret = eeh_ops->get_state(pe, NULL); |
Linas Vepstas | 76e6faf | 2005-11-03 18:49:15 -0600 | [diff] [blame] | 525 | |
Linas Vepstas | 39d16e2 | 2007-03-19 14:51:00 -0500 | [diff] [blame] | 526 | /* Note that config-io to empty slots may fail; |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 527 | * they are empty when they don't have children. |
Gavin Shan | eb594a4 | 2012-02-27 20:03:57 +0000 | [diff] [blame] | 528 | * We will punt with the following conditions: Failure to get |
| 529 | * PE's state, EEH not support and Permanently unavailable |
| 530 | * state, PE is in good state. |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 531 | */ |
Gavin Shan | eb594a4 | 2012-02-27 20:03:57 +0000 | [diff] [blame] | 532 | if ((ret < 0) || |
| 533 | (ret == EEH_STATE_NOT_SUPPORT) || |
Gavin Shan | 1ad7a72 | 2014-05-05 09:29:03 +1000 | [diff] [blame] | 534 | ((ret & active_flags) == active_flags)) { |
Gavin Shan | e575f8d | 2012-02-29 15:47:45 +0000 | [diff] [blame] | 535 | eeh_stats.false_positives++; |
Gavin Shan | 66523d9 | 2012-09-07 22:44:13 +0000 | [diff] [blame] | 536 | pe->false_positives++; |
Linas Vepstas | fd761fd | 2005-11-03 18:49:23 -0600 | [diff] [blame] | 537 | rc = 0; |
| 538 | goto dn_unlock; |
Linas Vepstas | 76e6faf | 2005-11-03 18:49:15 -0600 | [diff] [blame] | 539 | } |
| 540 | |
Gavin Shan | 1ad7a72 | 2014-05-05 09:29:03 +1000 | [diff] [blame] | 541 | /* |
| 542 | * It should be corner case that the parent PE has been |
| 543 | * put into frozen state as well. We should take care |
| 544 | * that at first. |
| 545 | */ |
| 546 | parent_pe = pe->parent; |
| 547 | while (parent_pe) { |
| 548 | /* Hit the ceiling ? */ |
| 549 | if (parent_pe->type & EEH_PE_PHB) |
| 550 | break; |
| 551 | |
| 552 | /* Frozen parent PE ? */ |
| 553 | ret = eeh_ops->get_state(parent_pe, NULL); |
| 554 | if (ret > 0 && |
| 555 | (ret & active_flags) != active_flags) |
| 556 | pe = parent_pe; |
| 557 | |
| 558 | /* Next parent level */ |
| 559 | parent_pe = parent_pe->parent; |
| 560 | } |
| 561 | |
Gavin Shan | e575f8d | 2012-02-29 15:47:45 +0000 | [diff] [blame] | 562 | eeh_stats.slot_resets++; |
Gavin Shan | a84f273 | 2013-06-20 13:20:51 +0800 | [diff] [blame] | 563 | |
Linas Vepstas | fd761fd | 2005-11-03 18:49:23 -0600 | [diff] [blame] | 564 | /* Avoid repeated reports of this failure, including problems |
| 565 | * with other functions on this device, and functions under |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 566 | * bridges. |
| 567 | */ |
Gavin Shan | 66523d9 | 2012-09-07 22:44:13 +0000 | [diff] [blame] | 568 | eeh_pe_state_mark(pe, EEH_PE_ISOLATED); |
Gavin Shan | 4907581 | 2013-06-20 13:21:03 +0800 | [diff] [blame] | 569 | eeh_serialize_unlock(flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 570 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 571 | /* Most EEH events are due to device driver bugs. Having |
| 572 | * a stack trace will help the device-driver authors figure |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 573 | * out what happened. So print that out. |
| 574 | */ |
Gavin Shan | 357b2f3 | 2014-06-11 18:26:44 +1000 | [diff] [blame] | 575 | phb_pe = eeh_phb_pe_get(pe->phb); |
| 576 | pr_err("EEH: Frozen PHB#%x-PE#%x detected\n", |
| 577 | pe->phb->global_number, pe->addr); |
| 578 | pr_err("EEH: PE location: %s, PHB location: %s\n", |
| 579 | eeh_pe_loc_get(pe), eeh_pe_loc_get(phb_pe)); |
Gavin Shan | 56ca4fd | 2013-06-27 13:46:46 +0800 | [diff] [blame] | 580 | dump_stack(); |
| 581 | |
Gavin Shan | 5293bf9 | 2013-09-06 09:00:05 +0800 | [diff] [blame] | 582 | eeh_send_failure_event(pe); |
| 583 | |
Linas Vepstas | fd761fd | 2005-11-03 18:49:23 -0600 | [diff] [blame] | 584 | return 1; |
| 585 | |
| 586 | dn_unlock: |
Gavin Shan | 4907581 | 2013-06-20 13:21:03 +0800 | [diff] [blame] | 587 | eeh_serialize_unlock(flags); |
Linas Vepstas | fd761fd | 2005-11-03 18:49:23 -0600 | [diff] [blame] | 588 | return rc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 589 | } |
| 590 | |
Gavin Shan | f8f7d63 | 2012-09-07 22:44:22 +0000 | [diff] [blame] | 591 | EXPORT_SYMBOL_GPL(eeh_dev_check_failure); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 592 | |
| 593 | /** |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 594 | * eeh_check_failure - Check if all 1's data is due to EEH slot freeze |
Gavin Shan | 3e93805 | 2014-09-30 12:38:50 +1000 | [diff] [blame] | 595 | * @token: I/O address |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 596 | * |
Gavin Shan | 3e93805 | 2014-09-30 12:38:50 +1000 | [diff] [blame] | 597 | * Check for an EEH failure at the given I/O address. Call this |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 598 | * routine if the result of a read was all 0xff's and you want to |
Gavin Shan | 3e93805 | 2014-09-30 12:38:50 +1000 | [diff] [blame] | 599 | * find out if this is due to an EEH slot freeze event. This routine |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 600 | * will query firmware for the EEH status. |
| 601 | * |
| 602 | * Note this routine is safe to call in an interrupt context. |
| 603 | */ |
Gavin Shan | 3e93805 | 2014-09-30 12:38:50 +1000 | [diff] [blame] | 604 | int eeh_check_failure(const volatile void __iomem *token) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 605 | { |
| 606 | unsigned long addr; |
Gavin Shan | f8f7d63 | 2012-09-07 22:44:22 +0000 | [diff] [blame] | 607 | struct eeh_dev *edev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 608 | |
| 609 | /* Finding the phys addr + pci device; this is pretty quick. */ |
| 610 | addr = eeh_token_to_phys((unsigned long __force) token); |
Gavin Shan | 3ab96a0 | 2012-09-07 22:44:23 +0000 | [diff] [blame] | 611 | edev = eeh_addr_cache_get_dev(addr); |
Gavin Shan | f8f7d63 | 2012-09-07 22:44:22 +0000 | [diff] [blame] | 612 | if (!edev) { |
Gavin Shan | e575f8d | 2012-02-29 15:47:45 +0000 | [diff] [blame] | 613 | eeh_stats.no_device++; |
Gavin Shan | 3e93805 | 2014-09-30 12:38:50 +1000 | [diff] [blame] | 614 | return 0; |
Linas Vepstas | 177bc93 | 2005-11-03 18:48:52 -0600 | [diff] [blame] | 615 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 616 | |
Gavin Shan | 3e93805 | 2014-09-30 12:38:50 +1000 | [diff] [blame] | 617 | return eeh_dev_check_failure(edev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 618 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 619 | EXPORT_SYMBOL(eeh_check_failure); |
| 620 | |
Linas Vepstas | 6dee3fb | 2005-11-03 18:50:10 -0600 | [diff] [blame] | 621 | |
Linas Vepstas | cb5b5624 | 2006-09-15 18:56:35 -0500 | [diff] [blame] | 622 | /** |
Gavin Shan | cce4b2d | 2012-02-27 20:03:52 +0000 | [diff] [blame] | 623 | * eeh_pci_enable - Enable MMIO or DMA transfers for this slot |
Gavin Shan | ff47796 | 2012-09-07 22:44:16 +0000 | [diff] [blame] | 624 | * @pe: EEH PE |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 625 | * |
| 626 | * This routine should be called to reenable frozen MMIO or DMA |
| 627 | * so that it would work correctly again. It's useful while doing |
| 628 | * recovery or log collection on the indicated device. |
Linas Vepstas | 47b5c83 | 2006-09-15 18:57:42 -0500 | [diff] [blame] | 629 | */ |
Gavin Shan | ff47796 | 2012-09-07 22:44:16 +0000 | [diff] [blame] | 630 | int eeh_pci_enable(struct eeh_pe *pe, int function) |
Linas Vepstas | 47b5c83 | 2006-09-15 18:57:42 -0500 | [diff] [blame] | 631 | { |
Gavin Shan | 4d4f577 | 2014-09-30 12:39:00 +1000 | [diff] [blame] | 632 | int active_flag, rc; |
Gavin Shan | 7895470 | 2014-04-24 18:00:14 +1000 | [diff] [blame] | 633 | |
| 634 | /* |
| 635 | * pHyp doesn't allow to enable IO or DMA on unfrozen PE. |
| 636 | * Also, it's pointless to enable them on unfrozen PE. So |
Gavin Shan | 4d4f577 | 2014-09-30 12:39:00 +1000 | [diff] [blame] | 637 | * we have to check before enabling IO or DMA. |
Gavin Shan | 7895470 | 2014-04-24 18:00:14 +1000 | [diff] [blame] | 638 | */ |
Gavin Shan | 4d4f577 | 2014-09-30 12:39:00 +1000 | [diff] [blame] | 639 | switch (function) { |
| 640 | case EEH_OPT_THAW_MMIO: |
Gavin Shan | 872ee2d | 2015-10-08 14:58:55 +1100 | [diff] [blame] | 641 | active_flag = EEH_STATE_MMIO_ACTIVE | EEH_STATE_MMIO_ENABLED; |
Gavin Shan | 4d4f577 | 2014-09-30 12:39:00 +1000 | [diff] [blame] | 642 | break; |
| 643 | case EEH_OPT_THAW_DMA: |
| 644 | active_flag = EEH_STATE_DMA_ACTIVE; |
| 645 | break; |
| 646 | case EEH_OPT_DISABLE: |
| 647 | case EEH_OPT_ENABLE: |
| 648 | case EEH_OPT_FREEZE_PE: |
| 649 | active_flag = 0; |
| 650 | break; |
| 651 | default: |
| 652 | pr_warn("%s: Invalid function %d\n", |
| 653 | __func__, function); |
| 654 | return -EINVAL; |
| 655 | } |
| 656 | |
| 657 | /* |
| 658 | * Check if IO or DMA has been enabled before |
| 659 | * enabling them. |
| 660 | */ |
| 661 | if (active_flag) { |
Gavin Shan | 7895470 | 2014-04-24 18:00:14 +1000 | [diff] [blame] | 662 | rc = eeh_ops->get_state(pe, NULL); |
| 663 | if (rc < 0) |
| 664 | return rc; |
| 665 | |
Gavin Shan | 4d4f577 | 2014-09-30 12:39:00 +1000 | [diff] [blame] | 666 | /* Needn't enable it at all */ |
| 667 | if (rc == EEH_STATE_NOT_SUPPORT) |
| 668 | return 0; |
| 669 | |
| 670 | /* It's already enabled */ |
| 671 | if (rc & active_flag) |
Gavin Shan | 7895470 | 2014-04-24 18:00:14 +1000 | [diff] [blame] | 672 | return 0; |
| 673 | } |
Linas Vepstas | 47b5c83 | 2006-09-15 18:57:42 -0500 | [diff] [blame] | 674 | |
Gavin Shan | 4d4f577 | 2014-09-30 12:39:00 +1000 | [diff] [blame] | 675 | |
| 676 | /* Issue the request */ |
Gavin Shan | ff47796 | 2012-09-07 22:44:16 +0000 | [diff] [blame] | 677 | rc = eeh_ops->set_option(pe, function); |
Linas Vepstas | 47b5c83 | 2006-09-15 18:57:42 -0500 | [diff] [blame] | 678 | if (rc) |
Gavin Shan | 7895470 | 2014-04-24 18:00:14 +1000 | [diff] [blame] | 679 | pr_warn("%s: Unexpected state change %d on " |
| 680 | "PHB#%d-PE#%x, err=%d\n", |
| 681 | __func__, function, pe->phb->global_number, |
| 682 | pe->addr, rc); |
Linas Vepstas | 47b5c83 | 2006-09-15 18:57:42 -0500 | [diff] [blame] | 683 | |
Gavin Shan | 4d4f577 | 2014-09-30 12:39:00 +1000 | [diff] [blame] | 684 | /* Check if the request is finished successfully */ |
| 685 | if (active_flag) { |
| 686 | rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC); |
Andrew Donnellan | 949e9b8 | 2015-10-23 17:19:46 +1100 | [diff] [blame] | 687 | if (rc < 0) |
Gavin Shan | 4d4f577 | 2014-09-30 12:39:00 +1000 | [diff] [blame] | 688 | return rc; |
Gavin Shan | 7895470 | 2014-04-24 18:00:14 +1000 | [diff] [blame] | 689 | |
Gavin Shan | 4d4f577 | 2014-09-30 12:39:00 +1000 | [diff] [blame] | 690 | if (rc & active_flag) |
| 691 | return 0; |
Gavin Shan | 7895470 | 2014-04-24 18:00:14 +1000 | [diff] [blame] | 692 | |
Gavin Shan | 4d4f577 | 2014-09-30 12:39:00 +1000 | [diff] [blame] | 693 | return -EIO; |
| 694 | } |
Linas Vepstas | fa1be47 | 2007-03-19 14:59:59 -0500 | [diff] [blame] | 695 | |
Linas Vepstas | 47b5c83 | 2006-09-15 18:57:42 -0500 | [diff] [blame] | 696 | return rc; |
| 697 | } |
| 698 | |
Gavin Shan | 28158cd | 2015-02-11 10:20:49 +1100 | [diff] [blame] | 699 | static void *eeh_disable_and_save_dev_state(void *data, void *userdata) |
| 700 | { |
| 701 | struct eeh_dev *edev = data; |
| 702 | struct pci_dev *pdev = eeh_dev_to_pci_dev(edev); |
| 703 | struct pci_dev *dev = userdata; |
| 704 | |
| 705 | /* |
| 706 | * The caller should have disabled and saved the |
| 707 | * state for the specified device |
| 708 | */ |
| 709 | if (!pdev || pdev == dev) |
| 710 | return NULL; |
| 711 | |
| 712 | /* Ensure we have D0 power state */ |
| 713 | pci_set_power_state(pdev, PCI_D0); |
| 714 | |
| 715 | /* Save device state */ |
| 716 | pci_save_state(pdev); |
| 717 | |
| 718 | /* |
| 719 | * Disable device to avoid any DMA traffic and |
| 720 | * interrupt from the device |
| 721 | */ |
| 722 | pci_write_config_word(pdev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE); |
| 723 | |
| 724 | return NULL; |
| 725 | } |
| 726 | |
| 727 | static void *eeh_restore_dev_state(void *data, void *userdata) |
| 728 | { |
| 729 | struct eeh_dev *edev = data; |
Gavin Shan | 0bd7858 | 2015-03-17 16:15:07 +1100 | [diff] [blame] | 730 | struct pci_dn *pdn = eeh_dev_to_pdn(edev); |
Gavin Shan | 28158cd | 2015-02-11 10:20:49 +1100 | [diff] [blame] | 731 | struct pci_dev *pdev = eeh_dev_to_pci_dev(edev); |
| 732 | struct pci_dev *dev = userdata; |
| 733 | |
| 734 | if (!pdev) |
| 735 | return NULL; |
| 736 | |
| 737 | /* Apply customization from firmware */ |
Gavin Shan | 0bd7858 | 2015-03-17 16:15:07 +1100 | [diff] [blame] | 738 | if (pdn && eeh_ops->restore_config) |
| 739 | eeh_ops->restore_config(pdn); |
Gavin Shan | 28158cd | 2015-02-11 10:20:49 +1100 | [diff] [blame] | 740 | |
| 741 | /* The caller should restore state for the specified device */ |
| 742 | if (pdev != dev) |
David Gibson | 502f159 | 2015-06-03 14:52:59 +1000 | [diff] [blame] | 743 | pci_restore_state(pdev); |
Gavin Shan | 28158cd | 2015-02-11 10:20:49 +1100 | [diff] [blame] | 744 | |
| 745 | return NULL; |
| 746 | } |
| 747 | |
Linas Vepstas | 47b5c83 | 2006-09-15 18:57:42 -0500 | [diff] [blame] | 748 | /** |
Andrew Donnellan | 31f6a4a | 2016-02-08 14:39:19 +1100 | [diff] [blame] | 749 | * pcibios_set_pcie_reset_state - Set PCI-E reset state |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 750 | * @dev: pci device struct |
| 751 | * @state: reset state to enter |
Brian King | 00c2ae3 | 2007-05-08 08:04:05 +1000 | [diff] [blame] | 752 | * |
| 753 | * Return value: |
| 754 | * 0 if success |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 755 | */ |
Brian King | 00c2ae3 | 2007-05-08 08:04:05 +1000 | [diff] [blame] | 756 | int pcibios_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state) |
| 757 | { |
Gavin Shan | c270a24 | 2012-09-07 22:44:17 +0000 | [diff] [blame] | 758 | struct eeh_dev *edev = pci_dev_to_eeh_dev(dev); |
Wei Yang | 2a58222 | 2014-09-17 10:48:26 +0800 | [diff] [blame] | 759 | struct eeh_pe *pe = eeh_dev_to_pe(edev); |
Gavin Shan | c270a24 | 2012-09-07 22:44:17 +0000 | [diff] [blame] | 760 | |
| 761 | if (!pe) { |
| 762 | pr_err("%s: No PE found on PCI device %s\n", |
| 763 | __func__, pci_name(dev)); |
| 764 | return -EINVAL; |
| 765 | } |
Brian King | 00c2ae3 | 2007-05-08 08:04:05 +1000 | [diff] [blame] | 766 | |
| 767 | switch (state) { |
| 768 | case pcie_deassert_reset: |
Gavin Shan | c270a24 | 2012-09-07 22:44:17 +0000 | [diff] [blame] | 769 | eeh_ops->reset(pe, EEH_RESET_DEACTIVATE); |
Gavin Shan | 28158cd | 2015-02-11 10:20:49 +1100 | [diff] [blame] | 770 | eeh_unfreeze_pe(pe, false); |
Wei Yang | 9312bc5 | 2016-03-04 10:53:09 +1100 | [diff] [blame] | 771 | if (!(pe->type & EEH_PE_VF)) |
| 772 | eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED); |
Gavin Shan | 28158cd | 2015-02-11 10:20:49 +1100 | [diff] [blame] | 773 | eeh_pe_dev_traverse(pe, eeh_restore_dev_state, dev); |
Gavin Shan | 1ae79b7 | 2015-05-01 09:14:11 +1000 | [diff] [blame] | 774 | eeh_pe_state_clear(pe, EEH_PE_ISOLATED); |
Brian King | 00c2ae3 | 2007-05-08 08:04:05 +1000 | [diff] [blame] | 775 | break; |
| 776 | case pcie_hot_reset: |
Gavin Shan | 39bfd71 | 2015-07-30 09:26:51 +1000 | [diff] [blame] | 777 | eeh_pe_state_mark_with_cfg(pe, EEH_PE_ISOLATED); |
Gavin Shan | 28158cd | 2015-02-11 10:20:49 +1100 | [diff] [blame] | 778 | eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE); |
| 779 | eeh_pe_dev_traverse(pe, eeh_disable_and_save_dev_state, dev); |
Wei Yang | 9312bc5 | 2016-03-04 10:53:09 +1100 | [diff] [blame] | 780 | if (!(pe->type & EEH_PE_VF)) |
| 781 | eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED); |
Gavin Shan | c270a24 | 2012-09-07 22:44:17 +0000 | [diff] [blame] | 782 | eeh_ops->reset(pe, EEH_RESET_HOT); |
Brian King | 00c2ae3 | 2007-05-08 08:04:05 +1000 | [diff] [blame] | 783 | break; |
| 784 | case pcie_warm_reset: |
Gavin Shan | 39bfd71 | 2015-07-30 09:26:51 +1000 | [diff] [blame] | 785 | eeh_pe_state_mark_with_cfg(pe, EEH_PE_ISOLATED); |
Gavin Shan | 28158cd | 2015-02-11 10:20:49 +1100 | [diff] [blame] | 786 | eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE); |
| 787 | eeh_pe_dev_traverse(pe, eeh_disable_and_save_dev_state, dev); |
Wei Yang | 9312bc5 | 2016-03-04 10:53:09 +1100 | [diff] [blame] | 788 | if (!(pe->type & EEH_PE_VF)) |
| 789 | eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED); |
Gavin Shan | c270a24 | 2012-09-07 22:44:17 +0000 | [diff] [blame] | 790 | eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL); |
Brian King | 00c2ae3 | 2007-05-08 08:04:05 +1000 | [diff] [blame] | 791 | break; |
| 792 | default: |
Gavin Shan | 1ae79b7 | 2015-05-01 09:14:11 +1000 | [diff] [blame] | 793 | eeh_pe_state_clear(pe, EEH_PE_ISOLATED | EEH_PE_CFG_BLOCKED); |
Brian King | 00c2ae3 | 2007-05-08 08:04:05 +1000 | [diff] [blame] | 794 | return -EINVAL; |
| 795 | }; |
| 796 | |
| 797 | return 0; |
| 798 | } |
| 799 | |
| 800 | /** |
Gavin Shan | c270a24 | 2012-09-07 22:44:17 +0000 | [diff] [blame] | 801 | * eeh_set_pe_freset - Check the required reset for the indicated device |
| 802 | * @data: EEH device |
| 803 | * @flag: return value |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 804 | * |
| 805 | * Each device might have its preferred reset type: fundamental or |
| 806 | * hot reset. The routine is used to collected the information for |
| 807 | * the indicated device and its children so that the bunch of the |
| 808 | * devices could be reset properly. |
| 809 | */ |
Gavin Shan | c270a24 | 2012-09-07 22:44:17 +0000 | [diff] [blame] | 810 | static void *eeh_set_dev_freset(void *data, void *flag) |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 811 | { |
| 812 | struct pci_dev *dev; |
Gavin Shan | c270a24 | 2012-09-07 22:44:17 +0000 | [diff] [blame] | 813 | unsigned int *freset = (unsigned int *)flag; |
| 814 | struct eeh_dev *edev = (struct eeh_dev *)data; |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 815 | |
Gavin Shan | c270a24 | 2012-09-07 22:44:17 +0000 | [diff] [blame] | 816 | dev = eeh_dev_to_pci_dev(edev); |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 817 | if (dev) |
| 818 | *freset |= dev->needs_freset; |
| 819 | |
Gavin Shan | c270a24 | 2012-09-07 22:44:17 +0000 | [diff] [blame] | 820 | return NULL; |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 821 | } |
| 822 | |
| 823 | /** |
Gavin Shan | cce4b2d | 2012-02-27 20:03:52 +0000 | [diff] [blame] | 824 | * eeh_reset_pe_once - Assert the pci #RST line for 1/4 second |
Gavin Shan | c270a24 | 2012-09-07 22:44:17 +0000 | [diff] [blame] | 825 | * @pe: EEH PE |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 826 | * |
| 827 | * Assert the PCI #RST line for 1/4 second. |
| 828 | */ |
Gavin Shan | c270a24 | 2012-09-07 22:44:17 +0000 | [diff] [blame] | 829 | static void eeh_reset_pe_once(struct eeh_pe *pe) |
Linas Vepstas | 6dee3fb | 2005-11-03 18:50:10 -0600 | [diff] [blame] | 830 | { |
Richard A Lary | 308fc4f | 2011-04-22 09:59:47 +0000 | [diff] [blame] | 831 | unsigned int freset = 0; |
Mike Mason | 6e19314 | 2009-07-30 15:42:39 -0700 | [diff] [blame] | 832 | |
Richard A Lary | 308fc4f | 2011-04-22 09:59:47 +0000 | [diff] [blame] | 833 | /* Determine type of EEH reset required for |
| 834 | * Partitionable Endpoint, a hot-reset (1) |
| 835 | * or a fundamental reset (3). |
| 836 | * A fundamental reset required by any device under |
| 837 | * Partitionable Endpoint trumps hot-reset. |
Gavin Shan | a84f273 | 2013-06-20 13:20:51 +0800 | [diff] [blame] | 838 | */ |
Gavin Shan | c270a24 | 2012-09-07 22:44:17 +0000 | [diff] [blame] | 839 | eeh_pe_dev_traverse(pe, eeh_set_dev_freset, &freset); |
Richard A Lary | 308fc4f | 2011-04-22 09:59:47 +0000 | [diff] [blame] | 840 | |
| 841 | if (freset) |
Gavin Shan | c270a24 | 2012-09-07 22:44:17 +0000 | [diff] [blame] | 842 | eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL); |
Mike Mason | 6e19314 | 2009-07-30 15:42:39 -0700 | [diff] [blame] | 843 | else |
Gavin Shan | c270a24 | 2012-09-07 22:44:17 +0000 | [diff] [blame] | 844 | eeh_ops->reset(pe, EEH_RESET_HOT); |
Linas Vepstas | 6dee3fb | 2005-11-03 18:50:10 -0600 | [diff] [blame] | 845 | |
Gavin Shan | c270a24 | 2012-09-07 22:44:17 +0000 | [diff] [blame] | 846 | eeh_ops->reset(pe, EEH_RESET_DEACTIVATE); |
Linas Vepstas | e102926 | 2006-09-21 18:25:56 -0500 | [diff] [blame] | 847 | } |
| 848 | |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 849 | /** |
Gavin Shan | cce4b2d | 2012-02-27 20:03:52 +0000 | [diff] [blame] | 850 | * eeh_reset_pe - Reset the indicated PE |
Gavin Shan | c270a24 | 2012-09-07 22:44:17 +0000 | [diff] [blame] | 851 | * @pe: EEH PE |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 852 | * |
| 853 | * This routine should be called to reset indicated device, including |
| 854 | * PE. A PE might include multiple PCI devices and sometimes PCI bridges |
| 855 | * might be involved as well. |
| 856 | */ |
Gavin Shan | c270a24 | 2012-09-07 22:44:17 +0000 | [diff] [blame] | 857 | int eeh_reset_pe(struct eeh_pe *pe) |
Linas Vepstas | e102926 | 2006-09-21 18:25:56 -0500 | [diff] [blame] | 858 | { |
Gavin Shan | 326a98e | 2013-06-20 13:20:58 +0800 | [diff] [blame] | 859 | int flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE); |
Gavin Shan | b85743e | 2014-11-14 10:47:28 +1100 | [diff] [blame] | 860 | int i, state, ret; |
Linas Vepstas | e102926 | 2006-09-21 18:25:56 -0500 | [diff] [blame] | 861 | |
Gavin Shan | 28bf36f | 2014-11-14 10:47:29 +1100 | [diff] [blame] | 862 | /* Mark as reset and block config space */ |
| 863 | eeh_pe_state_mark(pe, EEH_PE_RESET | EEH_PE_CFG_BLOCKED); |
| 864 | |
Linas Vepstas | 9c54776 | 2007-03-19 14:58:07 -0500 | [diff] [blame] | 865 | /* Take three shots at resetting the bus */ |
Gavin Shan | b85743e | 2014-11-14 10:47:28 +1100 | [diff] [blame] | 866 | for (i = 0; i < 3; i++) { |
Gavin Shan | c270a24 | 2012-09-07 22:44:17 +0000 | [diff] [blame] | 867 | eeh_reset_pe_once(pe); |
Linas Vepstas | 6dee3fb | 2005-11-03 18:50:10 -0600 | [diff] [blame] | 868 | |
Gavin Shan | 7895470 | 2014-04-24 18:00:14 +1000 | [diff] [blame] | 869 | /* |
| 870 | * EEH_PE_ISOLATED is expected to be removed after |
| 871 | * BAR restore. |
| 872 | */ |
Gavin Shan | b85743e | 2014-11-14 10:47:28 +1100 | [diff] [blame] | 873 | state = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC); |
| 874 | if ((state & flags) == flags) { |
| 875 | ret = 0; |
| 876 | goto out; |
Linas Vepstas | e102926 | 2006-09-21 18:25:56 -0500 | [diff] [blame] | 877 | } |
Gavin Shan | b85743e | 2014-11-14 10:47:28 +1100 | [diff] [blame] | 878 | |
| 879 | if (state < 0) { |
| 880 | pr_warn("%s: Unrecoverable slot failure on PHB#%d-PE#%x", |
| 881 | __func__, pe->phb->global_number, pe->addr); |
| 882 | ret = -ENOTRECOVERABLE; |
| 883 | goto out; |
| 884 | } |
| 885 | |
| 886 | /* We might run out of credits */ |
| 887 | ret = -EIO; |
| 888 | pr_warn("%s: Failure %d resetting PHB#%x-PE#%x\n (%d)\n", |
| 889 | __func__, state, pe->phb->global_number, pe->addr, (i + 1)); |
Linas Vepstas | 6dee3fb | 2005-11-03 18:50:10 -0600 | [diff] [blame] | 890 | } |
Linas Vepstas | b6495c0 | 2005-11-03 18:54:54 -0600 | [diff] [blame] | 891 | |
Gavin Shan | b85743e | 2014-11-14 10:47:28 +1100 | [diff] [blame] | 892 | out: |
Gavin Shan | 28bf36f | 2014-11-14 10:47:29 +1100 | [diff] [blame] | 893 | eeh_pe_state_clear(pe, EEH_PE_RESET | EEH_PE_CFG_BLOCKED); |
Gavin Shan | b85743e | 2014-11-14 10:47:28 +1100 | [diff] [blame] | 894 | return ret; |
Linas Vepstas | 6dee3fb | 2005-11-03 18:50:10 -0600 | [diff] [blame] | 895 | } |
| 896 | |
Linas Vepstas | 8b553f3 | 2005-11-03 18:50:17 -0600 | [diff] [blame] | 897 | /** |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 898 | * eeh_save_bars - Save device bars |
Gavin Shan | f631acd | 2012-02-27 20:04:07 +0000 | [diff] [blame] | 899 | * @edev: PCI device associated EEH device |
Linas Vepstas | 8b553f3 | 2005-11-03 18:50:17 -0600 | [diff] [blame] | 900 | * |
| 901 | * Save the values of the device bars. Unlike the restore |
| 902 | * routine, this routine is *not* recursive. This is because |
Justin Mattock | 31116f0 | 2011-02-24 20:10:18 +0000 | [diff] [blame] | 903 | * PCI devices are added individually; but, for the restore, |
Linas Vepstas | 8b553f3 | 2005-11-03 18:50:17 -0600 | [diff] [blame] | 904 | * an entire slot is reset at a time. |
| 905 | */ |
Gavin Shan | d7bb886 | 2012-09-07 22:44:21 +0000 | [diff] [blame] | 906 | void eeh_save_bars(struct eeh_dev *edev) |
Linas Vepstas | 8b553f3 | 2005-11-03 18:50:17 -0600 | [diff] [blame] | 907 | { |
Gavin Shan | 0bd7858 | 2015-03-17 16:15:07 +1100 | [diff] [blame] | 908 | struct pci_dn *pdn; |
Linas Vepstas | 8b553f3 | 2005-11-03 18:50:17 -0600 | [diff] [blame] | 909 | int i; |
| 910 | |
Gavin Shan | 0bd7858 | 2015-03-17 16:15:07 +1100 | [diff] [blame] | 911 | pdn = eeh_dev_to_pdn(edev); |
| 912 | if (!pdn) |
Linas Vepstas | 8b553f3 | 2005-11-03 18:50:17 -0600 | [diff] [blame] | 913 | return; |
Gavin Shan | a84f273 | 2013-06-20 13:20:51 +0800 | [diff] [blame] | 914 | |
Linas Vepstas | 8b553f3 | 2005-11-03 18:50:17 -0600 | [diff] [blame] | 915 | for (i = 0; i < 16; i++) |
Gavin Shan | 0bd7858 | 2015-03-17 16:15:07 +1100 | [diff] [blame] | 916 | eeh_ops->read_config(pdn, i * 4, 4, &edev->config_space[i]); |
Gavin Shan | bf898ec | 2013-11-12 14:49:21 +0800 | [diff] [blame] | 917 | |
| 918 | /* |
| 919 | * For PCI bridges including root port, we need enable bus |
| 920 | * master explicitly. Otherwise, it can't fetch IODA table |
| 921 | * entries correctly. So we cache the bit in advance so that |
| 922 | * we can restore it after reset, either PHB range or PE range. |
| 923 | */ |
| 924 | if (edev->mode & EEH_DEV_BRIDGE) |
| 925 | edev->config_space[1] |= PCI_COMMAND_MASTER; |
Linas Vepstas | 8b553f3 | 2005-11-03 18:50:17 -0600 | [diff] [blame] | 926 | } |
| 927 | |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 928 | /** |
Gavin Shan | aa1e637 | 2012-02-27 20:03:53 +0000 | [diff] [blame] | 929 | * eeh_ops_register - Register platform dependent EEH operations |
| 930 | * @ops: platform dependent EEH operations |
| 931 | * |
| 932 | * Register the platform dependent EEH operation callback |
| 933 | * functions. The platform should call this function before |
| 934 | * any other EEH operations. |
| 935 | */ |
| 936 | int __init eeh_ops_register(struct eeh_ops *ops) |
| 937 | { |
| 938 | if (!ops->name) { |
Gavin Shan | 0dae274 | 2014-07-17 14:41:41 +1000 | [diff] [blame] | 939 | pr_warn("%s: Invalid EEH ops name for %p\n", |
Gavin Shan | aa1e637 | 2012-02-27 20:03:53 +0000 | [diff] [blame] | 940 | __func__, ops); |
| 941 | return -EINVAL; |
| 942 | } |
| 943 | |
| 944 | if (eeh_ops && eeh_ops != ops) { |
Gavin Shan | 0dae274 | 2014-07-17 14:41:41 +1000 | [diff] [blame] | 945 | pr_warn("%s: EEH ops of platform %s already existing (%s)\n", |
Gavin Shan | aa1e637 | 2012-02-27 20:03:53 +0000 | [diff] [blame] | 946 | __func__, eeh_ops->name, ops->name); |
| 947 | return -EEXIST; |
| 948 | } |
| 949 | |
| 950 | eeh_ops = ops; |
| 951 | |
| 952 | return 0; |
| 953 | } |
| 954 | |
| 955 | /** |
| 956 | * eeh_ops_unregister - Unreigster platform dependent EEH operations |
| 957 | * @name: name of EEH platform operations |
| 958 | * |
| 959 | * Unregister the platform dependent EEH operation callback |
| 960 | * functions. |
| 961 | */ |
| 962 | int __exit eeh_ops_unregister(const char *name) |
| 963 | { |
| 964 | if (!name || !strlen(name)) { |
Gavin Shan | 0dae274 | 2014-07-17 14:41:41 +1000 | [diff] [blame] | 965 | pr_warn("%s: Invalid EEH ops name\n", |
Gavin Shan | aa1e637 | 2012-02-27 20:03:53 +0000 | [diff] [blame] | 966 | __func__); |
| 967 | return -EINVAL; |
| 968 | } |
| 969 | |
| 970 | if (eeh_ops && !strcmp(eeh_ops->name, name)) { |
| 971 | eeh_ops = NULL; |
| 972 | return 0; |
| 973 | } |
| 974 | |
| 975 | return -EEXIST; |
| 976 | } |
| 977 | |
Gavin Shan | 66f9af83 | 2014-02-12 15:24:56 +0800 | [diff] [blame] | 978 | static int eeh_reboot_notifier(struct notifier_block *nb, |
| 979 | unsigned long action, void *unused) |
| 980 | { |
Gavin Shan | 05b1721 | 2014-07-17 14:41:38 +1000 | [diff] [blame] | 981 | eeh_clear_flag(EEH_ENABLED); |
Gavin Shan | 66f9af83 | 2014-02-12 15:24:56 +0800 | [diff] [blame] | 982 | return NOTIFY_DONE; |
| 983 | } |
| 984 | |
| 985 | static struct notifier_block eeh_reboot_nb = { |
| 986 | .notifier_call = eeh_reboot_notifier, |
| 987 | }; |
| 988 | |
Gavin Shan | aa1e637 | 2012-02-27 20:03:53 +0000 | [diff] [blame] | 989 | /** |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 990 | * eeh_init - EEH initialization |
| 991 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 992 | * Initialize EEH by trying to enable it for all of the adapters in the system. |
| 993 | * As a side effect we can determine here if eeh is supported at all. |
| 994 | * Note that we leave EEH on so failed config cycles won't cause a machine |
| 995 | * check. If a user turns off EEH for a particular adapter they are really |
| 996 | * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't |
| 997 | * grant access to a slot if EEH isn't enabled, and so we always enable |
| 998 | * EEH for all slots/all devices. |
| 999 | * |
| 1000 | * The eeh-force-off option disables EEH checking globally, for all slots. |
| 1001 | * Even if force-off is set, the EEH hardware is still enabled, so that |
| 1002 | * newer systems can boot. |
| 1003 | */ |
Gavin Shan | eeb6361 | 2013-06-27 13:46:47 +0800 | [diff] [blame] | 1004 | int eeh_init(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1005 | { |
Gavin Shan | 1a5c2e6 | 2012-03-20 21:30:29 +0000 | [diff] [blame] | 1006 | struct pci_controller *hose, *tmp; |
Gavin Shan | ff57b45 | 2015-03-17 16:15:06 +1100 | [diff] [blame] | 1007 | struct pci_dn *pdn; |
Gavin Shan | 51fb5f5 | 2013-06-20 13:20:56 +0800 | [diff] [blame] | 1008 | static int cnt = 0; |
| 1009 | int ret = 0; |
| 1010 | |
| 1011 | /* |
| 1012 | * We have to delay the initialization on PowerNV after |
| 1013 | * the PCI hierarchy tree has been built because the PEs |
| 1014 | * are figured out based on PCI devices instead of device |
| 1015 | * tree nodes |
| 1016 | */ |
| 1017 | if (machine_is(powernv) && cnt++ <= 0) |
| 1018 | return ret; |
Gavin Shan | e2af155 | 2012-02-27 20:03:54 +0000 | [diff] [blame] | 1019 | |
Gavin Shan | 66f9af83 | 2014-02-12 15:24:56 +0800 | [diff] [blame] | 1020 | /* Register reboot notifier */ |
| 1021 | ret = register_reboot_notifier(&eeh_reboot_nb); |
| 1022 | if (ret) { |
| 1023 | pr_warn("%s: Failed to register notifier (%d)\n", |
| 1024 | __func__, ret); |
| 1025 | return ret; |
| 1026 | } |
| 1027 | |
Gavin Shan | e2af155 | 2012-02-27 20:03:54 +0000 | [diff] [blame] | 1028 | /* call platform initialization function */ |
| 1029 | if (!eeh_ops) { |
Gavin Shan | 0dae274 | 2014-07-17 14:41:41 +1000 | [diff] [blame] | 1030 | pr_warn("%s: Platform EEH operation not found\n", |
Gavin Shan | e2af155 | 2012-02-27 20:03:54 +0000 | [diff] [blame] | 1031 | __func__); |
Gavin Shan | 35e5cfe | 2012-09-07 22:44:02 +0000 | [diff] [blame] | 1032 | return -EEXIST; |
Greg Kurz | 221195f | 2014-11-25 17:10:06 +0100 | [diff] [blame] | 1033 | } else if ((ret = eeh_ops->init())) |
Gavin Shan | 35e5cfe | 2012-09-07 22:44:02 +0000 | [diff] [blame] | 1034 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1035 | |
Gavin Shan | c860855 | 2013-06-20 13:21:00 +0800 | [diff] [blame] | 1036 | /* Initialize EEH event */ |
| 1037 | ret = eeh_event_init(); |
| 1038 | if (ret) |
| 1039 | return ret; |
| 1040 | |
Gavin Shan | 1a5c2e6 | 2012-03-20 21:30:29 +0000 | [diff] [blame] | 1041 | /* Enable EEH for all adapters */ |
Gavin Shan | ff57b45 | 2015-03-17 16:15:06 +1100 | [diff] [blame] | 1042 | list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { |
| 1043 | pdn = hose->pci_data; |
| 1044 | traverse_pci_dn(pdn, eeh_ops->probe, NULL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1045 | } |
| 1046 | |
Gavin Shan | 21fd21f | 2013-06-20 13:20:57 +0800 | [diff] [blame] | 1047 | /* |
| 1048 | * Call platform post-initialization. Actually, It's good chance |
| 1049 | * to inform platform that EEH is ready to supply service if the |
| 1050 | * I/O cache stuff has been built up. |
| 1051 | */ |
| 1052 | if (eeh_ops->post_init) { |
| 1053 | ret = eeh_ops->post_init(); |
| 1054 | if (ret) |
| 1055 | return ret; |
| 1056 | } |
| 1057 | |
Gavin Shan | 2ec5a0a | 2014-02-12 15:24:55 +0800 | [diff] [blame] | 1058 | if (eeh_enabled()) |
Gavin Shan | d7bb886 | 2012-09-07 22:44:21 +0000 | [diff] [blame] | 1059 | pr_info("EEH: PCI Enhanced I/O Error Handling Enabled\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1060 | else |
Anton Blanchard | 91ac730 | 2016-10-02 11:09:38 +1100 | [diff] [blame] | 1061 | pr_info("EEH: No capable adapters found\n"); |
Gavin Shan | 35e5cfe | 2012-09-07 22:44:02 +0000 | [diff] [blame] | 1062 | |
| 1063 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1064 | } |
| 1065 | |
Gavin Shan | 35e5cfe | 2012-09-07 22:44:02 +0000 | [diff] [blame] | 1066 | core_initcall_sync(eeh_init); |
| 1067 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1068 | /** |
Gavin Shan | c6406d8 | 2015-03-17 16:15:08 +1100 | [diff] [blame] | 1069 | * eeh_add_device_early - Enable EEH for the indicated device node |
Gavin Shan | ff57b45 | 2015-03-17 16:15:06 +1100 | [diff] [blame] | 1070 | * @pdn: PCI device node for which to set up EEH |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1071 | * |
| 1072 | * This routine must be used to perform EEH initialization for PCI |
| 1073 | * devices that were added after system boot (e.g. hotplug, dlpar). |
| 1074 | * This routine must be called before any i/o is performed to the |
| 1075 | * adapter (inluding any config-space i/o). |
| 1076 | * Whether this actually enables EEH or not for this device depends |
| 1077 | * on the CEC architecture, type of the device, on earlier boot |
| 1078 | * command-line arguments & etc. |
| 1079 | */ |
Gavin Shan | ff57b45 | 2015-03-17 16:15:06 +1100 | [diff] [blame] | 1080 | void eeh_add_device_early(struct pci_dn *pdn) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1081 | { |
| 1082 | struct pci_controller *phb; |
Gavin Shan | ff57b45 | 2015-03-17 16:15:06 +1100 | [diff] [blame] | 1083 | struct eeh_dev *edev = pdn_to_eeh_dev(pdn); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1084 | |
Guilherme G. Piccoli | c2078d9 | 2016-04-11 16:17:22 -0300 | [diff] [blame] | 1085 | if (!edev) |
Gavin Shan | 26a7485 | 2013-06-20 13:20:59 +0800 | [diff] [blame] | 1086 | return; |
| 1087 | |
Gavin Shan | d91dafc | 2015-05-01 09:22:15 +1000 | [diff] [blame] | 1088 | if (!eeh_has_flag(EEH_PROBE_MODE_DEVTREE)) |
| 1089 | return; |
| 1090 | |
Linas Vepstas | f751f84 | 2005-11-03 18:54:23 -0600 | [diff] [blame] | 1091 | /* USB Bus children of PCI devices will not have BUID's */ |
Gavin Shan | ff57b45 | 2015-03-17 16:15:06 +1100 | [diff] [blame] | 1092 | phb = edev->phb; |
| 1093 | if (NULL == phb || |
| 1094 | (eeh_has_flag(EEH_PROBE_MODE_DEVTREE) && 0 == phb->buid)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1095 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1096 | |
Gavin Shan | ff57b45 | 2015-03-17 16:15:06 +1100 | [diff] [blame] | 1097 | eeh_ops->probe(pdn, NULL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1098 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1099 | |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 1100 | /** |
| 1101 | * eeh_add_device_tree_early - Enable EEH for the indicated device |
Gavin Shan | ff57b45 | 2015-03-17 16:15:06 +1100 | [diff] [blame] | 1102 | * @pdn: PCI device node |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 1103 | * |
| 1104 | * This routine must be used to perform EEH initialization for the |
| 1105 | * indicated PCI device that was added after system boot (e.g. |
| 1106 | * hotplug, dlpar). |
| 1107 | */ |
Gavin Shan | ff57b45 | 2015-03-17 16:15:06 +1100 | [diff] [blame] | 1108 | void eeh_add_device_tree_early(struct pci_dn *pdn) |
Linas Vepstas | e2a296e | 2005-11-03 18:51:31 -0600 | [diff] [blame] | 1109 | { |
Gavin Shan | ff57b45 | 2015-03-17 16:15:06 +1100 | [diff] [blame] | 1110 | struct pci_dn *n; |
Stephen Rothwell | acaa617 | 2007-12-21 15:52:07 +1100 | [diff] [blame] | 1111 | |
Gavin Shan | ff57b45 | 2015-03-17 16:15:06 +1100 | [diff] [blame] | 1112 | if (!pdn) |
| 1113 | return; |
| 1114 | |
| 1115 | list_for_each_entry(n, &pdn->child_list, list) |
| 1116 | eeh_add_device_tree_early(n); |
| 1117 | eeh_add_device_early(pdn); |
Linas Vepstas | e2a296e | 2005-11-03 18:51:31 -0600 | [diff] [blame] | 1118 | } |
| 1119 | EXPORT_SYMBOL_GPL(eeh_add_device_tree_early); |
| 1120 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1121 | /** |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 1122 | * eeh_add_device_late - Perform EEH initialization for the indicated pci device |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1123 | * @dev: pci device for which to set up EEH |
| 1124 | * |
| 1125 | * This routine must be used to complete EEH initialization for PCI |
| 1126 | * devices that were added after system boot (e.g. hotplug, dlpar). |
| 1127 | */ |
Gavin Shan | f285649 | 2013-07-24 10:24:52 +0800 | [diff] [blame] | 1128 | void eeh_add_device_late(struct pci_dev *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1129 | { |
Gavin Shan | c6406d8 | 2015-03-17 16:15:08 +1100 | [diff] [blame] | 1130 | struct pci_dn *pdn; |
Gavin Shan | f631acd | 2012-02-27 20:04:07 +0000 | [diff] [blame] | 1131 | struct eeh_dev *edev; |
Linas Vepstas | 56b0fca | 2005-11-03 18:48:45 -0600 | [diff] [blame] | 1132 | |
Gavin Shan | 2ec5a0a | 2014-02-12 15:24:55 +0800 | [diff] [blame] | 1133 | if (!dev || !eeh_enabled()) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1134 | return; |
| 1135 | |
Benjamin Herrenschmidt | 57b066f | 2008-10-27 19:48:41 +0000 | [diff] [blame] | 1136 | pr_debug("EEH: Adding device %s\n", pci_name(dev)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1137 | |
Gavin Shan | c6406d8 | 2015-03-17 16:15:08 +1100 | [diff] [blame] | 1138 | pdn = pci_get_pdn_by_devfn(dev->bus, dev->devfn); |
| 1139 | edev = pdn_to_eeh_dev(pdn); |
Gavin Shan | f631acd | 2012-02-27 20:04:07 +0000 | [diff] [blame] | 1140 | if (edev->pdev == dev) { |
Benjamin Herrenschmidt | 57b066f | 2008-10-27 19:48:41 +0000 | [diff] [blame] | 1141 | pr_debug("EEH: Already referenced !\n"); |
| 1142 | return; |
| 1143 | } |
Gavin Shan | f5c5771 | 2013-07-24 10:24:58 +0800 | [diff] [blame] | 1144 | |
| 1145 | /* |
| 1146 | * The EEH cache might not be removed correctly because of |
| 1147 | * unbalanced kref to the device during unplug time, which |
| 1148 | * relies on pcibios_release_device(). So we have to remove |
| 1149 | * that here explicitly. |
| 1150 | */ |
| 1151 | if (edev->pdev) { |
| 1152 | eeh_rmv_from_parent_pe(edev); |
| 1153 | eeh_addr_cache_rmv_dev(edev->pdev); |
| 1154 | eeh_sysfs_remove_device(edev->pdev); |
Gavin Shan | ab55d21 | 2013-07-24 10:25:01 +0800 | [diff] [blame] | 1155 | edev->mode &= ~EEH_DEV_SYSFS; |
Gavin Shan | f5c5771 | 2013-07-24 10:24:58 +0800 | [diff] [blame] | 1156 | |
Gavin Shan | f26c7a0 | 2014-01-12 14:13:45 +0800 | [diff] [blame] | 1157 | /* |
| 1158 | * We definitely should have the PCI device removed |
| 1159 | * though it wasn't correctly. So we needn't call |
| 1160 | * into error handler afterwards. |
| 1161 | */ |
| 1162 | edev->mode |= EEH_DEV_NO_HANDLER; |
| 1163 | |
Gavin Shan | f5c5771 | 2013-07-24 10:24:58 +0800 | [diff] [blame] | 1164 | edev->pdev = NULL; |
| 1165 | dev->dev.archdata.edev = NULL; |
| 1166 | } |
Benjamin Herrenschmidt | 57b066f | 2008-10-27 19:48:41 +0000 | [diff] [blame] | 1167 | |
Daniel Axtens | e642d11 | 2015-08-14 16:03:19 +1000 | [diff] [blame] | 1168 | if (eeh_has_flag(EEH_PROBE_MODE_DEV)) |
| 1169 | eeh_ops->probe(pdn, NULL); |
| 1170 | |
Gavin Shan | f631acd | 2012-02-27 20:04:07 +0000 | [diff] [blame] | 1171 | edev->pdev = dev; |
| 1172 | dev->dev.archdata.edev = edev; |
Linas Vepstas | 56b0fca | 2005-11-03 18:48:45 -0600 | [diff] [blame] | 1173 | |
Gavin Shan | 3ab96a0 | 2012-09-07 22:44:23 +0000 | [diff] [blame] | 1174 | eeh_addr_cache_insert_dev(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1175 | } |
Nathan Fontenot | 794e085 | 2006-03-31 12:04:52 -0600 | [diff] [blame] | 1176 | |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 1177 | /** |
| 1178 | * eeh_add_device_tree_late - Perform EEH initialization for the indicated PCI bus |
| 1179 | * @bus: PCI bus |
| 1180 | * |
| 1181 | * This routine must be used to perform EEH initialization for PCI |
| 1182 | * devices which are attached to the indicated PCI bus. The PCI bus |
| 1183 | * is added after system boot through hotplug or dlpar. |
| 1184 | */ |
Nathan Fontenot | 794e085 | 2006-03-31 12:04:52 -0600 | [diff] [blame] | 1185 | void eeh_add_device_tree_late(struct pci_bus *bus) |
| 1186 | { |
| 1187 | struct pci_dev *dev; |
| 1188 | |
| 1189 | list_for_each_entry(dev, &bus->devices, bus_list) { |
Gavin Shan | a84f273 | 2013-06-20 13:20:51 +0800 | [diff] [blame] | 1190 | eeh_add_device_late(dev); |
| 1191 | if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) { |
| 1192 | struct pci_bus *subbus = dev->subordinate; |
| 1193 | if (subbus) |
| 1194 | eeh_add_device_tree_late(subbus); |
| 1195 | } |
Nathan Fontenot | 794e085 | 2006-03-31 12:04:52 -0600 | [diff] [blame] | 1196 | } |
| 1197 | } |
| 1198 | EXPORT_SYMBOL_GPL(eeh_add_device_tree_late); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1199 | |
| 1200 | /** |
Thadeu Lima de Souza Cascardo | 6a040ce | 2012-12-28 09:13:19 +0000 | [diff] [blame] | 1201 | * eeh_add_sysfs_files - Add EEH sysfs files for the indicated PCI bus |
| 1202 | * @bus: PCI bus |
| 1203 | * |
| 1204 | * This routine must be used to add EEH sysfs files for PCI |
| 1205 | * devices which are attached to the indicated PCI bus. The PCI bus |
| 1206 | * is added after system boot through hotplug or dlpar. |
| 1207 | */ |
| 1208 | void eeh_add_sysfs_files(struct pci_bus *bus) |
| 1209 | { |
| 1210 | struct pci_dev *dev; |
| 1211 | |
| 1212 | list_for_each_entry(dev, &bus->devices, bus_list) { |
| 1213 | eeh_sysfs_add_device(dev); |
| 1214 | if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) { |
| 1215 | struct pci_bus *subbus = dev->subordinate; |
| 1216 | if (subbus) |
| 1217 | eeh_add_sysfs_files(subbus); |
| 1218 | } |
| 1219 | } |
| 1220 | } |
| 1221 | EXPORT_SYMBOL_GPL(eeh_add_sysfs_files); |
| 1222 | |
| 1223 | /** |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 1224 | * eeh_remove_device - Undo EEH setup for the indicated pci device |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1225 | * @dev: pci device to be removed |
| 1226 | * |
Nathan Fontenot | 794e085 | 2006-03-31 12:04:52 -0600 | [diff] [blame] | 1227 | * This routine should be called when a device is removed from |
| 1228 | * a running system (e.g. by hotplug or dlpar). It unregisters |
| 1229 | * the PCI device from the EEH subsystem. I/O errors affecting |
| 1230 | * this device will no longer be detected after this call; thus, |
| 1231 | * i/o errors affecting this slot may leave this device unusable. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1232 | */ |
Gavin Shan | 807a827 | 2013-07-24 10:24:55 +0800 | [diff] [blame] | 1233 | void eeh_remove_device(struct pci_dev *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1234 | { |
Gavin Shan | f631acd | 2012-02-27 20:04:07 +0000 | [diff] [blame] | 1235 | struct eeh_dev *edev; |
| 1236 | |
Gavin Shan | 2ec5a0a | 2014-02-12 15:24:55 +0800 | [diff] [blame] | 1237 | if (!dev || !eeh_enabled()) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1238 | return; |
Gavin Shan | f631acd | 2012-02-27 20:04:07 +0000 | [diff] [blame] | 1239 | edev = pci_dev_to_eeh_dev(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1240 | |
| 1241 | /* Unregister the device with the EEH/PCI address search system */ |
Benjamin Herrenschmidt | 57b066f | 2008-10-27 19:48:41 +0000 | [diff] [blame] | 1242 | pr_debug("EEH: Removing device %s\n", pci_name(dev)); |
Linas Vepstas | 56b0fca | 2005-11-03 18:48:45 -0600 | [diff] [blame] | 1243 | |
Gavin Shan | f5c5771 | 2013-07-24 10:24:58 +0800 | [diff] [blame] | 1244 | if (!edev || !edev->pdev || !edev->pe) { |
Benjamin Herrenschmidt | 57b066f | 2008-10-27 19:48:41 +0000 | [diff] [blame] | 1245 | pr_debug("EEH: Not referenced !\n"); |
| 1246 | return; |
Linas Vepstas | b055a9e | 2006-04-06 15:41:41 -0500 | [diff] [blame] | 1247 | } |
Gavin Shan | f5c5771 | 2013-07-24 10:24:58 +0800 | [diff] [blame] | 1248 | |
| 1249 | /* |
| 1250 | * During the hotplug for EEH error recovery, we need the EEH |
| 1251 | * device attached to the parent PE in order for BAR restore |
| 1252 | * a bit later. So we keep it for BAR restore and remove it |
| 1253 | * from the parent PE during the BAR resotre. |
| 1254 | */ |
Gavin Shan | f631acd | 2012-02-27 20:04:07 +0000 | [diff] [blame] | 1255 | edev->pdev = NULL; |
Wei Yang | 67086e3 | 2016-03-04 10:53:11 +1100 | [diff] [blame] | 1256 | |
| 1257 | /* |
| 1258 | * The flag "in_error" is used to trace EEH devices for VFs |
| 1259 | * in error state or not. It's set in eeh_report_error(). If |
| 1260 | * it's not set, eeh_report_{reset,resume}() won't be called |
| 1261 | * for the VF EEH device. |
| 1262 | */ |
| 1263 | edev->in_error = false; |
Gavin Shan | f631acd | 2012-02-27 20:04:07 +0000 | [diff] [blame] | 1264 | dev->dev.archdata.edev = NULL; |
Gavin Shan | f5c5771 | 2013-07-24 10:24:58 +0800 | [diff] [blame] | 1265 | if (!(edev->pe->state & EEH_PE_KEEP)) |
| 1266 | eeh_rmv_from_parent_pe(edev); |
| 1267 | else |
| 1268 | edev->mode |= EEH_DEV_DISCONNECTED; |
Benjamin Herrenschmidt | 57b066f | 2008-10-27 19:48:41 +0000 | [diff] [blame] | 1269 | |
Gavin Shan | f26c7a0 | 2014-01-12 14:13:45 +0800 | [diff] [blame] | 1270 | /* |
| 1271 | * We're removing from the PCI subsystem, that means |
| 1272 | * the PCI device driver can't support EEH or not |
| 1273 | * well. So we rely on hotplug completely to do recovery |
| 1274 | * for the specific PCI device. |
| 1275 | */ |
| 1276 | edev->mode |= EEH_DEV_NO_HANDLER; |
| 1277 | |
Gavin Shan | 3ab96a0 | 2012-09-07 22:44:23 +0000 | [diff] [blame] | 1278 | eeh_addr_cache_rmv_dev(dev); |
Benjamin Herrenschmidt | 57b066f | 2008-10-27 19:48:41 +0000 | [diff] [blame] | 1279 | eeh_sysfs_remove_device(dev); |
Gavin Shan | ab55d21 | 2013-07-24 10:25:01 +0800 | [diff] [blame] | 1280 | edev->mode &= ~EEH_DEV_SYSFS; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1281 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1282 | |
Gavin Shan | 4eeeff0 | 2014-09-30 12:39:01 +1000 | [diff] [blame] | 1283 | int eeh_unfreeze_pe(struct eeh_pe *pe, bool sw_state) |
| 1284 | { |
| 1285 | int ret; |
| 1286 | |
| 1287 | ret = eeh_pci_enable(pe, EEH_OPT_THAW_MMIO); |
| 1288 | if (ret) { |
| 1289 | pr_warn("%s: Failure %d enabling IO on PHB#%x-PE#%x\n", |
| 1290 | __func__, ret, pe->phb->global_number, pe->addr); |
| 1291 | return ret; |
| 1292 | } |
| 1293 | |
| 1294 | ret = eeh_pci_enable(pe, EEH_OPT_THAW_DMA); |
| 1295 | if (ret) { |
| 1296 | pr_warn("%s: Failure %d enabling DMA on PHB#%x-PE#%x\n", |
| 1297 | __func__, ret, pe->phb->global_number, pe->addr); |
| 1298 | return ret; |
| 1299 | } |
| 1300 | |
| 1301 | /* Clear software isolated state */ |
| 1302 | if (sw_state && (pe->state & EEH_PE_ISOLATED)) |
| 1303 | eeh_pe_state_clear(pe, EEH_PE_ISOLATED); |
| 1304 | |
| 1305 | return ret; |
| 1306 | } |
| 1307 | |
Gavin Shan | 5cfb20b | 2014-09-30 12:39:07 +1000 | [diff] [blame] | 1308 | |
| 1309 | static struct pci_device_id eeh_reset_ids[] = { |
| 1310 | { PCI_DEVICE(0x19a2, 0x0710) }, /* Emulex, BE */ |
| 1311 | { PCI_DEVICE(0x10df, 0xe220) }, /* Emulex, Lancer */ |
Gavin Shan | b1d76a7 | 2014-11-14 10:47:30 +1100 | [diff] [blame] | 1312 | { PCI_DEVICE(0x14e4, 0x1657) }, /* Broadcom BCM5719 */ |
Gavin Shan | 5cfb20b | 2014-09-30 12:39:07 +1000 | [diff] [blame] | 1313 | { 0 } |
| 1314 | }; |
| 1315 | |
| 1316 | static int eeh_pe_change_owner(struct eeh_pe *pe) |
| 1317 | { |
| 1318 | struct eeh_dev *edev, *tmp; |
| 1319 | struct pci_dev *pdev; |
| 1320 | struct pci_device_id *id; |
| 1321 | int flags, ret; |
| 1322 | |
| 1323 | /* Check PE state */ |
| 1324 | flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE); |
| 1325 | ret = eeh_ops->get_state(pe, NULL); |
| 1326 | if (ret < 0 || ret == EEH_STATE_NOT_SUPPORT) |
| 1327 | return 0; |
| 1328 | |
| 1329 | /* Unfrozen PE, nothing to do */ |
| 1330 | if ((ret & flags) == flags) |
| 1331 | return 0; |
| 1332 | |
| 1333 | /* Frozen PE, check if it needs PE level reset */ |
| 1334 | eeh_pe_for_each_dev(pe, edev, tmp) { |
| 1335 | pdev = eeh_dev_to_pci_dev(edev); |
| 1336 | if (!pdev) |
| 1337 | continue; |
| 1338 | |
| 1339 | for (id = &eeh_reset_ids[0]; id->vendor != 0; id++) { |
| 1340 | if (id->vendor != PCI_ANY_ID && |
| 1341 | id->vendor != pdev->vendor) |
| 1342 | continue; |
| 1343 | if (id->device != PCI_ANY_ID && |
| 1344 | id->device != pdev->device) |
| 1345 | continue; |
| 1346 | if (id->subvendor != PCI_ANY_ID && |
| 1347 | id->subvendor != pdev->subsystem_vendor) |
| 1348 | continue; |
| 1349 | if (id->subdevice != PCI_ANY_ID && |
| 1350 | id->subdevice != pdev->subsystem_device) |
| 1351 | continue; |
| 1352 | |
Gavin Shan | d6d63d7 | 2016-04-27 11:14:53 +1000 | [diff] [blame] | 1353 | return eeh_pe_reset_and_recover(pe); |
Gavin Shan | 5cfb20b | 2014-09-30 12:39:07 +1000 | [diff] [blame] | 1354 | } |
| 1355 | } |
| 1356 | |
| 1357 | return eeh_unfreeze_pe(pe, true); |
Gavin Shan | 5cfb20b | 2014-09-30 12:39:07 +1000 | [diff] [blame] | 1358 | } |
| 1359 | |
Gavin Shan | 212d16c | 2014-06-10 11:41:56 +1000 | [diff] [blame] | 1360 | /** |
| 1361 | * eeh_dev_open - Increase count of pass through devices for PE |
| 1362 | * @pdev: PCI device |
| 1363 | * |
| 1364 | * Increase count of passed through devices for the indicated |
| 1365 | * PE. In the result, the EEH errors detected on the PE won't be |
| 1366 | * reported. The PE owner will be responsible for detection |
| 1367 | * and recovery. |
| 1368 | */ |
| 1369 | int eeh_dev_open(struct pci_dev *pdev) |
| 1370 | { |
| 1371 | struct eeh_dev *edev; |
Gavin Shan | 404079c | 2014-09-30 12:38:54 +1000 | [diff] [blame] | 1372 | int ret = -ENODEV; |
Gavin Shan | 212d16c | 2014-06-10 11:41:56 +1000 | [diff] [blame] | 1373 | |
| 1374 | mutex_lock(&eeh_dev_mutex); |
| 1375 | |
| 1376 | /* No PCI device ? */ |
| 1377 | if (!pdev) |
| 1378 | goto out; |
| 1379 | |
| 1380 | /* No EEH device or PE ? */ |
| 1381 | edev = pci_dev_to_eeh_dev(pdev); |
| 1382 | if (!edev || !edev->pe) |
| 1383 | goto out; |
| 1384 | |
Gavin Shan | 404079c | 2014-09-30 12:38:54 +1000 | [diff] [blame] | 1385 | /* |
| 1386 | * The PE might have been put into frozen state, but we |
| 1387 | * didn't detect that yet. The passed through PCI devices |
| 1388 | * in frozen PE won't work properly. Clear the frozen state |
| 1389 | * in advance. |
| 1390 | */ |
Gavin Shan | 5cfb20b | 2014-09-30 12:39:07 +1000 | [diff] [blame] | 1391 | ret = eeh_pe_change_owner(edev->pe); |
Gavin Shan | 4eeeff0 | 2014-09-30 12:39:01 +1000 | [diff] [blame] | 1392 | if (ret) |
| 1393 | goto out; |
Gavin Shan | 404079c | 2014-09-30 12:38:54 +1000 | [diff] [blame] | 1394 | |
Gavin Shan | 212d16c | 2014-06-10 11:41:56 +1000 | [diff] [blame] | 1395 | /* Increase PE's pass through count */ |
| 1396 | atomic_inc(&edev->pe->pass_dev_cnt); |
| 1397 | mutex_unlock(&eeh_dev_mutex); |
| 1398 | |
| 1399 | return 0; |
| 1400 | out: |
| 1401 | mutex_unlock(&eeh_dev_mutex); |
Gavin Shan | 404079c | 2014-09-30 12:38:54 +1000 | [diff] [blame] | 1402 | return ret; |
Gavin Shan | 212d16c | 2014-06-10 11:41:56 +1000 | [diff] [blame] | 1403 | } |
| 1404 | EXPORT_SYMBOL_GPL(eeh_dev_open); |
| 1405 | |
| 1406 | /** |
| 1407 | * eeh_dev_release - Decrease count of pass through devices for PE |
| 1408 | * @pdev: PCI device |
| 1409 | * |
| 1410 | * Decrease count of pass through devices for the indicated PE. If |
| 1411 | * there is no passed through device in PE, the EEH errors detected |
| 1412 | * on the PE will be reported and handled as usual. |
| 1413 | */ |
| 1414 | void eeh_dev_release(struct pci_dev *pdev) |
| 1415 | { |
| 1416 | struct eeh_dev *edev; |
| 1417 | |
| 1418 | mutex_lock(&eeh_dev_mutex); |
| 1419 | |
| 1420 | /* No PCI device ? */ |
| 1421 | if (!pdev) |
| 1422 | goto out; |
| 1423 | |
| 1424 | /* No EEH device ? */ |
| 1425 | edev = pci_dev_to_eeh_dev(pdev); |
| 1426 | if (!edev || !edev->pe || !eeh_pe_passed(edev->pe)) |
| 1427 | goto out; |
| 1428 | |
| 1429 | /* Decrease PE's pass through count */ |
Gavin Shan | 54f9a64 | 2015-08-27 15:58:27 +1000 | [diff] [blame] | 1430 | WARN_ON(atomic_dec_if_positive(&edev->pe->pass_dev_cnt) < 0); |
Gavin Shan | 5cfb20b | 2014-09-30 12:39:07 +1000 | [diff] [blame] | 1431 | eeh_pe_change_owner(edev->pe); |
Gavin Shan | 212d16c | 2014-06-10 11:41:56 +1000 | [diff] [blame] | 1432 | out: |
| 1433 | mutex_unlock(&eeh_dev_mutex); |
| 1434 | } |
| 1435 | EXPORT_SYMBOL(eeh_dev_release); |
| 1436 | |
Benjamin Herrenschmidt | 2194dc2 | 2014-08-05 18:52:59 +1000 | [diff] [blame] | 1437 | #ifdef CONFIG_IOMMU_API |
| 1438 | |
Gavin Shan | a3032ca | 2014-07-15 17:00:56 +1000 | [diff] [blame] | 1439 | static int dev_has_iommu_table(struct device *dev, void *data) |
| 1440 | { |
| 1441 | struct pci_dev *pdev = to_pci_dev(dev); |
| 1442 | struct pci_dev **ppdev = data; |
Gavin Shan | a3032ca | 2014-07-15 17:00:56 +1000 | [diff] [blame] | 1443 | |
| 1444 | if (!dev) |
| 1445 | return 0; |
| 1446 | |
Alexey Kardashevskiy | ea30e99 | 2015-06-05 16:34:53 +1000 | [diff] [blame] | 1447 | if (dev->iommu_group) { |
Gavin Shan | a3032ca | 2014-07-15 17:00:56 +1000 | [diff] [blame] | 1448 | *ppdev = pdev; |
| 1449 | return 1; |
| 1450 | } |
| 1451 | |
| 1452 | return 0; |
| 1453 | } |
| 1454 | |
Gavin Shan | 212d16c | 2014-06-10 11:41:56 +1000 | [diff] [blame] | 1455 | /** |
| 1456 | * eeh_iommu_group_to_pe - Convert IOMMU group to EEH PE |
| 1457 | * @group: IOMMU group |
| 1458 | * |
| 1459 | * The routine is called to convert IOMMU group to EEH PE. |
| 1460 | */ |
| 1461 | struct eeh_pe *eeh_iommu_group_to_pe(struct iommu_group *group) |
| 1462 | { |
Gavin Shan | 212d16c | 2014-06-10 11:41:56 +1000 | [diff] [blame] | 1463 | struct pci_dev *pdev = NULL; |
| 1464 | struct eeh_dev *edev; |
Gavin Shan | a3032ca | 2014-07-15 17:00:56 +1000 | [diff] [blame] | 1465 | int ret; |
Gavin Shan | 212d16c | 2014-06-10 11:41:56 +1000 | [diff] [blame] | 1466 | |
| 1467 | /* No IOMMU group ? */ |
| 1468 | if (!group) |
| 1469 | return NULL; |
| 1470 | |
Gavin Shan | a3032ca | 2014-07-15 17:00:56 +1000 | [diff] [blame] | 1471 | ret = iommu_group_for_each_dev(group, &pdev, dev_has_iommu_table); |
| 1472 | if (!ret || !pdev) |
Gavin Shan | 212d16c | 2014-06-10 11:41:56 +1000 | [diff] [blame] | 1473 | return NULL; |
| 1474 | |
| 1475 | /* No EEH device or PE ? */ |
| 1476 | edev = pci_dev_to_eeh_dev(pdev); |
| 1477 | if (!edev || !edev->pe) |
| 1478 | return NULL; |
| 1479 | |
| 1480 | return edev->pe; |
| 1481 | } |
Gavin Shan | 537e540 | 2014-08-07 12:47:16 +1000 | [diff] [blame] | 1482 | EXPORT_SYMBOL_GPL(eeh_iommu_group_to_pe); |
Gavin Shan | 212d16c | 2014-06-10 11:41:56 +1000 | [diff] [blame] | 1483 | |
Benjamin Herrenschmidt | 2194dc2 | 2014-08-05 18:52:59 +1000 | [diff] [blame] | 1484 | #endif /* CONFIG_IOMMU_API */ |
| 1485 | |
Gavin Shan | 212d16c | 2014-06-10 11:41:56 +1000 | [diff] [blame] | 1486 | /** |
| 1487 | * eeh_pe_set_option - Set options for the indicated PE |
| 1488 | * @pe: EEH PE |
| 1489 | * @option: requested option |
| 1490 | * |
| 1491 | * The routine is called to enable or disable EEH functionality |
| 1492 | * on the indicated PE, to enable IO or DMA for the frozen PE. |
| 1493 | */ |
| 1494 | int eeh_pe_set_option(struct eeh_pe *pe, int option) |
| 1495 | { |
| 1496 | int ret = 0; |
| 1497 | |
| 1498 | /* Invalid PE ? */ |
| 1499 | if (!pe) |
| 1500 | return -ENODEV; |
| 1501 | |
| 1502 | /* |
| 1503 | * EEH functionality could possibly be disabled, just |
| 1504 | * return error for the case. And the EEH functinality |
| 1505 | * isn't expected to be disabled on one specific PE. |
| 1506 | */ |
| 1507 | switch (option) { |
| 1508 | case EEH_OPT_ENABLE: |
Gavin Shan | 4eeeff0 | 2014-09-30 12:39:01 +1000 | [diff] [blame] | 1509 | if (eeh_enabled()) { |
Gavin Shan | 5cfb20b | 2014-09-30 12:39:07 +1000 | [diff] [blame] | 1510 | ret = eeh_pe_change_owner(pe); |
Gavin Shan | 212d16c | 2014-06-10 11:41:56 +1000 | [diff] [blame] | 1511 | break; |
Gavin Shan | 4eeeff0 | 2014-09-30 12:39:01 +1000 | [diff] [blame] | 1512 | } |
Gavin Shan | 212d16c | 2014-06-10 11:41:56 +1000 | [diff] [blame] | 1513 | ret = -EIO; |
| 1514 | break; |
| 1515 | case EEH_OPT_DISABLE: |
| 1516 | break; |
| 1517 | case EEH_OPT_THAW_MMIO: |
| 1518 | case EEH_OPT_THAW_DMA: |
Gavin Shan | de5a662 | 2016-09-28 14:34:53 +1000 | [diff] [blame] | 1519 | case EEH_OPT_FREEZE_PE: |
Gavin Shan | 212d16c | 2014-06-10 11:41:56 +1000 | [diff] [blame] | 1520 | if (!eeh_ops || !eeh_ops->set_option) { |
| 1521 | ret = -ENOENT; |
| 1522 | break; |
| 1523 | } |
| 1524 | |
Gavin Shan | 4eeeff0 | 2014-09-30 12:39:01 +1000 | [diff] [blame] | 1525 | ret = eeh_pci_enable(pe, option); |
Gavin Shan | 212d16c | 2014-06-10 11:41:56 +1000 | [diff] [blame] | 1526 | break; |
| 1527 | default: |
| 1528 | pr_debug("%s: Option %d out of range (%d, %d)\n", |
| 1529 | __func__, option, EEH_OPT_DISABLE, EEH_OPT_THAW_DMA); |
| 1530 | ret = -EINVAL; |
| 1531 | } |
| 1532 | |
| 1533 | return ret; |
| 1534 | } |
| 1535 | EXPORT_SYMBOL_GPL(eeh_pe_set_option); |
| 1536 | |
| 1537 | /** |
| 1538 | * eeh_pe_get_state - Retrieve PE's state |
| 1539 | * @pe: EEH PE |
| 1540 | * |
| 1541 | * Retrieve the PE's state, which includes 3 aspects: enabled |
| 1542 | * DMA, enabled IO and asserted reset. |
| 1543 | */ |
| 1544 | int eeh_pe_get_state(struct eeh_pe *pe) |
| 1545 | { |
| 1546 | int result, ret = 0; |
| 1547 | bool rst_active, dma_en, mmio_en; |
| 1548 | |
| 1549 | /* Existing PE ? */ |
| 1550 | if (!pe) |
| 1551 | return -ENODEV; |
| 1552 | |
| 1553 | if (!eeh_ops || !eeh_ops->get_state) |
| 1554 | return -ENOENT; |
| 1555 | |
Gavin Shan | eca036e | 2016-03-04 10:53:14 +1100 | [diff] [blame] | 1556 | /* |
| 1557 | * If the parent PE is owned by the host kernel and is undergoing |
| 1558 | * error recovery, we should return the PE state as temporarily |
| 1559 | * unavailable so that the error recovery on the guest is suspended |
| 1560 | * until the recovery completes on the host. |
| 1561 | */ |
| 1562 | if (pe->parent && |
| 1563 | !(pe->state & EEH_PE_REMOVED) && |
| 1564 | (pe->parent->state & (EEH_PE_ISOLATED | EEH_PE_RECOVERING))) |
| 1565 | return EEH_PE_STATE_UNAVAIL; |
| 1566 | |
Gavin Shan | 212d16c | 2014-06-10 11:41:56 +1000 | [diff] [blame] | 1567 | result = eeh_ops->get_state(pe, NULL); |
| 1568 | rst_active = !!(result & EEH_STATE_RESET_ACTIVE); |
| 1569 | dma_en = !!(result & EEH_STATE_DMA_ENABLED); |
| 1570 | mmio_en = !!(result & EEH_STATE_MMIO_ENABLED); |
| 1571 | |
| 1572 | if (rst_active) |
| 1573 | ret = EEH_PE_STATE_RESET; |
| 1574 | else if (dma_en && mmio_en) |
| 1575 | ret = EEH_PE_STATE_NORMAL; |
| 1576 | else if (!dma_en && !mmio_en) |
| 1577 | ret = EEH_PE_STATE_STOPPED_IO_DMA; |
| 1578 | else if (!dma_en && mmio_en) |
| 1579 | ret = EEH_PE_STATE_STOPPED_DMA; |
| 1580 | else |
| 1581 | ret = EEH_PE_STATE_UNAVAIL; |
| 1582 | |
| 1583 | return ret; |
| 1584 | } |
| 1585 | EXPORT_SYMBOL_GPL(eeh_pe_get_state); |
| 1586 | |
Gavin Shan | 316233f | 2014-09-30 12:38:53 +1000 | [diff] [blame] | 1587 | static int eeh_pe_reenable_devices(struct eeh_pe *pe) |
| 1588 | { |
| 1589 | struct eeh_dev *edev, *tmp; |
| 1590 | struct pci_dev *pdev; |
| 1591 | int ret = 0; |
| 1592 | |
| 1593 | /* Restore config space */ |
| 1594 | eeh_pe_restore_bars(pe); |
| 1595 | |
| 1596 | /* |
| 1597 | * Reenable PCI devices as the devices passed |
| 1598 | * through are always enabled before the reset. |
| 1599 | */ |
| 1600 | eeh_pe_for_each_dev(pe, edev, tmp) { |
| 1601 | pdev = eeh_dev_to_pci_dev(edev); |
| 1602 | if (!pdev) |
| 1603 | continue; |
| 1604 | |
| 1605 | ret = pci_reenable_device(pdev); |
| 1606 | if (ret) { |
| 1607 | pr_warn("%s: Failure %d reenabling %s\n", |
| 1608 | __func__, ret, pci_name(pdev)); |
| 1609 | return ret; |
| 1610 | } |
| 1611 | } |
| 1612 | |
| 1613 | /* The PE is still in frozen state */ |
Gavin Shan | c9dd014 | 2014-09-30 12:39:02 +1000 | [diff] [blame] | 1614 | return eeh_unfreeze_pe(pe, true); |
Gavin Shan | 316233f | 2014-09-30 12:38:53 +1000 | [diff] [blame] | 1615 | } |
| 1616 | |
Gavin Shan | 212d16c | 2014-06-10 11:41:56 +1000 | [diff] [blame] | 1617 | /** |
| 1618 | * eeh_pe_reset - Issue PE reset according to specified type |
| 1619 | * @pe: EEH PE |
| 1620 | * @option: reset type |
| 1621 | * |
| 1622 | * The routine is called to reset the specified PE with the |
| 1623 | * indicated type, either fundamental reset or hot reset. |
| 1624 | * PE reset is the most important part for error recovery. |
| 1625 | */ |
| 1626 | int eeh_pe_reset(struct eeh_pe *pe, int option) |
| 1627 | { |
| 1628 | int ret = 0; |
| 1629 | |
| 1630 | /* Invalid PE ? */ |
| 1631 | if (!pe) |
| 1632 | return -ENODEV; |
| 1633 | |
| 1634 | if (!eeh_ops || !eeh_ops->set_option || !eeh_ops->reset) |
| 1635 | return -ENOENT; |
| 1636 | |
| 1637 | switch (option) { |
| 1638 | case EEH_RESET_DEACTIVATE: |
| 1639 | ret = eeh_ops->reset(pe, option); |
Gavin Shan | 8a6b371 | 2014-10-01 17:07:50 +1000 | [diff] [blame] | 1640 | eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED); |
Gavin Shan | 212d16c | 2014-06-10 11:41:56 +1000 | [diff] [blame] | 1641 | if (ret) |
| 1642 | break; |
| 1643 | |
Gavin Shan | 316233f | 2014-09-30 12:38:53 +1000 | [diff] [blame] | 1644 | ret = eeh_pe_reenable_devices(pe); |
Gavin Shan | 212d16c | 2014-06-10 11:41:56 +1000 | [diff] [blame] | 1645 | break; |
| 1646 | case EEH_RESET_HOT: |
| 1647 | case EEH_RESET_FUNDAMENTAL: |
Gavin Shan | 0d5ee52 | 2014-09-30 12:38:52 +1000 | [diff] [blame] | 1648 | /* |
| 1649 | * Proactively freeze the PE to drop all MMIO access |
| 1650 | * during reset, which should be banned as it's always |
| 1651 | * cause recursive EEH error. |
| 1652 | */ |
| 1653 | eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE); |
| 1654 | |
Gavin Shan | 8a6b371 | 2014-10-01 17:07:50 +1000 | [diff] [blame] | 1655 | eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED); |
Gavin Shan | 212d16c | 2014-06-10 11:41:56 +1000 | [diff] [blame] | 1656 | ret = eeh_ops->reset(pe, option); |
| 1657 | break; |
| 1658 | default: |
| 1659 | pr_debug("%s: Unsupported option %d\n", |
| 1660 | __func__, option); |
| 1661 | ret = -EINVAL; |
| 1662 | } |
| 1663 | |
| 1664 | return ret; |
| 1665 | } |
| 1666 | EXPORT_SYMBOL_GPL(eeh_pe_reset); |
| 1667 | |
| 1668 | /** |
| 1669 | * eeh_pe_configure - Configure PCI bridges after PE reset |
| 1670 | * @pe: EEH PE |
| 1671 | * |
| 1672 | * The routine is called to restore the PCI config space for |
| 1673 | * those PCI devices, especially PCI bridges affected by PE |
| 1674 | * reset issued previously. |
| 1675 | */ |
| 1676 | int eeh_pe_configure(struct eeh_pe *pe) |
| 1677 | { |
| 1678 | int ret = 0; |
| 1679 | |
| 1680 | /* Invalid PE ? */ |
| 1681 | if (!pe) |
| 1682 | return -ENODEV; |
| 1683 | |
Gavin Shan | 212d16c | 2014-06-10 11:41:56 +1000 | [diff] [blame] | 1684 | return ret; |
| 1685 | } |
| 1686 | EXPORT_SYMBOL_GPL(eeh_pe_configure); |
| 1687 | |
Gavin Shan | ec33d36 | 2015-03-26 16:42:08 +1100 | [diff] [blame] | 1688 | /** |
| 1689 | * eeh_pe_inject_err - Injecting the specified PCI error to the indicated PE |
| 1690 | * @pe: the indicated PE |
| 1691 | * @type: error type |
| 1692 | * @function: error function |
| 1693 | * @addr: address |
| 1694 | * @mask: address mask |
| 1695 | * |
| 1696 | * The routine is called to inject the specified PCI error, which |
| 1697 | * is determined by @type and @function, to the indicated PE for |
| 1698 | * testing purpose. |
| 1699 | */ |
| 1700 | int eeh_pe_inject_err(struct eeh_pe *pe, int type, int func, |
| 1701 | unsigned long addr, unsigned long mask) |
| 1702 | { |
| 1703 | /* Invalid PE ? */ |
| 1704 | if (!pe) |
| 1705 | return -ENODEV; |
| 1706 | |
| 1707 | /* Unsupported operation ? */ |
| 1708 | if (!eeh_ops || !eeh_ops->err_inject) |
| 1709 | return -ENOENT; |
| 1710 | |
| 1711 | /* Check on PCI error type */ |
| 1712 | if (type != EEH_ERR_TYPE_32 && type != EEH_ERR_TYPE_64) |
| 1713 | return -EINVAL; |
| 1714 | |
| 1715 | /* Check on PCI error function */ |
| 1716 | if (func < EEH_ERR_FUNC_MIN || func > EEH_ERR_FUNC_MAX) |
| 1717 | return -EINVAL; |
| 1718 | |
| 1719 | return eeh_ops->err_inject(pe, type, func, addr, mask); |
| 1720 | } |
| 1721 | EXPORT_SYMBOL_GPL(eeh_pe_inject_err); |
| 1722 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1723 | static int proc_eeh_show(struct seq_file *m, void *v) |
| 1724 | { |
Gavin Shan | 2ec5a0a | 2014-02-12 15:24:55 +0800 | [diff] [blame] | 1725 | if (!eeh_enabled()) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1726 | seq_printf(m, "EEH Subsystem is globally disabled\n"); |
Gavin Shan | e575f8d | 2012-02-29 15:47:45 +0000 | [diff] [blame] | 1727 | seq_printf(m, "eeh_total_mmio_ffs=%llu\n", eeh_stats.total_mmio_ffs); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1728 | } else { |
| 1729 | seq_printf(m, "EEH Subsystem is enabled\n"); |
Linas Vepstas | 177bc93 | 2005-11-03 18:48:52 -0600 | [diff] [blame] | 1730 | seq_printf(m, |
Gavin Shan | e575f8d | 2012-02-29 15:47:45 +0000 | [diff] [blame] | 1731 | "no device=%llu\n" |
| 1732 | "no device node=%llu\n" |
| 1733 | "no config address=%llu\n" |
| 1734 | "check not wanted=%llu\n" |
| 1735 | "eeh_total_mmio_ffs=%llu\n" |
| 1736 | "eeh_false_positives=%llu\n" |
| 1737 | "eeh_slot_resets=%llu\n", |
| 1738 | eeh_stats.no_device, |
| 1739 | eeh_stats.no_dn, |
| 1740 | eeh_stats.no_cfg_addr, |
| 1741 | eeh_stats.ignored_check, |
| 1742 | eeh_stats.total_mmio_ffs, |
| 1743 | eeh_stats.false_positives, |
| 1744 | eeh_stats.slot_resets); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1745 | } |
| 1746 | |
| 1747 | return 0; |
| 1748 | } |
| 1749 | |
| 1750 | static int proc_eeh_open(struct inode *inode, struct file *file) |
| 1751 | { |
| 1752 | return single_open(file, proc_eeh_show, NULL); |
| 1753 | } |
| 1754 | |
Arjan van de Ven | 5dfe4c9 | 2007-02-12 00:55:31 -0800 | [diff] [blame] | 1755 | static const struct file_operations proc_eeh_operations = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1756 | .open = proc_eeh_open, |
| 1757 | .read = seq_read, |
| 1758 | .llseek = seq_lseek, |
| 1759 | .release = single_release, |
| 1760 | }; |
| 1761 | |
Gavin Shan | 7f52a52 | 2014-04-24 18:00:18 +1000 | [diff] [blame] | 1762 | #ifdef CONFIG_DEBUG_FS |
| 1763 | static int eeh_enable_dbgfs_set(void *data, u64 val) |
| 1764 | { |
| 1765 | if (val) |
Gavin Shan | 05b1721 | 2014-07-17 14:41:38 +1000 | [diff] [blame] | 1766 | eeh_clear_flag(EEH_FORCE_DISABLED); |
Gavin Shan | 7f52a52 | 2014-04-24 18:00:18 +1000 | [diff] [blame] | 1767 | else |
Gavin Shan | 05b1721 | 2014-07-17 14:41:38 +1000 | [diff] [blame] | 1768 | eeh_add_flag(EEH_FORCE_DISABLED); |
Gavin Shan | 7f52a52 | 2014-04-24 18:00:18 +1000 | [diff] [blame] | 1769 | |
| 1770 | /* Notify the backend */ |
| 1771 | if (eeh_ops->post_init) |
| 1772 | eeh_ops->post_init(); |
| 1773 | |
| 1774 | return 0; |
| 1775 | } |
| 1776 | |
| 1777 | static int eeh_enable_dbgfs_get(void *data, u64 *val) |
| 1778 | { |
| 1779 | if (eeh_enabled()) |
| 1780 | *val = 0x1ul; |
| 1781 | else |
| 1782 | *val = 0x0ul; |
| 1783 | return 0; |
| 1784 | } |
| 1785 | |
Gavin Shan | 1b28f17 | 2014-12-11 14:28:56 +1100 | [diff] [blame] | 1786 | static int eeh_freeze_dbgfs_set(void *data, u64 val) |
| 1787 | { |
| 1788 | eeh_max_freezes = val; |
| 1789 | return 0; |
| 1790 | } |
| 1791 | |
| 1792 | static int eeh_freeze_dbgfs_get(void *data, u64 *val) |
| 1793 | { |
| 1794 | *val = eeh_max_freezes; |
| 1795 | return 0; |
| 1796 | } |
| 1797 | |
Gavin Shan | 7f52a52 | 2014-04-24 18:00:18 +1000 | [diff] [blame] | 1798 | DEFINE_SIMPLE_ATTRIBUTE(eeh_enable_dbgfs_ops, eeh_enable_dbgfs_get, |
| 1799 | eeh_enable_dbgfs_set, "0x%llx\n"); |
Gavin Shan | 1b28f17 | 2014-12-11 14:28:56 +1100 | [diff] [blame] | 1800 | DEFINE_SIMPLE_ATTRIBUTE(eeh_freeze_dbgfs_ops, eeh_freeze_dbgfs_get, |
| 1801 | eeh_freeze_dbgfs_set, "0x%llx\n"); |
Gavin Shan | 7f52a52 | 2014-04-24 18:00:18 +1000 | [diff] [blame] | 1802 | #endif |
| 1803 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1804 | static int __init eeh_init_proc(void) |
| 1805 | { |
Gavin Shan | 7f52a52 | 2014-04-24 18:00:18 +1000 | [diff] [blame] | 1806 | if (machine_is(pseries) || machine_is(powernv)) { |
Thadeu Lima de Souza Cascardo | 8feaa43 | 2011-08-26 10:36:31 +0000 | [diff] [blame] | 1807 | proc_create("powerpc/eeh", 0, NULL, &proc_eeh_operations); |
Gavin Shan | 7f52a52 | 2014-04-24 18:00:18 +1000 | [diff] [blame] | 1808 | #ifdef CONFIG_DEBUG_FS |
| 1809 | debugfs_create_file("eeh_enable", 0600, |
| 1810 | powerpc_debugfs_root, NULL, |
| 1811 | &eeh_enable_dbgfs_ops); |
Gavin Shan | 1b28f17 | 2014-12-11 14:28:56 +1100 | [diff] [blame] | 1812 | debugfs_create_file("eeh_max_freezes", 0600, |
| 1813 | powerpc_debugfs_root, NULL, |
| 1814 | &eeh_freeze_dbgfs_ops); |
Gavin Shan | 7f52a52 | 2014-04-24 18:00:18 +1000 | [diff] [blame] | 1815 | #endif |
| 1816 | } |
| 1817 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1818 | return 0; |
| 1819 | } |
| 1820 | __initcall(eeh_init_proc); |