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gerrit-public.fairphone.software / kernel / msm-4.9 / c44ade9ef8ffd73cb8b026065ade78bc0040f0b4 / . / drivers / net / ixgbe / ixgbe_phy.h
blob: f88c9131a01c4c775676125a5d9014106c9e2c9a [file] [log] [blame]
Auke Kok9a799d72007-09-15 14:07:45 -0700[diff] [blame]1/*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2007 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#ifndef _IXGBE_PHY_H_
30#define _IXGBE_PHY_H_
31
32#include "ixgbe_type.h"
Jesse Brandeburgc44ade92008-09-11 19:59:59 -0700[diff] [blame^]33#define IXGBE_I2C_EEPROM_DEV_ADDR 0xA0
Auke Kok9a799d72007-09-15 14:07:45 -0700[diff] [blame]34
Jesse Brandeburgc44ade92008-09-11 19:59:59 -0700[diff] [blame^]35/* EEPROM byte offsets */
36#define IXGBE_SFF_IDENTIFIER 0x0
37#define IXGBE_SFF_IDENTIFIER_SFP 0x3
38#define IXGBE_SFF_VENDOR_OUI_BYTE0 0x25
39#define IXGBE_SFF_VENDOR_OUI_BYTE1 0x26
40#define IXGBE_SFF_VENDOR_OUI_BYTE2 0x27
41#define IXGBE_SFF_1GBE_COMP_CODES 0x6
42#define IXGBE_SFF_10GBE_COMP_CODES 0x3
43#define IXGBE_SFF_TRANSMISSION_MEDIA 0x9
Auke Kok9a799d72007-09-15 14:07:45 -0700[diff] [blame]44
Jesse Brandeburgc44ade92008-09-11 19:59:59 -0700[diff] [blame^]45/* Bitmasks */
46#define IXGBE_SFF_TWIN_AX_CAPABLE 0x80
47#define IXGBE_SFF_1GBASESX_CAPABLE 0x1
48#define IXGBE_SFF_10GBASESR_CAPABLE 0x10
49#define IXGBE_SFF_10GBASELR_CAPABLE 0x20
50#define IXGBE_I2C_EEPROM_READ_MASK 0x100
51#define IXGBE_I2C_EEPROM_STATUS_MASK 0x3
52#define IXGBE_I2C_EEPROM_STATUS_NO_OPERATION 0x0
53#define IXGBE_I2C_EEPROM_STATUS_PASS 0x1
54#define IXGBE_I2C_EEPROM_STATUS_FAIL 0x2
55#define IXGBE_I2C_EEPROM_STATUS_IN_PROGRESS 0x3
56
57/* Bit-shift macros */
58#define IXGBE_SFF_VENDOR_OUI_BYTE0_SHIFT 12
59#define IXGBE_SFF_VENDOR_OUI_BYTE1_SHIFT 8
60#define IXGBE_SFF_VENDOR_OUI_BYTE2_SHIFT 4
61
62/* Vendor OUIs: format of OUI is 0x[byte0][byte1][byte2][00] */
63#define IXGBE_SFF_VENDOR_OUI_TYCO 0x00407600
64#define IXGBE_SFF_VENDOR_OUI_FTL 0x00906500
65#define IXGBE_SFF_VENDOR_OUI_AVAGO 0x00176A00
66
67
68s32 ixgbe_init_phy_ops_generic(struct ixgbe_hw *hw);
69s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw);
70s32 ixgbe_reset_phy_generic(struct ixgbe_hw *hw);
71s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
72 u32 device_type, u16 *phy_data);
73s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
74 u32 device_type, u16 phy_data);
75s32 ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw);
76s32 ixgbe_setup_phy_link_speed_generic(struct ixgbe_hw *hw,
77 ixgbe_link_speed speed,
78 bool autoneg,
79 bool autoneg_wait_to_complete);
Auke Kok9a799d72007-09-15 14:07:45 -0700[diff] [blame]80
81#endif /* _IXGBE_PHY_H_ */