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Lennert Buytenheke7736d42006-03-20 17:10:13 +00001/*
2 * arch/arm/mach-ep93xx/core.c
3 * Core routines for Cirrus EP93xx chips.
4 *
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
Herbert Valerio Riedel3c9a0712007-11-26 18:49:08 +01006 * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
Lennert Buytenheke7736d42006-03-20 17:10:13 +00007 *
8 * Thanks go to Michael Burian and Ray Lehtiniemi for their key
9 * role in the ep93xx linux community.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
15 */
16
Hartley Sweeten64d68822010-01-11 19:33:16 +010017#define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt
18
Lennert Buytenheke7736d42006-03-20 17:10:13 +000019#include <linux/kernel.h>
20#include <linux/init.h>
Hartley Sweeten583ddaf2009-07-06 17:39:50 +010021#include <linux/platform_device.h>
Lennert Buytenheke7736d42006-03-20 17:10:13 +000022#include <linux/interrupt.h>
Matthias Kaehlcke63890a02008-10-29 14:14:52 -070023#include <linux/dma-mapping.h>
Lennert Buytenheke7736d42006-03-20 17:10:13 +000024#include <linux/timex.h>
Hartley Sweeten6bd4b382010-02-18 18:16:11 +010025#include <linux/irq.h>
Hartley Sweeten583ddaf2009-07-06 17:39:50 +010026#include <linux/io.h>
27#include <linux/gpio.h>
Hartley Sweeten3aa7a9a2009-07-20 18:22:36 +010028#include <linux/leds.h>
Lennert Buytenhekaee85fe2006-03-26 23:16:39 +010029#include <linux/termios.h>
Lennert Buytenheke7736d42006-03-20 17:10:13 +000030#include <linux/amba/bus.h>
Lennert Buytenhekaee85fe2006-03-26 23:16:39 +010031#include <linux/amba/serial.h>
Hartley Sweeten16bcf782010-06-10 16:19:08 +010032#include <linux/mtd/physmap.h>
Hartley Sweetend52a26a2008-10-16 23:57:03 +010033#include <linux/i2c.h>
34#include <linux/i2c-gpio.h>
Mika Westerberg4fec9972010-05-11 15:34:54 +010035#include <linux/spi/spi.h>
Paul Gortmakerdc280942011-07-31 16:17:29 -040036#include <linux/export.h>
Lennert Buytenheke7736d42006-03-20 17:10:13 +000037
Russell Kinga09e64f2008-08-05 16:14:15 +010038#include <mach/hardware.h>
Ryan Mallonc6012182009-09-22 16:47:09 -070039#include <mach/fb.h>
Hartley Sweeten12f56c62009-10-28 21:04:46 +010040#include <mach/ep93xx_keypad.h>
Mika Westerberg4fec9972010-05-11 15:34:54 +010041#include <mach/ep93xx_spi.h>
Linus Walleijbd5f12a2011-09-22 08:07:00 +010042#include <mach/gpio-ep93xx.h>
Lennert Buytenheke7736d42006-03-20 17:10:13 +000043
44#include <asm/mach/map.h>
45#include <asm/mach/time.h>
Lennert Buytenheke7736d42006-03-20 17:10:13 +000046
47#include <asm/hardware/vic.h>
48
49
50/*************************************************************************
51 * Static I/O mappings that are needed for all EP93xx platforms
52 *************************************************************************/
53static struct map_desc ep93xx_io_desc[] __initdata = {
54 {
55 .virtual = EP93XX_AHB_VIRT_BASE,
56 .pfn = __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
57 .length = EP93XX_AHB_SIZE,
58 .type = MT_DEVICE,
59 }, {
60 .virtual = EP93XX_APB_VIRT_BASE,
61 .pfn = __phys_to_pfn(EP93XX_APB_PHYS_BASE),
62 .length = EP93XX_APB_SIZE,
63 .type = MT_DEVICE,
64 },
65};
66
67void __init ep93xx_map_io(void)
68{
69 iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
70}
71
72
73/*************************************************************************
74 * Timer handling for EP93xx
75 *************************************************************************
76 * The ep93xx has four internal timers. Timers 1, 2 (both 16 bit) and
77 * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
78 * an interrupt on underflow. Timer 4 (40 bit) counts down at 983.04 kHz,
79 * is free-running, and can't generate interrupts.
80 *
81 * The 508 kHz timers are ideal for use for the timer interrupt, as the
82 * most common values of HZ divide 508 kHz nicely. We pick one of the 16
83 * bit timers (timer 1) since we don't need more than 16 bits of reload
84 * value as long as HZ >= 8.
85 *
86 * The higher clock rate of timer 4 makes it a better choice than the
87 * other timers for use in gettimeoffset(), while the fact that it can't
88 * generate interrupts means we don't have to worry about not being able
89 * to use this timer for something else. We also use timer 4 for keeping
90 * track of lost jiffies.
91 */
Hartley Sweeten1587a372010-02-23 21:45:22 +010092#define EP93XX_TIMER_REG(x) (EP93XX_TIMER_BASE + (x))
93#define EP93XX_TIMER1_LOAD EP93XX_TIMER_REG(0x00)
94#define EP93XX_TIMER1_VALUE EP93XX_TIMER_REG(0x04)
95#define EP93XX_TIMER1_CONTROL EP93XX_TIMER_REG(0x08)
96#define EP93XX_TIMER123_CONTROL_ENABLE (1 << 7)
97#define EP93XX_TIMER123_CONTROL_MODE (1 << 6)
98#define EP93XX_TIMER123_CONTROL_CLKSEL (1 << 3)
99#define EP93XX_TIMER1_CLEAR EP93XX_TIMER_REG(0x0c)
100#define EP93XX_TIMER2_LOAD EP93XX_TIMER_REG(0x20)
101#define EP93XX_TIMER2_VALUE EP93XX_TIMER_REG(0x24)
102#define EP93XX_TIMER2_CONTROL EP93XX_TIMER_REG(0x28)
103#define EP93XX_TIMER2_CLEAR EP93XX_TIMER_REG(0x2c)
104#define EP93XX_TIMER4_VALUE_LOW EP93XX_TIMER_REG(0x60)
105#define EP93XX_TIMER4_VALUE_HIGH EP93XX_TIMER_REG(0x64)
106#define EP93XX_TIMER4_VALUE_HIGH_ENABLE (1 << 8)
107#define EP93XX_TIMER3_LOAD EP93XX_TIMER_REG(0x80)
108#define EP93XX_TIMER3_VALUE EP93XX_TIMER_REG(0x84)
109#define EP93XX_TIMER3_CONTROL EP93XX_TIMER_REG(0x88)
110#define EP93XX_TIMER3_CLEAR EP93XX_TIMER_REG(0x8c)
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000111
Hartley Sweeten1587a372010-02-23 21:45:22 +0100112#define EP93XX_TIMER123_CLOCK 508469
113#define EP93XX_TIMER4_CLOCK 983040
114
115#define TIMER1_RELOAD ((EP93XX_TIMER123_CLOCK / HZ) - 1)
Julia Lawallaf1057a2009-08-03 11:57:20 +0100116#define TIMER4_TICKS_PER_JIFFY DIV_ROUND_CLOSEST(CLOCK_TICK_RATE, HZ)
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000117
Hartley Sweeten1587a372010-02-23 21:45:22 +0100118static unsigned int last_jiffy_time;
119
Hartley Sweetend5565f72009-04-14 21:38:07 +0100120static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000121{
Hartley Sweeten1587a372010-02-23 21:45:22 +0100122 /* Writing any value clears the timer interrupt */
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000123 __raw_writel(1, EP93XX_TIMER1_CLEAR);
Hartley Sweeten1587a372010-02-23 21:45:22 +0100124
125 /* Recover lost jiffies */
Lennert Buytenhekf869afa2006-06-22 10:30:53 +0100126 while ((signed long)
127 (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time)
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000128 >= TIMER4_TICKS_PER_JIFFY) {
129 last_jiffy_time += TIMER4_TICKS_PER_JIFFY;
Linus Torvalds0cd61b62006-10-06 10:53:39 -0700130 timer_tick();
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000131 }
132
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000133 return IRQ_HANDLED;
134}
135
136static struct irqaction ep93xx_timer_irq = {
137 .name = "ep93xx timer",
Bernhard Walleb30faba2007-05-08 00:35:39 -0700138 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000139 .handler = ep93xx_timer_interrupt,
140};
141
142static void __init ep93xx_timer_init(void)
143{
Hartley Sweeten1587a372010-02-23 21:45:22 +0100144 u32 tmode = EP93XX_TIMER123_CONTROL_MODE |
145 EP93XX_TIMER123_CONTROL_CLKSEL;
146
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000147 /* Enable periodic HZ timer. */
Hartley Sweeten1587a372010-02-23 21:45:22 +0100148 __raw_writel(tmode, EP93XX_TIMER1_CONTROL);
149 __raw_writel(TIMER1_RELOAD, EP93XX_TIMER1_LOAD);
150 __raw_writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE,
151 EP93XX_TIMER1_CONTROL);
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000152
153 /* Enable lost jiffy timer. */
Hartley Sweeten1587a372010-02-23 21:45:22 +0100154 __raw_writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE,
155 EP93XX_TIMER4_VALUE_HIGH);
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000156
157 setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq);
158}
159
160static unsigned long ep93xx_gettimeoffset(void)
161{
162 int offset;
163
164 offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
165
166 /* Calculate (1000000 / 983040) * offset. */
167 return offset + (53 * offset / 3072);
168}
169
170struct sys_timer ep93xx_timer = {
171 .init = ep93xx_timer_init,
172 .offset = ep93xx_gettimeoffset,
173};
174
175
176/*************************************************************************
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000177 * EP93xx IRQ handling
178 *************************************************************************/
179void __init ep93xx_init_irq(void)
180{
Hartley Sweeten53967302009-07-09 23:22:07 +0100181 vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
182 vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0);
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000183}
184
185
186/*************************************************************************
Hartley Sweeten02239f02009-07-08 02:00:49 +0100187 * EP93xx System Controller Software Locked register handling
188 *************************************************************************/
189
190/*
191 * syscon_swlock prevents anything else from writing to the syscon
192 * block while a software locked register is being written.
193 */
194static DEFINE_SPINLOCK(syscon_swlock);
195
Ryan Mallonfbeeea52009-07-15 21:51:59 +0100196void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
Hartley Sweeten02239f02009-07-08 02:00:49 +0100197{
198 unsigned long flags;
199
200 spin_lock_irqsave(&syscon_swlock, flags);
201
202 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
203 __raw_writel(val, reg);
204
205 spin_unlock_irqrestore(&syscon_swlock, flags);
206}
207EXPORT_SYMBOL(ep93xx_syscon_swlocked_write);
208
209void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
210{
211 unsigned long flags;
212 unsigned int val;
213
214 spin_lock_irqsave(&syscon_swlock, flags);
215
216 val = __raw_readl(EP93XX_SYSCON_DEVCFG);
Hartley Sweeten02239f02009-07-08 02:00:49 +0100217 val &= ~clear_bits;
Hartley Sweetena0fb0072010-06-14 16:54:16 +0100218 val |= set_bits;
Hartley Sweeten02239f02009-07-08 02:00:49 +0100219 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
220 __raw_writel(val, EP93XX_SYSCON_DEVCFG);
221
222 spin_unlock_irqrestore(&syscon_swlock, flags);
223}
224EXPORT_SYMBOL(ep93xx_devcfg_set_clear);
225
Mika Westerberg99e6a232010-03-27 12:05:14 +0100226/**
227 * ep93xx_chip_revision() - returns the EP93xx chip revision
228 *
229 * See <mach/platform.h> for more information.
230 */
231unsigned int ep93xx_chip_revision(void)
232{
233 unsigned int v;
234
235 v = __raw_readl(EP93XX_SYSCON_SYSCFG);
236 v &= EP93XX_SYSCON_SYSCFG_REV_MASK;
237 v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT;
238 return v;
239}
Hartley Sweeten02239f02009-07-08 02:00:49 +0100240
241/*************************************************************************
H Hartley Sweeten1e4c8842011-06-08 14:35:33 -0700242 * EP93xx GPIO
243 *************************************************************************/
244static struct resource ep93xx_gpio_resource[] = {
245 {
246 .start = EP93XX_GPIO_PHYS_BASE,
247 .end = EP93XX_GPIO_PHYS_BASE + 0xcc - 1,
248 .flags = IORESOURCE_MEM,
249 },
250};
251
252static struct platform_device ep93xx_gpio_device = {
253 .name = "gpio-ep93xx",
254 .id = -1,
255 .num_resources = ARRAY_SIZE(ep93xx_gpio_resource),
256 .resource = ep93xx_gpio_resource,
257};
258
259/*************************************************************************
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000260 * EP93xx peripheral handling
261 *************************************************************************/
Lennert Buytenhekaee85fe2006-03-26 23:16:39 +0100262#define EP93XX_UART_MCR_OFFSET (0x0100)
263
264static void ep93xx_uart_set_mctrl(struct amba_device *dev,
265 void __iomem *base, unsigned int mctrl)
266{
267 unsigned int mcr;
268
269 mcr = 0;
Petr Å tetiar186dcaa2011-06-17 11:10:04 +0100270 if (mctrl & TIOCM_RTS)
Lennert Buytenhekaee85fe2006-03-26 23:16:39 +0100271 mcr |= 2;
Petr Å tetiar186dcaa2011-06-17 11:10:04 +0100272 if (mctrl & TIOCM_DTR)
Lennert Buytenhekaee85fe2006-03-26 23:16:39 +0100273 mcr |= 1;
274
275 __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
276}
277
278static struct amba_pl010_data ep93xx_uart_data = {
279 .set_mctrl = ep93xx_uart_set_mctrl,
280};
281
Russell King0b260512011-12-18 15:16:40 +0000282static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE,
283 { IRQ_EP93XX_UART1 }, &ep93xx_uart_data);
Lennert Buytenhekaee85fe2006-03-26 23:16:39 +0100284
Russell King0b260512011-12-18 15:16:40 +0000285static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE,
286 { IRQ_EP93XX_UART2 }, &ep93xx_uart_data);
Lennert Buytenhekaee85fe2006-03-26 23:16:39 +0100287
Russell King0b260512011-12-18 15:16:40 +0000288static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE,
289 { IRQ_EP93XX_UART3 }, &ep93xx_uart_data);
Lennert Buytenhek41658132006-04-02 16:17:34 +0100290
Hartley Sweeten38f7b002009-04-15 23:18:26 +0100291static struct resource ep93xx_rtc_resource[] = {
292 {
293 .start = EP93XX_RTC_PHYS_BASE,
294 .end = EP93XX_RTC_PHYS_BASE + 0x10c - 1,
295 .flags = IORESOURCE_MEM,
296 },
297};
298
Lennert Buytenhek41658132006-04-02 16:17:34 +0100299static struct platform_device ep93xx_rtc_device = {
Hartley Sweeten38f7b002009-04-15 23:18:26 +0100300 .name = "ep93xx-rtc",
301 .id = -1,
302 .num_resources = ARRAY_SIZE(ep93xx_rtc_resource),
303 .resource = ep93xx_rtc_resource,
Lennert Buytenhek41658132006-04-02 16:17:34 +0100304};
305
306
Lennert Buytenhek1f64eb32006-06-24 10:33:03 +0100307static struct resource ep93xx_ohci_resources[] = {
308 [0] = {
309 .start = EP93XX_USB_PHYS_BASE,
310 .end = EP93XX_USB_PHYS_BASE + 0x0fff,
311 .flags = IORESOURCE_MEM,
312 },
313 [1] = {
314 .start = IRQ_EP93XX_USB,
315 .end = IRQ_EP93XX_USB,
316 .flags = IORESOURCE_IRQ,
317 },
318};
319
Matthias Kaehlcke63890a02008-10-29 14:14:52 -0700320
Lennert Buytenhek1f64eb32006-06-24 10:33:03 +0100321static struct platform_device ep93xx_ohci_device = {
322 .name = "ep93xx-ohci",
323 .id = -1,
324 .dev = {
Matthias Kaehlcke63890a02008-10-29 14:14:52 -0700325 .dma_mask = &ep93xx_ohci_device.dev.coherent_dma_mask,
326 .coherent_dma_mask = DMA_BIT_MASK(32),
Lennert Buytenhek1f64eb32006-06-24 10:33:03 +0100327 },
328 .num_resources = ARRAY_SIZE(ep93xx_ohci_resources),
329 .resource = ep93xx_ohci_resources,
330};
331
Hartley Sweetenb370e082010-03-18 18:04:06 +0100332
333/*************************************************************************
Hartley Sweeten16bcf782010-06-10 16:19:08 +0100334 * EP93xx physmap'ed flash
335 *************************************************************************/
336static struct physmap_flash_data ep93xx_flash_data;
337
338static struct resource ep93xx_flash_resource = {
339 .flags = IORESOURCE_MEM,
340};
341
342static struct platform_device ep93xx_flash = {
343 .name = "physmap-flash",
344 .id = 0,
345 .dev = {
346 .platform_data = &ep93xx_flash_data,
347 },
348 .num_resources = 1,
349 .resource = &ep93xx_flash_resource,
350};
351
352/**
353 * ep93xx_register_flash() - Register the external flash device.
354 * @width: bank width in octets
355 * @start: resource start address
356 * @size: resource size
357 */
358void __init ep93xx_register_flash(unsigned int width,
359 resource_size_t start, resource_size_t size)
360{
361 ep93xx_flash_data.width = width;
362
363 ep93xx_flash_resource.start = start;
364 ep93xx_flash_resource.end = start + size - 1;
365
366 platform_device_register(&ep93xx_flash);
367}
368
369
370/*************************************************************************
Hartley Sweetenb370e082010-03-18 18:04:06 +0100371 * EP93xx ethernet peripheral handling
372 *************************************************************************/
Hartley Sweetena0a08fd2008-10-04 20:01:49 +0100373static struct ep93xx_eth_data ep93xx_eth_data;
374
375static struct resource ep93xx_eth_resource[] = {
376 {
377 .start = EP93XX_ETHERNET_PHYS_BASE,
378 .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
379 .flags = IORESOURCE_MEM,
380 }, {
381 .start = IRQ_EP93XX_ETHERNET,
382 .end = IRQ_EP93XX_ETHERNET,
383 .flags = IORESOURCE_IRQ,
384 }
385};
386
Mika Westerbergfa70cf42011-06-11 08:39:54 +0000387static u64 ep93xx_eth_dma_mask = DMA_BIT_MASK(32);
388
Hartley Sweetena0a08fd2008-10-04 20:01:49 +0100389static struct platform_device ep93xx_eth_device = {
390 .name = "ep93xx-eth",
391 .id = -1,
392 .dev = {
Mika Westerbergfa70cf42011-06-11 08:39:54 +0000393 .platform_data = &ep93xx_eth_data,
394 .coherent_dma_mask = DMA_BIT_MASK(32),
395 .dma_mask = &ep93xx_eth_dma_mask,
Hartley Sweetena0a08fd2008-10-04 20:01:49 +0100396 },
397 .num_resources = ARRAY_SIZE(ep93xx_eth_resource),
398 .resource = ep93xx_eth_resource,
399};
400
Hartley Sweetenb370e082010-03-18 18:04:06 +0100401/**
402 * ep93xx_register_eth - Register the built-in ethernet platform device.
403 * @data: platform specific ethernet configuration (__initdata)
404 * @copy_addr: flag indicating that the MAC address should be copied
405 * from the IndAd registers (as programmed by the bootloader)
406 */
Hartley Sweetena0a08fd2008-10-04 20:01:49 +0100407void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
408{
Hartley Sweeten5b1c3c82009-07-13 19:50:10 +0100409 if (copy_addr)
410 memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6);
Hartley Sweetena0a08fd2008-10-04 20:01:49 +0100411
412 ep93xx_eth_data = *data;
413 platform_device_register(&ep93xx_eth_device);
414}
415
Hartley Sweeten6531a992009-10-08 00:45:00 +0100416
417/*************************************************************************
418 * EP93xx i2c peripheral handling
419 *************************************************************************/
420static struct i2c_gpio_platform_data ep93xx_i2c_data;
Hartley Sweetend52a26a2008-10-16 23:57:03 +0100421
422static struct platform_device ep93xx_i2c_device = {
Hartley Sweetenb370e082010-03-18 18:04:06 +0100423 .name = "i2c-gpio",
424 .id = 0,
425 .dev = {
426 .platform_data = &ep93xx_i2c_data,
427 },
Hartley Sweetend52a26a2008-10-16 23:57:03 +0100428};
429
Hartley Sweetenb370e082010-03-18 18:04:06 +0100430/**
431 * ep93xx_register_i2c - Register the i2c platform device.
432 * @data: platform specific i2c-gpio configuration (__initdata)
433 * @devices: platform specific i2c bus device information (__initdata)
434 * @num: the number of devices on the i2c bus
435 */
Hartley Sweeten6531a992009-10-08 00:45:00 +0100436void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
437 struct i2c_board_info *devices, int num)
Hartley Sweetend52a26a2008-10-16 23:57:03 +0100438{
Hartley Sweeten6531a992009-10-08 00:45:00 +0100439 /*
440 * Set the EEPROM interface pin drive type control.
441 * Defines the driver type for the EECLK and EEDAT pins as either
442 * open drain, which will require an external pull-up, or a normal
443 * CMOS driver.
444 */
445 if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT)
Hartley Sweeten64d68822010-01-11 19:33:16 +0100446 pr_warning("sda != EEDAT, open drain has no effect\n");
Hartley Sweeten6531a992009-10-08 00:45:00 +0100447 if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK)
Hartley Sweeten64d68822010-01-11 19:33:16 +0100448 pr_warning("scl != EECLK, open drain has no effect\n");
Hartley Sweeten6531a992009-10-08 00:45:00 +0100449
450 __raw_writel((data->sda_is_open_drain << 1) |
451 (data->scl_is_open_drain << 0),
452 EP93XX_GPIO_EEDRIVE);
453
454 ep93xx_i2c_data = *data;
Hartley Sweetend52a26a2008-10-16 23:57:03 +0100455 i2c_register_board_info(0, devices, num);
456 platform_device_register(&ep93xx_i2c_device);
457}
458
Mika Westerberg4fec9972010-05-11 15:34:54 +0100459/*************************************************************************
460 * EP93xx SPI peripheral handling
461 *************************************************************************/
462static struct ep93xx_spi_info ep93xx_spi_master_data;
463
464static struct resource ep93xx_spi_resources[] = {
465 {
466 .start = EP93XX_SPI_PHYS_BASE,
467 .end = EP93XX_SPI_PHYS_BASE + 0x18 - 1,
468 .flags = IORESOURCE_MEM,
469 },
470 {
471 .start = IRQ_EP93XX_SSP,
472 .end = IRQ_EP93XX_SSP,
473 .flags = IORESOURCE_IRQ,
474 },
475};
476
Mika Westerberg626a96d2011-05-29 13:10:06 +0300477static u64 ep93xx_spi_dma_mask = DMA_BIT_MASK(32);
478
Mika Westerberg4fec9972010-05-11 15:34:54 +0100479static struct platform_device ep93xx_spi_device = {
480 .name = "ep93xx-spi",
481 .id = 0,
482 .dev = {
Mika Westerberg626a96d2011-05-29 13:10:06 +0300483 .platform_data = &ep93xx_spi_master_data,
484 .coherent_dma_mask = DMA_BIT_MASK(32),
485 .dma_mask = &ep93xx_spi_dma_mask,
Mika Westerberg4fec9972010-05-11 15:34:54 +0100486 },
487 .num_resources = ARRAY_SIZE(ep93xx_spi_resources),
488 .resource = ep93xx_spi_resources,
489};
490
491/**
492 * ep93xx_register_spi() - registers spi platform device
493 * @info: ep93xx board specific spi master info (__initdata)
494 * @devices: SPI devices to register (__initdata)
495 * @num: number of SPI devices to register
496 *
497 * This function registers platform device for the EP93xx SPI controller and
498 * also makes sure that SPI pins are muxed so that I2S is not using those pins.
499 */
500void __init ep93xx_register_spi(struct ep93xx_spi_info *info,
501 struct spi_board_info *devices, int num)
502{
503 /*
504 * When SPI is used, we need to make sure that I2S is muxed off from
505 * SPI pins.
506 */
507 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONSSP);
508
509 ep93xx_spi_master_data = *info;
510 spi_register_board_info(devices, num);
511 platform_device_register(&ep93xx_spi_device);
512}
Hartley Sweeten3aa7a9a2009-07-20 18:22:36 +0100513
514/*************************************************************************
515 * EP93xx LEDs
516 *************************************************************************/
517static struct gpio_led ep93xx_led_pins[] = {
518 {
Hartley Sweetenb370e082010-03-18 18:04:06 +0100519 .name = "platform:grled",
520 .gpio = EP93XX_GPIO_LINE_GRLED,
Hartley Sweeten3aa7a9a2009-07-20 18:22:36 +0100521 }, {
Hartley Sweetenb370e082010-03-18 18:04:06 +0100522 .name = "platform:rdled",
523 .gpio = EP93XX_GPIO_LINE_RDLED,
Hartley Sweeten3aa7a9a2009-07-20 18:22:36 +0100524 },
525};
526
527static struct gpio_led_platform_data ep93xx_led_data = {
528 .num_leds = ARRAY_SIZE(ep93xx_led_pins),
529 .leds = ep93xx_led_pins,
530};
531
532static struct platform_device ep93xx_leds = {
533 .name = "leds-gpio",
534 .id = -1,
535 .dev = {
536 .platform_data = &ep93xx_led_data,
537 },
538};
539
540
Hartley Sweetenef123792009-07-29 22:41:06 +0100541/*************************************************************************
542 * EP93xx pwm peripheral handling
543 *************************************************************************/
544static struct resource ep93xx_pwm0_resource[] = {
545 {
546 .start = EP93XX_PWM_PHYS_BASE,
547 .end = EP93XX_PWM_PHYS_BASE + 0x10 - 1,
548 .flags = IORESOURCE_MEM,
549 },
550};
551
552static struct platform_device ep93xx_pwm0_device = {
553 .name = "ep93xx-pwm",
554 .id = 0,
555 .num_resources = ARRAY_SIZE(ep93xx_pwm0_resource),
556 .resource = ep93xx_pwm0_resource,
557};
558
559static struct resource ep93xx_pwm1_resource[] = {
560 {
561 .start = EP93XX_PWM_PHYS_BASE + 0x20,
562 .end = EP93XX_PWM_PHYS_BASE + 0x30 - 1,
563 .flags = IORESOURCE_MEM,
564 },
565};
566
567static struct platform_device ep93xx_pwm1_device = {
568 .name = "ep93xx-pwm",
569 .id = 1,
570 .num_resources = ARRAY_SIZE(ep93xx_pwm1_resource),
571 .resource = ep93xx_pwm1_resource,
572};
573
574void __init ep93xx_register_pwm(int pwm0, int pwm1)
575{
576 if (pwm0)
577 platform_device_register(&ep93xx_pwm0_device);
578
579 /* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */
580 if (pwm1)
581 platform_device_register(&ep93xx_pwm1_device);
582}
583
584int ep93xx_pwm_acquire_gpio(struct platform_device *pdev)
585{
586 int err;
587
588 if (pdev->id == 0) {
589 err = 0;
590 } else if (pdev->id == 1) {
591 err = gpio_request(EP93XX_GPIO_LINE_EGPIO14,
592 dev_name(&pdev->dev));
593 if (err)
594 return err;
595 err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0);
596 if (err)
597 goto fail;
598
599 /* PWM 1 output on EGPIO[14] */
600 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG);
601 } else {
602 err = -ENODEV;
603 }
604
605 return err;
606
607fail:
608 gpio_free(EP93XX_GPIO_LINE_EGPIO14);
609 return err;
610}
611EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio);
612
613void ep93xx_pwm_release_gpio(struct platform_device *pdev)
614{
615 if (pdev->id == 1) {
616 gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14);
617 gpio_free(EP93XX_GPIO_LINE_EGPIO14);
618
619 /* EGPIO[14] used for GPIO */
620 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG);
621 }
622}
623EXPORT_SYMBOL(ep93xx_pwm_release_gpio);
624
625
Ryan Mallonc6012182009-09-22 16:47:09 -0700626/*************************************************************************
627 * EP93xx video peripheral handling
628 *************************************************************************/
629static struct ep93xxfb_mach_info ep93xxfb_data;
630
631static struct resource ep93xx_fb_resource[] = {
632 {
633 .start = EP93XX_RASTER_PHYS_BASE,
634 .end = EP93XX_RASTER_PHYS_BASE + 0x800 - 1,
635 .flags = IORESOURCE_MEM,
636 },
637};
638
639static struct platform_device ep93xx_fb_device = {
640 .name = "ep93xx-fb",
641 .id = -1,
642 .dev = {
Hartley Sweetenb370e082010-03-18 18:04:06 +0100643 .platform_data = &ep93xxfb_data,
Ryan Mallonc6012182009-09-22 16:47:09 -0700644 .coherent_dma_mask = DMA_BIT_MASK(32),
645 .dma_mask = &ep93xx_fb_device.dev.coherent_dma_mask,
646 },
647 .num_resources = ARRAY_SIZE(ep93xx_fb_resource),
648 .resource = ep93xx_fb_resource,
649};
650
Hartley Sweeten6ea4b742010-06-09 21:15:12 +0100651static struct platform_device ep93xx_bl_device = {
652 .name = "ep93xx-bl",
653 .id = -1,
654};
655
Hartley Sweetenb370e082010-03-18 18:04:06 +0100656/**
657 * ep93xx_register_fb - Register the framebuffer platform device.
658 * @data: platform specific framebuffer configuration (__initdata)
659 */
Ryan Mallonc6012182009-09-22 16:47:09 -0700660void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
661{
662 ep93xxfb_data = *data;
663 platform_device_register(&ep93xx_fb_device);
Hartley Sweeten6ea4b742010-06-09 21:15:12 +0100664 platform_device_register(&ep93xx_bl_device);
Ryan Mallonc6012182009-09-22 16:47:09 -0700665}
666
Hartley Sweeten12f56c62009-10-28 21:04:46 +0100667
668/*************************************************************************
669 * EP93xx matrix keypad peripheral handling
670 *************************************************************************/
Hartley Sweetenb370e082010-03-18 18:04:06 +0100671static struct ep93xx_keypad_platform_data ep93xx_keypad_data;
672
Hartley Sweeten12f56c62009-10-28 21:04:46 +0100673static struct resource ep93xx_keypad_resource[] = {
674 {
675 .start = EP93XX_KEY_MATRIX_PHYS_BASE,
676 .end = EP93XX_KEY_MATRIX_PHYS_BASE + 0x0c - 1,
677 .flags = IORESOURCE_MEM,
678 }, {
679 .start = IRQ_EP93XX_KEY,
680 .end = IRQ_EP93XX_KEY,
681 .flags = IORESOURCE_IRQ,
682 },
683};
684
685static struct platform_device ep93xx_keypad_device = {
Hartley Sweetenb370e082010-03-18 18:04:06 +0100686 .name = "ep93xx-keypad",
687 .id = -1,
688 .dev = {
689 .platform_data = &ep93xx_keypad_data,
690 },
691 .num_resources = ARRAY_SIZE(ep93xx_keypad_resource),
692 .resource = ep93xx_keypad_resource,
Hartley Sweeten12f56c62009-10-28 21:04:46 +0100693};
694
Hartley Sweetenb370e082010-03-18 18:04:06 +0100695/**
696 * ep93xx_register_keypad - Register the keypad platform device.
697 * @data: platform specific keypad configuration (__initdata)
698 */
Hartley Sweeten12f56c62009-10-28 21:04:46 +0100699void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
700{
Hartley Sweetenb370e082010-03-18 18:04:06 +0100701 ep93xx_keypad_data = *data;
Hartley Sweeten12f56c62009-10-28 21:04:46 +0100702 platform_device_register(&ep93xx_keypad_device);
703}
704
705int ep93xx_keypad_acquire_gpio(struct platform_device *pdev)
706{
707 int err;
708 int i;
709
710 for (i = 0; i < 8; i++) {
711 err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev));
712 if (err)
713 goto fail_gpio_c;
714 err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev));
715 if (err)
716 goto fail_gpio_d;
717 }
718
719 /* Enable the keypad controller; GPIO ports C and D used for keypad */
720 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS |
721 EP93XX_SYSCON_DEVCFG_GONK);
722
723 return 0;
724
725fail_gpio_d:
726 gpio_free(EP93XX_GPIO_LINE_C(i));
727fail_gpio_c:
728 for ( ; i >= 0; --i) {
729 gpio_free(EP93XX_GPIO_LINE_C(i));
730 gpio_free(EP93XX_GPIO_LINE_D(i));
731 }
732 return err;
733}
734EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio);
735
736void ep93xx_keypad_release_gpio(struct platform_device *pdev)
737{
738 int i;
739
740 for (i = 0; i < 8; i++) {
741 gpio_free(EP93XX_GPIO_LINE_C(i));
742 gpio_free(EP93XX_GPIO_LINE_D(i));
743 }
744
745 /* Disable the keypad controller; GPIO ports C and D used for GPIO */
746 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
747 EP93XX_SYSCON_DEVCFG_GONK);
748}
749EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
750
Ryan Malloned67ea82010-06-08 22:01:10 +1200751/*************************************************************************
752 * EP93xx I2S audio peripheral handling
753 *************************************************************************/
754static struct resource ep93xx_i2s_resource[] = {
755 {
756 .start = EP93XX_I2S_PHYS_BASE,
757 .end = EP93XX_I2S_PHYS_BASE + 0x100 - 1,
758 .flags = IORESOURCE_MEM,
759 },
760};
761
762static struct platform_device ep93xx_i2s_device = {
763 .name = "ep93xx-i2s",
764 .id = -1,
765 .num_resources = ARRAY_SIZE(ep93xx_i2s_resource),
766 .resource = ep93xx_i2s_resource,
767};
768
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000769static struct platform_device ep93xx_pcm_device = {
770 .name = "ep93xx-pcm-audio",
771 .id = -1,
772};
773
Ryan Malloned67ea82010-06-08 22:01:10 +1200774void __init ep93xx_register_i2s(void)
775{
776 platform_device_register(&ep93xx_i2s_device);
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000777 platform_device_register(&ep93xx_pcm_device);
Ryan Malloned67ea82010-06-08 22:01:10 +1200778}
779
780#define EP93XX_SYSCON_DEVCFG_I2S_MASK (EP93XX_SYSCON_DEVCFG_I2SONSSP | \
781 EP93XX_SYSCON_DEVCFG_I2SONAC97)
782
783#define EP93XX_I2SCLKDIV_MASK (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \
784 EP93XX_SYSCON_I2SCLKDIV_SPOL)
785
786int ep93xx_i2s_acquire(unsigned i2s_pins, unsigned i2s_config)
787{
788 unsigned val;
789
790 /* Sanity check */
791 if (i2s_pins & ~EP93XX_SYSCON_DEVCFG_I2S_MASK)
792 return -EINVAL;
793 if (i2s_config & ~EP93XX_I2SCLKDIV_MASK)
794 return -EINVAL;
795
796 /* Must have only one of I2SONSSP/I2SONAC97 set */
797 if ((i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONSSP) ==
798 (i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONAC97))
799 return -EINVAL;
800
801 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
802 ep93xx_devcfg_set_bits(i2s_pins);
803
804 /*
805 * This is potentially racy with the clock api for i2s_mclk, sclk and
806 * lrclk. Since the i2s driver is the only user of those clocks we
807 * rely on it to prevent parallel use of this function and the
808 * clock api for the i2s clocks.
809 */
810 val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV);
811 val &= ~EP93XX_I2SCLKDIV_MASK;
812 val |= i2s_config;
813 ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV);
814
815 return 0;
816}
817EXPORT_SYMBOL(ep93xx_i2s_acquire);
818
819void ep93xx_i2s_release(void)
820{
821 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
822}
823EXPORT_SYMBOL(ep93xx_i2s_release);
Hartley Sweeten12f56c62009-10-28 21:04:46 +0100824
Mika Westerberg534bc7f2010-10-14 17:49:07 +0300825/*************************************************************************
826 * EP93xx AC97 audio peripheral handling
827 *************************************************************************/
828static struct resource ep93xx_ac97_resources[] = {
829 {
830 .start = EP93XX_AAC_PHYS_BASE,
Mika Westerbergec115942011-02-05 09:52:33 +0100831 .end = EP93XX_AAC_PHYS_BASE + 0xac - 1,
Mika Westerberg534bc7f2010-10-14 17:49:07 +0300832 .flags = IORESOURCE_MEM,
833 },
834 {
835 .start = IRQ_EP93XX_AACINTR,
836 .end = IRQ_EP93XX_AACINTR,
837 .flags = IORESOURCE_IRQ,
838 },
839};
840
841static struct platform_device ep93xx_ac97_device = {
842 .name = "ep93xx-ac97",
843 .id = -1,
844 .num_resources = ARRAY_SIZE(ep93xx_ac97_resources),
845 .resource = ep93xx_ac97_resources,
846};
847
848void __init ep93xx_register_ac97(void)
849{
850 /*
851 * Make sure that the AC97 pins are not used by I2S.
852 */
853 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
854
855 platform_device_register(&ep93xx_ac97_device);
856 platform_device_register(&ep93xx_pcm_device);
857}
858
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000859void __init ep93xx_init_devices(void)
860{
Hartley Sweeten02239f02009-07-08 02:00:49 +0100861 /* Disallow access to MaverickCrunch initially */
862 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
Lennert Buytenhekaee85fe2006-03-26 23:16:39 +0100863
H Hartley Sweeten1e4c8842011-06-08 14:35:33 -0700864 /* Get the GPIO working early, other devices need it */
865 platform_device_register(&ep93xx_gpio_device);
Ryan Mallonb6850042008-04-16 02:56:35 +0100866
Lennert Buytenhekaee85fe2006-03-26 23:16:39 +0100867 amba_device_register(&uart1_device, &iomem_resource);
868 amba_device_register(&uart2_device, &iomem_resource);
869 amba_device_register(&uart3_device, &iomem_resource);
Lennert Buytenhek41658132006-04-02 16:17:34 +0100870
871 platform_device_register(&ep93xx_rtc_device);
Lennert Buytenhek1f64eb32006-06-24 10:33:03 +0100872 platform_device_register(&ep93xx_ohci_device);
Hartley Sweeten3aa7a9a2009-07-20 18:22:36 +0100873 platform_device_register(&ep93xx_leds);
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000874}
Russell King32751662011-11-05 09:54:14 +0000875
876void ep93xx_restart(char mode, const char *cmd)
877{
878 /*
879 * Set then clear the SWRST bit to initiate a software reset
880 */
881 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST);
882 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST);
883
884 while (1)
885 ;
886}