Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/arm/mach-omap1/pm.c |
| 3 | * |
| 4 | * OMAP Power Management Routines |
| 5 | * |
| 6 | * Original code for the SA11x0: |
| 7 | * Copyright (c) 2001 Cliff Brake <cbrake@accelent.com> |
| 8 | * |
| 9 | * Modified for the PXA250 by Nicolas Pitre: |
| 10 | * Copyright (c) 2002 Monta Vista Software, Inc. |
| 11 | * |
| 12 | * Modified for the OMAP1510 by David Singleton: |
| 13 | * Copyright (c) 2002 Monta Vista Software, Inc. |
| 14 | * |
| 15 | * Cleanup 2004 for OMAP1510/1610 by Dirk Behme <dirk.behme@de.bosch.com> |
| 16 | * |
| 17 | * This program is free software; you can redistribute it and/or modify it |
| 18 | * under the terms of the GNU General Public License as published by the |
| 19 | * Free Software Foundation; either version 2 of the License, or (at your |
| 20 | * option) any later version. |
| 21 | * |
| 22 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED |
| 23 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 24 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN |
| 25 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 26 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 27 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF |
| 28 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
| 29 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 30 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 31 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 32 | * |
| 33 | * You should have received a copy of the GNU General Public License along |
| 34 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 35 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
| 36 | */ |
| 37 | |
Rafael J. Wysocki | 95d9ffb | 2007-10-18 03:04:39 -0700 | [diff] [blame] | 38 | #include <linux/suspend.h> |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 39 | #include <linux/sched.h> |
| 40 | #include <linux/proc_fs.h> |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 41 | #include <linux/interrupt.h> |
| 42 | #include <linux/sysfs.h> |
| 43 | #include <linux/module.h> |
Russell King | fced80c | 2008-09-06 12:10:45 +0100 | [diff] [blame] | 44 | #include <linux/io.h> |
Nicolas Pitre | 0bcd24b | 2012-01-04 16:27:48 -0500 | [diff] [blame] | 45 | #include <linux/atomic.h> |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 46 | |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 47 | #include <asm/irq.h> |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 48 | #include <asm/mach/time.h> |
| 49 | #include <asm/mach/irq.h> |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 50 | |
Tony Lindgren | ce491cf | 2009-10-20 09:40:47 -0700 | [diff] [blame] | 51 | #include <plat/cpu.h> |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 52 | #include <mach/irqs.h> |
Tony Lindgren | ce491cf | 2009-10-20 09:40:47 -0700 | [diff] [blame] | 53 | #include <plat/clock.h> |
| 54 | #include <plat/sram.h> |
| 55 | #include <plat/tc.h> |
| 56 | #include <plat/mux.h> |
| 57 | #include <plat/dma.h> |
| 58 | #include <plat/dmtimer.h> |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 59 | |
Kevin Hilman | c912f7e | 2009-05-15 11:29:28 -0700 | [diff] [blame] | 60 | #include "pm.h" |
| 61 | |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 62 | static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE]; |
| 63 | static unsigned short dsp_sleep_save[DSP_SLEEP_SAVE_SIZE]; |
| 64 | static unsigned short ulpd_sleep_save[ULPD_SLEEP_SAVE_SIZE]; |
Alistair Buxton | 7c00692 | 2009-09-22 10:02:58 +0100 | [diff] [blame] | 65 | static unsigned int mpui7xx_sleep_save[MPUI7XX_SLEEP_SAVE_SIZE]; |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 66 | static unsigned int mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_SIZE]; |
| 67 | static unsigned int mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_SIZE]; |
| 68 | |
Vivek Kutal | 010bb0c | 2007-12-11 21:46:31 +0530 | [diff] [blame] | 69 | #ifdef CONFIG_OMAP_32K_TIMER |
| 70 | |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 71 | static unsigned short enable_dyn_sleep = 1; |
| 72 | |
Greg Kroah-Hartman | 851324c | 2007-11-02 13:20:40 -0700 | [diff] [blame] | 73 | static ssize_t idle_show(struct kobject *kobj, struct kobj_attribute *attr, |
| 74 | char *buf) |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 75 | { |
| 76 | return sprintf(buf, "%hu\n", enable_dyn_sleep); |
| 77 | } |
| 78 | |
Greg Kroah-Hartman | 851324c | 2007-11-02 13:20:40 -0700 | [diff] [blame] | 79 | static ssize_t idle_store(struct kobject *kobj, struct kobj_attribute *attr, |
| 80 | const char * buf, size_t n) |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 81 | { |
| 82 | unsigned short value; |
| 83 | if (sscanf(buf, "%hu", &value) != 1 || |
| 84 | (value != 0 && value != 1)) { |
| 85 | printk(KERN_ERR "idle_sleep_store: Invalid value\n"); |
| 86 | return -EINVAL; |
| 87 | } |
| 88 | enable_dyn_sleep = value; |
| 89 | return n; |
| 90 | } |
| 91 | |
Greg Kroah-Hartman | 851324c | 2007-11-02 13:20:40 -0700 | [diff] [blame] | 92 | static struct kobj_attribute sleep_while_idle_attr = |
| 93 | __ATTR(sleep_while_idle, 0644, idle_show, idle_store); |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 94 | |
Vivek Kutal | 010bb0c | 2007-12-11 21:46:31 +0530 | [diff] [blame] | 95 | #endif |
| 96 | |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 97 | static void (*omap_sram_suspend)(unsigned long r0, unsigned long r1) = NULL; |
| 98 | |
| 99 | /* |
| 100 | * Let's power down on idle, but only if we are really |
| 101 | * idle, because once we start down the path of |
| 102 | * going idle we continue to do idle even if we get |
| 103 | * a clock tick interrupt . . |
| 104 | */ |
Kevin Hilman | c912f7e | 2009-05-15 11:29:28 -0700 | [diff] [blame] | 105 | void omap1_pm_idle(void) |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 106 | { |
| 107 | extern __u32 arm_idlect1_mask; |
| 108 | __u32 use_idlect1 = arm_idlect1_mask; |
Vivek Kutal | 010bb0c | 2007-12-11 21:46:31 +0530 | [diff] [blame] | 109 | int do_sleep = 0; |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 110 | |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 111 | local_fiq_disable(); |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 112 | |
Tony Lindgren | be26a00 | 2011-10-06 17:05:51 -0700 | [diff] [blame] | 113 | #if defined(CONFIG_OMAP_MPU_TIMER) && !defined(CONFIG_OMAP_DM_TIMER) |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 114 | #warning Enable 32kHz OS timer in order to allow sleep states in idle |
| 115 | use_idlect1 = use_idlect1 & ~(1 << 9); |
| 116 | #else |
| 117 | |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 118 | while (enable_dyn_sleep) { |
| 119 | |
| 120 | #ifdef CONFIG_CBUS_TAHVO_USB |
| 121 | extern int vbus_active; |
| 122 | /* Clock requirements? */ |
| 123 | if (vbus_active) |
| 124 | break; |
| 125 | #endif |
| 126 | do_sleep = 1; |
| 127 | break; |
| 128 | } |
| 129 | |
Vivek Kutal | 010bb0c | 2007-12-11 21:46:31 +0530 | [diff] [blame] | 130 | #endif |
| 131 | |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 132 | #ifdef CONFIG_OMAP_DM_TIMER |
| 133 | use_idlect1 = omap_dm_timer_modify_idlect_mask(use_idlect1); |
| 134 | #endif |
| 135 | |
Imre Deak | 6ea59bb | 2007-03-05 17:34:05 +0200 | [diff] [blame] | 136 | if (omap_dma_running()) |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 137 | use_idlect1 &= ~(1 << 6); |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 138 | |
| 139 | /* We should be able to remove the do_sleep variable and multiple |
| 140 | * tests above as soon as drivers, timer and DMA code have been fixed. |
| 141 | * Even the sleep block count should become obsolete. */ |
| 142 | if ((use_idlect1 != ~0) || !do_sleep) { |
| 143 | |
| 144 | __u32 saved_idlect1 = omap_readl(ARM_IDLECT1); |
| 145 | if (cpu_is_omap15xx()) |
| 146 | use_idlect1 &= OMAP1510_BIG_SLEEP_REQUEST; |
| 147 | else |
| 148 | use_idlect1 &= OMAP1610_IDLECT1_SLEEP_VAL; |
| 149 | omap_writel(use_idlect1, ARM_IDLECT1); |
| 150 | __asm__ volatile ("mcr p15, 0, r0, c7, c0, 4"); |
| 151 | omap_writel(saved_idlect1, ARM_IDLECT1); |
| 152 | |
| 153 | local_fiq_enable(); |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 154 | return; |
| 155 | } |
| 156 | omap_sram_suspend(omap_readl(ARM_IDLECT1), |
| 157 | omap_readl(ARM_IDLECT2)); |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 158 | |
| 159 | local_fiq_enable(); |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 160 | } |
| 161 | |
| 162 | /* |
| 163 | * Configuration of the wakeup event is board specific. For the |
| 164 | * moment we put it into this helper function. Later it may move |
| 165 | * to board specific files. |
| 166 | */ |
| 167 | static void omap_pm_wakeup_setup(void) |
| 168 | { |
| 169 | u32 level1_wake = 0; |
| 170 | u32 level2_wake = OMAP_IRQ_BIT(INT_UART2); |
| 171 | |
| 172 | /* |
| 173 | * Turn off all interrupts except GPIO bank 1, L1-2nd level cascade, |
| 174 | * and the L2 wakeup interrupts: keypad and UART2. Note that the |
| 175 | * drivers must still separately call omap_set_gpio_wakeup() to |
| 176 | * wake up to a GPIO interrupt. |
| 177 | */ |
Alistair Buxton | 4b9100d | 2009-09-22 06:41:09 +0100 | [diff] [blame] | 178 | if (cpu_is_omap7xx()) |
Alistair Buxton | 372b1c3 | 2009-09-18 04:09:39 +0100 | [diff] [blame] | 179 | level1_wake = OMAP_IRQ_BIT(INT_7XX_GPIO_BANK1) | |
| 180 | OMAP_IRQ_BIT(INT_7XX_IH2_IRQ); |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 181 | else if (cpu_is_omap15xx()) |
| 182 | level1_wake = OMAP_IRQ_BIT(INT_GPIO_BANK1) | |
| 183 | OMAP_IRQ_BIT(INT_1510_IH2_IRQ); |
| 184 | else if (cpu_is_omap16xx()) |
| 185 | level1_wake = OMAP_IRQ_BIT(INT_GPIO_BANK1) | |
| 186 | OMAP_IRQ_BIT(INT_1610_IH2_IRQ); |
| 187 | |
| 188 | omap_writel(~level1_wake, OMAP_IH1_MIR); |
| 189 | |
Alistair Buxton | 4b9100d | 2009-09-22 06:41:09 +0100 | [diff] [blame] | 190 | if (cpu_is_omap7xx()) { |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 191 | omap_writel(~level2_wake, OMAP_IH2_0_MIR); |
Alistair Buxton | 372b1c3 | 2009-09-18 04:09:39 +0100 | [diff] [blame] | 192 | omap_writel(~(OMAP_IRQ_BIT(INT_7XX_WAKE_UP_REQ) | |
| 193 | OMAP_IRQ_BIT(INT_7XX_MPUIO_KEYPAD)), |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 194 | OMAP_IH2_1_MIR); |
| 195 | } else if (cpu_is_omap15xx()) { |
| 196 | level2_wake |= OMAP_IRQ_BIT(INT_KEYBOARD); |
| 197 | omap_writel(~level2_wake, OMAP_IH2_MIR); |
| 198 | } else if (cpu_is_omap16xx()) { |
| 199 | level2_wake |= OMAP_IRQ_BIT(INT_KEYBOARD); |
| 200 | omap_writel(~level2_wake, OMAP_IH2_0_MIR); |
| 201 | |
| 202 | /* INT_1610_WAKE_UP_REQ is needed for GPIO wakeup... */ |
| 203 | omap_writel(~OMAP_IRQ_BIT(INT_1610_WAKE_UP_REQ), |
| 204 | OMAP_IH2_1_MIR); |
| 205 | omap_writel(~0x0, OMAP_IH2_2_MIR); |
| 206 | omap_writel(~0x0, OMAP_IH2_3_MIR); |
| 207 | } |
| 208 | |
| 209 | /* New IRQ agreement, recalculate in cascade order */ |
| 210 | omap_writel(1, OMAP_IH2_CONTROL); |
| 211 | omap_writel(1, OMAP_IH1_CONTROL); |
| 212 | } |
| 213 | |
| 214 | #define EN_DSPCK 13 /* ARM_CKCTL */ |
| 215 | #define EN_APICK 6 /* ARM_IDLECT2 */ |
| 216 | #define DSP_EN 1 /* ARM_RSTCT1 */ |
| 217 | |
Kevin Hilman | c912f7e | 2009-05-15 11:29:28 -0700 | [diff] [blame] | 218 | void omap1_pm_suspend(void) |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 219 | { |
| 220 | unsigned long arg0 = 0, arg1 = 0; |
| 221 | |
Lauri Leukkunen | 84a3434 | 2008-12-10 17:36:31 -0800 | [diff] [blame] | 222 | printk(KERN_INFO "PM: OMAP%x is trying to enter deep sleep...\n", |
| 223 | omap_rev()); |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 224 | |
| 225 | omap_serial_wake_trigger(1); |
| 226 | |
Andrzej Zaborowski | ef557d7 | 2006-12-06 17:13:48 -0800 | [diff] [blame] | 227 | if (!cpu_is_omap15xx()) |
| 228 | omap_writew(0xffff, ULPD_SOFT_DISABLE_REQ_REG); |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 229 | |
| 230 | /* |
| 231 | * Step 1: turn off interrupts (FIXME: NOTE: already disabled) |
| 232 | */ |
| 233 | |
| 234 | local_irq_disable(); |
| 235 | local_fiq_disable(); |
| 236 | |
| 237 | /* |
| 238 | * Step 2: save registers |
| 239 | * |
| 240 | * The omap is a strange/beautiful device. The caches, memory |
| 241 | * and register state are preserved across power saves. |
| 242 | * We have to save and restore very little register state to |
| 243 | * idle the omap. |
| 244 | * |
| 245 | * Save interrupt, MPUI, ARM and UPLD control registers. |
| 246 | */ |
| 247 | |
Alistair Buxton | 4b9100d | 2009-09-22 06:41:09 +0100 | [diff] [blame] | 248 | if (cpu_is_omap7xx()) { |
Alistair Buxton | 7c00692 | 2009-09-22 10:02:58 +0100 | [diff] [blame] | 249 | MPUI7XX_SAVE(OMAP_IH1_MIR); |
| 250 | MPUI7XX_SAVE(OMAP_IH2_0_MIR); |
| 251 | MPUI7XX_SAVE(OMAP_IH2_1_MIR); |
| 252 | MPUI7XX_SAVE(MPUI_CTRL); |
| 253 | MPUI7XX_SAVE(MPUI_DSP_BOOT_CONFIG); |
| 254 | MPUI7XX_SAVE(MPUI_DSP_API_CONFIG); |
| 255 | MPUI7XX_SAVE(EMIFS_CONFIG); |
| 256 | MPUI7XX_SAVE(EMIFF_SDRAM_CONFIG); |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 257 | |
| 258 | } else if (cpu_is_omap15xx()) { |
| 259 | MPUI1510_SAVE(OMAP_IH1_MIR); |
| 260 | MPUI1510_SAVE(OMAP_IH2_MIR); |
| 261 | MPUI1510_SAVE(MPUI_CTRL); |
| 262 | MPUI1510_SAVE(MPUI_DSP_BOOT_CONFIG); |
| 263 | MPUI1510_SAVE(MPUI_DSP_API_CONFIG); |
| 264 | MPUI1510_SAVE(EMIFS_CONFIG); |
| 265 | MPUI1510_SAVE(EMIFF_SDRAM_CONFIG); |
| 266 | } else if (cpu_is_omap16xx()) { |
| 267 | MPUI1610_SAVE(OMAP_IH1_MIR); |
| 268 | MPUI1610_SAVE(OMAP_IH2_0_MIR); |
| 269 | MPUI1610_SAVE(OMAP_IH2_1_MIR); |
| 270 | MPUI1610_SAVE(OMAP_IH2_2_MIR); |
| 271 | MPUI1610_SAVE(OMAP_IH2_3_MIR); |
| 272 | MPUI1610_SAVE(MPUI_CTRL); |
| 273 | MPUI1610_SAVE(MPUI_DSP_BOOT_CONFIG); |
| 274 | MPUI1610_SAVE(MPUI_DSP_API_CONFIG); |
| 275 | MPUI1610_SAVE(EMIFS_CONFIG); |
| 276 | MPUI1610_SAVE(EMIFF_SDRAM_CONFIG); |
| 277 | } |
| 278 | |
| 279 | ARM_SAVE(ARM_CKCTL); |
| 280 | ARM_SAVE(ARM_IDLECT1); |
| 281 | ARM_SAVE(ARM_IDLECT2); |
| 282 | if (!(cpu_is_omap15xx())) |
| 283 | ARM_SAVE(ARM_IDLECT3); |
| 284 | ARM_SAVE(ARM_EWUPCT); |
| 285 | ARM_SAVE(ARM_RSTCT1); |
| 286 | ARM_SAVE(ARM_RSTCT2); |
| 287 | ARM_SAVE(ARM_SYSST); |
| 288 | ULPD_SAVE(ULPD_CLOCK_CTRL); |
| 289 | ULPD_SAVE(ULPD_STATUS_REQ); |
| 290 | |
| 291 | /* (Step 3 removed - we now allow deep sleep by default) */ |
| 292 | |
| 293 | /* |
| 294 | * Step 4: OMAP DSP Shutdown |
| 295 | */ |
| 296 | |
| 297 | /* stop DSP */ |
| 298 | omap_writew(omap_readw(ARM_RSTCT1) & ~(1 << DSP_EN), ARM_RSTCT1); |
| 299 | |
Brian Swetland | 495f71d | 2006-06-26 16:16:03 -0700 | [diff] [blame] | 300 | /* shut down dsp_ck */ |
Alistair Buxton | 4b9100d | 2009-09-22 06:41:09 +0100 | [diff] [blame] | 301 | if (!cpu_is_omap7xx()) |
Brian Swetland | 495f71d | 2006-06-26 16:16:03 -0700 | [diff] [blame] | 302 | omap_writew(omap_readw(ARM_CKCTL) & ~(1 << EN_DSPCK), ARM_CKCTL); |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 303 | |
| 304 | /* temporarily enabling api_ck to access DSP registers */ |
| 305 | omap_writew(omap_readw(ARM_IDLECT2) | 1 << EN_APICK, ARM_IDLECT2); |
| 306 | |
| 307 | /* save DSP registers */ |
| 308 | DSP_SAVE(DSP_IDLECT2); |
| 309 | |
| 310 | /* Stop all DSP domain clocks */ |
| 311 | __raw_writew(0, DSP_IDLECT2); |
| 312 | |
| 313 | /* |
| 314 | * Step 5: Wakeup Event Setup |
| 315 | */ |
| 316 | |
| 317 | omap_pm_wakeup_setup(); |
| 318 | |
| 319 | /* |
| 320 | * Step 6: ARM and Traffic controller shutdown |
| 321 | */ |
| 322 | |
| 323 | /* disable ARM watchdog */ |
| 324 | omap_writel(0x00F5, OMAP_WDT_TIMER_MODE); |
| 325 | omap_writel(0x00A0, OMAP_WDT_TIMER_MODE); |
| 326 | |
| 327 | /* |
| 328 | * Step 6b: ARM and Traffic controller shutdown |
| 329 | * |
| 330 | * Step 6 continues here. Prepare jump to power management |
| 331 | * assembly code in internal SRAM. |
| 332 | * |
| 333 | * Since the omap_cpu_suspend routine has been copied to |
| 334 | * SRAM, we'll do an indirect procedure call to it and pass the |
| 335 | * contents of arm_idlect1 and arm_idlect2 so it can restore |
| 336 | * them when it wakes up and it will return. |
| 337 | */ |
| 338 | |
| 339 | arg0 = arm_sleep_save[ARM_SLEEP_SAVE_ARM_IDLECT1]; |
| 340 | arg1 = arm_sleep_save[ARM_SLEEP_SAVE_ARM_IDLECT2]; |
| 341 | |
| 342 | /* |
| 343 | * Step 6c: ARM and Traffic controller shutdown |
| 344 | * |
| 345 | * Jump to assembly code. The processor will stay there |
| 346 | * until wake up. |
| 347 | */ |
Tony Lindgren | d30c736 | 2007-05-10 15:50:16 -0700 | [diff] [blame] | 348 | omap_sram_suspend(arg0, arg1); |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 349 | |
| 350 | /* |
| 351 | * If we are here, processor is woken up! |
| 352 | */ |
| 353 | |
| 354 | /* |
| 355 | * Restore DSP clocks |
| 356 | */ |
| 357 | |
| 358 | /* again temporarily enabling api_ck to access DSP registers */ |
| 359 | omap_writew(omap_readw(ARM_IDLECT2) | 1 << EN_APICK, ARM_IDLECT2); |
| 360 | |
| 361 | /* Restore DSP domain clocks */ |
| 362 | DSP_RESTORE(DSP_IDLECT2); |
| 363 | |
| 364 | /* |
| 365 | * Restore ARM state, except ARM_IDLECT1/2 which omap_cpu_suspend did |
| 366 | */ |
| 367 | |
| 368 | if (!(cpu_is_omap15xx())) |
| 369 | ARM_RESTORE(ARM_IDLECT3); |
| 370 | ARM_RESTORE(ARM_CKCTL); |
| 371 | ARM_RESTORE(ARM_EWUPCT); |
| 372 | ARM_RESTORE(ARM_RSTCT1); |
| 373 | ARM_RESTORE(ARM_RSTCT2); |
| 374 | ARM_RESTORE(ARM_SYSST); |
| 375 | ULPD_RESTORE(ULPD_CLOCK_CTRL); |
| 376 | ULPD_RESTORE(ULPD_STATUS_REQ); |
| 377 | |
Alistair Buxton | 4b9100d | 2009-09-22 06:41:09 +0100 | [diff] [blame] | 378 | if (cpu_is_omap7xx()) { |
Alistair Buxton | 7c00692 | 2009-09-22 10:02:58 +0100 | [diff] [blame] | 379 | MPUI7XX_RESTORE(EMIFS_CONFIG); |
| 380 | MPUI7XX_RESTORE(EMIFF_SDRAM_CONFIG); |
| 381 | MPUI7XX_RESTORE(OMAP_IH1_MIR); |
| 382 | MPUI7XX_RESTORE(OMAP_IH2_0_MIR); |
| 383 | MPUI7XX_RESTORE(OMAP_IH2_1_MIR); |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 384 | } else if (cpu_is_omap15xx()) { |
| 385 | MPUI1510_RESTORE(MPUI_CTRL); |
| 386 | MPUI1510_RESTORE(MPUI_DSP_BOOT_CONFIG); |
| 387 | MPUI1510_RESTORE(MPUI_DSP_API_CONFIG); |
| 388 | MPUI1510_RESTORE(EMIFS_CONFIG); |
| 389 | MPUI1510_RESTORE(EMIFF_SDRAM_CONFIG); |
| 390 | MPUI1510_RESTORE(OMAP_IH1_MIR); |
| 391 | MPUI1510_RESTORE(OMAP_IH2_MIR); |
| 392 | } else if (cpu_is_omap16xx()) { |
| 393 | MPUI1610_RESTORE(MPUI_CTRL); |
| 394 | MPUI1610_RESTORE(MPUI_DSP_BOOT_CONFIG); |
| 395 | MPUI1610_RESTORE(MPUI_DSP_API_CONFIG); |
| 396 | MPUI1610_RESTORE(EMIFS_CONFIG); |
| 397 | MPUI1610_RESTORE(EMIFF_SDRAM_CONFIG); |
| 398 | |
| 399 | MPUI1610_RESTORE(OMAP_IH1_MIR); |
| 400 | MPUI1610_RESTORE(OMAP_IH2_0_MIR); |
| 401 | MPUI1610_RESTORE(OMAP_IH2_1_MIR); |
| 402 | MPUI1610_RESTORE(OMAP_IH2_2_MIR); |
| 403 | MPUI1610_RESTORE(OMAP_IH2_3_MIR); |
| 404 | } |
| 405 | |
Andrzej Zaborowski | ef557d7 | 2006-12-06 17:13:48 -0800 | [diff] [blame] | 406 | if (!cpu_is_omap15xx()) |
| 407 | omap_writew(0, ULPD_SOFT_DISABLE_REQ_REG); |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 408 | |
| 409 | /* |
Simon Arlott | 6cbdc8c | 2007-05-11 20:40:30 +0100 | [diff] [blame] | 410 | * Re-enable interrupts |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 411 | */ |
| 412 | |
| 413 | local_irq_enable(); |
| 414 | local_fiq_enable(); |
| 415 | |
| 416 | omap_serial_wake_trigger(0); |
| 417 | |
Lauri Leukkunen | 84a3434 | 2008-12-10 17:36:31 -0800 | [diff] [blame] | 418 | printk(KERN_INFO "PM: OMAP%x is re-starting from deep sleep...\n", |
| 419 | omap_rev()); |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 420 | } |
| 421 | |
| 422 | #if defined(DEBUG) && defined(CONFIG_PROC_FS) |
| 423 | static int g_read_completed; |
| 424 | |
| 425 | /* |
| 426 | * Read system PM registers for debugging |
| 427 | */ |
| 428 | static int omap_pm_read_proc( |
| 429 | char *page_buffer, |
| 430 | char **my_first_byte, |
| 431 | off_t virtual_start, |
| 432 | int length, |
| 433 | int *eof, |
| 434 | void *data) |
| 435 | { |
| 436 | int my_buffer_offset = 0; |
| 437 | char * const my_base = page_buffer; |
| 438 | |
| 439 | ARM_SAVE(ARM_CKCTL); |
| 440 | ARM_SAVE(ARM_IDLECT1); |
| 441 | ARM_SAVE(ARM_IDLECT2); |
| 442 | if (!(cpu_is_omap15xx())) |
| 443 | ARM_SAVE(ARM_IDLECT3); |
| 444 | ARM_SAVE(ARM_EWUPCT); |
| 445 | ARM_SAVE(ARM_RSTCT1); |
| 446 | ARM_SAVE(ARM_RSTCT2); |
| 447 | ARM_SAVE(ARM_SYSST); |
| 448 | |
| 449 | ULPD_SAVE(ULPD_IT_STATUS); |
| 450 | ULPD_SAVE(ULPD_CLOCK_CTRL); |
| 451 | ULPD_SAVE(ULPD_SOFT_REQ); |
| 452 | ULPD_SAVE(ULPD_STATUS_REQ); |
| 453 | ULPD_SAVE(ULPD_DPLL_CTRL); |
| 454 | ULPD_SAVE(ULPD_POWER_CTRL); |
| 455 | |
Alistair Buxton | 4b9100d | 2009-09-22 06:41:09 +0100 | [diff] [blame] | 456 | if (cpu_is_omap7xx()) { |
Alistair Buxton | 7c00692 | 2009-09-22 10:02:58 +0100 | [diff] [blame] | 457 | MPUI7XX_SAVE(MPUI_CTRL); |
| 458 | MPUI7XX_SAVE(MPUI_DSP_STATUS); |
| 459 | MPUI7XX_SAVE(MPUI_DSP_BOOT_CONFIG); |
| 460 | MPUI7XX_SAVE(MPUI_DSP_API_CONFIG); |
| 461 | MPUI7XX_SAVE(EMIFF_SDRAM_CONFIG); |
| 462 | MPUI7XX_SAVE(EMIFS_CONFIG); |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 463 | } else if (cpu_is_omap15xx()) { |
| 464 | MPUI1510_SAVE(MPUI_CTRL); |
| 465 | MPUI1510_SAVE(MPUI_DSP_STATUS); |
| 466 | MPUI1510_SAVE(MPUI_DSP_BOOT_CONFIG); |
| 467 | MPUI1510_SAVE(MPUI_DSP_API_CONFIG); |
| 468 | MPUI1510_SAVE(EMIFF_SDRAM_CONFIG); |
| 469 | MPUI1510_SAVE(EMIFS_CONFIG); |
| 470 | } else if (cpu_is_omap16xx()) { |
| 471 | MPUI1610_SAVE(MPUI_CTRL); |
| 472 | MPUI1610_SAVE(MPUI_DSP_STATUS); |
| 473 | MPUI1610_SAVE(MPUI_DSP_BOOT_CONFIG); |
| 474 | MPUI1610_SAVE(MPUI_DSP_API_CONFIG); |
| 475 | MPUI1610_SAVE(EMIFF_SDRAM_CONFIG); |
| 476 | MPUI1610_SAVE(EMIFS_CONFIG); |
| 477 | } |
| 478 | |
| 479 | if (virtual_start == 0) { |
| 480 | g_read_completed = 0; |
| 481 | |
| 482 | my_buffer_offset += sprintf(my_base + my_buffer_offset, |
| 483 | "ARM_CKCTL_REG: 0x%-8x \n" |
| 484 | "ARM_IDLECT1_REG: 0x%-8x \n" |
| 485 | "ARM_IDLECT2_REG: 0x%-8x \n" |
| 486 | "ARM_IDLECT3_REG: 0x%-8x \n" |
| 487 | "ARM_EWUPCT_REG: 0x%-8x \n" |
| 488 | "ARM_RSTCT1_REG: 0x%-8x \n" |
| 489 | "ARM_RSTCT2_REG: 0x%-8x \n" |
| 490 | "ARM_SYSST_REG: 0x%-8x \n" |
| 491 | "ULPD_IT_STATUS_REG: 0x%-4x \n" |
| 492 | "ULPD_CLOCK_CTRL_REG: 0x%-4x \n" |
| 493 | "ULPD_SOFT_REQ_REG: 0x%-4x \n" |
| 494 | "ULPD_DPLL_CTRL_REG: 0x%-4x \n" |
| 495 | "ULPD_STATUS_REQ_REG: 0x%-4x \n" |
| 496 | "ULPD_POWER_CTRL_REG: 0x%-4x \n", |
| 497 | ARM_SHOW(ARM_CKCTL), |
| 498 | ARM_SHOW(ARM_IDLECT1), |
| 499 | ARM_SHOW(ARM_IDLECT2), |
| 500 | ARM_SHOW(ARM_IDLECT3), |
| 501 | ARM_SHOW(ARM_EWUPCT), |
| 502 | ARM_SHOW(ARM_RSTCT1), |
| 503 | ARM_SHOW(ARM_RSTCT2), |
| 504 | ARM_SHOW(ARM_SYSST), |
| 505 | ULPD_SHOW(ULPD_IT_STATUS), |
| 506 | ULPD_SHOW(ULPD_CLOCK_CTRL), |
| 507 | ULPD_SHOW(ULPD_SOFT_REQ), |
| 508 | ULPD_SHOW(ULPD_DPLL_CTRL), |
| 509 | ULPD_SHOW(ULPD_STATUS_REQ), |
| 510 | ULPD_SHOW(ULPD_POWER_CTRL)); |
| 511 | |
Alistair Buxton | 4b9100d | 2009-09-22 06:41:09 +0100 | [diff] [blame] | 512 | if (cpu_is_omap7xx()) { |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 513 | my_buffer_offset += sprintf(my_base + my_buffer_offset, |
Alistair Buxton | 7c00692 | 2009-09-22 10:02:58 +0100 | [diff] [blame] | 514 | "MPUI7XX_CTRL_REG 0x%-8x \n" |
| 515 | "MPUI7XX_DSP_STATUS_REG: 0x%-8x \n" |
| 516 | "MPUI7XX_DSP_BOOT_CONFIG_REG: 0x%-8x \n" |
| 517 | "MPUI7XX_DSP_API_CONFIG_REG: 0x%-8x \n" |
| 518 | "MPUI7XX_SDRAM_CONFIG_REG: 0x%-8x \n" |
| 519 | "MPUI7XX_EMIFS_CONFIG_REG: 0x%-8x \n", |
| 520 | MPUI7XX_SHOW(MPUI_CTRL), |
| 521 | MPUI7XX_SHOW(MPUI_DSP_STATUS), |
| 522 | MPUI7XX_SHOW(MPUI_DSP_BOOT_CONFIG), |
| 523 | MPUI7XX_SHOW(MPUI_DSP_API_CONFIG), |
| 524 | MPUI7XX_SHOW(EMIFF_SDRAM_CONFIG), |
| 525 | MPUI7XX_SHOW(EMIFS_CONFIG)); |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 526 | } else if (cpu_is_omap15xx()) { |
| 527 | my_buffer_offset += sprintf(my_base + my_buffer_offset, |
| 528 | "MPUI1510_CTRL_REG 0x%-8x \n" |
| 529 | "MPUI1510_DSP_STATUS_REG: 0x%-8x \n" |
| 530 | "MPUI1510_DSP_BOOT_CONFIG_REG: 0x%-8x \n" |
| 531 | "MPUI1510_DSP_API_CONFIG_REG: 0x%-8x \n" |
| 532 | "MPUI1510_SDRAM_CONFIG_REG: 0x%-8x \n" |
| 533 | "MPUI1510_EMIFS_CONFIG_REG: 0x%-8x \n", |
| 534 | MPUI1510_SHOW(MPUI_CTRL), |
| 535 | MPUI1510_SHOW(MPUI_DSP_STATUS), |
| 536 | MPUI1510_SHOW(MPUI_DSP_BOOT_CONFIG), |
| 537 | MPUI1510_SHOW(MPUI_DSP_API_CONFIG), |
| 538 | MPUI1510_SHOW(EMIFF_SDRAM_CONFIG), |
| 539 | MPUI1510_SHOW(EMIFS_CONFIG)); |
| 540 | } else if (cpu_is_omap16xx()) { |
| 541 | my_buffer_offset += sprintf(my_base + my_buffer_offset, |
| 542 | "MPUI1610_CTRL_REG 0x%-8x \n" |
| 543 | "MPUI1610_DSP_STATUS_REG: 0x%-8x \n" |
| 544 | "MPUI1610_DSP_BOOT_CONFIG_REG: 0x%-8x \n" |
| 545 | "MPUI1610_DSP_API_CONFIG_REG: 0x%-8x \n" |
| 546 | "MPUI1610_SDRAM_CONFIG_REG: 0x%-8x \n" |
| 547 | "MPUI1610_EMIFS_CONFIG_REG: 0x%-8x \n", |
| 548 | MPUI1610_SHOW(MPUI_CTRL), |
| 549 | MPUI1610_SHOW(MPUI_DSP_STATUS), |
| 550 | MPUI1610_SHOW(MPUI_DSP_BOOT_CONFIG), |
| 551 | MPUI1610_SHOW(MPUI_DSP_API_CONFIG), |
| 552 | MPUI1610_SHOW(EMIFF_SDRAM_CONFIG), |
| 553 | MPUI1610_SHOW(EMIFS_CONFIG)); |
| 554 | } |
| 555 | |
| 556 | g_read_completed++; |
| 557 | } else if (g_read_completed >= 1) { |
| 558 | *eof = 1; |
| 559 | return 0; |
| 560 | } |
| 561 | g_read_completed++; |
| 562 | |
| 563 | *my_first_byte = page_buffer; |
| 564 | return my_buffer_offset; |
| 565 | } |
| 566 | |
| 567 | static void omap_pm_init_proc(void) |
| 568 | { |
| 569 | struct proc_dir_entry *entry; |
| 570 | |
| 571 | entry = create_proc_read_entry("driver/omap_pm", |
| 572 | S_IWUSR | S_IRUGO, NULL, |
| 573 | omap_pm_read_proc, NULL); |
| 574 | } |
| 575 | |
| 576 | #endif /* DEBUG && CONFIG_PROC_FS */ |
| 577 | |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 578 | /* |
| 579 | * omap_pm_prepare - Do preliminary suspend work. |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 580 | * |
| 581 | */ |
Rafael J. Wysocki | e6c5eb9 | 2007-10-18 03:04:41 -0700 | [diff] [blame] | 582 | static int omap_pm_prepare(void) |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 583 | { |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 584 | /* We cannot sleep in idle until we have resumed */ |
Nicolas Pitre | 3c0b2ce | 2011-12-19 09:11:11 -0800 | [diff] [blame] | 585 | disable_hlt(); |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 586 | |
Rafael J. Wysocki | e6c5eb9 | 2007-10-18 03:04:41 -0700 | [diff] [blame] | 587 | return 0; |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 588 | } |
| 589 | |
| 590 | |
| 591 | /* |
| 592 | * omap_pm_enter - Actually enter a sleep state. |
| 593 | * @state: State we're entering. |
| 594 | * |
| 595 | */ |
| 596 | |
| 597 | static int omap_pm_enter(suspend_state_t state) |
| 598 | { |
| 599 | switch (state) |
| 600 | { |
| 601 | case PM_SUSPEND_STANDBY: |
| 602 | case PM_SUSPEND_MEM: |
Kevin Hilman | c912f7e | 2009-05-15 11:29:28 -0700 | [diff] [blame] | 603 | omap1_pm_suspend(); |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 604 | break; |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 605 | default: |
| 606 | return -EINVAL; |
| 607 | } |
| 608 | |
| 609 | return 0; |
| 610 | } |
| 611 | |
| 612 | |
| 613 | /** |
| 614 | * omap_pm_finish - Finish up suspend sequence. |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 615 | * |
| 616 | * This is called after we wake back up (or if entering the sleep state |
| 617 | * failed). |
| 618 | */ |
| 619 | |
Rafael J. Wysocki | e6c5eb9 | 2007-10-18 03:04:41 -0700 | [diff] [blame] | 620 | static void omap_pm_finish(void) |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 621 | { |
Nicolas Pitre | 3c0b2ce | 2011-12-19 09:11:11 -0800 | [diff] [blame] | 622 | enable_hlt(); |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 623 | } |
| 624 | |
| 625 | |
Jeff Garzik | e8f2af1 | 2007-10-26 05:40:25 -0400 | [diff] [blame] | 626 | static irqreturn_t omap_wakeup_interrupt(int irq, void *dev) |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 627 | { |
| 628 | return IRQ_HANDLED; |
| 629 | } |
| 630 | |
| 631 | static struct irqaction omap_wakeup_irq = { |
| 632 | .name = "peripheral wakeup", |
Thomas Gleixner | 52e405e | 2006-07-03 02:20:05 +0200 | [diff] [blame] | 633 | .flags = IRQF_DISABLED, |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 634 | .handler = omap_wakeup_interrupt |
| 635 | }; |
| 636 | |
| 637 | |
| 638 | |
Lionel Debroux | 2f55ac0 | 2010-11-16 14:14:02 +0100 | [diff] [blame] | 639 | static const struct platform_suspend_ops omap_pm_ops = { |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 640 | .prepare = omap_pm_prepare, |
| 641 | .enter = omap_pm_enter, |
| 642 | .finish = omap_pm_finish, |
Rafael J. Wysocki | 26398a7 | 2007-10-18 03:04:40 -0700 | [diff] [blame] | 643 | .valid = suspend_valid_only_mem, |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 644 | }; |
| 645 | |
| 646 | static int __init omap_pm_init(void) |
| 647 | { |
Vivek Kutal | 010bb0c | 2007-12-11 21:46:31 +0530 | [diff] [blame] | 648 | |
| 649 | #ifdef CONFIG_OMAP_32K_TIMER |
Dirk Behme | 2f5c4b6 | 2006-12-06 17:14:04 -0800 | [diff] [blame] | 650 | int error; |
Vivek Kutal | 010bb0c | 2007-12-11 21:46:31 +0530 | [diff] [blame] | 651 | #endif |
Dirk Behme | 2f5c4b6 | 2006-12-06 17:14:04 -0800 | [diff] [blame] | 652 | |
Tony Lindgren | 7f9187c | 2010-12-10 09:46:24 -0800 | [diff] [blame] | 653 | if (!cpu_class_is_omap1()) |
| 654 | return -ENODEV; |
| 655 | |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 656 | printk("Power Management for TI OMAP.\n"); |
| 657 | |
| 658 | /* |
| 659 | * We copy the assembler sleep/wakeup routines to SRAM. |
| 660 | * These routines need to be in SRAM as that's the only |
| 661 | * memory the MPU can see when it wakes up. |
| 662 | */ |
Alistair Buxton | 4b9100d | 2009-09-22 06:41:09 +0100 | [diff] [blame] | 663 | if (cpu_is_omap7xx()) { |
Alistair Buxton | 7c00692 | 2009-09-22 10:02:58 +0100 | [diff] [blame] | 664 | omap_sram_suspend = omap_sram_push(omap7xx_cpu_suspend, |
| 665 | omap7xx_cpu_suspend_sz); |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 666 | } else if (cpu_is_omap15xx()) { |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 667 | omap_sram_suspend = omap_sram_push(omap1510_cpu_suspend, |
| 668 | omap1510_cpu_suspend_sz); |
| 669 | } else if (cpu_is_omap16xx()) { |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 670 | omap_sram_suspend = omap_sram_push(omap1610_cpu_suspend, |
| 671 | omap1610_cpu_suspend_sz); |
| 672 | } |
| 673 | |
Vivek Kutal | feb72f3 | 2007-12-17 01:56:33 -0800 | [diff] [blame] | 674 | if (omap_sram_suspend == NULL) { |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 675 | printk(KERN_ERR "PM not initialized: Missing SRAM support\n"); |
| 676 | return -ENODEV; |
| 677 | } |
| 678 | |
Nicolas Pitre | 0bcd24b | 2012-01-04 16:27:48 -0500 | [diff] [blame] | 679 | arm_pm_idle = omap1_pm_idle; |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 680 | |
Alistair Buxton | 4b9100d | 2009-09-22 06:41:09 +0100 | [diff] [blame] | 681 | if (cpu_is_omap7xx()) |
Alistair Buxton | 372b1c3 | 2009-09-18 04:09:39 +0100 | [diff] [blame] | 682 | setup_irq(INT_7XX_WAKE_UP_REQ, &omap_wakeup_irq); |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 683 | else if (cpu_is_omap16xx()) |
| 684 | setup_irq(INT_1610_WAKE_UP_REQ, &omap_wakeup_irq); |
| 685 | |
| 686 | /* Program new power ramp-up time |
| 687 | * (0 for most boards since we don't lower voltage when in deep sleep) |
| 688 | */ |
| 689 | omap_writew(ULPD_SETUP_ANALOG_CELL_3_VAL, ULPD_SETUP_ANALOG_CELL_3); |
| 690 | |
| 691 | /* Setup ULPD POWER_CTRL_REG - enter deep sleep whenever possible */ |
| 692 | omap_writew(ULPD_POWER_CTRL_REG_VAL, ULPD_POWER_CTRL); |
| 693 | |
| 694 | /* Configure IDLECT3 */ |
Alistair Buxton | 4b9100d | 2009-09-22 06:41:09 +0100 | [diff] [blame] | 695 | if (cpu_is_omap7xx()) |
Alistair Buxton | 7c00692 | 2009-09-22 10:02:58 +0100 | [diff] [blame] | 696 | omap_writel(OMAP7XX_IDLECT3_VAL, OMAP7XX_IDLECT3); |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 697 | else if (cpu_is_omap16xx()) |
| 698 | omap_writel(OMAP1610_IDLECT3_VAL, OMAP1610_IDLECT3); |
| 699 | |
Rafael J. Wysocki | 26398a7 | 2007-10-18 03:04:40 -0700 | [diff] [blame] | 700 | suspend_set_ops(&omap_pm_ops); |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 701 | |
| 702 | #if defined(DEBUG) && defined(CONFIG_PROC_FS) |
| 703 | omap_pm_init_proc(); |
| 704 | #endif |
| 705 | |
Vivek Kutal | 010bb0c | 2007-12-11 21:46:31 +0530 | [diff] [blame] | 706 | #ifdef CONFIG_OMAP_32K_TIMER |
David Brownell | 02bad5f | 2008-02-24 19:08:26 -0800 | [diff] [blame] | 707 | error = sysfs_create_file(power_kobj, &sleep_while_idle_attr.attr); |
Dirk Behme | 2f5c4b6 | 2006-12-06 17:14:04 -0800 | [diff] [blame] | 708 | if (error) |
Greg Kroah-Hartman | 851324c | 2007-11-02 13:20:40 -0700 | [diff] [blame] | 709 | printk(KERN_ERR "sysfs_create_file failed: %d\n", error); |
Vivek Kutal | 010bb0c | 2007-12-11 21:46:31 +0530 | [diff] [blame] | 710 | #endif |
Tony Lindgren | 670c104 | 2006-04-02 17:46:25 +0100 | [diff] [blame] | 711 | |
| 712 | if (cpu_is_omap16xx()) { |
| 713 | /* configure LOW_PWR pin */ |
| 714 | omap_cfg_reg(T20_1610_LOW_PWR); |
| 715 | } |
| 716 | |
| 717 | return 0; |
| 718 | } |
| 719 | __initcall(omap_pm_init); |