Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/arm/mach-versatile/core.c |
| 3 | * |
| 4 | * Copyright (C) 1999 - 2003 ARM Limited |
| 5 | * Copyright (C) 2000 Deep Blue Solutions Ltd |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 20 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 21 | #include <linux/init.h> |
| 22 | #include <linux/device.h> |
| 23 | #include <linux/dma-mapping.h> |
Russell King | d052d1b | 2005-10-29 19:07:23 +0100 | [diff] [blame] | 24 | #include <linux/platform_device.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 25 | #include <linux/interrupt.h> |
Grant Likely | 3ba7222 | 2011-07-26 03:19:06 -0600 | [diff] [blame] | 26 | #include <linux/irqdomain.h> |
| 27 | #include <linux/of_address.h> |
| 28 | #include <linux/of_platform.h> |
Russell King | a62c80e | 2006-01-07 13:52:45 +0000 | [diff] [blame] | 29 | #include <linux/amba/bus.h> |
| 30 | #include <linux/amba/clcd.h> |
Russell King | bbeddc4 | 2009-07-05 22:43:01 +0100 | [diff] [blame] | 31 | #include <linux/amba/pl061.h> |
Linus Walleij | 6ef297f | 2009-09-22 14:29:36 +0100 | [diff] [blame] | 32 | #include <linux/amba/mmci.h> |
Linus Walleij | ef6f4b1 | 2010-07-14 23:59:27 +0100 | [diff] [blame] | 33 | #include <linux/amba/pl022.h> |
Russell King | fced80c | 2008-09-06 12:10:45 +0100 | [diff] [blame] | 34 | #include <linux/io.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 35 | #include <linux/gfp.h> |
Jean-Christop PLAGNIOL-VILLARD | 6d803ba | 2010-11-17 10:04:33 +0100 | [diff] [blame] | 36 | #include <linux/clkdev.h> |
Marc Zyngier | 68c0e38 | 2011-05-18 10:51:50 +0100 | [diff] [blame] | 37 | #include <linux/mtd/physmap.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 38 | |
| 39 | #include <asm/system.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 40 | #include <asm/irq.h> |
| 41 | #include <asm/leds.h> |
Russell King | b720f73 | 2005-06-29 15:15:54 +0100 | [diff] [blame] | 42 | #include <asm/hardware/arm_timer.h> |
Russell King | c5a0adb | 2010-01-16 20:16:10 +0000 | [diff] [blame] | 43 | #include <asm/hardware/icst.h> |
Russell King | fa0fe48 | 2006-01-13 21:30:48 +0000 | [diff] [blame] | 44 | #include <asm/hardware/vic.h> |
Russell King | dc5bc8f | 2006-07-10 16:33:54 +0100 | [diff] [blame] | 45 | #include <asm/mach-types.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 46 | |
| 47 | #include <asm/mach/arch.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 48 | #include <asm/mach/irq.h> |
| 49 | #include <asm/mach/time.h> |
| 50 | #include <asm/mach/map.h> |
Russell King | a285edc | 2010-01-14 19:59:37 +0000 | [diff] [blame] | 51 | #include <mach/hardware.h> |
| 52 | #include <mach/platform.h> |
Rob Herring | 8a9618f | 2010-10-06 16:18:08 +0100 | [diff] [blame] | 53 | #include <asm/hardware/timer-sp.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 54 | |
Russell King | 3414ba8 | 2011-01-18 20:12:10 +0000 | [diff] [blame] | 55 | #include <plat/clcd.h> |
Russell King | c41b16f | 2011-01-19 15:32:15 +0000 | [diff] [blame] | 56 | #include <plat/fpga-irq.h> |
Russell King | 1da0c89 | 2010-12-15 21:56:47 +0000 | [diff] [blame] | 57 | #include <plat/sched_clock.h> |
| 58 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 59 | #include "core.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 60 | |
| 61 | /* |
| 62 | * All IO addresses are mapped onto VA 0xFFFx.xxxx, where x.xxxx |
| 63 | * is the (PA >> 12). |
| 64 | * |
| 65 | * Setup a VA for the Versatile Vectored Interrupt Controller. |
| 66 | */ |
Al Viro | 2ad4f86 | 2005-09-29 00:09:02 +0100 | [diff] [blame] | 67 | #define VA_VIC_BASE __io_address(VERSATILE_VIC_BASE) |
| 68 | #define VA_SIC_BASE __io_address(VERSATILE_SIC_BASE) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 69 | |
Russell King | c41b16f | 2011-01-19 15:32:15 +0000 | [diff] [blame] | 70 | static struct fpga_irq_data sic_irq = { |
| 71 | .base = VA_SIC_BASE, |
| 72 | .irq_start = IRQ_SIC_START, |
| 73 | .chip.name = "SIC", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 74 | }; |
| 75 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 76 | #if 1 |
| 77 | #define IRQ_MMCI0A IRQ_VICSOURCE22 |
| 78 | #define IRQ_AACI IRQ_VICSOURCE24 |
| 79 | #define IRQ_ETH IRQ_VICSOURCE25 |
| 80 | #define PIC_MASK 0xFFD00000 |
| 81 | #else |
| 82 | #define IRQ_MMCI0A IRQ_SIC_MMCI0A |
| 83 | #define IRQ_AACI IRQ_SIC_AACI |
| 84 | #define IRQ_ETH IRQ_SIC_ETH |
| 85 | #define PIC_MASK 0 |
| 86 | #endif |
| 87 | |
Grant Likely | 3ba7222 | 2011-07-26 03:19:06 -0600 | [diff] [blame] | 88 | /* Lookup table for finding a DT node that represents the vic instance */ |
| 89 | static const struct of_device_id vic_of_match[] __initconst = { |
| 90 | { .compatible = "arm,versatile-vic", }, |
| 91 | {} |
| 92 | }; |
| 93 | |
| 94 | static const struct of_device_id sic_of_match[] __initconst = { |
| 95 | { .compatible = "arm,versatile-sic", }, |
| 96 | {} |
| 97 | }; |
| 98 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 99 | void __init versatile_init_irq(void) |
| 100 | { |
Ben Dooks | c07f87f | 2009-03-24 15:30:07 +0000 | [diff] [blame] | 101 | vic_init(VA_VIC_BASE, IRQ_VIC_START, ~0, 0); |
Grant Likely | 3ba7222 | 2011-07-26 03:19:06 -0600 | [diff] [blame] | 102 | irq_domain_generate_simple(vic_of_match, VERSATILE_VIC_BASE, IRQ_VIC_START); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 103 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 104 | writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR); |
| 105 | |
Russell King | c41b16f | 2011-01-19 15:32:15 +0000 | [diff] [blame] | 106 | fpga_irq_init(IRQ_VICSOURCE31, ~PIC_MASK, &sic_irq); |
Grant Likely | 3ba7222 | 2011-07-26 03:19:06 -0600 | [diff] [blame] | 107 | irq_domain_generate_simple(sic_of_match, VERSATILE_SIC_BASE, IRQ_SIC_START); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 108 | |
| 109 | /* |
| 110 | * Interrupts on secondary controller from 0 to 8 are routed to |
| 111 | * source 31 on PIC. |
| 112 | * Interrupts from 21 to 31 are routed directly to the VIC on |
| 113 | * the corresponding number on primary controller. This is controlled |
| 114 | * by setting PIC_ENABLEx. |
| 115 | */ |
| 116 | writel(PIC_MASK, VA_SIC_BASE + SIC_INT_PIC_ENABLE); |
| 117 | } |
| 118 | |
| 119 | static struct map_desc versatile_io_desc[] __initdata = { |
Deepak Saxena | 1311521 | 2005-10-28 15:19:06 +0100 | [diff] [blame] | 120 | { |
| 121 | .virtual = IO_ADDRESS(VERSATILE_SYS_BASE), |
| 122 | .pfn = __phys_to_pfn(VERSATILE_SYS_BASE), |
| 123 | .length = SZ_4K, |
| 124 | .type = MT_DEVICE |
| 125 | }, { |
| 126 | .virtual = IO_ADDRESS(VERSATILE_SIC_BASE), |
| 127 | .pfn = __phys_to_pfn(VERSATILE_SIC_BASE), |
| 128 | .length = SZ_4K, |
| 129 | .type = MT_DEVICE |
| 130 | }, { |
| 131 | .virtual = IO_ADDRESS(VERSATILE_VIC_BASE), |
| 132 | .pfn = __phys_to_pfn(VERSATILE_VIC_BASE), |
| 133 | .length = SZ_4K, |
| 134 | .type = MT_DEVICE |
| 135 | }, { |
| 136 | .virtual = IO_ADDRESS(VERSATILE_SCTL_BASE), |
| 137 | .pfn = __phys_to_pfn(VERSATILE_SCTL_BASE), |
| 138 | .length = SZ_4K * 9, |
| 139 | .type = MT_DEVICE |
| 140 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 141 | #ifdef CONFIG_MACH_VERSATILE_AB |
Deepak Saxena | 1311521 | 2005-10-28 15:19:06 +0100 | [diff] [blame] | 142 | { |
Deepak Saxena | 1311521 | 2005-10-28 15:19:06 +0100 | [diff] [blame] | 143 | .virtual = IO_ADDRESS(VERSATILE_IB2_BASE), |
| 144 | .pfn = __phys_to_pfn(VERSATILE_IB2_BASE), |
| 145 | .length = SZ_64M, |
| 146 | .type = MT_DEVICE |
| 147 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 148 | #endif |
| 149 | #ifdef CONFIG_DEBUG_LL |
Deepak Saxena | 1311521 | 2005-10-28 15:19:06 +0100 | [diff] [blame] | 150 | { |
| 151 | .virtual = IO_ADDRESS(VERSATILE_UART0_BASE), |
| 152 | .pfn = __phys_to_pfn(VERSATILE_UART0_BASE), |
| 153 | .length = SZ_4K, |
| 154 | .type = MT_DEVICE |
| 155 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 156 | #endif |
Catalin Marinas | c0da085 | 2005-06-20 18:51:06 +0100 | [diff] [blame] | 157 | #ifdef CONFIG_PCI |
Deepak Saxena | 1311521 | 2005-10-28 15:19:06 +0100 | [diff] [blame] | 158 | { |
| 159 | .virtual = IO_ADDRESS(VERSATILE_PCI_CORE_BASE), |
| 160 | .pfn = __phys_to_pfn(VERSATILE_PCI_CORE_BASE), |
| 161 | .length = SZ_4K, |
| 162 | .type = MT_DEVICE |
| 163 | }, { |
Al Viro | 399ad77 | 2006-10-11 17:22:34 +0100 | [diff] [blame] | 164 | .virtual = (unsigned long)VERSATILE_PCI_VIRT_BASE, |
Deepak Saxena | 1311521 | 2005-10-28 15:19:06 +0100 | [diff] [blame] | 165 | .pfn = __phys_to_pfn(VERSATILE_PCI_BASE), |
| 166 | .length = VERSATILE_PCI_BASE_SIZE, |
| 167 | .type = MT_DEVICE |
| 168 | }, { |
Al Viro | 399ad77 | 2006-10-11 17:22:34 +0100 | [diff] [blame] | 169 | .virtual = (unsigned long)VERSATILE_PCI_CFG_VIRT_BASE, |
Deepak Saxena | 1311521 | 2005-10-28 15:19:06 +0100 | [diff] [blame] | 170 | .pfn = __phys_to_pfn(VERSATILE_PCI_CFG_BASE), |
| 171 | .length = VERSATILE_PCI_CFG_BASE_SIZE, |
| 172 | .type = MT_DEVICE |
| 173 | }, |
Catalin Marinas | c0da085 | 2005-06-20 18:51:06 +0100 | [diff] [blame] | 174 | #if 0 |
Deepak Saxena | 1311521 | 2005-10-28 15:19:06 +0100 | [diff] [blame] | 175 | { |
| 176 | .virtual = VERSATILE_PCI_VIRT_MEM_BASE0, |
| 177 | .pfn = __phys_to_pfn(VERSATILE_PCI_MEM_BASE0), |
| 178 | .length = SZ_16M, |
| 179 | .type = MT_DEVICE |
| 180 | }, { |
| 181 | .virtual = VERSATILE_PCI_VIRT_MEM_BASE1, |
| 182 | .pfn = __phys_to_pfn(VERSATILE_PCI_MEM_BASE1), |
| 183 | .length = SZ_16M, |
| 184 | .type = MT_DEVICE |
| 185 | }, { |
| 186 | .virtual = VERSATILE_PCI_VIRT_MEM_BASE2, |
| 187 | .pfn = __phys_to_pfn(VERSATILE_PCI_MEM_BASE2), |
| 188 | .length = SZ_16M, |
| 189 | .type = MT_DEVICE |
| 190 | }, |
Catalin Marinas | c0da085 | 2005-06-20 18:51:06 +0100 | [diff] [blame] | 191 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 192 | #endif |
| 193 | }; |
| 194 | |
| 195 | void __init versatile_map_io(void) |
| 196 | { |
| 197 | iotable_init(versatile_io_desc, ARRAY_SIZE(versatile_io_desc)); |
| 198 | } |
| 199 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 200 | |
Al Viro | 2ad4f86 | 2005-09-29 00:09:02 +0100 | [diff] [blame] | 201 | #define VERSATILE_FLASHCTRL (__io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_FLASH_OFFSET) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 202 | |
Marc Zyngier | 667f390 | 2011-05-18 10:51:55 +0100 | [diff] [blame] | 203 | static void versatile_flash_set_vpp(struct platform_device *pdev, int on) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 204 | { |
| 205 | u32 val; |
| 206 | |
| 207 | val = __raw_readl(VERSATILE_FLASHCTRL); |
| 208 | if (on) |
| 209 | val |= VERSATILE_FLASHPROG_FLVPPEN; |
| 210 | else |
| 211 | val &= ~VERSATILE_FLASHPROG_FLVPPEN; |
| 212 | __raw_writel(val, VERSATILE_FLASHCTRL); |
| 213 | } |
| 214 | |
Marc Zyngier | 68c0e38 | 2011-05-18 10:51:50 +0100 | [diff] [blame] | 215 | static struct physmap_flash_data versatile_flash_data = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 216 | .width = 4, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 217 | .set_vpp = versatile_flash_set_vpp, |
| 218 | }; |
| 219 | |
| 220 | static struct resource versatile_flash_resource = { |
| 221 | .start = VERSATILE_FLASH_BASE, |
Yoav Steinberg | a0c5a64 | 2006-08-13 14:17:12 +0100 | [diff] [blame] | 222 | .end = VERSATILE_FLASH_BASE + VERSATILE_FLASH_SIZE - 1, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 223 | .flags = IORESOURCE_MEM, |
| 224 | }; |
| 225 | |
| 226 | static struct platform_device versatile_flash_device = { |
Marc Zyngier | 68c0e38 | 2011-05-18 10:51:50 +0100 | [diff] [blame] | 227 | .name = "physmap-flash", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 228 | .id = 0, |
| 229 | .dev = { |
| 230 | .platform_data = &versatile_flash_data, |
| 231 | }, |
| 232 | .num_resources = 1, |
| 233 | .resource = &versatile_flash_resource, |
| 234 | }; |
| 235 | |
| 236 | static struct resource smc91x_resources[] = { |
| 237 | [0] = { |
| 238 | .start = VERSATILE_ETH_BASE, |
| 239 | .end = VERSATILE_ETH_BASE + SZ_64K - 1, |
| 240 | .flags = IORESOURCE_MEM, |
| 241 | }, |
| 242 | [1] = { |
| 243 | .start = IRQ_ETH, |
| 244 | .end = IRQ_ETH, |
| 245 | .flags = IORESOURCE_IRQ, |
| 246 | }, |
| 247 | }; |
| 248 | |
| 249 | static struct platform_device smc91x_device = { |
| 250 | .name = "smc91x", |
| 251 | .id = 0, |
| 252 | .num_resources = ARRAY_SIZE(smc91x_resources), |
| 253 | .resource = smc91x_resources, |
| 254 | }; |
| 255 | |
Russell King | 6b65cd7 | 2006-12-10 21:21:32 +0100 | [diff] [blame] | 256 | static struct resource versatile_i2c_resource = { |
| 257 | .start = VERSATILE_I2C_BASE, |
| 258 | .end = VERSATILE_I2C_BASE + SZ_4K - 1, |
| 259 | .flags = IORESOURCE_MEM, |
| 260 | }; |
| 261 | |
| 262 | static struct platform_device versatile_i2c_device = { |
| 263 | .name = "versatile-i2c", |
Catalin Marinas | 533ad5e | 2009-02-12 15:58:20 +0100 | [diff] [blame] | 264 | .id = 0, |
Russell King | 6b65cd7 | 2006-12-10 21:21:32 +0100 | [diff] [blame] | 265 | .num_resources = 1, |
| 266 | .resource = &versatile_i2c_resource, |
| 267 | }; |
| 268 | |
Catalin Marinas | 533ad5e | 2009-02-12 15:58:20 +0100 | [diff] [blame] | 269 | static struct i2c_board_info versatile_i2c_board_info[] = { |
| 270 | { |
Russell King | 64e8be6 | 2009-07-18 15:51:55 +0100 | [diff] [blame] | 271 | I2C_BOARD_INFO("ds1338", 0xd0 >> 1), |
Catalin Marinas | 533ad5e | 2009-02-12 15:58:20 +0100 | [diff] [blame] | 272 | }, |
| 273 | }; |
| 274 | |
| 275 | static int __init versatile_i2c_init(void) |
| 276 | { |
| 277 | return i2c_register_board_info(0, versatile_i2c_board_info, |
| 278 | ARRAY_SIZE(versatile_i2c_board_info)); |
| 279 | } |
| 280 | arch_initcall(versatile_i2c_init); |
| 281 | |
Al Viro | 2ad4f86 | 2005-09-29 00:09:02 +0100 | [diff] [blame] | 282 | #define VERSATILE_SYSMCI (__io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_MCI_OFFSET) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 283 | |
| 284 | unsigned int mmc_status(struct device *dev) |
| 285 | { |
| 286 | struct amba_device *adev = container_of(dev, struct amba_device, dev); |
| 287 | u32 mask; |
| 288 | |
| 289 | if (adev->res.start == VERSATILE_MMCI0_BASE) |
| 290 | mask = 1; |
| 291 | else |
| 292 | mask = 2; |
| 293 | |
| 294 | return readl(VERSATILE_SYSMCI) & mask; |
| 295 | } |
| 296 | |
Linus Walleij | 6ef297f | 2009-09-22 14:29:36 +0100 | [diff] [blame] | 297 | static struct mmci_platform_data mmc0_plat_data = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 298 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, |
| 299 | .status = mmc_status, |
Russell King | 7fb2bbf | 2009-07-09 15:15:12 +0100 | [diff] [blame] | 300 | .gpio_wp = -1, |
| 301 | .gpio_cd = -1, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 302 | }; |
| 303 | |
Grant Likely | e282326 | 2011-03-30 00:02:29 -0600 | [diff] [blame] | 304 | static struct resource char_lcd_resources[] = { |
Linus Walleij | d161edf | 2010-07-17 12:34:25 +0100 | [diff] [blame] | 305 | { |
| 306 | .start = VERSATILE_CHAR_LCD_BASE, |
| 307 | .end = (VERSATILE_CHAR_LCD_BASE + SZ_4K - 1), |
| 308 | .flags = IORESOURCE_MEM, |
| 309 | }, |
| 310 | }; |
| 311 | |
| 312 | static struct platform_device char_lcd_device = { |
| 313 | .name = "arm-charlcd", |
| 314 | .id = -1, |
| 315 | .num_resources = ARRAY_SIZE(char_lcd_resources), |
| 316 | .resource = char_lcd_resources, |
| 317 | }; |
| 318 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 319 | /* |
| 320 | * Clock handling |
| 321 | */ |
Russell King | 39c0cb0 | 2010-01-16 16:27:28 +0000 | [diff] [blame] | 322 | static const struct icst_params versatile_oscvco_params = { |
Russell King | 64fceb1 | 2010-01-16 17:28:44 +0000 | [diff] [blame] | 323 | .ref = 24000000, |
Russell King | 4de2edb | 2010-01-16 18:08:47 +0000 | [diff] [blame] | 324 | .vco_max = ICST307_VCO_MAX, |
Russell King | e73a46a | 2010-01-16 19:49:39 +0000 | [diff] [blame] | 325 | .vco_min = ICST307_VCO_MIN, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 326 | .vd_min = 4 + 8, |
| 327 | .vd_max = 511 + 8, |
| 328 | .rd_min = 1 + 2, |
| 329 | .rd_max = 127 + 2, |
Russell King | 232eaf7 | 2010-01-16 19:46:19 +0000 | [diff] [blame] | 330 | .s2div = icst307_s2div, |
| 331 | .idx2s = icst307_idx2s, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 332 | }; |
| 333 | |
Russell King | 39c0cb0 | 2010-01-16 16:27:28 +0000 | [diff] [blame] | 334 | static void versatile_oscvco_set(struct clk *clk, struct icst_vco vco) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 335 | { |
Russell King | d1914c7 | 2010-01-14 20:09:34 +0000 | [diff] [blame] | 336 | void __iomem *sys_lock = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_LOCK_OFFSET; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 337 | u32 val; |
| 338 | |
Russell King | d1914c7 | 2010-01-14 20:09:34 +0000 | [diff] [blame] | 339 | val = readl(clk->vcoreg) & ~0x7ffff; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 340 | val |= vco.v | (vco.r << 9) | (vco.s << 16); |
| 341 | |
| 342 | writel(0xa05f, sys_lock); |
Russell King | d1914c7 | 2010-01-14 20:09:34 +0000 | [diff] [blame] | 343 | writel(val, clk->vcoreg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 344 | writel(0, sys_lock); |
| 345 | } |
| 346 | |
Russell King | 9bf5b2e | 2010-03-01 16:18:39 +0000 | [diff] [blame] | 347 | static const struct clk_ops osc4_clk_ops = { |
| 348 | .round = icst_clk_round, |
| 349 | .set = icst_clk_set, |
Russell King | 71a06da | 2008-11-08 20:13:53 +0000 | [diff] [blame] | 350 | .setvco = versatile_oscvco_set, |
| 351 | }; |
| 352 | |
Russell King | 9bf5b2e | 2010-03-01 16:18:39 +0000 | [diff] [blame] | 353 | static struct clk osc4_clk = { |
| 354 | .ops = &osc4_clk_ops, |
| 355 | .params = &versatile_oscvco_params, |
| 356 | }; |
| 357 | |
Russell King | 71a06da | 2008-11-08 20:13:53 +0000 | [diff] [blame] | 358 | /* |
| 359 | * These are fixed clocks. |
| 360 | */ |
| 361 | static struct clk ref24_clk = { |
| 362 | .rate = 24000000, |
| 363 | }; |
| 364 | |
Russell King | 7ff550d | 2011-05-12 13:31:48 +0100 | [diff] [blame] | 365 | static struct clk sp804_clk = { |
| 366 | .rate = 1000000, |
| 367 | }; |
| 368 | |
Russell King | 3126c7b | 2010-07-15 11:01:17 +0100 | [diff] [blame] | 369 | static struct clk dummy_apb_pclk; |
| 370 | |
Rabin Vincent | 982db66 | 2009-05-18 17:29:30 +0100 | [diff] [blame] | 371 | static struct clk_lookup lookups[] = { |
Russell King | 3126c7b | 2010-07-15 11:01:17 +0100 | [diff] [blame] | 372 | { /* AMBA bus clock */ |
| 373 | .con_id = "apb_pclk", |
| 374 | .clk = &dummy_apb_pclk, |
| 375 | }, { /* UART0 */ |
Russell King | 71a06da | 2008-11-08 20:13:53 +0000 | [diff] [blame] | 376 | .dev_id = "dev:f1", |
| 377 | .clk = &ref24_clk, |
| 378 | }, { /* UART1 */ |
| 379 | .dev_id = "dev:f2", |
| 380 | .clk = &ref24_clk, |
| 381 | }, { /* UART2 */ |
| 382 | .dev_id = "dev:f3", |
| 383 | .clk = &ref24_clk, |
| 384 | }, { /* UART3 */ |
| 385 | .dev_id = "fpga:09", |
| 386 | .clk = &ref24_clk, |
| 387 | }, { /* KMI0 */ |
| 388 | .dev_id = "fpga:06", |
| 389 | .clk = &ref24_clk, |
| 390 | }, { /* KMI1 */ |
| 391 | .dev_id = "fpga:07", |
| 392 | .clk = &ref24_clk, |
| 393 | }, { /* MMC0 */ |
| 394 | .dev_id = "fpga:05", |
| 395 | .clk = &ref24_clk, |
| 396 | }, { /* MMC1 */ |
| 397 | .dev_id = "fpga:0b", |
| 398 | .clk = &ref24_clk, |
Linus Walleij | ef6f4b1 | 2010-07-14 23:59:27 +0100 | [diff] [blame] | 399 | }, { /* SSP */ |
| 400 | .dev_id = "dev:f4", |
| 401 | .clk = &ref24_clk, |
Russell King | 71a06da | 2008-11-08 20:13:53 +0000 | [diff] [blame] | 402 | }, { /* CLCD */ |
| 403 | .dev_id = "dev:20", |
| 404 | .clk = &osc4_clk, |
Russell King | 7ff550d | 2011-05-12 13:31:48 +0100 | [diff] [blame] | 405 | }, { /* SP804 timers */ |
| 406 | .dev_id = "sp804", |
| 407 | .clk = &sp804_clk, |
| 408 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 409 | }; |
| 410 | |
| 411 | /* |
| 412 | * CLCD support. |
| 413 | */ |
| 414 | #define SYS_CLCD_MODE_MASK (3 << 0) |
| 415 | #define SYS_CLCD_MODE_888 (0 << 0) |
| 416 | #define SYS_CLCD_MODE_5551 (1 << 0) |
| 417 | #define SYS_CLCD_MODE_565_RLSB (2 << 0) |
| 418 | #define SYS_CLCD_MODE_565_BLSB (3 << 0) |
| 419 | #define SYS_CLCD_NLCDIOON (1 << 2) |
| 420 | #define SYS_CLCD_VDDPOSSWITCH (1 << 3) |
| 421 | #define SYS_CLCD_PWR3V5SWITCH (1 << 4) |
| 422 | #define SYS_CLCD_ID_MASK (0x1f << 8) |
| 423 | #define SYS_CLCD_ID_SANYO_3_8 (0x00 << 8) |
| 424 | #define SYS_CLCD_ID_UNKNOWN_8_4 (0x01 << 8) |
| 425 | #define SYS_CLCD_ID_EPSON_2_2 (0x02 << 8) |
| 426 | #define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8) |
| 427 | #define SYS_CLCD_ID_VGA (0x1f << 8) |
| 428 | |
Russell King | 3414ba8 | 2011-01-18 20:12:10 +0000 | [diff] [blame] | 429 | static bool is_sanyo_2_5_lcd; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 430 | |
| 431 | /* |
| 432 | * Disable all display connectors on the interface module. |
| 433 | */ |
| 434 | static void versatile_clcd_disable(struct clcd_fb *fb) |
| 435 | { |
Al Viro | 2ad4f86 | 2005-09-29 00:09:02 +0100 | [diff] [blame] | 436 | void __iomem *sys_clcd = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_CLCD_OFFSET; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 437 | u32 val; |
| 438 | |
| 439 | val = readl(sys_clcd); |
| 440 | val &= ~SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH; |
| 441 | writel(val, sys_clcd); |
| 442 | |
| 443 | #ifdef CONFIG_MACH_VERSATILE_AB |
| 444 | /* |
| 445 | * If the LCD is Sanyo 2x5 in on the IB2 board, turn the back-light off |
| 446 | */ |
Russell King | 3414ba8 | 2011-01-18 20:12:10 +0000 | [diff] [blame] | 447 | if (machine_is_versatile_ab() && is_sanyo_2_5_lcd) { |
Al Viro | 2ad4f86 | 2005-09-29 00:09:02 +0100 | [diff] [blame] | 448 | void __iomem *versatile_ib2_ctrl = __io_address(VERSATILE_IB2_CTRL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 449 | unsigned long ctrl; |
| 450 | |
| 451 | ctrl = readl(versatile_ib2_ctrl); |
| 452 | ctrl &= ~0x01; |
| 453 | writel(ctrl, versatile_ib2_ctrl); |
| 454 | } |
| 455 | #endif |
| 456 | } |
| 457 | |
| 458 | /* |
| 459 | * Enable the relevant connector on the interface module. |
| 460 | */ |
| 461 | static void versatile_clcd_enable(struct clcd_fb *fb) |
| 462 | { |
Russell King | 9728c1b | 2011-01-19 23:29:12 +0000 | [diff] [blame] | 463 | struct fb_var_screeninfo *var = &fb->fb.var; |
Al Viro | 2ad4f86 | 2005-09-29 00:09:02 +0100 | [diff] [blame] | 464 | void __iomem *sys_clcd = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_CLCD_OFFSET; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 465 | u32 val; |
| 466 | |
| 467 | val = readl(sys_clcd); |
| 468 | val &= ~SYS_CLCD_MODE_MASK; |
| 469 | |
Russell King | 9728c1b | 2011-01-19 23:29:12 +0000 | [diff] [blame] | 470 | switch (var->green.length) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 471 | case 5: |
| 472 | val |= SYS_CLCD_MODE_5551; |
| 473 | break; |
| 474 | case 6: |
Russell King | 9728c1b | 2011-01-19 23:29:12 +0000 | [diff] [blame] | 475 | if (var->red.offset == 0) |
| 476 | val |= SYS_CLCD_MODE_565_RLSB; |
| 477 | else |
| 478 | val |= SYS_CLCD_MODE_565_BLSB; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 479 | break; |
| 480 | case 8: |
| 481 | val |= SYS_CLCD_MODE_888; |
| 482 | break; |
| 483 | } |
| 484 | |
| 485 | /* |
| 486 | * Set the MUX |
| 487 | */ |
| 488 | writel(val, sys_clcd); |
| 489 | |
| 490 | /* |
| 491 | * And now enable the PSUs |
| 492 | */ |
| 493 | val |= SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH; |
| 494 | writel(val, sys_clcd); |
| 495 | |
| 496 | #ifdef CONFIG_MACH_VERSATILE_AB |
| 497 | /* |
| 498 | * If the LCD is Sanyo 2x5 in on the IB2 board, turn the back-light on |
| 499 | */ |
Russell King | 3414ba8 | 2011-01-18 20:12:10 +0000 | [diff] [blame] | 500 | if (machine_is_versatile_ab() && is_sanyo_2_5_lcd) { |
Al Viro | 2ad4f86 | 2005-09-29 00:09:02 +0100 | [diff] [blame] | 501 | void __iomem *versatile_ib2_ctrl = __io_address(VERSATILE_IB2_CTRL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 502 | unsigned long ctrl; |
| 503 | |
| 504 | ctrl = readl(versatile_ib2_ctrl); |
| 505 | ctrl |= 0x01; |
| 506 | writel(ctrl, versatile_ib2_ctrl); |
| 507 | } |
| 508 | #endif |
| 509 | } |
| 510 | |
Russell King | 3414ba8 | 2011-01-18 20:12:10 +0000 | [diff] [blame] | 511 | /* |
| 512 | * Detect which LCD panel is connected, and return the appropriate |
| 513 | * clcd_panel structure. Note: we do not have any information on |
| 514 | * the required timings for the 8.4in panel, so we presently assume |
| 515 | * VGA timings. |
| 516 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 517 | static int versatile_clcd_setup(struct clcd_fb *fb) |
| 518 | { |
Russell King | 3414ba8 | 2011-01-18 20:12:10 +0000 | [diff] [blame] | 519 | void __iomem *sys_clcd = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_CLCD_OFFSET; |
| 520 | const char *panel_name; |
| 521 | u32 val; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 522 | |
Russell King | 3414ba8 | 2011-01-18 20:12:10 +0000 | [diff] [blame] | 523 | is_sanyo_2_5_lcd = false; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 524 | |
Russell King | 3414ba8 | 2011-01-18 20:12:10 +0000 | [diff] [blame] | 525 | val = readl(sys_clcd) & SYS_CLCD_ID_MASK; |
| 526 | if (val == SYS_CLCD_ID_SANYO_3_8) |
| 527 | panel_name = "Sanyo TM38QV67A02A"; |
| 528 | else if (val == SYS_CLCD_ID_SANYO_2_5) { |
| 529 | panel_name = "Sanyo QVGA Portrait"; |
| 530 | is_sanyo_2_5_lcd = true; |
| 531 | } else if (val == SYS_CLCD_ID_EPSON_2_2) |
| 532 | panel_name = "Epson L2F50113T00"; |
| 533 | else if (val == SYS_CLCD_ID_VGA) |
| 534 | panel_name = "VGA"; |
| 535 | else { |
| 536 | printk(KERN_ERR "CLCD: unknown LCD panel ID 0x%08x, using VGA\n", |
| 537 | val); |
| 538 | panel_name = "VGA"; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 539 | } |
| 540 | |
Russell King | 3414ba8 | 2011-01-18 20:12:10 +0000 | [diff] [blame] | 541 | fb->panel = versatile_clcd_get_panel(panel_name); |
| 542 | if (!fb->panel) |
| 543 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 544 | |
Russell King | 3414ba8 | 2011-01-18 20:12:10 +0000 | [diff] [blame] | 545 | return versatile_clcd_setup_dma(fb, SZ_1M); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 546 | } |
| 547 | |
Russell King | 9728c1b | 2011-01-19 23:29:12 +0000 | [diff] [blame] | 548 | static void versatile_clcd_decode(struct clcd_fb *fb, struct clcd_regs *regs) |
| 549 | { |
| 550 | clcdfb_decode(fb, regs); |
| 551 | |
| 552 | /* Always clear BGR for RGB565: we do the routing externally */ |
| 553 | if (fb->fb.var.green.length == 6) |
| 554 | regs->cntl &= ~CNTL_BGR; |
| 555 | } |
| 556 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 557 | static struct clcd_board clcd_plat_data = { |
| 558 | .name = "Versatile", |
Russell King | 3414ba8 | 2011-01-18 20:12:10 +0000 | [diff] [blame] | 559 | .caps = CLCD_CAP_5551 | CLCD_CAP_565 | CLCD_CAP_888, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 560 | .check = clcdfb_check, |
Russell King | 9728c1b | 2011-01-19 23:29:12 +0000 | [diff] [blame] | 561 | .decode = versatile_clcd_decode, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 562 | .disable = versatile_clcd_disable, |
| 563 | .enable = versatile_clcd_enable, |
| 564 | .setup = versatile_clcd_setup, |
Russell King | 3414ba8 | 2011-01-18 20:12:10 +0000 | [diff] [blame] | 565 | .mmap = versatile_clcd_mmap_dma, |
| 566 | .remove = versatile_clcd_remove_dma, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 567 | }; |
| 568 | |
Russell King | bbeddc4 | 2009-07-05 22:43:01 +0100 | [diff] [blame] | 569 | static struct pl061_platform_data gpio0_plat_data = { |
| 570 | .gpio_base = 0, |
| 571 | .irq_base = IRQ_GPIO0_START, |
| 572 | }; |
| 573 | |
| 574 | static struct pl061_platform_data gpio1_plat_data = { |
| 575 | .gpio_base = 8, |
| 576 | .irq_base = IRQ_GPIO1_START, |
| 577 | }; |
| 578 | |
Linus Walleij | ef6f4b1 | 2010-07-14 23:59:27 +0100 | [diff] [blame] | 579 | static struct pl022_ssp_controller ssp0_plat_data = { |
| 580 | .bus_id = 0, |
| 581 | .enable_dma = 0, |
| 582 | .num_chipselect = 1, |
| 583 | }; |
| 584 | |
Russell King | 0dada61 | 2011-12-18 11:40:46 +0000 | [diff] [blame] | 585 | #define AACI_IRQ { IRQ_AACI } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 586 | #define MMCI0_IRQ { IRQ_MMCI0A,IRQ_SIC_MMCI0B } |
Russell King | 0dada61 | 2011-12-18 11:40:46 +0000 | [diff] [blame] | 587 | #define KMI0_IRQ { IRQ_SIC_KMI0 } |
| 588 | #define KMI1_IRQ { IRQ_SIC_KMI1 } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 589 | |
| 590 | /* |
| 591 | * These devices are connected directly to the multi-layer AHB switch |
| 592 | */ |
Russell King | 0dada61 | 2011-12-18 11:40:46 +0000 | [diff] [blame] | 593 | #define SMC_IRQ { } |
| 594 | #define MPMC_IRQ { } |
| 595 | #define CLCD_IRQ { IRQ_CLCDINT } |
| 596 | #define DMAC_IRQ { IRQ_DMAINT } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 597 | |
| 598 | /* |
| 599 | * These devices are connected via the core APB bridge |
| 600 | */ |
Russell King | 0dada61 | 2011-12-18 11:40:46 +0000 | [diff] [blame] | 601 | #define SCTL_IRQ { } |
| 602 | #define WATCHDOG_IRQ { IRQ_WDOGINT } |
| 603 | #define GPIO0_IRQ { IRQ_GPIOINT0 } |
| 604 | #define GPIO1_IRQ { IRQ_GPIOINT1 } |
| 605 | #define RTC_IRQ { IRQ_RTCINT } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 606 | |
| 607 | /* |
| 608 | * These devices are connected via the DMA APB bridge |
| 609 | */ |
Russell King | 0dada61 | 2011-12-18 11:40:46 +0000 | [diff] [blame] | 610 | #define SCI_IRQ { IRQ_SCIINT } |
| 611 | #define UART0_IRQ { IRQ_UARTINT0 } |
| 612 | #define UART1_IRQ { IRQ_UARTINT1 } |
| 613 | #define UART2_IRQ { IRQ_UARTINT2 } |
| 614 | #define SSP_IRQ { IRQ_SSPINT } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 615 | |
| 616 | /* FPGA Primecells */ |
Russell King | 8f5088b | 2011-12-18 12:21:09 +0000 | [diff] [blame] | 617 | APB_DEVICE(aaci, "fpga:04", AACI, NULL); |
| 618 | APB_DEVICE(mmc0, "fpga:05", MMCI0, &mmc0_plat_data); |
| 619 | APB_DEVICE(kmi0, "fpga:06", KMI0, NULL); |
| 620 | APB_DEVICE(kmi1, "fpga:07", KMI1, NULL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 621 | |
| 622 | /* DevChip Primecells */ |
Russell King | 8f5088b | 2011-12-18 12:21:09 +0000 | [diff] [blame] | 623 | AHB_DEVICE(smc, "dev:00", SMC, NULL); |
| 624 | AHB_DEVICE(mpmc, "dev:10", MPMC, NULL); |
| 625 | AHB_DEVICE(clcd, "dev:20", CLCD, &clcd_plat_data); |
| 626 | AHB_DEVICE(dmac, "dev:30", DMAC, NULL); |
| 627 | APB_DEVICE(sctl, "dev:e0", SCTL, NULL); |
| 628 | APB_DEVICE(wdog, "dev:e1", WATCHDOG, NULL); |
| 629 | APB_DEVICE(gpio0, "dev:e4", GPIO0, &gpio0_plat_data); |
| 630 | APB_DEVICE(gpio1, "dev:e5", GPIO1, &gpio1_plat_data); |
| 631 | APB_DEVICE(rtc, "dev:e8", RTC, NULL); |
| 632 | APB_DEVICE(sci0, "dev:f0", SCI, NULL); |
| 633 | APB_DEVICE(uart0, "dev:f1", UART0, NULL); |
| 634 | APB_DEVICE(uart1, "dev:f2", UART1, NULL); |
| 635 | APB_DEVICE(uart2, "dev:f3", UART2, NULL); |
| 636 | APB_DEVICE(ssp0, "dev:f4", SSP, &ssp0_plat_data); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 637 | |
| 638 | static struct amba_device *amba_devs[] __initdata = { |
| 639 | &dmac_device, |
| 640 | &uart0_device, |
| 641 | &uart1_device, |
| 642 | &uart2_device, |
| 643 | &smc_device, |
| 644 | &mpmc_device, |
| 645 | &clcd_device, |
| 646 | &sctl_device, |
| 647 | &wdog_device, |
| 648 | &gpio0_device, |
| 649 | &gpio1_device, |
| 650 | &rtc_device, |
| 651 | &sci0_device, |
| 652 | &ssp0_device, |
| 653 | &aaci_device, |
| 654 | &mmc0_device, |
| 655 | &kmi0_device, |
| 656 | &kmi1_device, |
| 657 | }; |
| 658 | |
Grant Likely | 3ba7222 | 2011-07-26 03:19:06 -0600 | [diff] [blame] | 659 | #ifdef CONFIG_OF |
| 660 | /* |
| 661 | * Lookup table for attaching a specific name and platform_data pointer to |
| 662 | * devices as they get created by of_platform_populate(). Ideally this table |
| 663 | * would not exist, but the current clock implementation depends on some devices |
| 664 | * having a specific name. |
| 665 | */ |
| 666 | struct of_dev_auxdata versatile_auxdata_lookup[] __initdata = { |
| 667 | OF_DEV_AUXDATA("arm,primecell", VERSATILE_MMCI0_BASE, "fpga:05", NULL), |
| 668 | OF_DEV_AUXDATA("arm,primecell", VERSATILE_KMI0_BASE, "fpga:06", NULL), |
| 669 | OF_DEV_AUXDATA("arm,primecell", VERSATILE_KMI1_BASE, "fpga:07", NULL), |
| 670 | OF_DEV_AUXDATA("arm,primecell", VERSATILE_UART3_BASE, "fpga:09", NULL), |
| 671 | OF_DEV_AUXDATA("arm,primecell", VERSATILE_MMCI1_BASE, "fpga:0b", NULL), |
| 672 | |
| 673 | OF_DEV_AUXDATA("arm,primecell", VERSATILE_CLCD_BASE, "dev:20", &clcd_plat_data), |
| 674 | OF_DEV_AUXDATA("arm,primecell", VERSATILE_UART0_BASE, "dev:f1", NULL), |
| 675 | OF_DEV_AUXDATA("arm,primecell", VERSATILE_UART1_BASE, "dev:f2", NULL), |
| 676 | OF_DEV_AUXDATA("arm,primecell", VERSATILE_UART2_BASE, "dev:f3", NULL), |
| 677 | OF_DEV_AUXDATA("arm,primecell", VERSATILE_SSP_BASE, "dev:f4", NULL), |
| 678 | |
| 679 | #if 0 |
| 680 | /* |
| 681 | * These entries are unnecessary because no clocks referencing |
| 682 | * them. I've left them in for now as place holders in case |
| 683 | * any of them need to be added back, but they should be |
| 684 | * removed before actually committing this patch. --gcl |
| 685 | */ |
| 686 | OF_DEV_AUXDATA("arm,primecell", VERSATILE_AACI_BASE, "fpga:04", NULL), |
| 687 | OF_DEV_AUXDATA("arm,primecell", VERSATILE_SCI1_BASE, "fpga:0a", NULL), |
| 688 | OF_DEV_AUXDATA("arm,primecell", VERSATILE_SMC_BASE, "dev:00", NULL), |
| 689 | OF_DEV_AUXDATA("arm,primecell", VERSATILE_MPMC_BASE, "dev:10", NULL), |
| 690 | OF_DEV_AUXDATA("arm,primecell", VERSATILE_DMAC_BASE, "dev:30", NULL), |
| 691 | |
| 692 | OF_DEV_AUXDATA("arm,primecell", VERSATILE_SCTL_BASE, "dev:e0", NULL), |
| 693 | OF_DEV_AUXDATA("arm,primecell", VERSATILE_WATCHDOG_BASE, "dev:e1", NULL), |
| 694 | OF_DEV_AUXDATA("arm,primecell", VERSATILE_GPIO0_BASE, "dev:e4", NULL), |
| 695 | OF_DEV_AUXDATA("arm,primecell", VERSATILE_GPIO1_BASE, "dev:e5", NULL), |
| 696 | OF_DEV_AUXDATA("arm,primecell", VERSATILE_GPIO2_BASE, "dev:e6", NULL), |
| 697 | OF_DEV_AUXDATA("arm,primecell", VERSATILE_GPIO3_BASE, "dev:e7", NULL), |
| 698 | OF_DEV_AUXDATA("arm,primecell", VERSATILE_RTC_BASE, "dev:e8", NULL), |
| 699 | OF_DEV_AUXDATA("arm,primecell", VERSATILE_SCI_BASE, "dev:f0", NULL), |
| 700 | #endif |
| 701 | {} |
| 702 | }; |
| 703 | #endif |
| 704 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 705 | #ifdef CONFIG_LEDS |
Al Viro | 2ad4f86 | 2005-09-29 00:09:02 +0100 | [diff] [blame] | 706 | #define VA_LEDS_BASE (__io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_LED_OFFSET) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 707 | |
| 708 | static void versatile_leds_event(led_event_t ledevt) |
| 709 | { |
| 710 | unsigned long flags; |
| 711 | u32 val; |
| 712 | |
| 713 | local_irq_save(flags); |
| 714 | val = readl(VA_LEDS_BASE); |
| 715 | |
| 716 | switch (ledevt) { |
| 717 | case led_idle_start: |
| 718 | val = val & ~VERSATILE_SYS_LED0; |
| 719 | break; |
| 720 | |
| 721 | case led_idle_end: |
| 722 | val = val | VERSATILE_SYS_LED0; |
| 723 | break; |
| 724 | |
| 725 | case led_timer: |
| 726 | val = val ^ VERSATILE_SYS_LED1; |
| 727 | break; |
| 728 | |
| 729 | case led_halted: |
| 730 | val = 0; |
| 731 | break; |
| 732 | |
| 733 | default: |
| 734 | break; |
| 735 | } |
| 736 | |
| 737 | writel(val, VA_LEDS_BASE); |
| 738 | local_irq_restore(flags); |
| 739 | } |
| 740 | #endif /* CONFIG_LEDS */ |
| 741 | |
Russell King | b56a7c6 | 2011-11-03 11:43:08 +0000 | [diff] [blame] | 742 | void versatile_restart(char mode, const char *cmd) |
| 743 | { |
| 744 | void __iomem *sys = __io_address(VERSATILE_SYS_BASE); |
| 745 | u32 val; |
| 746 | |
| 747 | val = __raw_readl(sys + VERSATILE_SYS_RESETCTL_OFFSET); |
| 748 | val |= 0x105; |
| 749 | |
| 750 | __raw_writel(0xa05f, sys + VERSATILE_SYS_LOCK_OFFSET); |
| 751 | __raw_writel(val, sys + VERSATILE_SYS_RESETCTL_OFFSET); |
| 752 | __raw_writel(0, sys + VERSATILE_SYS_LOCK_OFFSET); |
| 753 | } |
| 754 | |
Russell King | ad3bb19 | 2011-01-11 12:55:38 +0000 | [diff] [blame] | 755 | /* Early initializations */ |
| 756 | void __init versatile_init_early(void) |
| 757 | { |
| 758 | void __iomem *sys = __io_address(VERSATILE_SYS_BASE); |
| 759 | |
| 760 | osc4_clk.vcoreg = sys + VERSATILE_SYS_OSCCLCD_OFFSET; |
| 761 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); |
| 762 | |
| 763 | versatile_sched_clock_init(sys + VERSATILE_SYS_24MHz_OFFSET, 24000000); |
| 764 | } |
| 765 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 766 | void __init versatile_init(void) |
| 767 | { |
| 768 | int i; |
| 769 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 770 | platform_device_register(&versatile_flash_device); |
Russell King | 6b65cd7 | 2006-12-10 21:21:32 +0100 | [diff] [blame] | 771 | platform_device_register(&versatile_i2c_device); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 772 | platform_device_register(&smc91x_device); |
Linus Walleij | d161edf | 2010-07-17 12:34:25 +0100 | [diff] [blame] | 773 | platform_device_register(&char_lcd_device); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 774 | |
| 775 | for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { |
| 776 | struct amba_device *d = amba_devs[i]; |
| 777 | amba_device_register(d, &iomem_resource); |
| 778 | } |
| 779 | |
| 780 | #ifdef CONFIG_LEDS |
| 781 | leds_event = versatile_leds_event; |
| 782 | #endif |
| 783 | } |
| 784 | |
| 785 | /* |
| 786 | * Where is the timer (VA)? |
| 787 | */ |
Al Viro | 2ad4f86 | 2005-09-29 00:09:02 +0100 | [diff] [blame] | 788 | #define TIMER0_VA_BASE __io_address(VERSATILE_TIMER0_1_BASE) |
| 789 | #define TIMER1_VA_BASE (__io_address(VERSATILE_TIMER0_1_BASE) + 0x20) |
| 790 | #define TIMER2_VA_BASE __io_address(VERSATILE_TIMER2_3_BASE) |
| 791 | #define TIMER3_VA_BASE (__io_address(VERSATILE_TIMER2_3_BASE) + 0x20) |
Kevin Hilman | b49c87c | 2007-03-08 20:25:13 +0100 | [diff] [blame] | 792 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 793 | /* |
| 794 | * Set up timer interrupt, and return the current time in seconds. |
| 795 | */ |
| 796 | static void __init versatile_timer_init(void) |
| 797 | { |
Russell King | b720f73 | 2005-06-29 15:15:54 +0100 | [diff] [blame] | 798 | u32 val; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 799 | |
| 800 | /* |
| 801 | * set clock frequency: |
| 802 | * VERSATILE_REFCLK is 32KHz |
| 803 | * VERSATILE_TIMCLK is 1MHz |
| 804 | */ |
Al Viro | 2ad4f86 | 2005-09-29 00:09:02 +0100 | [diff] [blame] | 805 | val = readl(__io_address(VERSATILE_SCTL_BASE)); |
Russell King | b720f73 | 2005-06-29 15:15:54 +0100 | [diff] [blame] | 806 | writel((VERSATILE_TIMCLK << VERSATILE_TIMER1_EnSel) | |
| 807 | (VERSATILE_TIMCLK << VERSATILE_TIMER2_EnSel) | |
| 808 | (VERSATILE_TIMCLK << VERSATILE_TIMER3_EnSel) | |
| 809 | (VERSATILE_TIMCLK << VERSATILE_TIMER4_EnSel) | val, |
Al Viro | 2ad4f86 | 2005-09-29 00:09:02 +0100 | [diff] [blame] | 810 | __io_address(VERSATILE_SCTL_BASE)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 811 | |
| 812 | /* |
| 813 | * Initialise to a known state (all timers off) |
| 814 | */ |
Russell King | b720f73 | 2005-06-29 15:15:54 +0100 | [diff] [blame] | 815 | writel(0, TIMER0_VA_BASE + TIMER_CTRL); |
| 816 | writel(0, TIMER1_VA_BASE + TIMER_CTRL); |
| 817 | writel(0, TIMER2_VA_BASE + TIMER_CTRL); |
| 818 | writel(0, TIMER3_VA_BASE + TIMER_CTRL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 819 | |
Russell King | fb593cf | 2011-05-12 12:08:23 +0100 | [diff] [blame] | 820 | sp804_clocksource_init(TIMER3_VA_BASE, "timer3"); |
Russell King | 57cc4f7 | 2011-05-12 15:31:13 +0100 | [diff] [blame] | 821 | sp804_clockevents_init(TIMER0_VA_BASE, IRQ_TIMERINT0_1, "timer0"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 822 | } |
| 823 | |
| 824 | struct sys_timer versatile_timer = { |
| 825 | .init = versatile_timer_init, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 826 | }; |
Kevin Hilman | b49c87c | 2007-03-08 20:25:13 +0100 | [diff] [blame] | 827 | |