blob: 33ed4109f7bcc97574849c314c539bb67919a616 [file] [log] [blame]
Mythri P Kc3198a52011-03-12 12:04:27 +05301/*
Archit Tanejaef269582013-09-12 17:45:57 +05302 * HDMI interface DSS driver for TI's OMAP4 family of SoCs.
Mythri P Kc3198a52011-03-12 12:04:27 +05303 * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/
4 * Authors: Yong Zhi
5 * Mythri pk <mythripk@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#define DSS_SUBSYS_NAME "HDMI"
21
22#include <linux/kernel.h>
23#include <linux/module.h>
24#include <linux/err.h>
25#include <linux/io.h>
26#include <linux/interrupt.h>
27#include <linux/mutex.h>
28#include <linux/delay.h>
29#include <linux/string.h>
Tomi Valkeinen24e62892011-05-23 11:51:18 +030030#include <linux/platform_device.h>
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +030031#include <linux/pm_runtime.h>
32#include <linux/clk.h>
Tomi Valkeinencca35012012-04-26 14:48:32 +030033#include <linux/gpio.h>
Tomi Valkeinen17486942012-08-15 15:55:04 +030034#include <linux/regulator/consumer.h>
Tomi Valkeinena0b38cc2011-05-11 14:05:07 +030035#include <video/omapdss.h>
Mythri P Kc3198a52011-03-12 12:04:27 +053036
Archit Tanejaef269582013-09-12 17:45:57 +053037#include "hdmi4_core.h"
Mythri P Kc3198a52011-03-12 12:04:27 +053038#include "dss.h"
Ricardo Neriad44cc32011-05-18 22:31:56 -050039#include "dss_features.h"
Jyri Sarha945514b2014-06-27 16:47:00 +030040#include "hdmi.h"
Mythri P Kc3198a52011-03-12 12:04:27 +053041
Jyri Sarha945514b2014-06-27 16:47:00 +030042static struct omap_hdmi hdmi;
Mythri P Kc3198a52011-03-12 12:04:27 +053043
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +030044static int hdmi_runtime_get(void)
45{
46 int r;
47
48 DSSDBG("hdmi_runtime_get\n");
49
50 r = pm_runtime_get_sync(&hdmi.pdev->dev);
51 WARN_ON(r < 0);
Archit Tanejaa247ce782012-02-10 11:45:52 +053052 if (r < 0)
Tomi Valkeinen852f0832012-02-17 17:58:04 +020053 return r;
Archit Tanejaa247ce782012-02-10 11:45:52 +053054
55 return 0;
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +030056}
57
58static void hdmi_runtime_put(void)
59{
60 int r;
61
62 DSSDBG("hdmi_runtime_put\n");
63
Tomi Valkeinen0eaf9f52012-01-23 13:23:08 +020064 r = pm_runtime_put_sync(&hdmi.pdev->dev);
Tomi Valkeinen5be3aeb2012-06-27 16:37:18 +030065 WARN_ON(r < 0 && r != -ENOSYS);
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +030066}
67
Tomi Valkeinendcf5f722013-10-28 11:47:34 +020068static irqreturn_t hdmi_irq_handler(int irq, void *data)
69{
70 struct hdmi_wp_data *wp = data;
71 u32 irqstatus;
72
73 irqstatus = hdmi_wp_get_irqstatus(wp);
74 hdmi_wp_set_irqstatus(wp, irqstatus);
75
76 if ((irqstatus & HDMI_IRQ_LINK_CONNECT) &&
77 irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
78 /*
79 * If we get both connect and disconnect interrupts at the same
80 * time, turn off the PHY, clear interrupts, and restart, which
81 * raises connect interrupt if a cable is connected, or nothing
82 * if cable is not connected.
83 */
84 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
85
86 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
87 HDMI_IRQ_LINK_DISCONNECT);
88
89 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
90 } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) {
91 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
92 } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
93 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
94 }
95
96 return IRQ_HANDLED;
97}
98
Tomi Valkeinene25001d2013-05-10 15:20:52 +030099static int hdmi_init_regulator(void)
100{
Tomi Valkeinen818a0532013-09-23 18:42:11 +0530101 int r;
Tomi Valkeinene25001d2013-05-10 15:20:52 +0300102 struct regulator *reg;
103
Jyri Sarha945514b2014-06-27 16:47:00 +0300104 if (hdmi.vdda_reg != NULL)
Tomi Valkeinene25001d2013-05-10 15:20:52 +0300105 return 0;
106
Tomi Valkeinen931d4bd2013-06-10 14:05:10 +0300107 reg = devm_regulator_get(&hdmi.pdev->dev, "vdda");
Tomi Valkeinene25001d2013-05-10 15:20:52 +0300108
109 if (IS_ERR(reg)) {
Tomi Valkeinen40359a92013-12-19 16:15:34 +0200110 if (PTR_ERR(reg) != -EPROBE_DEFER)
Tomi Valkeinen931d4bd2013-06-10 14:05:10 +0300111 DSSERR("can't get VDDA regulator\n");
Tomi Valkeinene25001d2013-05-10 15:20:52 +0300112 return PTR_ERR(reg);
113 }
114
Tomi Valkeinen818a0532013-09-23 18:42:11 +0530115 if (regulator_can_change_voltage(reg)) {
116 r = regulator_set_voltage(reg, 1800000, 1800000);
117 if (r) {
118 devm_regulator_put(reg);
119 DSSWARN("can't set the regulator voltage\n");
120 return r;
121 }
122 }
123
Jyri Sarha945514b2014-06-27 16:47:00 +0300124 hdmi.vdda_reg = reg;
Tomi Valkeinene25001d2013-05-10 15:20:52 +0300125
126 return 0;
127}
128
Tomi Valkeinenbb426fc2012-10-19 17:42:10 +0300129static int hdmi_power_on_core(struct omap_dss_device *dssdev)
Mythri P Kc3198a52011-03-12 12:04:27 +0530130{
Mythri P K46095b22012-01-06 17:52:09 +0530131 int r;
Mythri P Kc3198a52011-03-12 12:04:27 +0530132
Jyri Sarha945514b2014-06-27 16:47:00 +0300133 r = regulator_enable(hdmi.vdda_reg);
Tomi Valkeinen17486942012-08-15 15:55:04 +0300134 if (r)
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300135 return r;
Tomi Valkeinen17486942012-08-15 15:55:04 +0300136
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300137 r = hdmi_runtime_get();
138 if (r)
Tomi Valkeinencca35012012-04-26 14:48:32 +0300139 goto err_runtime_get;
Mythri P Kc3198a52011-03-12 12:04:27 +0530140
Tomi Valkeinenbb426fc2012-10-19 17:42:10 +0300141 /* Make selection of HDMI in DSS */
142 dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK);
143
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300144 hdmi.core_enabled = true;
145
Tomi Valkeinenbb426fc2012-10-19 17:42:10 +0300146 return 0;
147
148err_runtime_get:
Jyri Sarha945514b2014-06-27 16:47:00 +0300149 regulator_disable(hdmi.vdda_reg);
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300150
Tomi Valkeinenbb426fc2012-10-19 17:42:10 +0300151 return r;
152}
153
154static void hdmi_power_off_core(struct omap_dss_device *dssdev)
155{
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300156 hdmi.core_enabled = false;
157
Tomi Valkeinenbb426fc2012-10-19 17:42:10 +0300158 hdmi_runtime_put();
Jyri Sarha945514b2014-06-27 16:47:00 +0300159 regulator_disable(hdmi.vdda_reg);
Tomi Valkeinenbb426fc2012-10-19 17:42:10 +0300160}
161
162static int hdmi_power_on_full(struct omap_dss_device *dssdev)
163{
164 int r;
165 struct omap_video_timings *p;
Tomi Valkeinen7ae9a712013-05-10 15:27:07 +0300166 struct omap_overlay_manager *mgr = hdmi.output.manager;
Tomi Valkeinendcf5f722013-10-28 11:47:34 +0200167 struct hdmi_wp_data *wp = &hdmi.wp;
Tomi Valkeinenc84c3a52014-10-22 15:02:17 +0300168 struct dss_pll_clock_info hdmi_cinfo = { 0 };
Tomi Valkeinenbb426fc2012-10-19 17:42:10 +0300169
170 r = hdmi_power_on_core(dssdev);
171 if (r)
172 return r;
173
Tomi Valkeinendcf5f722013-10-28 11:47:34 +0200174 /* disable and clear irqs */
175 hdmi_wp_clear_irqenable(wp, 0xffffffff);
176 hdmi_wp_set_irqstatus(wp, 0xffffffff);
177
Archit Taneja275cfa12013-10-08 14:22:03 +0530178 p = &hdmi.cfg.timings;
Mythri P Kc3198a52011-03-12 12:04:27 +0530179
Archit Taneja78493982012-08-08 16:50:42 +0530180 DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res);
Mythri P Kc3198a52011-03-12 12:04:27 +0530181
Tomi Valkeinenc84c3a52014-10-22 15:02:17 +0300182 hdmi_pll_compute(&hdmi.pll, p->pixelclock, &hdmi_cinfo);
Mythri P Kc3198a52011-03-12 12:04:27 +0530183
Tomi Valkeinenc84c3a52014-10-22 15:02:17 +0300184 r = dss_pll_enable(&hdmi.pll.pll);
Mythri P Kc3198a52011-03-12 12:04:27 +0530185 if (r) {
Tomi Valkeinenc2fbd062014-10-16 16:01:51 +0300186 DSSERR("Failed to enable PLL\n");
Tomi Valkeinencca35012012-04-26 14:48:32 +0300187 goto err_pll_enable;
Mythri P Kc3198a52011-03-12 12:04:27 +0530188 }
189
Tomi Valkeinenc84c3a52014-10-22 15:02:17 +0300190 r = dss_pll_set_config(&hdmi.pll.pll, &hdmi_cinfo);
Tomi Valkeinenc2fbd062014-10-16 16:01:51 +0300191 if (r) {
192 DSSERR("Failed to configure PLL\n");
193 goto err_pll_cfg;
194 }
195
Tomi Valkeinenc84c3a52014-10-22 15:02:17 +0300196 r = hdmi_phy_configure(&hdmi.phy, hdmi_cinfo.clkdco,
197 hdmi_cinfo.clkout[0]);
Mythri P Kc3198a52011-03-12 12:04:27 +0530198 if (r) {
Tomi Valkeinendcf5f722013-10-28 11:47:34 +0200199 DSSDBG("Failed to configure PHY\n");
200 goto err_phy_cfg;
Mythri P Kc3198a52011-03-12 12:04:27 +0530201 }
202
Tomi Valkeinendcf5f722013-10-28 11:47:34 +0200203 r = hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
204 if (r)
205 goto err_phy_pwr;
206
Archit Taneja275cfa12013-10-08 14:22:03 +0530207 hdmi4_configure(&hdmi.core, &hdmi.wp, &hdmi.cfg);
Mythri P Kc3198a52011-03-12 12:04:27 +0530208
Mythri P Kc3198a52011-03-12 12:04:27 +0530209 /* bypass TV gamma table */
210 dispc_enable_gamma_table(0);
211
212 /* tv size */
Archit Tanejacea87b92012-09-07 17:56:20 +0530213 dss_mgr_set_timings(mgr, p);
Mythri P Kc3198a52011-03-12 12:04:27 +0530214
Archit Taneja275cfa12013-10-08 14:22:03 +0530215 r = hdmi_wp_video_start(&hdmi.wp);
Ricardo Neric0456be2012-04-27 13:48:45 -0500216 if (r)
217 goto err_vid_enable;
Mythri P Kc3198a52011-03-12 12:04:27 +0530218
Archit Tanejacea87b92012-09-07 17:56:20 +0530219 r = dss_mgr_enable(mgr);
Tomi Valkeinen33ca2372011-11-21 13:42:58 +0200220 if (r)
221 goto err_mgr_enable;
Tomi Valkeinen3870c902011-08-31 14:47:11 +0300222
Tomi Valkeinendcf5f722013-10-28 11:47:34 +0200223 hdmi_wp_set_irqenable(wp,
224 HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT);
225
Mythri P Kc3198a52011-03-12 12:04:27 +0530226 return 0;
Tomi Valkeinen33ca2372011-11-21 13:42:58 +0200227
228err_mgr_enable:
Archit Taneja275cfa12013-10-08 14:22:03 +0530229 hdmi_wp_video_stop(&hdmi.wp);
Ricardo Neric0456be2012-04-27 13:48:45 -0500230err_vid_enable:
Tomi Valkeinendcf5f722013-10-28 11:47:34 +0200231err_phy_cfg:
232 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
233err_phy_pwr:
Tomi Valkeinenc2fbd062014-10-16 16:01:51 +0300234err_pll_cfg:
Tomi Valkeinenc84c3a52014-10-22 15:02:17 +0300235 dss_pll_disable(&hdmi.pll.pll);
Tomi Valkeinencca35012012-04-26 14:48:32 +0300236err_pll_enable:
Tomi Valkeinenbb426fc2012-10-19 17:42:10 +0300237 hdmi_power_off_core(dssdev);
Mythri P Kc3198a52011-03-12 12:04:27 +0530238 return -EIO;
239}
240
Tomi Valkeinenbb426fc2012-10-19 17:42:10 +0300241static void hdmi_power_off_full(struct omap_dss_device *dssdev)
Mythri P Kc3198a52011-03-12 12:04:27 +0530242{
Tomi Valkeinen7ae9a712013-05-10 15:27:07 +0300243 struct omap_overlay_manager *mgr = hdmi.output.manager;
Archit Tanejacea87b92012-09-07 17:56:20 +0530244
Tomi Valkeinendcf5f722013-10-28 11:47:34 +0200245 hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
246
Archit Tanejacea87b92012-09-07 17:56:20 +0530247 dss_mgr_disable(mgr);
Mythri P Kc3198a52011-03-12 12:04:27 +0530248
Archit Taneja275cfa12013-10-08 14:22:03 +0530249 hdmi_wp_video_stop(&hdmi.wp);
Tomi Valkeinendcf5f722013-10-28 11:47:34 +0200250
251 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
252
Tomi Valkeinenc84c3a52014-10-22 15:02:17 +0300253 dss_pll_disable(&hdmi.pll.pll);
Tomi Valkeinencca35012012-04-26 14:48:32 +0300254
Tomi Valkeinenbb426fc2012-10-19 17:42:10 +0300255 hdmi_power_off_core(dssdev);
Mythri P Kc3198a52011-03-12 12:04:27 +0530256}
257
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300258static int hdmi_display_check_timing(struct omap_dss_device *dssdev,
Mythri P Kc3198a52011-03-12 12:04:27 +0530259 struct omap_video_timings *timings)
260{
Archit Taneja1e676242013-12-09 19:39:08 +0530261 struct omap_dss_device *out = &hdmi.output;
Mythri P Kc3198a52011-03-12 12:04:27 +0530262
Archit Taneja1e676242013-12-09 19:39:08 +0530263 if (!dispc_mgr_timings_ok(out->dispc_channel, timings))
Mythri P Kc3198a52011-03-12 12:04:27 +0530264 return -EINVAL;
Mythri P Kc3198a52011-03-12 12:04:27 +0530265
266 return 0;
Mythri P Kc3198a52011-03-12 12:04:27 +0530267}
268
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300269static void hdmi_display_set_timing(struct omap_dss_device *dssdev,
Archit Taneja78493982012-08-08 16:50:42 +0530270 struct omap_video_timings *timings)
Mythri P Kc3198a52011-03-12 12:04:27 +0530271{
Archit Tanejaed1aa902012-08-15 00:40:31 +0530272 mutex_lock(&hdmi.lock);
273
Tomi Valkeinenab0aee92014-06-18 14:21:44 +0300274 hdmi.cfg.timings = *timings;
Archit Taneja78493982012-08-08 16:50:42 +0530275
Tomi Valkeinenab0aee92014-06-18 14:21:44 +0300276 dispc_set_tv_pclk(timings->pixelclock);
Archit Taneja1e676242013-12-09 19:39:08 +0530277
Archit Tanejaed1aa902012-08-15 00:40:31 +0530278 mutex_unlock(&hdmi.lock);
Mythri P Kc3198a52011-03-12 12:04:27 +0530279}
280
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300281static void hdmi_display_get_timings(struct omap_dss_device *dssdev,
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300282 struct omap_video_timings *timings)
283{
Tomi Valkeinenab0aee92014-06-18 14:21:44 +0300284 *timings = hdmi.cfg.timings;
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300285}
286
Tomi Valkeinene40402c2012-03-02 18:01:07 +0200287static void hdmi_dump_regs(struct seq_file *s)
Mythri P K162874d2011-09-22 13:37:45 +0530288{
289 mutex_lock(&hdmi.lock);
290
Wei Yongjunf8fb7d72012-10-21 20:54:26 +0800291 if (hdmi_runtime_get()) {
292 mutex_unlock(&hdmi.lock);
Mythri P K162874d2011-09-22 13:37:45 +0530293 return;
Wei Yongjunf8fb7d72012-10-21 20:54:26 +0800294 }
Mythri P K162874d2011-09-22 13:37:45 +0530295
Archit Taneja275cfa12013-10-08 14:22:03 +0530296 hdmi_wp_dump(&hdmi.wp, s);
297 hdmi_pll_dump(&hdmi.pll, s);
298 hdmi_phy_dump(&hdmi.phy, s);
299 hdmi4_core_dump(&hdmi.core, s);
Mythri P K162874d2011-09-22 13:37:45 +0530300
301 hdmi_runtime_put();
302 mutex_unlock(&hdmi.lock);
303}
304
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300305static int read_edid(u8 *buf, int len)
Tomi Valkeinen47024562011-08-25 17:12:56 +0300306{
307 int r;
308
309 mutex_lock(&hdmi.lock);
310
311 r = hdmi_runtime_get();
312 BUG_ON(r);
313
Archit Taneja275cfa12013-10-08 14:22:03 +0530314 r = hdmi4_read_edid(&hdmi.core, buf, len);
Tomi Valkeinen47024562011-08-25 17:12:56 +0300315
316 hdmi_runtime_put();
317 mutex_unlock(&hdmi.lock);
318
319 return r;
320}
321
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300322static int hdmi_display_enable(struct omap_dss_device *dssdev)
Mythri P Kc3198a52011-03-12 12:04:27 +0530323{
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300324 struct omap_dss_device *out = &hdmi.output;
Mythri P Kc3198a52011-03-12 12:04:27 +0530325 int r = 0;
326
327 DSSDBG("ENTER hdmi_display_enable\n");
328
329 mutex_lock(&hdmi.lock);
330
Archit Tanejacea87b92012-09-07 17:56:20 +0530331 if (out == NULL || out->manager == NULL) {
332 DSSERR("failed to enable display: no output/manager\n");
Tomi Valkeinen05e1d602011-06-23 16:38:21 +0300333 r = -ENODEV;
334 goto err0;
335 }
336
Tomi Valkeinenbb426fc2012-10-19 17:42:10 +0300337 r = hdmi_power_on_full(dssdev);
Mythri P Kc3198a52011-03-12 12:04:27 +0530338 if (r) {
339 DSSERR("failed to power on device\n");
Tomi Valkeinend3923932013-04-25 13:12:07 +0300340 goto err0;
Mythri P Kc3198a52011-03-12 12:04:27 +0530341 }
342
343 mutex_unlock(&hdmi.lock);
344 return 0;
345
Mythri P Kc3198a52011-03-12 12:04:27 +0530346err0:
347 mutex_unlock(&hdmi.lock);
348 return r;
349}
350
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300351static void hdmi_display_disable(struct omap_dss_device *dssdev)
Mythri P Kc3198a52011-03-12 12:04:27 +0530352{
353 DSSDBG("Enter hdmi_display_disable\n");
354
355 mutex_lock(&hdmi.lock);
356
Tomi Valkeinenbb426fc2012-10-19 17:42:10 +0300357 hdmi_power_off_full(dssdev);
Mythri P Kc3198a52011-03-12 12:04:27 +0530358
Mythri P Kc3198a52011-03-12 12:04:27 +0530359 mutex_unlock(&hdmi.lock);
360}
361
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300362static int hdmi_core_enable(struct omap_dss_device *dssdev)
Tomi Valkeinen44898232012-10-19 17:42:27 +0300363{
364 int r = 0;
365
366 DSSDBG("ENTER omapdss_hdmi_core_enable\n");
367
368 mutex_lock(&hdmi.lock);
369
Tomi Valkeinen44898232012-10-19 17:42:27 +0300370 r = hdmi_power_on_core(dssdev);
371 if (r) {
372 DSSERR("failed to power on device\n");
373 goto err0;
374 }
375
376 mutex_unlock(&hdmi.lock);
377 return 0;
378
379err0:
380 mutex_unlock(&hdmi.lock);
381 return r;
382}
383
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300384static void hdmi_core_disable(struct omap_dss_device *dssdev)
Tomi Valkeinen44898232012-10-19 17:42:27 +0300385{
386 DSSDBG("Enter omapdss_hdmi_core_disable\n");
387
388 mutex_lock(&hdmi.lock);
389
390 hdmi_power_off_core(dssdev);
391
392 mutex_unlock(&hdmi.lock);
393}
394
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300395static int hdmi_connect(struct omap_dss_device *dssdev,
396 struct omap_dss_device *dst)
397{
398 struct omap_overlay_manager *mgr;
399 int r;
400
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300401 r = hdmi_init_regulator();
402 if (r)
403 return r;
404
405 mgr = omap_dss_get_overlay_manager(dssdev->dispc_channel);
406 if (!mgr)
407 return -ENODEV;
408
409 r = dss_mgr_connect(mgr, dssdev);
410 if (r)
411 return r;
412
413 r = omapdss_output_set_device(dssdev, dst);
414 if (r) {
415 DSSERR("failed to connect output to new device: %s\n",
416 dst->name);
417 dss_mgr_disconnect(mgr, dssdev);
418 return r;
419 }
420
421 return 0;
422}
423
424static void hdmi_disconnect(struct omap_dss_device *dssdev,
425 struct omap_dss_device *dst)
426{
Tomi Valkeinen9560dc102013-07-24 13:06:54 +0300427 WARN_ON(dst != dssdev->dst);
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300428
Tomi Valkeinen9560dc102013-07-24 13:06:54 +0300429 if (dst != dssdev->dst)
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300430 return;
431
432 omapdss_output_unset_device(dssdev);
433
434 if (dssdev->manager)
435 dss_mgr_disconnect(dssdev->manager, dssdev);
436}
437
438static int hdmi_read_edid(struct omap_dss_device *dssdev,
439 u8 *edid, int len)
440{
441 bool need_enable;
442 int r;
443
444 need_enable = hdmi.core_enabled == false;
445
446 if (need_enable) {
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300447 r = hdmi_core_enable(dssdev);
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300448 if (r)
449 return r;
450 }
451
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300452 r = read_edid(edid, len);
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300453
454 if (need_enable)
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300455 hdmi_core_disable(dssdev);
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300456
457 return r;
458}
459
Tomi Valkeinenab0aee92014-06-18 14:21:44 +0300460static int hdmi_set_infoframe(struct omap_dss_device *dssdev,
461 const struct hdmi_avi_infoframe *avi)
462{
463 hdmi.cfg.infoframe = *avi;
464 return 0;
465}
466
467static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev,
468 bool hdmi_mode)
469{
470 hdmi.cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI;
471 return 0;
472}
473
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300474static const struct omapdss_hdmi_ops hdmi_ops = {
475 .connect = hdmi_connect,
476 .disconnect = hdmi_disconnect,
477
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300478 .enable = hdmi_display_enable,
479 .disable = hdmi_display_disable,
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300480
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300481 .check_timings = hdmi_display_check_timing,
482 .set_timings = hdmi_display_set_timing,
483 .get_timings = hdmi_display_get_timings,
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300484
485 .read_edid = hdmi_read_edid,
Tomi Valkeinenab0aee92014-06-18 14:21:44 +0300486 .set_infoframe = hdmi_set_infoframe,
487 .set_hdmi_mode = hdmi_set_hdmi_mode,
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300488};
489
Tomi Valkeinen17ae4e82013-04-26 14:48:43 +0300490static void hdmi_init_output(struct platform_device *pdev)
Archit Taneja81b87f52012-09-26 16:30:49 +0530491{
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300492 struct omap_dss_device *out = &hdmi.output;
Archit Taneja81b87f52012-09-26 16:30:49 +0530493
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300494 out->dev = &pdev->dev;
Archit Taneja81b87f52012-09-26 16:30:49 +0530495 out->id = OMAP_DSS_OUTPUT_HDMI;
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300496 out->output_type = OMAP_DISPLAY_TYPE_HDMI;
Tomi Valkeinen7286a082013-02-18 13:06:01 +0200497 out->name = "hdmi.0";
Tomi Valkeinen2eea5ae2013-02-13 11:23:54 +0200498 out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300499 out->ops.hdmi = &hdmi_ops;
Tomi Valkeinenb7328e12013-05-03 11:42:18 +0300500 out->owner = THIS_MODULE;
Archit Taneja81b87f52012-09-26 16:30:49 +0530501
Tomi Valkeinen5d47dbc2013-04-24 13:32:51 +0300502 omapdss_register_output(out);
Archit Taneja81b87f52012-09-26 16:30:49 +0530503}
504
505static void __exit hdmi_uninit_output(struct platform_device *pdev)
506{
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300507 struct omap_dss_device *out = &hdmi.output;
Archit Taneja81b87f52012-09-26 16:30:49 +0530508
Tomi Valkeinen5d47dbc2013-04-24 13:32:51 +0300509 omapdss_unregister_output(out);
Archit Taneja81b87f52012-09-26 16:30:49 +0530510}
511
Tomi Valkeinen2f5dc672014-04-17 12:54:02 +0300512static int hdmi_probe_of(struct platform_device *pdev)
513{
514 struct device_node *node = pdev->dev.of_node;
515 struct device_node *ep;
516 int r;
517
518 ep = omapdss_of_get_first_endpoint(node);
519 if (!ep)
520 return 0;
521
522 r = hdmi_parse_lanes_of(pdev, ep, &hdmi.phy);
523 if (r)
524 goto err;
525
526 of_node_put(ep);
527 return 0;
528
529err:
530 of_node_put(ep);
531 return r;
532}
533
Mythri P Kc3198a52011-03-12 12:04:27 +0530534/* HDMI HW IP initialisation */
Tomi Valkeinen17ae4e82013-04-26 14:48:43 +0300535static int omapdss_hdmihw_probe(struct platform_device *pdev)
Mythri P Kc3198a52011-03-12 12:04:27 +0530536{
Tomi Valkeinen38f3daf2012-05-02 14:55:12 +0300537 int r;
Tomi Valkeinendcf5f722013-10-28 11:47:34 +0200538 int irq;
Mythri P Kc3198a52011-03-12 12:04:27 +0530539
Mythri P Kc3198a52011-03-12 12:04:27 +0530540 hdmi.pdev = pdev;
Jyri Sarha945514b2014-06-27 16:47:00 +0300541 dev_set_drvdata(&pdev->dev, &hdmi);
Mythri P Kc3198a52011-03-12 12:04:27 +0530542
543 mutex_init(&hdmi.lock);
544
Tomi Valkeinen2f5dc672014-04-17 12:54:02 +0300545 if (pdev->dev.of_node) {
546 r = hdmi_probe_of(pdev);
547 if (r)
548 return r;
549 }
550
Archit Taneja275cfa12013-10-08 14:22:03 +0530551 r = hdmi_wp_init(pdev, &hdmi.wp);
Archit Tanejaf382d9e2013-08-06 14:56:55 +0530552 if (r)
553 return r;
Mythri P Kc3198a52011-03-12 12:04:27 +0530554
Tomi Valkeinen03aafa22014-10-16 15:31:38 +0300555 r = hdmi_pll_init(pdev, &hdmi.pll, &hdmi.wp);
Archit Tanejac1577c12013-10-08 12:55:26 +0530556 if (r)
557 return r;
558
Archit Taneja275cfa12013-10-08 14:22:03 +0530559 r = hdmi_phy_init(pdev, &hdmi.phy);
Archit Taneja5cac5ae2013-10-08 13:07:00 +0530560 if (r)
Tomi Valkeinenc84c3a52014-10-22 15:02:17 +0300561 goto err;
Tomi Valkeinenddb1d5c2013-06-06 13:08:35 +0300562
Archit Taneja275cfa12013-10-08 14:22:03 +0530563 r = hdmi4_core_init(pdev, &hdmi.core);
Archit Taneja425f02f2013-10-08 14:16:05 +0530564 if (r)
Tomi Valkeinenc84c3a52014-10-22 15:02:17 +0300565 goto err;
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300566
Tomi Valkeinendcf5f722013-10-28 11:47:34 +0200567 irq = platform_get_irq(pdev, 0);
568 if (irq < 0) {
569 DSSERR("platform_get_irq failed\n");
Tomi Valkeinenc84c3a52014-10-22 15:02:17 +0300570 r = -ENODEV;
571 goto err;
Tomi Valkeinendcf5f722013-10-28 11:47:34 +0200572 }
573
574 r = devm_request_threaded_irq(&pdev->dev, irq,
575 NULL, hdmi_irq_handler,
576 IRQF_ONESHOT, "OMAP HDMI", &hdmi.wp);
577 if (r) {
578 DSSERR("HDMI IRQ request failed\n");
Tomi Valkeinenc84c3a52014-10-22 15:02:17 +0300579 goto err;
Tomi Valkeinendcf5f722013-10-28 11:47:34 +0200580 }
581
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300582 pm_runtime_enable(&pdev->dev);
583
Tomi Valkeinen002d3682013-02-13 12:17:43 +0200584 hdmi_init_output(pdev);
585
Tomi Valkeinene40402c2012-03-02 18:01:07 +0200586 dss_debugfs_create_file("hdmi", hdmi_dump_regs);
587
Tomi Valkeinencca35012012-04-26 14:48:32 +0300588 return 0;
Tomi Valkeinenc84c3a52014-10-22 15:02:17 +0300589err:
590 hdmi_pll_uninit(&hdmi.pll);
591 return r;
Tomi Valkeinencca35012012-04-26 14:48:32 +0300592}
593
Tomi Valkeinen6e7e8f02012-02-17 17:41:13 +0200594static int __exit omapdss_hdmihw_remove(struct platform_device *pdev)
Mythri P Kc3198a52011-03-12 12:04:27 +0530595{
Archit Taneja81b87f52012-09-26 16:30:49 +0530596 hdmi_uninit_output(pdev);
597
Tomi Valkeinenc84c3a52014-10-22 15:02:17 +0300598 hdmi_pll_uninit(&hdmi.pll);
599
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300600 pm_runtime_disable(&pdev->dev);
601
Mythri P Kc3198a52011-03-12 12:04:27 +0530602 return 0;
603}
604
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300605static int hdmi_runtime_suspend(struct device *dev)
606{
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300607 dispc_runtime_put();
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300608
609 return 0;
610}
611
612static int hdmi_runtime_resume(struct device *dev)
613{
614 int r;
615
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300616 r = dispc_runtime_get();
617 if (r < 0)
Tomi Valkeinen852f0832012-02-17 17:58:04 +0200618 return r;
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300619
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300620 return 0;
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300621}
622
623static const struct dev_pm_ops hdmi_pm_ops = {
624 .runtime_suspend = hdmi_runtime_suspend,
625 .runtime_resume = hdmi_runtime_resume,
626};
627
Tomi Valkeinen04656162013-12-16 15:14:04 +0200628static const struct of_device_id hdmi_of_match[] = {
629 { .compatible = "ti,omap4-hdmi", },
630 {},
631};
632
Mythri P Kc3198a52011-03-12 12:04:27 +0530633static struct platform_driver omapdss_hdmihw_driver = {
Tomi Valkeinen17ae4e82013-04-26 14:48:43 +0300634 .probe = omapdss_hdmihw_probe,
Tomi Valkeinen6e7e8f02012-02-17 17:41:13 +0200635 .remove = __exit_p(omapdss_hdmihw_remove),
Mythri P Kc3198a52011-03-12 12:04:27 +0530636 .driver = {
637 .name = "omapdss_hdmi",
638 .owner = THIS_MODULE,
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300639 .pm = &hdmi_pm_ops,
Tomi Valkeinen04656162013-12-16 15:14:04 +0200640 .of_match_table = hdmi_of_match,
Tomi Valkeinen422ccbd2014-10-16 09:54:25 +0300641 .suppress_bind_attrs = true,
Mythri P Kc3198a52011-03-12 12:04:27 +0530642 },
643};
644
Archit Tanejaef269582013-09-12 17:45:57 +0530645int __init hdmi4_init_platform_driver(void)
Mythri P Kc3198a52011-03-12 12:04:27 +0530646{
Tomi Valkeinen17ae4e82013-04-26 14:48:43 +0300647 return platform_driver_register(&omapdss_hdmihw_driver);
Mythri P Kc3198a52011-03-12 12:04:27 +0530648}
649
Archit Tanejaef269582013-09-12 17:45:57 +0530650void __exit hdmi4_uninit_platform_driver(void)
Mythri P Kc3198a52011-03-12 12:04:27 +0530651{
Tomi Valkeinen04c742c2012-02-23 15:32:37 +0200652 platform_driver_unregister(&omapdss_hdmihw_driver);
Mythri P Kc3198a52011-03-12 12:04:27 +0530653}