H. Peter Anvin | 1965aae | 2008-10-22 22:26:29 -0700 | [diff] [blame] | 1 | #ifndef _ASM_X86_MMU_CONTEXT_H |
| 2 | #define _ASM_X86_MMU_CONTEXT_H |
Jeremy Fitzhardinge | c3c2fee | 2008-06-25 00:19:07 -0400 | [diff] [blame] | 3 | |
| 4 | #include <asm/desc.h> |
| 5 | #include <asm/atomic.h> |
| 6 | #include <asm/pgalloc.h> |
| 7 | #include <asm/tlbflush.h> |
| 8 | #include <asm/paravirt.h> |
| 9 | #ifndef CONFIG_PARAVIRT |
| 10 | #include <asm-generic/mm_hooks.h> |
| 11 | |
| 12 | static inline void paravirt_activate_mm(struct mm_struct *prev, |
| 13 | struct mm_struct *next) |
| 14 | { |
| 15 | } |
| 16 | #endif /* !CONFIG_PARAVIRT */ |
| 17 | |
| 18 | /* |
| 19 | * Used for LDT copy/destruction. |
| 20 | */ |
| 21 | int init_new_context(struct task_struct *tsk, struct mm_struct *mm); |
| 22 | void destroy_context(struct mm_struct *mm); |
| 23 | |
Brian Gerst | 6826c8f | 2009-01-21 17:26:06 +0900 | [diff] [blame] | 24 | |
| 25 | static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) |
| 26 | { |
| 27 | #ifdef CONFIG_SMP |
| 28 | if (percpu_read(cpu_tlbstate.state) == TLBSTATE_OK) |
| 29 | percpu_write(cpu_tlbstate.state, TLBSTATE_LAZY); |
Thomas Gleixner | 96a388d | 2007-10-11 11:20:03 +0200 | [diff] [blame] | 30 | #endif |
Brian Gerst | 6826c8f | 2009-01-21 17:26:06 +0900 | [diff] [blame] | 31 | } |
| 32 | |
| 33 | static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, |
| 34 | struct task_struct *tsk) |
| 35 | { |
| 36 | unsigned cpu = smp_processor_id(); |
| 37 | |
| 38 | if (likely(prev != next)) { |
| 39 | /* stop flush ipis for the previous mm */ |
Rusty Russell | 78f1c4d | 2009-09-24 09:34:51 -0600 | [diff] [blame] | 40 | cpumask_clear_cpu(cpu, mm_cpumask(prev)); |
Brian Gerst | 6826c8f | 2009-01-21 17:26:06 +0900 | [diff] [blame] | 41 | #ifdef CONFIG_SMP |
| 42 | percpu_write(cpu_tlbstate.state, TLBSTATE_OK); |
| 43 | percpu_write(cpu_tlbstate.active_mm, next); |
| 44 | #endif |
Rusty Russell | 78f1c4d | 2009-09-24 09:34:51 -0600 | [diff] [blame] | 45 | cpumask_set_cpu(cpu, mm_cpumask(next)); |
Brian Gerst | 6826c8f | 2009-01-21 17:26:06 +0900 | [diff] [blame] | 46 | |
| 47 | /* Re-load page tables */ |
| 48 | load_cr3(next->pgd); |
| 49 | |
| 50 | /* |
| 51 | * load the LDT, if the LDT is different: |
| 52 | */ |
| 53 | if (unlikely(prev->context.ldt != next->context.ldt)) |
| 54 | load_LDT_nolock(&next->context); |
| 55 | } |
| 56 | #ifdef CONFIG_SMP |
| 57 | else { |
| 58 | percpu_write(cpu_tlbstate.state, TLBSTATE_OK); |
| 59 | BUG_ON(percpu_read(cpu_tlbstate.active_mm) != next); |
| 60 | |
Rusty Russell | 78f1c4d | 2009-09-24 09:34:51 -0600 | [diff] [blame] | 61 | if (!cpumask_test_and_set_cpu(cpu, mm_cpumask(next))) { |
Brian Gerst | 6826c8f | 2009-01-21 17:26:06 +0900 | [diff] [blame] | 62 | /* We were in lazy tlb mode and leave_mm disabled |
| 63 | * tlb flush IPI delivery. We must reload CR3 |
| 64 | * to make sure to use no freed page tables. |
| 65 | */ |
| 66 | load_cr3(next->pgd); |
| 67 | load_LDT_nolock(&next->context); |
| 68 | } |
| 69 | } |
| 70 | #endif |
| 71 | } |
Jeremy Fitzhardinge | c3c2fee | 2008-06-25 00:19:07 -0400 | [diff] [blame] | 72 | |
| 73 | #define activate_mm(prev, next) \ |
| 74 | do { \ |
| 75 | paravirt_activate_mm((prev), (next)); \ |
| 76 | switch_mm((prev), (next), NULL); \ |
| 77 | } while (0); |
| 78 | |
Brian Gerst | 6826c8f | 2009-01-21 17:26:06 +0900 | [diff] [blame] | 79 | #ifdef CONFIG_X86_32 |
| 80 | #define deactivate_mm(tsk, mm) \ |
| 81 | do { \ |
Tejun Heo | ccbeed3 | 2009-02-09 22:17:40 +0900 | [diff] [blame] | 82 | lazy_load_gs(0); \ |
Brian Gerst | 6826c8f | 2009-01-21 17:26:06 +0900 | [diff] [blame] | 83 | } while (0) |
| 84 | #else |
| 85 | #define deactivate_mm(tsk, mm) \ |
| 86 | do { \ |
| 87 | load_gs_index(0); \ |
| 88 | loadsegment(fs, 0); \ |
| 89 | } while (0) |
| 90 | #endif |
Jeremy Fitzhardinge | c3c2fee | 2008-06-25 00:19:07 -0400 | [diff] [blame] | 91 | |
H. Peter Anvin | 1965aae | 2008-10-22 22:26:29 -0700 | [diff] [blame] | 92 | #endif /* _ASM_X86_MMU_CONTEXT_H */ |