Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 1 | /* |
| 2 | * FCC driver for Motorola MPC82xx (PQ2). |
| 3 | * |
Vitaly Bordug | 9b8ee8e | 2007-09-18 20:05:35 +0400 | [diff] [blame] | 4 | * Copyright (c) 2003 Intracom S.A. |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 5 | * by Pantelis Antoniou <panto@intracom.gr> |
| 6 | * |
Vitaly Bordug | 9b8ee8e | 2007-09-18 20:05:35 +0400 | [diff] [blame] | 7 | * 2005 (c) MontaVista Software, Inc. |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 8 | * Vitaly Bordug <vbordug@ru.mvista.com> |
| 9 | * |
Vitaly Bordug | 9b8ee8e | 2007-09-18 20:05:35 +0400 | [diff] [blame] | 10 | * This file is licensed under the terms of the GNU General Public License |
| 11 | * version 2. This program is licensed "as is" without any warranty of any |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 12 | * kind, whether express or implied. |
| 13 | */ |
| 14 | |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 15 | #include <linux/module.h> |
| 16 | #include <linux/kernel.h> |
| 17 | #include <linux/types.h> |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 18 | #include <linux/string.h> |
| 19 | #include <linux/ptrace.h> |
| 20 | #include <linux/errno.h> |
| 21 | #include <linux/ioport.h> |
| 22 | #include <linux/slab.h> |
| 23 | #include <linux/interrupt.h> |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 24 | #include <linux/init.h> |
| 25 | #include <linux/delay.h> |
| 26 | #include <linux/netdevice.h> |
| 27 | #include <linux/etherdevice.h> |
| 28 | #include <linux/skbuff.h> |
| 29 | #include <linux/spinlock.h> |
| 30 | #include <linux/mii.h> |
| 31 | #include <linux/ethtool.h> |
| 32 | #include <linux/bitops.h> |
| 33 | #include <linux/fs.h> |
Marcelo Tosatti | f7b9996 | 2005-11-09 11:00:16 -0200 | [diff] [blame] | 34 | #include <linux/platform_device.h> |
Vitaly Bordug | 5b4b845 | 2006-08-14 23:00:30 -0700 | [diff] [blame] | 35 | #include <linux/phy.h> |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 36 | |
| 37 | #include <asm/immap_cpm2.h> |
| 38 | #include <asm/mpc8260.h> |
| 39 | #include <asm/cpm2.h> |
| 40 | |
| 41 | #include <asm/pgtable.h> |
| 42 | #include <asm/irq.h> |
| 43 | #include <asm/uaccess.h> |
| 44 | |
Scott Wood | 976de6a | 2007-10-02 10:55:58 -0500 | [diff] [blame] | 45 | #ifdef CONFIG_PPC_CPM_NEW_BINDING |
| 46 | #include <asm/of_device.h> |
| 47 | #endif |
| 48 | |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 49 | #include "fs_enet.h" |
| 50 | |
| 51 | /*************************************************/ |
| 52 | |
| 53 | /* FCC access macros */ |
| 54 | |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 55 | /* write, read, set bits, clear bits */ |
Scott Wood | c656533 | 2007-10-01 14:20:50 -0500 | [diff] [blame] | 56 | #define W32(_p, _m, _v) out_be32(&(_p)->_m, (_v)) |
| 57 | #define R32(_p, _m) in_be32(&(_p)->_m) |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 58 | #define S32(_p, _m, _v) W32(_p, _m, R32(_p, _m) | (_v)) |
| 59 | #define C32(_p, _m, _v) W32(_p, _m, R32(_p, _m) & ~(_v)) |
| 60 | |
Scott Wood | c656533 | 2007-10-01 14:20:50 -0500 | [diff] [blame] | 61 | #define W16(_p, _m, _v) out_be16(&(_p)->_m, (_v)) |
| 62 | #define R16(_p, _m) in_be16(&(_p)->_m) |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 63 | #define S16(_p, _m, _v) W16(_p, _m, R16(_p, _m) | (_v)) |
| 64 | #define C16(_p, _m, _v) W16(_p, _m, R16(_p, _m) & ~(_v)) |
| 65 | |
Scott Wood | c656533 | 2007-10-01 14:20:50 -0500 | [diff] [blame] | 66 | #define W8(_p, _m, _v) out_8(&(_p)->_m, (_v)) |
| 67 | #define R8(_p, _m) in_8(&(_p)->_m) |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 68 | #define S8(_p, _m, _v) W8(_p, _m, R8(_p, _m) | (_v)) |
| 69 | #define C8(_p, _m, _v) W8(_p, _m, R8(_p, _m) & ~(_v)) |
| 70 | |
| 71 | /*************************************************/ |
| 72 | |
| 73 | #define FCC_MAX_MULTICAST_ADDRS 64 |
| 74 | |
| 75 | #define mk_mii_read(REG) (0x60020000 | ((REG & 0x1f) << 18)) |
| 76 | #define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | (VAL & 0xffff)) |
| 77 | #define mk_mii_end 0 |
| 78 | |
| 79 | #define MAX_CR_CMD_LOOPS 10000 |
| 80 | |
Scott Wood | 976de6a | 2007-10-02 10:55:58 -0500 | [diff] [blame] | 81 | static inline int fcc_cr_cmd(struct fs_enet_private *fep, u32 op) |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 82 | { |
| 83 | const struct fs_platform_info *fpi = fep->fpi; |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 84 | |
Jochen Friedrich | 362f9b6 | 2007-11-26 18:03:40 +0100 | [diff] [blame] | 85 | return cpm_command(fpi->cp_command, op); |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 86 | } |
| 87 | |
| 88 | static int do_pd_setup(struct fs_enet_private *fep) |
| 89 | { |
Scott Wood | 976de6a | 2007-10-02 10:55:58 -0500 | [diff] [blame] | 90 | #ifdef CONFIG_PPC_CPM_NEW_BINDING |
| 91 | struct of_device *ofdev = to_of_device(fep->dev); |
| 92 | struct fs_platform_info *fpi = fep->fpi; |
| 93 | int ret = -EINVAL; |
| 94 | |
| 95 | fep->interrupt = of_irq_to_resource(ofdev->node, 0, NULL); |
| 96 | if (fep->interrupt == NO_IRQ) |
| 97 | goto out; |
| 98 | |
| 99 | fep->fcc.fccp = of_iomap(ofdev->node, 0); |
| 100 | if (!fep->fcc.fccp) |
| 101 | goto out; |
| 102 | |
| 103 | fep->fcc.ep = of_iomap(ofdev->node, 1); |
| 104 | if (!fep->fcc.ep) |
| 105 | goto out_fccp; |
| 106 | |
| 107 | fep->fcc.fcccp = of_iomap(ofdev->node, 2); |
| 108 | if (!fep->fcc.fcccp) |
| 109 | goto out_ep; |
| 110 | |
Scott Wood | 31a5bb0 | 2007-10-01 14:20:58 -0500 | [diff] [blame] | 111 | fep->fcc.mem = (void __iomem *)cpm2_immr; |
| 112 | fpi->dpram_offset = cpm_dpalloc(128, 8); |
Scott Wood | 976de6a | 2007-10-02 10:55:58 -0500 | [diff] [blame] | 113 | if (IS_ERR_VALUE(fpi->dpram_offset)) { |
| 114 | ret = fpi->dpram_offset; |
| 115 | goto out_fcccp; |
| 116 | } |
| 117 | |
| 118 | return 0; |
| 119 | |
| 120 | out_fcccp: |
| 121 | iounmap(fep->fcc.fcccp); |
| 122 | out_ep: |
| 123 | iounmap(fep->fcc.ep); |
| 124 | out_fccp: |
| 125 | iounmap(fep->fcc.fccp); |
| 126 | out: |
| 127 | return ret; |
| 128 | #else |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 129 | struct platform_device *pdev = to_platform_device(fep->dev); |
| 130 | struct resource *r; |
| 131 | |
| 132 | /* Fill out IRQ field */ |
| 133 | fep->interrupt = platform_get_irq(pdev, 0); |
David Vrabel | 4894473 | 2006-01-19 17:56:29 +0000 | [diff] [blame] | 134 | if (fep->interrupt < 0) |
| 135 | return -EINVAL; |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 136 | |
| 137 | /* Attach the memory for the FCC Parameter RAM */ |
| 138 | r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "fcc_pram"); |
Scott Wood | 31a5bb0 | 2007-10-01 14:20:58 -0500 | [diff] [blame] | 139 | fep->fcc.ep = ioremap(r->start, r->end - r->start + 1); |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 140 | if (fep->fcc.ep == NULL) |
| 141 | return -EINVAL; |
| 142 | |
| 143 | r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "fcc_regs"); |
Scott Wood | 31a5bb0 | 2007-10-01 14:20:58 -0500 | [diff] [blame] | 144 | fep->fcc.fccp = ioremap(r->start, r->end - r->start + 1); |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 145 | if (fep->fcc.fccp == NULL) |
| 146 | return -EINVAL; |
| 147 | |
Vitaly Bordug | 5b4b845 | 2006-08-14 23:00:30 -0700 | [diff] [blame] | 148 | if (fep->fpi->fcc_regs_c) { |
Scott Wood | 31a5bb0 | 2007-10-01 14:20:58 -0500 | [diff] [blame] | 149 | fep->fcc.fcccp = (void __iomem *)fep->fpi->fcc_regs_c; |
Vitaly Bordug | 5b4b845 | 2006-08-14 23:00:30 -0700 | [diff] [blame] | 150 | } else { |
| 151 | r = platform_get_resource_byname(pdev, IORESOURCE_MEM, |
| 152 | "fcc_regs_c"); |
Scott Wood | 31a5bb0 | 2007-10-01 14:20:58 -0500 | [diff] [blame] | 153 | fep->fcc.fcccp = ioremap(r->start, |
Vitaly Bordug | 5b4b845 | 2006-08-14 23:00:30 -0700 | [diff] [blame] | 154 | r->end - r->start + 1); |
| 155 | } |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 156 | |
| 157 | if (fep->fcc.fcccp == NULL) |
| 158 | return -EINVAL; |
| 159 | |
Scott Wood | 31a5bb0 | 2007-10-01 14:20:58 -0500 | [diff] [blame] | 160 | fep->fcc.mem = (void __iomem *)fep->fpi->mem_offset; |
Vitaly Bordug | 5b4b845 | 2006-08-14 23:00:30 -0700 | [diff] [blame] | 161 | if (fep->fcc.mem == NULL) |
| 162 | return -EINVAL; |
| 163 | |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 164 | return 0; |
Scott Wood | 976de6a | 2007-10-02 10:55:58 -0500 | [diff] [blame] | 165 | #endif |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 166 | } |
| 167 | |
| 168 | #define FCC_NAPI_RX_EVENT_MSK (FCC_ENET_RXF | FCC_ENET_RXB) |
| 169 | #define FCC_RX_EVENT (FCC_ENET_RXF) |
| 170 | #define FCC_TX_EVENT (FCC_ENET_TXB) |
| 171 | #define FCC_ERR_EVENT_MSK (FCC_ENET_TXE | FCC_ENET_BSY) |
| 172 | |
| 173 | static int setup_data(struct net_device *dev) |
| 174 | { |
| 175 | struct fs_enet_private *fep = netdev_priv(dev); |
Scott Wood | 976de6a | 2007-10-02 10:55:58 -0500 | [diff] [blame] | 176 | #ifndef CONFIG_PPC_CPM_NEW_BINDING |
| 177 | struct fs_platform_info *fpi = fep->fpi; |
| 178 | |
| 179 | fpi->cp_command = (fpi->cp_page << 26) | |
| 180 | (fpi->cp_block << 21) | |
| 181 | (12 << 6); |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 182 | |
| 183 | fep->fcc.idx = fs_get_fcc_index(fpi->fs_no); |
| 184 | if ((unsigned int)fep->fcc.idx >= 3) /* max 3 FCCs */ |
| 185 | return -EINVAL; |
Scott Wood | 976de6a | 2007-10-02 10:55:58 -0500 | [diff] [blame] | 186 | #endif |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 187 | |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 188 | if (do_pd_setup(fep) != 0) |
| 189 | return -EINVAL; |
| 190 | |
| 191 | fep->ev_napi_rx = FCC_NAPI_RX_EVENT_MSK; |
| 192 | fep->ev_rx = FCC_RX_EVENT; |
| 193 | fep->ev_tx = FCC_TX_EVENT; |
| 194 | fep->ev_err = FCC_ERR_EVENT_MSK; |
| 195 | |
| 196 | return 0; |
| 197 | } |
| 198 | |
| 199 | static int allocate_bd(struct net_device *dev) |
| 200 | { |
| 201 | struct fs_enet_private *fep = netdev_priv(dev); |
| 202 | const struct fs_platform_info *fpi = fep->fpi; |
| 203 | |
Scott Wood | 31a5bb0 | 2007-10-01 14:20:58 -0500 | [diff] [blame] | 204 | fep->ring_base = (void __iomem __force *)dma_alloc_coherent(fep->dev, |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 205 | (fpi->tx_ring + fpi->rx_ring) * |
| 206 | sizeof(cbd_t), &fep->ring_mem_addr, |
| 207 | GFP_KERNEL); |
| 208 | if (fep->ring_base == NULL) |
| 209 | return -ENOMEM; |
| 210 | |
| 211 | return 0; |
| 212 | } |
| 213 | |
| 214 | static void free_bd(struct net_device *dev) |
| 215 | { |
| 216 | struct fs_enet_private *fep = netdev_priv(dev); |
| 217 | const struct fs_platform_info *fpi = fep->fpi; |
| 218 | |
| 219 | if (fep->ring_base) |
| 220 | dma_free_coherent(fep->dev, |
| 221 | (fpi->tx_ring + fpi->rx_ring) * sizeof(cbd_t), |
Scott Wood | 31a5bb0 | 2007-10-01 14:20:58 -0500 | [diff] [blame] | 222 | (void __force *)fep->ring_base, fep->ring_mem_addr); |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 223 | } |
| 224 | |
| 225 | static void cleanup_data(struct net_device *dev) |
| 226 | { |
| 227 | /* nothing */ |
| 228 | } |
| 229 | |
| 230 | static void set_promiscuous_mode(struct net_device *dev) |
| 231 | { |
| 232 | struct fs_enet_private *fep = netdev_priv(dev); |
Scott Wood | 31a5bb0 | 2007-10-01 14:20:58 -0500 | [diff] [blame] | 233 | fcc_t __iomem *fccp = fep->fcc.fccp; |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 234 | |
| 235 | S32(fccp, fcc_fpsmr, FCC_PSMR_PRO); |
| 236 | } |
| 237 | |
| 238 | static void set_multicast_start(struct net_device *dev) |
| 239 | { |
| 240 | struct fs_enet_private *fep = netdev_priv(dev); |
Scott Wood | 31a5bb0 | 2007-10-01 14:20:58 -0500 | [diff] [blame] | 241 | fcc_enet_t __iomem *ep = fep->fcc.ep; |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 242 | |
| 243 | W32(ep, fen_gaddrh, 0); |
| 244 | W32(ep, fen_gaddrl, 0); |
| 245 | } |
| 246 | |
| 247 | static void set_multicast_one(struct net_device *dev, const u8 *mac) |
| 248 | { |
| 249 | struct fs_enet_private *fep = netdev_priv(dev); |
Scott Wood | 31a5bb0 | 2007-10-01 14:20:58 -0500 | [diff] [blame] | 250 | fcc_enet_t __iomem *ep = fep->fcc.ep; |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 251 | u16 taddrh, taddrm, taddrl; |
| 252 | |
| 253 | taddrh = ((u16)mac[5] << 8) | mac[4]; |
| 254 | taddrm = ((u16)mac[3] << 8) | mac[2]; |
| 255 | taddrl = ((u16)mac[1] << 8) | mac[0]; |
| 256 | |
| 257 | W16(ep, fen_taddrh, taddrh); |
| 258 | W16(ep, fen_taddrm, taddrm); |
| 259 | W16(ep, fen_taddrl, taddrl); |
Scott Wood | 976de6a | 2007-10-02 10:55:58 -0500 | [diff] [blame] | 260 | fcc_cr_cmd(fep, CPM_CR_SET_GADDR); |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 261 | } |
| 262 | |
| 263 | static void set_multicast_finish(struct net_device *dev) |
| 264 | { |
| 265 | struct fs_enet_private *fep = netdev_priv(dev); |
Scott Wood | 31a5bb0 | 2007-10-01 14:20:58 -0500 | [diff] [blame] | 266 | fcc_t __iomem *fccp = fep->fcc.fccp; |
| 267 | fcc_enet_t __iomem *ep = fep->fcc.ep; |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 268 | |
| 269 | /* clear promiscuous always */ |
| 270 | C32(fccp, fcc_fpsmr, FCC_PSMR_PRO); |
| 271 | |
| 272 | /* if all multi or too many multicasts; just enable all */ |
| 273 | if ((dev->flags & IFF_ALLMULTI) != 0 || |
| 274 | dev->mc_count > FCC_MAX_MULTICAST_ADDRS) { |
| 275 | |
| 276 | W32(ep, fen_gaddrh, 0xffffffff); |
| 277 | W32(ep, fen_gaddrl, 0xffffffff); |
| 278 | } |
| 279 | |
| 280 | /* read back */ |
| 281 | fep->fcc.gaddrh = R32(ep, fen_gaddrh); |
| 282 | fep->fcc.gaddrl = R32(ep, fen_gaddrl); |
| 283 | } |
| 284 | |
| 285 | static void set_multicast_list(struct net_device *dev) |
| 286 | { |
| 287 | struct dev_mc_list *pmc; |
| 288 | |
| 289 | if ((dev->flags & IFF_PROMISC) == 0) { |
| 290 | set_multicast_start(dev); |
| 291 | for (pmc = dev->mc_list; pmc != NULL; pmc = pmc->next) |
| 292 | set_multicast_one(dev, pmc->dmi_addr); |
| 293 | set_multicast_finish(dev); |
| 294 | } else |
| 295 | set_promiscuous_mode(dev); |
| 296 | } |
| 297 | |
| 298 | static void restart(struct net_device *dev) |
| 299 | { |
| 300 | struct fs_enet_private *fep = netdev_priv(dev); |
| 301 | const struct fs_platform_info *fpi = fep->fpi; |
Scott Wood | 31a5bb0 | 2007-10-01 14:20:58 -0500 | [diff] [blame] | 302 | fcc_t __iomem *fccp = fep->fcc.fccp; |
| 303 | fcc_c_t __iomem *fcccp = fep->fcc.fcccp; |
| 304 | fcc_enet_t __iomem *ep = fep->fcc.ep; |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 305 | dma_addr_t rx_bd_base_phys, tx_bd_base_phys; |
| 306 | u16 paddrh, paddrm, paddrl; |
Scott Wood | 31a5bb0 | 2007-10-01 14:20:58 -0500 | [diff] [blame] | 307 | #ifndef CONFIG_PPC_CPM_NEW_BINDING |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 308 | u16 mem_addr; |
Scott Wood | 31a5bb0 | 2007-10-01 14:20:58 -0500 | [diff] [blame] | 309 | #endif |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 310 | const unsigned char *mac; |
| 311 | int i; |
| 312 | |
| 313 | C32(fccp, fcc_gfmr, FCC_GFMR_ENR | FCC_GFMR_ENT); |
| 314 | |
| 315 | /* clear everything (slow & steady does it) */ |
| 316 | for (i = 0; i < sizeof(*ep); i++) |
Scott Wood | 976de6a | 2007-10-02 10:55:58 -0500 | [diff] [blame] | 317 | out_8((u8 __iomem *)ep + i, 0); |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 318 | |
| 319 | /* get physical address */ |
| 320 | rx_bd_base_phys = fep->ring_mem_addr; |
| 321 | tx_bd_base_phys = rx_bd_base_phys + sizeof(cbd_t) * fpi->rx_ring; |
| 322 | |
| 323 | /* point to bds */ |
| 324 | W32(ep, fen_genfcc.fcc_rbase, rx_bd_base_phys); |
| 325 | W32(ep, fen_genfcc.fcc_tbase, tx_bd_base_phys); |
| 326 | |
| 327 | /* Set maximum bytes per receive buffer. |
| 328 | * It must be a multiple of 32. |
| 329 | */ |
| 330 | W16(ep, fen_genfcc.fcc_mrblr, PKT_MAXBLR_SIZE); |
| 331 | |
| 332 | W32(ep, fen_genfcc.fcc_rstate, (CPMFCR_GBL | CPMFCR_EB) << 24); |
| 333 | W32(ep, fen_genfcc.fcc_tstate, (CPMFCR_GBL | CPMFCR_EB) << 24); |
| 334 | |
| 335 | /* Allocate space in the reserved FCC area of DPRAM for the |
| 336 | * internal buffers. No one uses this space (yet), so we |
| 337 | * can do this. Later, we will add resource management for |
| 338 | * this area. |
| 339 | */ |
| 340 | |
Scott Wood | 31a5bb0 | 2007-10-01 14:20:58 -0500 | [diff] [blame] | 341 | #ifdef CONFIG_PPC_CPM_NEW_BINDING |
| 342 | W16(ep, fen_genfcc.fcc_riptr, fpi->dpram_offset); |
| 343 | W16(ep, fen_genfcc.fcc_tiptr, fpi->dpram_offset + 32); |
| 344 | |
| 345 | W16(ep, fen_padptr, fpi->dpram_offset + 64); |
| 346 | #else |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 347 | mem_addr = (u32) fep->fcc.mem; /* de-fixup dpram offset */ |
| 348 | |
| 349 | W16(ep, fen_genfcc.fcc_riptr, (mem_addr & 0xffff)); |
| 350 | W16(ep, fen_genfcc.fcc_tiptr, ((mem_addr + 32) & 0xffff)); |
Scott Wood | 31a5bb0 | 2007-10-01 14:20:58 -0500 | [diff] [blame] | 351 | |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 352 | W16(ep, fen_padptr, mem_addr + 64); |
Scott Wood | 31a5bb0 | 2007-10-01 14:20:58 -0500 | [diff] [blame] | 353 | #endif |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 354 | |
| 355 | /* fill with special symbol... */ |
Scott Wood | 31a5bb0 | 2007-10-01 14:20:58 -0500 | [diff] [blame] | 356 | memset_io(fep->fcc.mem + fpi->dpram_offset + 64, 0x88, 32); |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 357 | |
| 358 | W32(ep, fen_genfcc.fcc_rbptr, 0); |
| 359 | W32(ep, fen_genfcc.fcc_tbptr, 0); |
| 360 | W32(ep, fen_genfcc.fcc_rcrc, 0); |
| 361 | W32(ep, fen_genfcc.fcc_tcrc, 0); |
| 362 | W16(ep, fen_genfcc.fcc_res1, 0); |
| 363 | W32(ep, fen_genfcc.fcc_res2, 0); |
| 364 | |
| 365 | /* no CAM */ |
| 366 | W32(ep, fen_camptr, 0); |
| 367 | |
| 368 | /* Set CRC preset and mask */ |
| 369 | W32(ep, fen_cmask, 0xdebb20e3); |
| 370 | W32(ep, fen_cpres, 0xffffffff); |
| 371 | |
| 372 | W32(ep, fen_crcec, 0); /* CRC Error counter */ |
| 373 | W32(ep, fen_alec, 0); /* alignment error counter */ |
| 374 | W32(ep, fen_disfc, 0); /* discard frame counter */ |
| 375 | W16(ep, fen_retlim, 15); /* Retry limit threshold */ |
| 376 | W16(ep, fen_pper, 0); /* Normal persistence */ |
| 377 | |
| 378 | /* set group address */ |
| 379 | W32(ep, fen_gaddrh, fep->fcc.gaddrh); |
| 380 | W32(ep, fen_gaddrl, fep->fcc.gaddrh); |
| 381 | |
| 382 | /* Clear hash filter tables */ |
| 383 | W32(ep, fen_iaddrh, 0); |
| 384 | W32(ep, fen_iaddrl, 0); |
| 385 | |
| 386 | /* Clear the Out-of-sequence TxBD */ |
| 387 | W16(ep, fen_tfcstat, 0); |
| 388 | W16(ep, fen_tfclen, 0); |
| 389 | W32(ep, fen_tfcptr, 0); |
| 390 | |
| 391 | W16(ep, fen_mflr, PKT_MAXBUF_SIZE); /* maximum frame length register */ |
| 392 | W16(ep, fen_minflr, PKT_MINBUF_SIZE); /* minimum frame length register */ |
| 393 | |
| 394 | /* set address */ |
| 395 | mac = dev->dev_addr; |
| 396 | paddrh = ((u16)mac[5] << 8) | mac[4]; |
| 397 | paddrm = ((u16)mac[3] << 8) | mac[2]; |
| 398 | paddrl = ((u16)mac[1] << 8) | mac[0]; |
| 399 | |
| 400 | W16(ep, fen_paddrh, paddrh); |
| 401 | W16(ep, fen_paddrm, paddrm); |
| 402 | W16(ep, fen_paddrl, paddrl); |
| 403 | |
| 404 | W16(ep, fen_taddrh, 0); |
| 405 | W16(ep, fen_taddrm, 0); |
| 406 | W16(ep, fen_taddrl, 0); |
| 407 | |
| 408 | W16(ep, fen_maxd1, 1520); /* maximum DMA1 length */ |
| 409 | W16(ep, fen_maxd2, 1520); /* maximum DMA2 length */ |
| 410 | |
| 411 | /* Clear stat counters, in case we ever enable RMON */ |
| 412 | W32(ep, fen_octc, 0); |
| 413 | W32(ep, fen_colc, 0); |
| 414 | W32(ep, fen_broc, 0); |
| 415 | W32(ep, fen_mulc, 0); |
| 416 | W32(ep, fen_uspc, 0); |
| 417 | W32(ep, fen_frgc, 0); |
| 418 | W32(ep, fen_ospc, 0); |
| 419 | W32(ep, fen_jbrc, 0); |
| 420 | W32(ep, fen_p64c, 0); |
| 421 | W32(ep, fen_p65c, 0); |
| 422 | W32(ep, fen_p128c, 0); |
| 423 | W32(ep, fen_p256c, 0); |
| 424 | W32(ep, fen_p512c, 0); |
| 425 | W32(ep, fen_p1024c, 0); |
| 426 | |
| 427 | W16(ep, fen_rfthr, 0); /* Suggested by manual */ |
| 428 | W16(ep, fen_rfcnt, 0); |
| 429 | W16(ep, fen_cftype, 0); |
| 430 | |
| 431 | fs_init_bds(dev); |
| 432 | |
| 433 | /* adjust to speed (for RMII mode) */ |
| 434 | if (fpi->use_rmii) { |
Vitaly Bordug | 5b4b845 | 2006-08-14 23:00:30 -0700 | [diff] [blame] | 435 | if (fep->phydev->speed == 100) |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 436 | C8(fcccp, fcc_gfemr, 0x20); |
| 437 | else |
| 438 | S8(fcccp, fcc_gfemr, 0x20); |
| 439 | } |
| 440 | |
Scott Wood | 976de6a | 2007-10-02 10:55:58 -0500 | [diff] [blame] | 441 | fcc_cr_cmd(fep, CPM_CR_INIT_TRX); |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 442 | |
| 443 | /* clear events */ |
| 444 | W16(fccp, fcc_fcce, 0xffff); |
| 445 | |
| 446 | /* Enable interrupts we wish to service */ |
| 447 | W16(fccp, fcc_fccm, FCC_ENET_TXE | FCC_ENET_RXF | FCC_ENET_TXB); |
| 448 | |
| 449 | /* Set GFMR to enable Ethernet operating mode */ |
| 450 | W32(fccp, fcc_gfmr, FCC_GFMR_TCI | FCC_GFMR_MODE_ENET); |
| 451 | |
| 452 | /* set sync/delimiters */ |
| 453 | W16(fccp, fcc_fdsr, 0xd555); |
| 454 | |
| 455 | W32(fccp, fcc_fpsmr, FCC_PSMR_ENCRC); |
| 456 | |
| 457 | if (fpi->use_rmii) |
| 458 | S32(fccp, fcc_fpsmr, FCC_PSMR_RMII); |
| 459 | |
| 460 | /* adjust to duplex mode */ |
Vitaly Bordug | 5b4b845 | 2006-08-14 23:00:30 -0700 | [diff] [blame] | 461 | if (fep->phydev->duplex) |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 462 | S32(fccp, fcc_fpsmr, FCC_PSMR_FDE | FCC_PSMR_LPB); |
| 463 | else |
| 464 | C32(fccp, fcc_fpsmr, FCC_PSMR_FDE | FCC_PSMR_LPB); |
| 465 | |
| 466 | S32(fccp, fcc_gfmr, FCC_GFMR_ENR | FCC_GFMR_ENT); |
| 467 | } |
| 468 | |
| 469 | static void stop(struct net_device *dev) |
| 470 | { |
| 471 | struct fs_enet_private *fep = netdev_priv(dev); |
Scott Wood | 31a5bb0 | 2007-10-01 14:20:58 -0500 | [diff] [blame] | 472 | fcc_t __iomem *fccp = fep->fcc.fccp; |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 473 | |
| 474 | /* stop ethernet */ |
| 475 | C32(fccp, fcc_gfmr, FCC_GFMR_ENR | FCC_GFMR_ENT); |
| 476 | |
| 477 | /* clear events */ |
| 478 | W16(fccp, fcc_fcce, 0xffff); |
| 479 | |
| 480 | /* clear interrupt mask */ |
| 481 | W16(fccp, fcc_fccm, 0); |
| 482 | |
| 483 | fs_cleanup_bds(dev); |
| 484 | } |
| 485 | |
| 486 | static void pre_request_irq(struct net_device *dev, int irq) |
| 487 | { |
| 488 | /* nothing */ |
| 489 | } |
| 490 | |
| 491 | static void post_free_irq(struct net_device *dev, int irq) |
| 492 | { |
| 493 | /* nothing */ |
| 494 | } |
| 495 | |
| 496 | static void napi_clear_rx_event(struct net_device *dev) |
| 497 | { |
| 498 | struct fs_enet_private *fep = netdev_priv(dev); |
Scott Wood | 31a5bb0 | 2007-10-01 14:20:58 -0500 | [diff] [blame] | 499 | fcc_t __iomem *fccp = fep->fcc.fccp; |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 500 | |
| 501 | W16(fccp, fcc_fcce, FCC_NAPI_RX_EVENT_MSK); |
| 502 | } |
| 503 | |
| 504 | static void napi_enable_rx(struct net_device *dev) |
| 505 | { |
| 506 | struct fs_enet_private *fep = netdev_priv(dev); |
Scott Wood | 31a5bb0 | 2007-10-01 14:20:58 -0500 | [diff] [blame] | 507 | fcc_t __iomem *fccp = fep->fcc.fccp; |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 508 | |
| 509 | S16(fccp, fcc_fccm, FCC_NAPI_RX_EVENT_MSK); |
| 510 | } |
| 511 | |
| 512 | static void napi_disable_rx(struct net_device *dev) |
| 513 | { |
| 514 | struct fs_enet_private *fep = netdev_priv(dev); |
Scott Wood | 31a5bb0 | 2007-10-01 14:20:58 -0500 | [diff] [blame] | 515 | fcc_t __iomem *fccp = fep->fcc.fccp; |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 516 | |
| 517 | C16(fccp, fcc_fccm, FCC_NAPI_RX_EVENT_MSK); |
| 518 | } |
| 519 | |
| 520 | static void rx_bd_done(struct net_device *dev) |
| 521 | { |
| 522 | /* nothing */ |
| 523 | } |
| 524 | |
| 525 | static void tx_kickstart(struct net_device *dev) |
| 526 | { |
Vitaly Bordug | 5b4b845 | 2006-08-14 23:00:30 -0700 | [diff] [blame] | 527 | struct fs_enet_private *fep = netdev_priv(dev); |
Scott Wood | 31a5bb0 | 2007-10-01 14:20:58 -0500 | [diff] [blame] | 528 | fcc_t __iomem *fccp = fep->fcc.fccp; |
Vitaly Bordug | 5b4b845 | 2006-08-14 23:00:30 -0700 | [diff] [blame] | 529 | |
Scott Wood | c656533 | 2007-10-01 14:20:50 -0500 | [diff] [blame] | 530 | S16(fccp, fcc_ftodr, 0x8000); |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 531 | } |
| 532 | |
| 533 | static u32 get_int_events(struct net_device *dev) |
| 534 | { |
| 535 | struct fs_enet_private *fep = netdev_priv(dev); |
Scott Wood | 31a5bb0 | 2007-10-01 14:20:58 -0500 | [diff] [blame] | 536 | fcc_t __iomem *fccp = fep->fcc.fccp; |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 537 | |
| 538 | return (u32)R16(fccp, fcc_fcce); |
| 539 | } |
| 540 | |
| 541 | static void clear_int_events(struct net_device *dev, u32 int_events) |
| 542 | { |
| 543 | struct fs_enet_private *fep = netdev_priv(dev); |
Scott Wood | 31a5bb0 | 2007-10-01 14:20:58 -0500 | [diff] [blame] | 544 | fcc_t __iomem *fccp = fep->fcc.fccp; |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 545 | |
| 546 | W16(fccp, fcc_fcce, int_events & 0xffff); |
| 547 | } |
| 548 | |
| 549 | static void ev_error(struct net_device *dev, u32 int_events) |
| 550 | { |
| 551 | printk(KERN_WARNING DRV_MODULE_NAME |
| 552 | ": %s FS_ENET ERROR(s) 0x%x\n", dev->name, int_events); |
| 553 | } |
| 554 | |
Scott Wood | 31a5bb0 | 2007-10-01 14:20:58 -0500 | [diff] [blame] | 555 | static int get_regs(struct net_device *dev, void *p, int *sizep) |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 556 | { |
| 557 | struct fs_enet_private *fep = netdev_priv(dev); |
| 558 | |
Scott Wood | 976de6a | 2007-10-02 10:55:58 -0500 | [diff] [blame] | 559 | if (*sizep < sizeof(fcc_t) + sizeof(fcc_enet_t) + 1) |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 560 | return -EINVAL; |
| 561 | |
| 562 | memcpy_fromio(p, fep->fcc.fccp, sizeof(fcc_t)); |
| 563 | p = (char *)p + sizeof(fcc_t); |
| 564 | |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 565 | memcpy_fromio(p, fep->fcc.ep, sizeof(fcc_enet_t)); |
Scott Wood | 976de6a | 2007-10-02 10:55:58 -0500 | [diff] [blame] | 566 | p = (char *)p + sizeof(fcc_enet_t); |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 567 | |
Scott Wood | 976de6a | 2007-10-02 10:55:58 -0500 | [diff] [blame] | 568 | memcpy_fromio(p, fep->fcc.fcccp, 1); |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 569 | return 0; |
| 570 | } |
| 571 | |
Scott Wood | 31a5bb0 | 2007-10-01 14:20:58 -0500 | [diff] [blame] | 572 | static int get_regs_len(struct net_device *dev) |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 573 | { |
Scott Wood | 976de6a | 2007-10-02 10:55:58 -0500 | [diff] [blame] | 574 | return sizeof(fcc_t) + sizeof(fcc_enet_t) + 1; |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 575 | } |
| 576 | |
| 577 | /* Some transmit errors cause the transmitter to shut |
| 578 | * down. We now issue a restart transmit. Since the |
| 579 | * errors close the BD and update the pointers, the restart |
| 580 | * _should_ pick up without having to reset any of our |
Vitaly Bordug | 9b8ee8e | 2007-09-18 20:05:35 +0400 | [diff] [blame] | 581 | * pointers either. Also, To workaround 8260 device erratum |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 582 | * CPM37, we must disable and then re-enable the transmitter |
| 583 | * following a Late Collision, Underrun, or Retry Limit error. |
| 584 | */ |
Scott Wood | 31a5bb0 | 2007-10-01 14:20:58 -0500 | [diff] [blame] | 585 | static void tx_restart(struct net_device *dev) |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 586 | { |
| 587 | struct fs_enet_private *fep = netdev_priv(dev); |
Scott Wood | 31a5bb0 | 2007-10-01 14:20:58 -0500 | [diff] [blame] | 588 | fcc_t __iomem *fccp = fep->fcc.fccp; |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 589 | |
| 590 | C32(fccp, fcc_gfmr, FCC_GFMR_ENT); |
| 591 | udelay(10); |
| 592 | S32(fccp, fcc_gfmr, FCC_GFMR_ENT); |
| 593 | |
Scott Wood | 976de6a | 2007-10-02 10:55:58 -0500 | [diff] [blame] | 594 | fcc_cr_cmd(fep, CPM_CR_RESTART_TX); |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 595 | } |
| 596 | |
| 597 | /*************************************************************************/ |
| 598 | |
| 599 | const struct fs_ops fs_fcc_ops = { |
| 600 | .setup_data = setup_data, |
| 601 | .cleanup_data = cleanup_data, |
| 602 | .set_multicast_list = set_multicast_list, |
| 603 | .restart = restart, |
| 604 | .stop = stop, |
| 605 | .pre_request_irq = pre_request_irq, |
| 606 | .post_free_irq = post_free_irq, |
| 607 | .napi_clear_rx_event = napi_clear_rx_event, |
| 608 | .napi_enable_rx = napi_enable_rx, |
| 609 | .napi_disable_rx = napi_disable_rx, |
| 610 | .rx_bd_done = rx_bd_done, |
| 611 | .tx_kickstart = tx_kickstart, |
| 612 | .get_int_events = get_int_events, |
| 613 | .clear_int_events = clear_int_events, |
| 614 | .ev_error = ev_error, |
| 615 | .get_regs = get_regs, |
| 616 | .get_regs_len = get_regs_len, |
| 617 | .tx_restart = tx_restart, |
| 618 | .allocate_bd = allocate_bd, |
| 619 | .free_bd = free_bd, |
| 620 | }; |