blob: 9051aef112496fb8eb5caf2e14ed9fd2088a2d5c [file] [log] [blame]
Christian Lamparter289b0982009-06-23 10:37:13 -05001/*
2 * eeprom specific definitions for mac80211 Prism54 drivers
3 *
4 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
5 * Copyright (c) 2007-2009, Christian Lamparter <chunkeey@web.de>
6 *
7 * Based on:
8 * - the islsm (softmac prism54) driver, which is:
9 * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
10 *
11 * - LMAC API interface header file for STLC4560 (lmac_longbow.h)
12 * Copyright (C) 2007 Conexant Systems, Inc.
13 *
14 * - islmvc driver
15 * Copyright (C) 2001 Intersil Americas Inc.
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20 */
21
22#ifndef EEPROM_H
23#define EEPROM_H
24
25/* PDA defines are Copyright (C) 2005 Nokia Corporation (taken from islsm_pda.h) */
26
27struct pda_entry {
28 __le16 len; /* includes both code and data */
29 __le16 code;
30 u8 data[0];
31} __packed;
32
33struct eeprom_pda_wrap {
34 __le32 magic;
35 __le16 pad;
36 __le16 len;
37 __le32 arm_opcode;
38 u8 data[0];
39} __packed;
40
41struct p54_iq_autocal_entry {
42 __le16 iq_param[4];
43} __packed;
44
45struct pda_iq_autocal_entry {
46 __le16 freq;
47 struct p54_iq_autocal_entry params;
48} __packed;
49
50struct pda_channel_output_limit {
51 __le16 freq;
52 u8 val_bpsk;
53 u8 val_qpsk;
54 u8 val_16qam;
55 u8 val_64qam;
56 u8 rate_set_mask;
57 u8 rate_set_size;
58} __packed;
59
60struct pda_pa_curve_data_sample_rev0 {
61 u8 rf_power;
62 u8 pa_detector;
63 u8 pcv;
64} __packed;
65
66struct pda_pa_curve_data_sample_rev1 {
67 u8 rf_power;
68 u8 pa_detector;
69 u8 data_barker;
70 u8 data_bpsk;
71 u8 data_qpsk;
72 u8 data_16qam;
73 u8 data_64qam;
74} __packed;
75
76struct pda_pa_curve_data {
77 u8 cal_method_rev;
78 u8 channels;
79 u8 points_per_channel;
80 u8 padding;
81 u8 data[0];
82} __packed;
83
84struct pda_rssi_cal_entry {
85 __le16 mul;
86 __le16 add;
87} __packed;
88
89struct pda_country {
90 u8 regdomain;
91 u8 alpha2[2];
92 u8 flags;
93} __packed;
94
95struct pda_antenna_gain {
96 struct {
97 u8 gain_5GHz; /* 0.25 dBi units */
98 u8 gain_2GHz; /* 0.25 dBi units */
99 } __packed antenna[0];
100} __packed;
101
102struct pda_custom_wrapper {
103 __le16 entries;
104 __le16 entry_size;
105 __le16 offset;
106 __le16 len;
107 u8 data[0];
108} __packed;
109
110/*
111 * this defines the PDR codes used to build PDAs as defined in document
112 * number 553155. The current implementation mirrors version 1.1 of the
113 * document and lists only PDRs supported by the ARM platform.
114 */
115
116/* common and choice range (0x0000 - 0x0fff) */
117#define PDR_END 0x0000
118#define PDR_MANUFACTURING_PART_NUMBER 0x0001
119#define PDR_PDA_VERSION 0x0002
120#define PDR_NIC_SERIAL_NUMBER 0x0003
121#define PDR_NIC_RAM_SIZE 0x0005
122#define PDR_RFMODEM_SUP_RANGE 0x0006
123#define PDR_PRISM_MAC_SUP_RANGE 0x0007
124#define PDR_NIC_ID 0x0008
125
126#define PDR_MAC_ADDRESS 0x0101
127#define PDR_REGULATORY_DOMAIN_LIST 0x0103 /* obsolete */
128#define PDR_ALLOWED_CHAN_SET 0x0104
129#define PDR_DEFAULT_CHAN 0x0105
130#define PDR_TEMPERATURE_TYPE 0x0107
131
132#define PDR_IFR_SETTING 0x0200
133#define PDR_RFR_SETTING 0x0201
134#define PDR_3861_BASELINE_REG_SETTINGS 0x0202
135#define PDR_3861_SHADOW_REG_SETTINGS 0x0203
136#define PDR_3861_IFRF_REG_SETTINGS 0x0204
137
138#define PDR_3861_CHAN_CALIB_SET_POINTS 0x0300
139#define PDR_3861_CHAN_CALIB_INTEGRATOR 0x0301
140
141#define PDR_3842_PRISM_II_NIC_CONFIG 0x0400
142#define PDR_PRISM_USB_ID 0x0401
143#define PDR_PRISM_PCI_ID 0x0402
144#define PDR_PRISM_PCI_IF_CONFIG 0x0403
145#define PDR_PRISM_PCI_PM_CONFIG 0x0404
146
147#define PDR_3861_MF_TEST_CHAN_SET_POINTS 0x0900
148#define PDR_3861_MF_TEST_CHAN_INTEGRATORS 0x0901
149
150/* ARM range (0x1000 - 0x1fff) */
151#define PDR_COUNTRY_INFORMATION 0x1000 /* obsolete */
152#define PDR_INTERFACE_LIST 0x1001
153#define PDR_HARDWARE_PLATFORM_COMPONENT_ID 0x1002
154#define PDR_OEM_NAME 0x1003
155#define PDR_PRODUCT_NAME 0x1004
156#define PDR_UTF8_OEM_NAME 0x1005
157#define PDR_UTF8_PRODUCT_NAME 0x1006
158#define PDR_COUNTRY_LIST 0x1007
159#define PDR_DEFAULT_COUNTRY 0x1008
160
161#define PDR_ANTENNA_GAIN 0x1100
162
163#define PDR_PRISM_INDIGO_PA_CALIBRATION_DATA 0x1901
164#define PDR_RSSI_LINEAR_APPROXIMATION 0x1902
165#define PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS 0x1903
166#define PDR_PRISM_PA_CAL_CURVE_DATA 0x1904
167#define PDR_RSSI_LINEAR_APPROXIMATION_DUAL_BAND 0x1905
168#define PDR_PRISM_ZIF_TX_IQ_CALIBRATION 0x1906
169#define PDR_REGULATORY_POWER_LIMITS 0x1907
170#define PDR_RSSI_LINEAR_APPROXIMATION_EXTENDED 0x1908
171#define PDR_RADIATED_TRANSMISSION_CORRECTION 0x1909
172#define PDR_PRISM_TX_IQ_CALIBRATION 0x190a
173
174/* reserved range (0x2000 - 0x7fff) */
175
176/* customer range (0x8000 - 0xffff) */
177#define PDR_BASEBAND_REGISTERS 0x8000
178#define PDR_PER_CHANNEL_BASEBAND_REGISTERS 0x8001
179
180/* used by our modificated eeprom image */
181#define PDR_RSSI_LINEAR_APPROXIMATION_CUSTOM 0xDEAD
182#define PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS_CUSTOM 0xBEEF
183#define PDR_PRISM_PA_CAL_CURVE_DATA_CUSTOM 0xB05D
184
185/* Interface Definitions */
186#define PDR_INTERFACE_ROLE_SERVER 0x0000
187#define PDR_INTERFACE_ROLE_CLIENT 0x0001
188
189/* PDR definitions for default country & country list */
190#define PDR_COUNTRY_CERT_CODE 0x80
191#define PDR_COUNTRY_CERT_CODE_REAL 0x00
192#define PDR_COUNTRY_CERT_CODE_PSEUDO 0x80
193#define PDR_COUNTRY_CERT_BAND 0x40
194#define PDR_COUNTRY_CERT_BAND_2GHZ 0x00
195#define PDR_COUNTRY_CERT_BAND_5GHZ 0x40
196#define PDR_COUNTRY_CERT_IODOOR 0x30
197#define PDR_COUNTRY_CERT_IODOOR_BOTH 0x00
198#define PDR_COUNTRY_CERT_IODOOR_INDOOR 0x20
199#define PDR_COUNTRY_CERT_IODOOR_OUTDOOR 0x30
200#define PDR_COUNTRY_CERT_INDEX 0x0f
201
202/* Specific LMAC FW/HW variant definitions */
203#define PDR_SYNTH_FRONTEND_MASK 0x0007
204#define PDR_SYNTH_FRONTEND_DUETTE3 0x0001
205#define PDR_SYNTH_FRONTEND_DUETTE2 0x0002
206#define PDR_SYNTH_FRONTEND_FRISBEE 0x0003
207#define PDR_SYNTH_FRONTEND_XBOW 0x0004
208#define PDR_SYNTH_FRONTEND_LONGBOW 0x0005
209#define PDR_SYNTH_IQ_CAL_MASK 0x0018
210#define PDR_SYNTH_IQ_CAL_PA_DETECTOR 0x0000
211#define PDR_SYNTH_IQ_CAL_DISABLED 0x0008
212#define PDR_SYNTH_IQ_CAL_ZIF 0x0010
213#define PDR_SYNTH_FAA_SWITCH_MASK 0x0020
214#define PDR_SYNTH_FAA_SWITCH_ENABLED 0x0020
215#define PDR_SYNTH_24_GHZ_MASK 0x0040
216#define PDR_SYNTH_24_GHZ_DISABLED 0x0040
217#define PDR_SYNTH_5_GHZ_MASK 0x0080
218#define PDR_SYNTH_5_GHZ_DISABLED 0x0080
219#define PDR_SYNTH_RX_DIV_MASK 0x0100
220#define PDR_SYNTH_RX_DIV_SUPPORTED 0x0100
221#define PDR_SYNTH_TX_DIV_MASK 0x0200
222#define PDR_SYNTH_TX_DIV_SUPPORTED 0x0200
223#define PDR_SYNTH_ASM_MASK 0x0400
224#define PDR_SYNTH_ASM_XSWON 0x0400
225
226#endif /* EEPROM_H */